pciehp.h 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212
  1. /* SPDX-License-Identifier: GPL-2.0+ */
  2. /*
  3. * PCI Express Hot Plug Controller Driver
  4. *
  5. * Copyright (C) 1995,2001 Compaq Computer Corporation
  6. * Copyright (C) 2001 Greg Kroah-Hartman (greg@kroah.com)
  7. * Copyright (C) 2001 IBM Corp.
  8. * Copyright (C) 2003-2004 Intel Corporation
  9. *
  10. * All rights reserved.
  11. *
  12. * Send feedback to <greg@kroah.com>, <kristen.c.accardi@intel.com>
  13. *
  14. */
  15. #ifndef _PCIEHP_H
  16. #define _PCIEHP_H
  17. #include <linux/types.h>
  18. #include <linux/pci.h>
  19. #include <linux/pci_hotplug.h>
  20. #include <linux/delay.h>
  21. #include <linux/mutex.h>
  22. #include <linux/rwsem.h>
  23. #include <linux/workqueue.h>
  24. #include "../pcie/portdrv.h"
  25. extern bool pciehp_poll_mode;
  26. extern int pciehp_poll_time;
  27. /*
  28. * Set CONFIG_DYNAMIC_DEBUG=y and boot with 'dyndbg="file pciehp* +p"' to
  29. * enable debug messages.
  30. */
  31. #define ctrl_dbg(ctrl, format, arg...) \
  32. pci_dbg(ctrl->pcie->port, format, ## arg)
  33. #define ctrl_err(ctrl, format, arg...) \
  34. pci_err(ctrl->pcie->port, format, ## arg)
  35. #define ctrl_info(ctrl, format, arg...) \
  36. pci_info(ctrl->pcie->port, format, ## arg)
  37. #define ctrl_warn(ctrl, format, arg...) \
  38. pci_warn(ctrl->pcie->port, format, ## arg)
  39. #define SLOT_NAME_SIZE 10
  40. /**
  41. * struct controller - PCIe hotplug controller
  42. * @pcie: pointer to the controller's PCIe port service device
  43. * @dsn: cached copy of Device Serial Number of Function 0 in the hotplug slot
  44. * (PCIe r6.2 sec 7.9.3); used to determine whether a hotplugged device
  45. * was replaced with a different one during system sleep
  46. * @slot_cap: cached copy of the Slot Capabilities register
  47. * @inband_presence_disabled: In-Band Presence Detect Disable supported by
  48. * controller and disabled per spec recommendation (PCIe r5.0, appendix I
  49. * implementation note)
  50. * @slot_ctrl: cached copy of the Slot Control register
  51. * @ctrl_lock: serializes writes to the Slot Control register
  52. * @cmd_started: jiffies when the Slot Control register was last written;
  53. * the next write is allowed 1 second later, absent a Command Completed
  54. * interrupt (PCIe r4.0, sec 6.7.3.2)
  55. * @cmd_busy: flag set on Slot Control register write, cleared by IRQ handler
  56. * on reception of a Command Completed event
  57. * @queue: wait queue to wake up on reception of a Command Completed event,
  58. * used for synchronous writes to the Slot Control register
  59. * @pending_events: used by the IRQ handler to save events retrieved from the
  60. * Slot Status register for later consumption by the IRQ thread
  61. * @notification_enabled: whether the IRQ was requested successfully
  62. * @power_fault_detected: whether a power fault was detected by the hardware
  63. * that has not yet been cleared by the user
  64. * @poll_thread: thread to poll for slot events if no IRQ is available,
  65. * enabled with pciehp_poll_mode module parameter
  66. * @state: current state machine position
  67. * @state_lock: protects reads and writes of @state;
  68. * protects scheduling, execution and cancellation of @button_work
  69. * @button_work: work item to turn the slot on or off after 5 seconds
  70. * in response to an Attention Button press
  71. * @hotplug_slot: structure registered with the PCI hotplug core
  72. * @reset_lock: prevents access to the Data Link Layer Link Active bit in the
  73. * Link Status register and to the Presence Detect State bit in the Slot
  74. * Status register during a slot reset which may cause them to flap
  75. * @depth: Number of additional hotplug ports in the path to the root bus,
  76. * used as lock subclass for @reset_lock
  77. * @ist_running: flag to keep user request waiting while IRQ thread is running
  78. * @request_result: result of last user request submitted to the IRQ thread
  79. * @requester: wait queue to wake up on completion of user request,
  80. * used for synchronous slot enable/disable request via sysfs
  81. *
  82. * PCIe hotplug has a 1:1 relationship between controller and slot, hence
  83. * unlike other drivers, the two aren't represented by separate structures.
  84. */
  85. struct controller {
  86. struct pcie_device *pcie;
  87. u64 dsn;
  88. u32 slot_cap; /* capabilities and quirks */
  89. unsigned int inband_presence_disabled:1;
  90. u16 slot_ctrl; /* control register access */
  91. struct mutex ctrl_lock;
  92. unsigned long cmd_started;
  93. unsigned int cmd_busy:1;
  94. wait_queue_head_t queue;
  95. atomic_t pending_events; /* event handling */
  96. unsigned int notification_enabled:1;
  97. unsigned int power_fault_detected;
  98. struct task_struct *poll_thread;
  99. u8 state; /* state machine */
  100. struct mutex state_lock;
  101. struct delayed_work button_work;
  102. struct hotplug_slot hotplug_slot; /* hotplug core interface */
  103. struct rw_semaphore reset_lock;
  104. unsigned int depth;
  105. unsigned int ist_running;
  106. int request_result;
  107. wait_queue_head_t requester;
  108. };
  109. /**
  110. * DOC: Slot state
  111. *
  112. * @OFF_STATE: slot is powered off, no subordinate devices are enumerated
  113. * @BLINKINGON_STATE: slot will be powered on after the 5 second delay,
  114. * Power Indicator is blinking
  115. * @BLINKINGOFF_STATE: slot will be powered off after the 5 second delay,
  116. * Power Indicator is blinking
  117. * @POWERON_STATE: slot is currently powering on
  118. * @POWEROFF_STATE: slot is currently powering off
  119. * @ON_STATE: slot is powered on, subordinate devices have been enumerated
  120. */
  121. #define OFF_STATE 0
  122. #define BLINKINGON_STATE 1
  123. #define BLINKINGOFF_STATE 2
  124. #define POWERON_STATE 3
  125. #define POWEROFF_STATE 4
  126. #define ON_STATE 5
  127. /**
  128. * DOC: Flags to request an action from the IRQ thread
  129. *
  130. * These are stored together with events read from the Slot Status register,
  131. * hence must be greater than its 16-bit width.
  132. *
  133. * %DISABLE_SLOT: Disable the slot in response to a user request via sysfs or
  134. * an Attention Button press after the 5 second delay
  135. * %RERUN_ISR: Used by the IRQ handler to inform the IRQ thread that the
  136. * hotplug port was inaccessible when the interrupt occurred, requiring
  137. * that the IRQ handler is rerun by the IRQ thread after it has made the
  138. * hotplug port accessible by runtime resuming its parents to D0
  139. */
  140. #define DISABLE_SLOT (1 << 16)
  141. #define RERUN_ISR (1 << 17)
  142. #define ATTN_BUTTN(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_ABP)
  143. #define POWER_CTRL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PCP)
  144. #define MRL_SENS(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_MRLSP)
  145. #define ATTN_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_AIP)
  146. #define PWR_LED(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_PIP)
  147. #define NO_CMD_CMPL(ctrl) ((ctrl)->slot_cap & PCI_EXP_SLTCAP_NCCS)
  148. #define PSN(ctrl) (((ctrl)->slot_cap & PCI_EXP_SLTCAP_PSN) >> 19)
  149. void pciehp_request(struct controller *ctrl, int action);
  150. void pciehp_handle_button_press(struct controller *ctrl);
  151. void pciehp_handle_disable_request(struct controller *ctrl);
  152. void pciehp_handle_presence_or_link_change(struct controller *ctrl, u32 events);
  153. int pciehp_configure_device(struct controller *ctrl);
  154. void pciehp_unconfigure_device(struct controller *ctrl, bool presence);
  155. void pciehp_queue_pushbutton_work(struct work_struct *work);
  156. struct controller *pcie_init(struct pcie_device *dev);
  157. int pcie_init_notification(struct controller *ctrl);
  158. void pcie_shutdown_notification(struct controller *ctrl);
  159. void pcie_clear_hotplug_events(struct controller *ctrl);
  160. void pcie_enable_interrupt(struct controller *ctrl);
  161. void pcie_disable_interrupt(struct controller *ctrl);
  162. int pciehp_power_on_slot(struct controller *ctrl);
  163. void pciehp_power_off_slot(struct controller *ctrl);
  164. void pciehp_get_power_status(struct controller *ctrl, u8 *status);
  165. #define INDICATOR_NOOP -1 /* Leave indicator unchanged */
  166. void pciehp_set_indicators(struct controller *ctrl, int pwr, int attn);
  167. void pciehp_get_latch_status(struct controller *ctrl, u8 *status);
  168. int pciehp_query_power_fault(struct controller *ctrl);
  169. int pciehp_card_present(struct controller *ctrl);
  170. int pciehp_card_present_or_link_active(struct controller *ctrl);
  171. int pciehp_check_link_status(struct controller *ctrl);
  172. int pciehp_check_link_active(struct controller *ctrl);
  173. bool pciehp_device_replaced(struct controller *ctrl);
  174. void pciehp_release_ctrl(struct controller *ctrl);
  175. int pciehp_sysfs_enable_slot(struct hotplug_slot *hotplug_slot);
  176. int pciehp_sysfs_disable_slot(struct hotplug_slot *hotplug_slot);
  177. int pciehp_reset_slot(struct hotplug_slot *hotplug_slot, bool probe);
  178. int pciehp_get_attention_status(struct hotplug_slot *hotplug_slot, u8 *status);
  179. int pciehp_set_raw_indicator_status(struct hotplug_slot *h_slot, u8 status);
  180. int pciehp_get_raw_indicator_status(struct hotplug_slot *h_slot, u8 *status);
  181. int pciehp_slot_reset(struct pcie_device *dev);
  182. static inline const char *slot_name(struct controller *ctrl)
  183. {
  184. return hotplug_slot_name(&ctrl->hotplug_slot);
  185. }
  186. static inline struct controller *to_ctrl(struct hotplug_slot *hotplug_slot)
  187. {
  188. return container_of(hotplug_slot, struct controller, hotplug_slot);
  189. }
  190. #endif /* _PCIEHP_H */