Kconfig 17 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. menu "DesignWare-based PCIe controllers"
  3. depends on PCI
  4. config PCIE_DW
  5. bool
  6. config PCIE_DW_DEBUGFS
  7. bool "DesignWare PCIe debugfs entries"
  8. depends on DEBUG_FS
  9. depends on PCIE_DW_HOST || PCIE_DW_EP
  10. help
  11. Say Y here to enable debugfs entries for the PCIe controller. These
  12. entries provide various debug features related to the controller and
  13. expose the RAS DES capabilities such as Silicon Debug, Error Injection
  14. and Statistical Counters.
  15. config PCIE_DW_HOST
  16. bool
  17. select PCIE_DW
  18. select IRQ_MSI_LIB
  19. select PCI_HOST_COMMON
  20. config PCIE_DW_EP
  21. bool
  22. select PCIE_DW
  23. config PCIE_AL
  24. bool "Amazon Annapurna Labs PCIe controller"
  25. depends on OF && (ARM64 || COMPILE_TEST)
  26. depends on PCI_MSI
  27. select PCIE_DW_HOST
  28. select PCI_ECAM
  29. help
  30. Say Y here to enable support of the Amazon's Annapurna Labs PCIe
  31. controller IP on Amazon SoCs. The PCIe controller uses the DesignWare
  32. core plus Annapurna Labs proprietary hardware wrappers. This is
  33. required only for DT-based platforms. ACPI platforms with the
  34. Annapurna Labs PCIe controller don't need to enable this.
  35. config PCIE_AMD_MDB
  36. bool "AMD MDB Versal2 PCIe controller"
  37. depends on OF && (ARM64 || COMPILE_TEST)
  38. depends on PCI_MSI
  39. select PCIE_DW_HOST
  40. help
  41. Say Y here if you want to enable PCIe controller support on AMD
  42. Versal2 SoCs. The AMD MDB Versal2 PCIe controller is based on
  43. DesignWare IP and therefore the driver re-uses the DesignWare
  44. core functions to implement the driver.
  45. config PCI_MESON
  46. tristate "Amlogic Meson PCIe controller"
  47. default m if ARCH_MESON
  48. depends on PCI_MSI
  49. select PCIE_DW_HOST
  50. help
  51. Say Y here if you want to enable PCI controller support on Amlogic
  52. SoCs. The PCI controller on Amlogic is based on DesignWare hardware
  53. and therefore the driver re-uses the DesignWare core functions to
  54. implement the driver.
  55. config PCIE_ARTPEC6
  56. bool
  57. config PCIE_ARTPEC6_HOST
  58. bool "Axis ARTPEC-6 PCIe controller (host mode)"
  59. depends on MACH_ARTPEC6 || COMPILE_TEST
  60. depends on PCI_MSI
  61. select PCIE_DW_HOST
  62. select PCIE_ARTPEC6
  63. help
  64. Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
  65. host mode. This uses the DesignWare core.
  66. config PCIE_ARTPEC6_EP
  67. bool "Axis ARTPEC-6 PCIe controller (endpoint mode)"
  68. depends on MACH_ARTPEC6 || COMPILE_TEST
  69. depends on PCI_ENDPOINT
  70. select PCIE_DW_EP
  71. select PCIE_ARTPEC6
  72. help
  73. Enables support for the PCIe controller in the ARTPEC-6 SoC to work in
  74. endpoint mode. This uses the DesignWare core.
  75. config PCIE_BT1
  76. tristate "Baikal-T1 PCIe controller"
  77. depends on MIPS_BAIKAL_T1 || COMPILE_TEST
  78. depends on PCI_MSI
  79. select PCIE_DW_HOST
  80. help
  81. Enables support for the PCIe controller in the Baikal-T1 SoC to work
  82. in host mode. It's based on the Synopsys DWC PCIe v4.60a IP-core.
  83. config PCI_IMX6
  84. bool
  85. config PCI_IMX6_HOST
  86. bool "Freescale i.MX6/7/8 PCIe controller (host mode)"
  87. depends on ARCH_MXC || COMPILE_TEST
  88. depends on PCI_MSI
  89. select PCIE_DW_HOST
  90. select PCI_IMX6
  91. help
  92. Enables support for the PCIe controller in the i.MX SoCs to
  93. work in Root Complex mode. The PCI controller on i.MX is based
  94. on DesignWare hardware and therefore the driver re-uses the
  95. DesignWare core functions to implement the driver.
  96. config PCI_IMX6_EP
  97. bool "Freescale i.MX6/7/8 PCIe controller (endpoint mode)"
  98. depends on ARCH_MXC || COMPILE_TEST
  99. depends on PCI_ENDPOINT
  100. select PCIE_DW_EP
  101. select PCI_IMX6
  102. help
  103. Enables support for the PCIe controller in the i.MX SoCs to
  104. work in endpoint mode. The PCI controller on i.MX is based
  105. on DesignWare hardware and therefore the driver re-uses the
  106. DesignWare core functions to implement the driver.
  107. config PCI_LAYERSCAPE
  108. bool "Freescale Layerscape PCIe controller (host mode)"
  109. depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
  110. depends on PCI_MSI
  111. select PCIE_DW_HOST
  112. select MFD_SYSCON
  113. help
  114. Say Y here if you want to enable PCIe controller support on Layerscape
  115. SoCs to work in Host mode.
  116. This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
  117. determines which PCIe controller works in EP mode and which PCIe
  118. controller works in RC mode.
  119. config PCI_LAYERSCAPE_EP
  120. bool "Freescale Layerscape PCIe controller (endpoint mode)"
  121. depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST)
  122. depends on PCI_ENDPOINT
  123. select PCIE_DW_EP
  124. help
  125. Say Y here if you want to enable PCIe controller support on Layerscape
  126. SoCs to work in Endpoint mode.
  127. This controller can work either as EP or RC. The RCW[HOST_AGT_PEX]
  128. determines which PCIe controller works in EP mode and which PCIe
  129. controller works in RC mode.
  130. config PCI_HISI
  131. depends on OF && (ARM64 || COMPILE_TEST)
  132. bool "HiSilicon Hip05 and Hip06 SoCs PCIe controller"
  133. depends on PCI_MSI
  134. select PCIE_DW_HOST
  135. select PCI_HOST_COMMON
  136. help
  137. Say Y here if you want PCIe controller support on HiSilicon
  138. Hip05 and Hip06 SoCs
  139. config PCIE_KIRIN
  140. depends on OF && (ARM64 || COMPILE_TEST)
  141. tristate "HiSilicon Kirin PCIe controller"
  142. depends on PCI_MSI
  143. select PCIE_DW_HOST
  144. select REGMAP_MMIO
  145. help
  146. Say Y here if you want PCIe controller support
  147. on HiSilicon Kirin series SoCs.
  148. config PCIE_HISI_STB
  149. bool "HiSilicon STB PCIe controller"
  150. depends on ARCH_HISI || COMPILE_TEST
  151. depends on PCI_MSI
  152. select PCIE_DW_HOST
  153. help
  154. Say Y here if you want PCIe controller support on HiSilicon STB SoCs
  155. config PCIE_INTEL_GW
  156. bool "Intel Gateway PCIe controller "
  157. depends on OF && (X86 || COMPILE_TEST)
  158. depends on PCI_MSI
  159. select PCIE_DW_HOST
  160. help
  161. Say 'Y' here to enable PCIe Host controller support on Intel
  162. Gateway SoCs.
  163. The PCIe controller uses the DesignWare core plus Intel-specific
  164. hardware wrappers.
  165. config PCIE_KEEMBAY
  166. bool
  167. config PCIE_KEEMBAY_HOST
  168. bool "Intel Keem Bay PCIe controller (host mode)"
  169. depends on ARCH_KEEMBAY || COMPILE_TEST
  170. depends on PCI_MSI
  171. select PCIE_DW_HOST
  172. select PCIE_KEEMBAY
  173. help
  174. Say 'Y' here to enable support for the PCIe controller in Keem Bay
  175. to work in host mode.
  176. The PCIe controller is based on DesignWare Hardware and uses
  177. DesignWare core functions.
  178. config PCIE_KEEMBAY_EP
  179. bool "Intel Keem Bay PCIe controller (endpoint mode)"
  180. depends on ARCH_KEEMBAY || COMPILE_TEST
  181. depends on PCI_MSI
  182. depends on PCI_ENDPOINT
  183. select PCIE_DW_EP
  184. select PCIE_KEEMBAY
  185. help
  186. Say 'Y' here to enable support for the PCIe controller in Keem Bay
  187. to work in endpoint mode.
  188. The PCIe controller is based on DesignWare Hardware and uses
  189. DesignWare core functions.
  190. config PCIE_ARMADA_8K
  191. bool "Marvell Armada-8K PCIe controller"
  192. depends on ARCH_MVEBU || COMPILE_TEST
  193. depends on PCI_MSI
  194. select PCIE_DW_HOST
  195. help
  196. Say Y here if you want to enable PCIe controller support on
  197. Armada-8K SoCs. The PCIe controller on Armada-8K is based on
  198. DesignWare hardware and therefore the driver re-uses the
  199. DesignWare core functions to implement the driver.
  200. config PCIE_TEGRA194
  201. tristate
  202. config PCIE_TEGRA194_HOST
  203. tristate "NVIDIA Tegra194 (and later) PCIe controller (host mode)"
  204. depends on (ARCH_TEGRA && ARM64) || COMPILE_TEST
  205. depends on PCI_MSI
  206. select PCIE_DW_HOST
  207. select PHY_TEGRA194_P2U
  208. select PCIE_TEGRA194
  209. help
  210. Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
  211. work in host mode. There are two instances of PCIe controllers in
  212. Tegra194. This controller can work either as EP or RC. In order to
  213. enable host-specific features PCIE_TEGRA194_HOST must be selected and
  214. in order to enable device-specific features PCIE_TEGRA194_EP must be
  215. selected. This uses the DesignWare core.
  216. config PCIE_TEGRA194_EP
  217. tristate "NVIDIA Tegra194 (and later) PCIe controller (endpoint mode)"
  218. depends on (ARCH_TEGRA && ARM64) || COMPILE_TEST
  219. depends on PCI_ENDPOINT
  220. select PCIE_DW_EP
  221. select PHY_TEGRA194_P2U
  222. select PCIE_TEGRA194
  223. help
  224. Enables support for the PCIe controller in the NVIDIA Tegra194 SoC to
  225. work in endpoint mode. There are two instances of PCIe controllers in
  226. Tegra194. This controller can work either as EP or RC. In order to
  227. enable host-specific features PCIE_TEGRA194_HOST must be selected and
  228. in order to enable device-specific features PCIE_TEGRA194_EP must be
  229. selected. This uses the DesignWare core.
  230. config PCIE_NXP_S32G
  231. bool "NXP S32G PCIe controller (host mode)"
  232. depends on ARCH_S32 || COMPILE_TEST
  233. select PCIE_DW_HOST
  234. help
  235. Enable support for the PCIe controller in NXP S32G based boards to
  236. work in Host mode. The controller is based on DesignWare IP and
  237. can work either as RC or EP. In order to enable host-specific
  238. features PCIE_NXP_S32G must be selected.
  239. config PCIE_DW_PLAT
  240. bool
  241. config PCIE_DW_PLAT_HOST
  242. bool "Platform bus based DesignWare PCIe controller (host mode)"
  243. depends on PCI_MSI
  244. select PCIE_DW_HOST
  245. select PCIE_DW_PLAT
  246. help
  247. Enables support for the PCIe controller in the Designware IP to
  248. work in host mode. There are two instances of PCIe controller in
  249. Designware IP.
  250. This controller can work either as EP or RC. In order to enable
  251. host-specific features PCIE_DW_PLAT_HOST must be selected and in
  252. order to enable device-specific features PCI_DW_PLAT_EP must be
  253. selected.
  254. config PCIE_DW_PLAT_EP
  255. bool "Platform bus based DesignWare PCIe controller (endpoint mode)"
  256. depends on PCI && PCI_MSI
  257. depends on PCI_ENDPOINT
  258. select PCIE_DW_EP
  259. select PCIE_DW_PLAT
  260. help
  261. Enables support for the PCIe controller in the Designware IP to
  262. work in endpoint mode. There are two instances of PCIe controller
  263. in Designware IP.
  264. This controller can work either as EP or RC. In order to enable
  265. host-specific features PCIE_DW_PLAT_HOST must be selected and in
  266. order to enable device-specific features PCI_DW_PLAT_EP must be
  267. selected.
  268. config PCIE_QCOM_COMMON
  269. bool
  270. config PCIE_QCOM
  271. bool "Qualcomm PCIe controller (host mode)"
  272. depends on OF && (ARCH_QCOM || COMPILE_TEST)
  273. depends on PCI_MSI
  274. select PCIE_DW_HOST
  275. select CRC8
  276. select PCIE_QCOM_COMMON
  277. select PCI_HOST_COMMON
  278. select PCI_PWRCTRL_SLOT
  279. help
  280. Say Y here to enable PCIe controller support on Qualcomm SoCs. The
  281. PCIe controller uses the DesignWare core plus Qualcomm-specific
  282. hardware wrappers.
  283. config PCIE_QCOM_EP
  284. tristate "Qualcomm PCIe controller (endpoint mode)"
  285. depends on OF && (ARCH_QCOM || COMPILE_TEST)
  286. depends on PCI_ENDPOINT
  287. select PCIE_DW_EP
  288. select PCIE_QCOM_COMMON
  289. help
  290. Say Y here to enable support for the PCIe controllers on Qualcomm SoCs
  291. to work in endpoint mode. The PCIe controller uses the DesignWare core
  292. plus Qualcomm-specific hardware wrappers.
  293. config PCIE_RCAR_GEN4
  294. tristate
  295. config PCIE_RCAR_GEN4_HOST
  296. tristate "Renesas R-Car Gen4 PCIe controller (host mode)"
  297. depends on ARCH_RENESAS || COMPILE_TEST
  298. depends on PCI_MSI
  299. select PCIE_DW_HOST
  300. select PCIE_RCAR_GEN4
  301. help
  302. Say Y here if you want PCIe controller (host mode) on R-Car Gen4 SoCs.
  303. To compile this driver as a module, choose M here: the module will be
  304. called pcie-rcar-gen4.ko. This uses the DesignWare core.
  305. config PCIE_RCAR_GEN4_EP
  306. tristate "Renesas R-Car Gen4 PCIe controller (endpoint mode)"
  307. depends on ARCH_RENESAS || COMPILE_TEST
  308. depends on PCI_ENDPOINT
  309. select PCIE_DW_EP
  310. select PCIE_RCAR_GEN4
  311. help
  312. Say Y here if you want PCIe controller (endpoint mode) on R-Car Gen4
  313. SoCs. To compile this driver as a module, choose M here: the module
  314. will be called pcie-rcar-gen4.ko. This uses the DesignWare core.
  315. config PCIE_ROCKCHIP_DW
  316. bool
  317. config PCIE_ROCKCHIP_DW_HOST
  318. bool "Rockchip DesignWare PCIe controller (host mode)"
  319. depends on PCI_MSI
  320. depends on ARCH_ROCKCHIP || COMPILE_TEST
  321. depends on OF
  322. select PCIE_DW_HOST
  323. select PCIE_ROCKCHIP_DW
  324. help
  325. Enables support for the DesignWare PCIe controller in the
  326. Rockchip SoC (except RK3399) to work in host mode.
  327. config PCIE_ROCKCHIP_DW_EP
  328. bool "Rockchip DesignWare PCIe controller (endpoint mode)"
  329. depends on ARCH_ROCKCHIP || COMPILE_TEST
  330. depends on OF
  331. depends on PCI_ENDPOINT
  332. select PCIE_DW_EP
  333. select PCIE_ROCKCHIP_DW
  334. help
  335. Enables support for the DesignWare PCIe controller in the
  336. Rockchip SoC (except RK3399) to work in endpoint mode.
  337. config PCI_EXYNOS
  338. tristate "Samsung Exynos PCIe controller"
  339. depends on ARCH_EXYNOS || COMPILE_TEST
  340. depends on PCI_MSI
  341. select PCIE_DW_HOST
  342. help
  343. Enables support for the PCIe controller in the Samsung Exynos SoCs
  344. to work in host mode. The PCI controller is based on the DesignWare
  345. hardware and therefore the driver re-uses the DesignWare core
  346. functions to implement the driver.
  347. config PCIE_FU740
  348. bool "SiFive FU740 PCIe controller"
  349. depends on PCI_MSI
  350. depends on ARCH_SIFIVE || COMPILE_TEST
  351. select PCIE_DW_HOST
  352. help
  353. Say Y here if you want PCIe controller support for the SiFive
  354. FU740.
  355. config PCIE_UNIPHIER
  356. bool "Socionext UniPhier PCIe controller (host mode)"
  357. depends on ARCH_UNIPHIER || COMPILE_TEST
  358. depends on OF && HAS_IOMEM
  359. depends on PCI_MSI
  360. select PCIE_DW_HOST
  361. help
  362. Say Y here if you want PCIe host controller support on UniPhier SoCs.
  363. This driver supports LD20 and PXs3 SoCs.
  364. config PCIE_UNIPHIER_EP
  365. bool "Socionext UniPhier PCIe controller (endpoint mode)"
  366. depends on ARCH_UNIPHIER || COMPILE_TEST
  367. depends on OF && HAS_IOMEM
  368. depends on PCI_ENDPOINT
  369. select PCIE_DW_EP
  370. help
  371. Say Y here if you want PCIe endpoint controller support on
  372. UniPhier SoCs. This driver supports Pro5 SoC.
  373. config PCIE_SOPHGO_DW
  374. bool "Sophgo DesignWare PCIe controller (host mode)"
  375. depends on ARCH_SOPHGO || COMPILE_TEST
  376. depends on PCI_MSI
  377. depends on OF
  378. select PCIE_DW_HOST
  379. help
  380. Say Y here if you want PCIe host controller support on
  381. Sophgo SoCs.
  382. config PCIE_SPACEMIT_K1
  383. tristate "SpacemiT K1 PCIe controller (host mode)"
  384. depends on ARCH_SPACEMIT || COMPILE_TEST
  385. depends on HAS_IOMEM
  386. select PCIE_DW_HOST
  387. select PCI_PWRCTRL_SLOT
  388. default ARCH_SPACEMIT
  389. help
  390. Enables support for the DesignWare based PCIe controller in
  391. the SpacemiT K1 SoC operating in host mode. Three controllers
  392. are available on the K1 SoC; the first of these shares a PHY
  393. with a USB 3.0 host controller (one or the other can be used).
  394. config PCIE_SPEAR13XX
  395. bool "STMicroelectronics SPEAr PCIe controller"
  396. depends on ARCH_SPEAR13XX || COMPILE_TEST
  397. depends on PCI_MSI
  398. select PCIE_DW_HOST
  399. help
  400. Say Y here if you want PCIe support on SPEAr13XX SoCs.
  401. config PCIE_STM32_HOST
  402. tristate "STMicroelectronics STM32MP25 PCIe Controller (host mode)"
  403. depends on ARCH_STM32 || COMPILE_TEST
  404. depends on PCI_MSI
  405. select PCIE_DW_HOST
  406. help
  407. Enables Root Complex (RC) support for the DesignWare core based PCIe
  408. controller found in STM32MP25 SoC.
  409. This driver can also be built as a module. If so, the module
  410. will be called pcie-stm32.
  411. config PCIE_STM32_EP
  412. tristate "STMicroelectronics STM32MP25 PCIe Controller (endpoint mode)"
  413. depends on ARCH_STM32 || COMPILE_TEST
  414. depends on PCI_ENDPOINT
  415. select PCIE_DW_EP
  416. help
  417. Enables Endpoint (EP) support for the DesignWare core based PCIe
  418. controller found in STM32MP25 SoC.
  419. This driver can also be built as a module. If so, the module
  420. will be called pcie-stm32-ep.
  421. config PCI_DRA7XX
  422. tristate
  423. config PCI_DRA7XX_HOST
  424. tristate "TI DRA7xx PCIe controller (host mode)"
  425. depends on SOC_DRA7XX || COMPILE_TEST
  426. depends on OF && HAS_IOMEM && TI_PIPE3
  427. depends on PCI_MSI
  428. select PCIE_DW_HOST
  429. select PCI_DRA7XX
  430. default y if SOC_DRA7XX
  431. help
  432. Enables support for the PCIe controller in the DRA7xx SoC to work in
  433. host mode. There are two instances of PCIe controller in DRA7xx.
  434. This controller can work either as EP or RC. In order to enable
  435. host-specific features PCI_DRA7XX_HOST must be selected and in order
  436. to enable device-specific features PCI_DRA7XX_EP must be selected.
  437. This uses the DesignWare core.
  438. config PCI_DRA7XX_EP
  439. tristate "TI DRA7xx PCIe controller (endpoint mode)"
  440. depends on SOC_DRA7XX || COMPILE_TEST
  441. depends on OF && HAS_IOMEM && TI_PIPE3
  442. depends on PCI_ENDPOINT
  443. select PCIE_DW_EP
  444. select PCI_DRA7XX
  445. help
  446. Enables support for the PCIe controller in the DRA7xx SoC to work in
  447. endpoint mode. There are two instances of PCIe controller in DRA7xx.
  448. This controller can work either as EP or RC. In order to enable
  449. host-specific features PCI_DRA7XX_HOST must be selected and in order
  450. to enable device-specific features PCI_DRA7XX_EP must be selected.
  451. This uses the DesignWare core.
  452. # ARM32 platforms use hook_fault_code() and cannot support loadable module.
  453. config PCI_KEYSTONE
  454. bool
  455. # On non-ARM32 platforms, loadable module can be supported.
  456. config PCI_KEYSTONE_TRISTATE
  457. tristate
  458. config PCI_KEYSTONE_HOST
  459. tristate "TI Keystone PCIe controller (host mode)"
  460. depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
  461. depends on PCI_MSI
  462. select PCIE_DW_HOST
  463. select PCI_KEYSTONE if ARM
  464. select PCI_KEYSTONE_TRISTATE if !ARM
  465. help
  466. Enables support for the PCIe controller in the Keystone SoC to
  467. work in host mode. The PCI controller on Keystone is based on
  468. DesignWare hardware and therefore the driver re-uses the
  469. DesignWare core functions to implement the driver.
  470. config PCI_KEYSTONE_EP
  471. tristate "TI Keystone PCIe controller (endpoint mode)"
  472. depends on ARCH_KEYSTONE || ARCH_K3 || COMPILE_TEST
  473. depends on PCI_ENDPOINT
  474. select PCIE_DW_EP
  475. select PCI_KEYSTONE if ARM
  476. select PCI_KEYSTONE_TRISTATE if !ARM
  477. help
  478. Enables support for the PCIe controller in the Keystone SoC to
  479. work in endpoint mode. The PCI controller on Keystone is based
  480. on DesignWare hardware and therefore the driver re-uses the
  481. DesignWare core functions to implement the driver.
  482. config PCIE_VISCONTI_HOST
  483. bool "Toshiba Visconti PCIe controller"
  484. depends on ARCH_VISCONTI || COMPILE_TEST
  485. depends on PCI_MSI
  486. select PCIE_DW_HOST
  487. help
  488. Say Y here if you want PCIe controller support on Toshiba Visconti SoC.
  489. This driver supports TMPV7708 SoC.
  490. endmenu