bus.c 12 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * From setup-res.c, by:
  4. * Dave Rusling (david.rusling@reo.mts.dec.com)
  5. * David Mosberger (davidm@cs.arizona.edu)
  6. * David Miller (davem@redhat.com)
  7. * Ivan Kokshaysky (ink@jurassic.park.msu.ru)
  8. */
  9. #include <linux/module.h>
  10. #include <linux/kernel.h>
  11. #include <linux/cleanup.h>
  12. #include <linux/pci.h>
  13. #include <linux/errno.h>
  14. #include <linux/ioport.h>
  15. #include <linux/of.h>
  16. #include <linux/of_platform.h>
  17. #include <linux/platform_device.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/proc_fs.h>
  20. #include <linux/slab.h>
  21. #include "pci.h"
  22. /*
  23. * The first PCI_BRIDGE_RESOURCE_NUM PCI bus resources (those that correspond
  24. * to P2P or CardBus bridge windows) go in a table. Additional ones (for
  25. * buses below host bridges or subtractive decode bridges) go in the list.
  26. * Use pci_bus_for_each_resource() to iterate through all the resources.
  27. */
  28. struct pci_bus_resource {
  29. struct list_head list;
  30. struct resource *res;
  31. };
  32. void pci_add_resource_offset(struct list_head *resources, struct resource *res,
  33. resource_size_t offset)
  34. {
  35. struct resource_entry *entry;
  36. entry = resource_list_create_entry(res, 0);
  37. if (!entry) {
  38. pr_err("PCI: can't add host bridge window %pR\n", res);
  39. return;
  40. }
  41. entry->offset = offset;
  42. resource_list_add_tail(entry, resources);
  43. }
  44. EXPORT_SYMBOL(pci_add_resource_offset);
  45. void pci_add_resource(struct list_head *resources, struct resource *res)
  46. {
  47. pci_add_resource_offset(resources, res, 0);
  48. }
  49. EXPORT_SYMBOL(pci_add_resource);
  50. void pci_free_resource_list(struct list_head *resources)
  51. {
  52. resource_list_free(resources);
  53. }
  54. EXPORT_SYMBOL(pci_free_resource_list);
  55. void pci_bus_add_resource(struct pci_bus *bus, struct resource *res)
  56. {
  57. struct pci_bus_resource *bus_res;
  58. bus_res = kzalloc_obj(struct pci_bus_resource);
  59. if (!bus_res) {
  60. dev_err(&bus->dev, "can't add %pR resource\n", res);
  61. return;
  62. }
  63. bus_res->res = res;
  64. list_add_tail(&bus_res->list, &bus->resources);
  65. }
  66. struct resource *pci_bus_resource_n(const struct pci_bus *bus, int n)
  67. {
  68. struct pci_bus_resource *bus_res;
  69. if (n < PCI_BRIDGE_RESOURCE_NUM)
  70. return bus->resource[n];
  71. n -= PCI_BRIDGE_RESOURCE_NUM;
  72. list_for_each_entry(bus_res, &bus->resources, list) {
  73. if (n-- == 0)
  74. return bus_res->res;
  75. }
  76. return NULL;
  77. }
  78. EXPORT_SYMBOL_GPL(pci_bus_resource_n);
  79. void pci_bus_remove_resource(struct pci_bus *bus, struct resource *res)
  80. {
  81. struct pci_bus_resource *bus_res, *tmp;
  82. int i;
  83. for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++) {
  84. if (bus->resource[i] == res) {
  85. bus->resource[i] = NULL;
  86. return;
  87. }
  88. }
  89. list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
  90. if (bus_res->res == res) {
  91. list_del(&bus_res->list);
  92. kfree(bus_res);
  93. return;
  94. }
  95. }
  96. }
  97. void pci_bus_remove_resources(struct pci_bus *bus)
  98. {
  99. int i;
  100. struct pci_bus_resource *bus_res, *tmp;
  101. for (i = 0; i < PCI_BRIDGE_RESOURCE_NUM; i++)
  102. bus->resource[i] = NULL;
  103. list_for_each_entry_safe(bus_res, tmp, &bus->resources, list) {
  104. list_del(&bus_res->list);
  105. kfree(bus_res);
  106. }
  107. }
  108. int devm_request_pci_bus_resources(struct device *dev,
  109. struct list_head *resources)
  110. {
  111. struct resource_entry *win;
  112. struct resource *parent, *res;
  113. int err;
  114. resource_list_for_each_entry(win, resources) {
  115. res = win->res;
  116. switch (resource_type(res)) {
  117. case IORESOURCE_IO:
  118. parent = &ioport_resource;
  119. break;
  120. case IORESOURCE_MEM:
  121. parent = &iomem_resource;
  122. break;
  123. default:
  124. continue;
  125. }
  126. err = devm_request_resource(dev, parent, res);
  127. if (err)
  128. return err;
  129. }
  130. return 0;
  131. }
  132. EXPORT_SYMBOL_GPL(devm_request_pci_bus_resources);
  133. static struct pci_bus_region pci_32_bit = {0, 0xffffffffULL};
  134. #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
  135. static struct pci_bus_region pci_64_bit = {0,
  136. (pci_bus_addr_t) 0xffffffffffffffffULL};
  137. static struct pci_bus_region pci_high = {(pci_bus_addr_t) 0x100000000ULL,
  138. (pci_bus_addr_t) 0xffffffffffffffffULL};
  139. #endif
  140. /*
  141. * @res contains CPU addresses. Clip it so the corresponding bus addresses
  142. * on @bus are entirely within @region. This is used to control the bus
  143. * addresses of resources we allocate, e.g., we may need a resource that
  144. * can be mapped by a 32-bit BAR.
  145. */
  146. static void pci_clip_resource_to_region(struct pci_bus *bus,
  147. struct resource *res,
  148. struct pci_bus_region *region)
  149. {
  150. struct pci_bus_region r;
  151. pcibios_resource_to_bus(bus, &r, res);
  152. if (r.start < region->start)
  153. r.start = region->start;
  154. if (r.end > region->end)
  155. r.end = region->end;
  156. if (r.end < r.start)
  157. res->end = res->start - 1;
  158. else
  159. pcibios_bus_to_resource(bus, res, &r);
  160. }
  161. static int pci_bus_alloc_from_region(struct pci_bus *bus, struct resource *res,
  162. resource_size_t size, resource_size_t align,
  163. resource_size_t min, unsigned long type_mask,
  164. resource_alignf alignf,
  165. void *alignf_data,
  166. struct pci_bus_region *region)
  167. {
  168. struct resource *r, avail;
  169. resource_size_t max;
  170. int ret;
  171. type_mask |= IORESOURCE_TYPE_BITS;
  172. pci_bus_for_each_resource(bus, r) {
  173. resource_size_t min_used = min;
  174. if (!r)
  175. continue;
  176. if (r->flags & (IORESOURCE_UNSET|IORESOURCE_DISABLED))
  177. continue;
  178. /* type_mask must match */
  179. if ((res->flags ^ r->flags) & type_mask)
  180. continue;
  181. /* We cannot allocate a non-prefetching resource
  182. from a pre-fetching area */
  183. if ((r->flags & IORESOURCE_PREFETCH) &&
  184. !(res->flags & IORESOURCE_PREFETCH))
  185. continue;
  186. avail = *r;
  187. pci_clip_resource_to_region(bus, &avail, region);
  188. /*
  189. * "min" is typically PCIBIOS_MIN_IO or PCIBIOS_MIN_MEM to
  190. * protect badly documented motherboard resources, but if
  191. * this is an already-configured bridge window, its start
  192. * overrides "min".
  193. */
  194. if (avail.start)
  195. min_used = avail.start;
  196. max = avail.end;
  197. /* Don't bother if available space isn't large enough */
  198. if (size > max - min_used + 1)
  199. continue;
  200. /* Ok, try it out.. */
  201. ret = allocate_resource(r, res, size, min_used, max,
  202. align, alignf, alignf_data);
  203. if (ret == 0)
  204. return 0;
  205. }
  206. return -ENOMEM;
  207. }
  208. /**
  209. * pci_bus_alloc_resource - allocate a resource from a parent bus
  210. * @bus: PCI bus
  211. * @res: resource to allocate
  212. * @size: size of resource to allocate
  213. * @align: alignment of resource to allocate
  214. * @min: minimum /proc/iomem address to allocate
  215. * @type_mask: IORESOURCE_* type flags
  216. * @alignf: resource alignment function
  217. * @alignf_data: data argument for resource alignment function
  218. *
  219. * Given the PCI bus a device resides on, the size, minimum address,
  220. * alignment and type, try to find an acceptable resource allocation
  221. * for a specific device resource.
  222. */
  223. int pci_bus_alloc_resource(struct pci_bus *bus, struct resource *res,
  224. resource_size_t size, resource_size_t align,
  225. resource_size_t min, unsigned long type_mask,
  226. resource_alignf alignf,
  227. void *alignf_data)
  228. {
  229. #ifdef CONFIG_ARCH_DMA_ADDR_T_64BIT
  230. int rc;
  231. if (res->flags & IORESOURCE_MEM_64) {
  232. rc = pci_bus_alloc_from_region(bus, res, size, align, min,
  233. type_mask, alignf, alignf_data,
  234. &pci_high);
  235. if (rc == 0)
  236. return 0;
  237. return pci_bus_alloc_from_region(bus, res, size, align, min,
  238. type_mask, alignf, alignf_data,
  239. &pci_64_bit);
  240. }
  241. #endif
  242. return pci_bus_alloc_from_region(bus, res, size, align, min,
  243. type_mask, alignf, alignf_data,
  244. &pci_32_bit);
  245. }
  246. EXPORT_SYMBOL(pci_bus_alloc_resource);
  247. /*
  248. * The @idx resource of @dev should be a PCI-PCI bridge window. If this
  249. * resource fits inside a window of an upstream bridge, do nothing. If it
  250. * overlaps an upstream window but extends outside it, clip the resource so
  251. * it fits completely inside.
  252. */
  253. bool pci_bus_clip_resource(struct pci_dev *dev, int idx)
  254. {
  255. struct pci_bus *bus = dev->bus;
  256. struct resource *res = &dev->resource[idx];
  257. struct resource orig_res = *res;
  258. struct resource *r;
  259. pci_bus_for_each_resource(bus, r) {
  260. resource_size_t start, end;
  261. if (!r)
  262. continue;
  263. if (resource_type(res) != resource_type(r))
  264. continue;
  265. start = max(r->start, res->start);
  266. end = min(r->end, res->end);
  267. if (start > end)
  268. continue; /* no overlap */
  269. if (res->start == start && res->end == end)
  270. return false; /* no change */
  271. res->start = start;
  272. res->end = end;
  273. res->flags &= ~IORESOURCE_UNSET;
  274. orig_res.flags &= ~IORESOURCE_UNSET;
  275. pci_info(dev, "%pR clipped to %pR\n", &orig_res, res);
  276. return true;
  277. }
  278. return false;
  279. }
  280. void __weak pcibios_resource_survey_bus(struct pci_bus *bus) { }
  281. void __weak pcibios_bus_add_device(struct pci_dev *pdev) { }
  282. /**
  283. * pci_bus_add_device - start driver for a single device
  284. * @dev: device to add
  285. *
  286. * This adds add sysfs entries and start device drivers
  287. */
  288. void pci_bus_add_device(struct pci_dev *dev)
  289. {
  290. struct device_node *dn = dev->dev.of_node;
  291. /*
  292. * Can not put in pci_device_add yet because resources
  293. * are not assigned yet for some devices.
  294. */
  295. pcibios_bus_add_device(dev);
  296. pci_fixup_device(pci_fixup_final, dev);
  297. if (pci_is_bridge(dev))
  298. of_pci_make_dev_node(dev);
  299. pci_create_sysfs_dev_files(dev);
  300. pci_proc_attach_device(dev);
  301. pci_bridge_d3_update(dev);
  302. /* Save config space for error recoverability */
  303. pci_save_state(dev);
  304. /*
  305. * Enable runtime PM, which potentially allows the device to
  306. * suspend immediately, only after the PCI state has been
  307. * configured completely.
  308. */
  309. pm_runtime_enable(&dev->dev);
  310. if (!dn || of_device_is_available(dn))
  311. pci_dev_allow_binding(dev);
  312. device_initial_probe(&dev->dev);
  313. pci_dev_assign_added(dev);
  314. }
  315. EXPORT_SYMBOL_GPL(pci_bus_add_device);
  316. /**
  317. * pci_bus_add_devices - start driver for PCI devices
  318. * @bus: bus to check for new devices
  319. *
  320. * Start driver for PCI devices and add some sysfs entries.
  321. */
  322. void pci_bus_add_devices(const struct pci_bus *bus)
  323. {
  324. struct pci_dev *dev;
  325. struct pci_bus *child;
  326. list_for_each_entry(dev, &bus->devices, bus_list) {
  327. /* Skip already-added devices */
  328. if (pci_dev_is_added(dev))
  329. continue;
  330. pci_bus_add_device(dev);
  331. }
  332. list_for_each_entry(dev, &bus->devices, bus_list) {
  333. /* Skip if device attach failed */
  334. if (!pci_dev_is_added(dev))
  335. continue;
  336. child = dev->subordinate;
  337. if (child)
  338. pci_bus_add_devices(child);
  339. }
  340. }
  341. EXPORT_SYMBOL(pci_bus_add_devices);
  342. static int __pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *),
  343. void *userdata)
  344. {
  345. struct pci_dev *dev;
  346. int ret = 0;
  347. list_for_each_entry(dev, &top->devices, bus_list) {
  348. ret = cb(dev, userdata);
  349. if (ret)
  350. break;
  351. if (dev->subordinate) {
  352. ret = __pci_walk_bus(dev->subordinate, cb, userdata);
  353. if (ret)
  354. break;
  355. }
  356. }
  357. return ret;
  358. }
  359. static int __pci_walk_bus_reverse(struct pci_bus *top,
  360. int (*cb)(struct pci_dev *, void *),
  361. void *userdata)
  362. {
  363. struct pci_dev *dev;
  364. int ret = 0;
  365. list_for_each_entry_reverse(dev, &top->devices, bus_list) {
  366. if (dev->subordinate) {
  367. ret = __pci_walk_bus_reverse(dev->subordinate, cb,
  368. userdata);
  369. if (ret)
  370. break;
  371. }
  372. ret = cb(dev, userdata);
  373. if (ret)
  374. break;
  375. }
  376. return ret;
  377. }
  378. /**
  379. * pci_walk_bus - walk devices on/under bus, calling callback.
  380. * @top: bus whose devices should be walked
  381. * @cb: callback to be called for each device found
  382. * @userdata: arbitrary pointer to be passed to callback
  383. *
  384. * Walk the given bus, including any bridged devices
  385. * on buses under this bus. Call the provided callback
  386. * on each device found.
  387. *
  388. * We check the return of @cb each time. If it returns anything
  389. * other than 0, we break out.
  390. */
  391. void pci_walk_bus(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata)
  392. {
  393. down_read(&pci_bus_sem);
  394. __pci_walk_bus(top, cb, userdata);
  395. up_read(&pci_bus_sem);
  396. }
  397. EXPORT_SYMBOL_GPL(pci_walk_bus);
  398. /**
  399. * pci_walk_bus_reverse - walk devices on/under bus, calling callback.
  400. * @top: bus whose devices should be walked
  401. * @cb: callback to be called for each device found
  402. * @userdata: arbitrary pointer to be passed to callback
  403. *
  404. * Same semantics as pci_walk_bus(), but walks the bus in reverse order.
  405. */
  406. void pci_walk_bus_reverse(struct pci_bus *top,
  407. int (*cb)(struct pci_dev *, void *), void *userdata)
  408. {
  409. down_read(&pci_bus_sem);
  410. __pci_walk_bus_reverse(top, cb, userdata);
  411. up_read(&pci_bus_sem);
  412. }
  413. EXPORT_SYMBOL_GPL(pci_walk_bus_reverse);
  414. void pci_walk_bus_locked(struct pci_bus *top, int (*cb)(struct pci_dev *, void *), void *userdata)
  415. {
  416. lockdep_assert_held(&pci_bus_sem);
  417. __pci_walk_bus(top, cb, userdata);
  418. }
  419. struct pci_bus *pci_bus_get(struct pci_bus *bus)
  420. {
  421. if (bus)
  422. get_device(&bus->dev);
  423. return bus;
  424. }
  425. void pci_bus_put(struct pci_bus *bus)
  426. {
  427. if (bus)
  428. put_device(&bus->dev);
  429. }