Kconfig 9.7 KB

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  1. # SPDX-License-Identifier: GPL-2.0
  2. #
  3. # PCI configuration
  4. #
  5. # select this to offer the PCI prompt
  6. config HAVE_PCI
  7. bool
  8. # select this to unconditionally force on PCI support
  9. config FORCE_PCI
  10. bool
  11. select HAVE_PCI
  12. select PCI
  13. # select this to provide a generic PCI iomap,
  14. # without PCI itself having to be defined
  15. config GENERIC_PCI_IOMAP
  16. bool
  17. menuconfig PCI
  18. bool "PCI support"
  19. depends on HAVE_PCI
  20. depends on MMU
  21. help
  22. This option enables support for the PCI local bus, including
  23. support for PCI-X and the foundations for PCI Express support.
  24. Say 'Y' here unless you know what you are doing.
  25. if PCI
  26. config PCI_DOMAINS
  27. bool
  28. depends on PCI
  29. config PCI_DOMAINS_GENERIC
  30. bool
  31. select PCI_DOMAINS
  32. config PCI_SYSCALL
  33. bool
  34. source "drivers/pci/pcie/Kconfig"
  35. config PCI_MSI
  36. bool "Message Signaled Interrupts (MSI and MSI-X)"
  37. select GENERIC_MSI_IRQ
  38. help
  39. This allows device drivers to enable MSI (Message Signaled
  40. Interrupts). Message Signaled Interrupts enable a device to
  41. generate an interrupt using an inbound Memory Write on its
  42. PCI bus instead of asserting a device IRQ pin.
  43. Use of PCI MSI interrupts can be disabled at kernel boot time
  44. by using the 'pci=nomsi' option. This disables MSI for the
  45. entire system.
  46. If you don't know what to do here, say Y.
  47. config PCI_MSI_ARCH_FALLBACKS
  48. bool
  49. config PCI_QUIRKS
  50. default y
  51. bool "Enable PCI quirk workarounds" if EXPERT
  52. help
  53. This enables workarounds for various PCI chipset bugs/quirks.
  54. Disable this only if your target machine is unaffected by PCI
  55. quirks.
  56. config PCI_DEBUG
  57. bool "PCI Debugging"
  58. depends on DEBUG_KERNEL
  59. help
  60. Say Y here if you want the PCI core to produce a bunch of debug
  61. messages to the system log. Select this if you are having a
  62. problem with PCI support and want to see more of what is going on.
  63. When in doubt, say N.
  64. config PCI_REALLOC_ENABLE_AUTO
  65. bool "Enable PCI resource re-allocation detection"
  66. depends on PCI_IOV
  67. help
  68. Say Y here if you want the PCI core to detect if PCI resource
  69. re-allocation needs to be enabled. You can always use pci=realloc=on
  70. or pci=realloc=off to override it. It will automatically
  71. re-allocate PCI resources if SR-IOV BARs have not been allocated by
  72. the BIOS.
  73. When in doubt, say N.
  74. config PCI_STUB
  75. tristate "PCI Stub driver"
  76. help
  77. Say Y or M here if you want be able to reserve a PCI device
  78. when it is going to be assigned to a guest operating system.
  79. When in doubt, say N.
  80. config PCI_PF_STUB
  81. tristate "PCI PF Stub driver"
  82. depends on PCI_IOV
  83. help
  84. Say Y or M here if you want to enable support for devices that
  85. require SR-IOV support, while at the same time the PF (Physical
  86. Function) itself is not providing any actual services on the
  87. host itself such as storage or networking.
  88. When in doubt, say N.
  89. config XEN_PCIDEV_FRONTEND
  90. tristate "Xen PCI Frontend"
  91. depends on XEN_PV
  92. select PCI_XEN
  93. select XEN_XENBUS_FRONTEND
  94. default y
  95. help
  96. The PCI device frontend driver allows the kernel to import arbitrary
  97. PCI devices from a PCI backend to support PCI driver domains.
  98. config PCI_ATS
  99. bool
  100. config PCI_IDE
  101. bool
  102. config PCI_TSM
  103. bool "PCI TSM: Device security protocol support"
  104. select PCI_IDE
  105. select PCI_DOE
  106. select TSM
  107. help
  108. The TEE (Trusted Execution Environment) Device Interface
  109. Security Protocol (TDISP) defines a "TSM" as a platform agent
  110. that manages device authentication, link encryption, link
  111. integrity protection, and assignment of PCI device functions
  112. (virtual or physical) to confidential computing VMs that can
  113. access (DMA) guest private memory.
  114. Enable a platform TSM driver to use this capability.
  115. config PCI_DOE
  116. bool "Enable PCI Data Object Exchange (DOE) support"
  117. help
  118. Say Y here if you want be able to communicate with PCIe DOE
  119. mailboxes.
  120. config PCI_ECAM
  121. bool
  122. config PCI_LOCKLESS_CONFIG
  123. bool
  124. config PCI_BRIDGE_EMUL
  125. bool
  126. config PCI_IOV
  127. bool "PCI IOV support"
  128. select PCI_ATS
  129. help
  130. I/O Virtualization is a PCI feature supported by some devices
  131. which allows them to create virtual devices which share their
  132. physical resources.
  133. If unsure, say N.
  134. config PCI_NPEM
  135. bool "Native PCIe Enclosure Management"
  136. depends on LEDS_CLASS=y
  137. help
  138. Support for Native PCIe Enclosure Management. It allows managing LED
  139. indications in storage enclosures. Enclosure must support following
  140. indications: OK, Locate, Fail, Rebuild, other indications are
  141. optional.
  142. config PCI_PRI
  143. bool "PCI PRI support"
  144. select PCI_ATS
  145. help
  146. PRI is the PCI Page Request Interface. It allows PCI devices that are
  147. behind an IOMMU to recover from page faults.
  148. If unsure, say N.
  149. config PCI_PASID
  150. bool "PCI PASID support"
  151. select PCI_ATS
  152. help
  153. Process Address Space Identifiers (PASIDs) can be used by PCI devices
  154. to access more than one IO address space at the same time. To make
  155. use of this feature an IOMMU is required which also supports PASIDs.
  156. Select this option if you have such an IOMMU and want to compile the
  157. driver for it into your kernel.
  158. If unsure, say N.
  159. config PCIE_TPH
  160. bool "TLP Processing Hints"
  161. help
  162. This option adds support for PCIe TLP Processing Hints (TPH).
  163. TPH allows endpoint devices to provide optimization hints, such as
  164. desired caching behavior, for requests that target memory space.
  165. These hints, called Steering Tags, can empower the system hardware
  166. to optimize the utilization of platform resources.
  167. config PCI_P2PDMA
  168. bool "PCI peer-to-peer transfer support"
  169. depends on ZONE_DEVICE
  170. #
  171. # The need for the scatterlist DMA bus address flag means PCI P2PDMA
  172. # requires 64bit
  173. #
  174. depends on 64BIT
  175. select GENERIC_ALLOCATOR
  176. select NEED_SG_DMA_FLAGS
  177. help
  178. Enables drivers to do PCI peer-to-peer transactions to and from
  179. BARs that are exposed in other devices that are the part of
  180. the hierarchy where peer-to-peer DMA is guaranteed by the PCI
  181. specification to work (ie. anything below a single PCI bridge).
  182. Many PCIe root complexes do not support P2P transactions and
  183. it's hard to tell which support it at all, so at this time,
  184. P2P DMA transactions must be between devices behind the same root
  185. port.
  186. If unsure, say N.
  187. config PCI_LABEL
  188. def_bool y if (DMI || ACPI)
  189. select NLS
  190. config PCI_HYPERV
  191. tristate "Hyper-V PCI Frontend"
  192. depends on ((X86 && X86_64) || ARM64) && HYPERV_VMBUS && PCI_MSI && SYSFS
  193. select PCI_HYPERV_INTERFACE
  194. select IRQ_MSI_LIB
  195. help
  196. The PCI device frontend driver allows the kernel to import arbitrary
  197. PCI devices from a PCI backend to support PCI driver domains.
  198. config PCI_DYNAMIC_OF_NODES
  199. bool "Create Device tree nodes for PCI devices"
  200. depends on OF_IRQ
  201. select OF_DYNAMIC
  202. help
  203. This option enables support for generating device tree nodes for some
  204. PCI devices. Thus, the driver of this kind can load and overlay
  205. flattened device tree for its downstream devices.
  206. Once this option is selected, the device tree nodes will be generated
  207. for all PCI bridges.
  208. choice
  209. prompt "PCI Express hierarchy optimization setting"
  210. default PCIE_BUS_DEFAULT
  211. depends on PCI && EXPERT
  212. help
  213. MPS (Max Payload Size) and MRRS (Max Read Request Size) are PCIe
  214. device parameters that affect performance and the ability to
  215. support hotplug and peer-to-peer DMA.
  216. The following choices set the MPS and MRRS optimization strategy
  217. at compile-time. The choices are the same as those offered for
  218. the kernel command-line parameter 'pci', i.e.,
  219. 'pci=pcie_bus_tune_off', 'pci=pcie_bus_safe',
  220. 'pci=pcie_bus_perf', and 'pci=pcie_bus_peer2peer'.
  221. This is a compile-time setting and can be overridden by the above
  222. command-line parameters. If unsure, choose PCIE_BUS_DEFAULT.
  223. config PCIE_BUS_TUNE_OFF
  224. bool "Tune Off"
  225. depends on PCI
  226. help
  227. Use the BIOS defaults; don't touch MPS at all. This is the same
  228. as booting with 'pci=pcie_bus_tune_off'.
  229. config PCIE_BUS_DEFAULT
  230. bool "Default"
  231. depends on PCI
  232. help
  233. Default choice; ensure that the MPS matches upstream bridge.
  234. config PCIE_BUS_SAFE
  235. bool "Safe"
  236. depends on PCI
  237. help
  238. Use largest MPS that boot-time devices support. If you have a
  239. closed system with no possibility of adding new devices, this
  240. will use the largest MPS that's supported by all devices. This
  241. is the same as booting with 'pci=pcie_bus_safe'.
  242. config PCIE_BUS_PERFORMANCE
  243. bool "Performance"
  244. depends on PCI
  245. help
  246. Use MPS and MRRS for best performance. Ensure that a given
  247. device's MPS is no larger than its parent MPS, which allows us to
  248. keep all switches/bridges to the max MPS supported by their
  249. parent. This is the same as booting with 'pci=pcie_bus_perf'.
  250. config PCIE_BUS_PEER2PEER
  251. bool "Peer2peer"
  252. depends on PCI
  253. help
  254. Set MPS = 128 for all devices. MPS configuration effected by the
  255. other options could cause the MPS on one root port to be
  256. different than that of the MPS on another, which may cause
  257. hot-added devices or peer-to-peer DMA to fail. Set MPS to the
  258. smallest possible value (128B) system-wide to avoid these issues.
  259. This is the same as booting with 'pci=pcie_bus_peer2peer'.
  260. endchoice
  261. config VGA_ARB
  262. bool "VGA Arbitration" if EXPERT
  263. default y
  264. depends on (PCI && !S390)
  265. select SCREEN_INFO if X86
  266. help
  267. Some "legacy" VGA devices implemented on PCI typically have the same
  268. hard-decoded addresses as they did on ISA. When multiple PCI devices
  269. are accessed at same time they need some kind of coordination. Please
  270. see Documentation/gpu/vgaarbiter.rst for more details. Select this to
  271. enable VGA arbiter.
  272. config VGA_ARB_MAX_GPUS
  273. int "Maximum number of GPUs"
  274. default 16
  275. depends on VGA_ARB
  276. help
  277. Reserves space in the kernel to maintain resource locking for
  278. multiple GPUS. The overhead for each GPU is very small.
  279. source "drivers/pci/hotplug/Kconfig"
  280. source "drivers/pci/controller/Kconfig"
  281. source "drivers/pci/endpoint/Kconfig"
  282. source "drivers/pci/switch/Kconfig"
  283. source "drivers/pci/pwrctrl/Kconfig"
  284. endif