dimm_devs.c 21 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  4. */
  5. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  6. #include <linux/moduleparam.h>
  7. #include <linux/vmalloc.h>
  8. #include <linux/device.h>
  9. #include <linux/ndctl.h>
  10. #include <linux/slab.h>
  11. #include <linux/io.h>
  12. #include <linux/fs.h>
  13. #include <linux/mm.h>
  14. #include "nd-core.h"
  15. #include "label.h"
  16. #include "pmem.h"
  17. #include "nd.h"
  18. static DEFINE_IDA(dimm_ida);
  19. /*
  20. * Retrieve bus and dimm handle and return if this bus supports
  21. * get_config_data commands
  22. */
  23. int nvdimm_check_config_data(struct device *dev)
  24. {
  25. struct nvdimm *nvdimm = to_nvdimm(dev);
  26. if (!nvdimm->cmd_mask ||
  27. !test_bit(ND_CMD_GET_CONFIG_DATA, &nvdimm->cmd_mask)) {
  28. if (test_bit(NDD_LABELING, &nvdimm->flags))
  29. return -ENXIO;
  30. else
  31. return -ENOTTY;
  32. }
  33. return 0;
  34. }
  35. static int validate_dimm(struct nvdimm_drvdata *ndd)
  36. {
  37. int rc;
  38. if (!ndd)
  39. return -EINVAL;
  40. rc = nvdimm_check_config_data(ndd->dev);
  41. if (rc)
  42. dev_dbg(ndd->dev, "%ps: %s error: %d\n",
  43. __builtin_return_address(0), __func__, rc);
  44. return rc;
  45. }
  46. /**
  47. * nvdimm_init_nsarea - determine the geometry of a dimm's namespace area
  48. * @ndd: dimm to initialize
  49. *
  50. * Returns: %0 if the area is already valid, -errno on error
  51. */
  52. int nvdimm_init_nsarea(struct nvdimm_drvdata *ndd)
  53. {
  54. struct nd_cmd_get_config_size *cmd = &ndd->nsarea;
  55. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev);
  56. struct nvdimm_bus_descriptor *nd_desc;
  57. int rc = validate_dimm(ndd);
  58. int cmd_rc = 0;
  59. if (rc)
  60. return rc;
  61. if (cmd->config_size)
  62. return 0; /* already valid */
  63. memset(cmd, 0, sizeof(*cmd));
  64. nd_desc = nvdimm_bus->nd_desc;
  65. rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev),
  66. ND_CMD_GET_CONFIG_SIZE, cmd, sizeof(*cmd), &cmd_rc);
  67. if (rc < 0)
  68. return rc;
  69. return cmd_rc;
  70. }
  71. int nvdimm_get_config_data(struct nvdimm_drvdata *ndd, void *buf,
  72. size_t offset, size_t len)
  73. {
  74. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev);
  75. struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc;
  76. int rc = validate_dimm(ndd), cmd_rc = 0;
  77. struct nd_cmd_get_config_data_hdr *cmd;
  78. size_t max_cmd_size, buf_offset;
  79. if (rc)
  80. return rc;
  81. if (offset + len > ndd->nsarea.config_size)
  82. return -ENXIO;
  83. max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer);
  84. cmd = kvzalloc(max_cmd_size + sizeof(*cmd), GFP_KERNEL);
  85. if (!cmd)
  86. return -ENOMEM;
  87. for (buf_offset = 0; len;
  88. len -= cmd->in_length, buf_offset += cmd->in_length) {
  89. size_t cmd_size;
  90. cmd->in_offset = offset + buf_offset;
  91. cmd->in_length = min(max_cmd_size, len);
  92. cmd_size = sizeof(*cmd) + cmd->in_length;
  93. rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev),
  94. ND_CMD_GET_CONFIG_DATA, cmd, cmd_size, &cmd_rc);
  95. if (rc < 0)
  96. break;
  97. if (cmd_rc < 0) {
  98. rc = cmd_rc;
  99. break;
  100. }
  101. /* out_buf should be valid, copy it into our output buffer */
  102. memcpy(buf + buf_offset, cmd->out_buf, cmd->in_length);
  103. }
  104. kvfree(cmd);
  105. return rc;
  106. }
  107. int nvdimm_set_config_data(struct nvdimm_drvdata *ndd, size_t offset,
  108. void *buf, size_t len)
  109. {
  110. size_t max_cmd_size, buf_offset;
  111. struct nd_cmd_set_config_hdr *cmd;
  112. int rc = validate_dimm(ndd), cmd_rc = 0;
  113. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(ndd->dev);
  114. struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc;
  115. if (rc)
  116. return rc;
  117. if (offset + len > ndd->nsarea.config_size)
  118. return -ENXIO;
  119. max_cmd_size = min_t(u32, len, ndd->nsarea.max_xfer);
  120. cmd = kvzalloc(max_cmd_size + sizeof(*cmd) + sizeof(u32), GFP_KERNEL);
  121. if (!cmd)
  122. return -ENOMEM;
  123. for (buf_offset = 0; len; len -= cmd->in_length,
  124. buf_offset += cmd->in_length) {
  125. size_t cmd_size;
  126. cmd->in_offset = offset + buf_offset;
  127. cmd->in_length = min(max_cmd_size, len);
  128. memcpy(cmd->in_buf, buf + buf_offset, cmd->in_length);
  129. /* status is output in the last 4-bytes of the command buffer */
  130. cmd_size = sizeof(*cmd) + cmd->in_length + sizeof(u32);
  131. rc = nd_desc->ndctl(nd_desc, to_nvdimm(ndd->dev),
  132. ND_CMD_SET_CONFIG_DATA, cmd, cmd_size, &cmd_rc);
  133. if (rc < 0)
  134. break;
  135. if (cmd_rc < 0) {
  136. rc = cmd_rc;
  137. break;
  138. }
  139. }
  140. kvfree(cmd);
  141. return rc;
  142. }
  143. void nvdimm_set_labeling(struct device *dev)
  144. {
  145. struct nvdimm *nvdimm = to_nvdimm(dev);
  146. set_bit(NDD_LABELING, &nvdimm->flags);
  147. }
  148. void nvdimm_set_locked(struct device *dev)
  149. {
  150. struct nvdimm *nvdimm = to_nvdimm(dev);
  151. set_bit(NDD_LOCKED, &nvdimm->flags);
  152. }
  153. void nvdimm_clear_locked(struct device *dev)
  154. {
  155. struct nvdimm *nvdimm = to_nvdimm(dev);
  156. clear_bit(NDD_LOCKED, &nvdimm->flags);
  157. }
  158. static void nvdimm_release(struct device *dev)
  159. {
  160. struct nvdimm *nvdimm = to_nvdimm(dev);
  161. ida_free(&dimm_ida, nvdimm->id);
  162. kfree(nvdimm);
  163. }
  164. struct nvdimm *to_nvdimm(struct device *dev)
  165. {
  166. struct nvdimm *nvdimm = container_of(dev, struct nvdimm, dev);
  167. WARN_ON(!is_nvdimm(dev));
  168. return nvdimm;
  169. }
  170. EXPORT_SYMBOL_GPL(to_nvdimm);
  171. struct nvdimm_drvdata *to_ndd(struct nd_mapping *nd_mapping)
  172. {
  173. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  174. WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev));
  175. return dev_get_drvdata(&nvdimm->dev);
  176. }
  177. EXPORT_SYMBOL(to_ndd);
  178. void nvdimm_drvdata_release(struct kref *kref)
  179. {
  180. struct nvdimm_drvdata *ndd = container_of(kref, typeof(*ndd), kref);
  181. struct device *dev = ndd->dev;
  182. struct resource *res, *_r;
  183. dev_dbg(dev, "trace\n");
  184. scoped_guard(nvdimm_bus, dev) {
  185. for_each_dpa_resource_safe(ndd, res, _r)
  186. nvdimm_free_dpa(ndd, res);
  187. }
  188. kvfree(ndd->data);
  189. kfree(ndd);
  190. put_device(dev);
  191. }
  192. void get_ndd(struct nvdimm_drvdata *ndd)
  193. {
  194. kref_get(&ndd->kref);
  195. }
  196. void put_ndd(struct nvdimm_drvdata *ndd)
  197. {
  198. if (ndd)
  199. kref_put(&ndd->kref, nvdimm_drvdata_release);
  200. }
  201. const char *nvdimm_name(struct nvdimm *nvdimm)
  202. {
  203. return dev_name(&nvdimm->dev);
  204. }
  205. EXPORT_SYMBOL_GPL(nvdimm_name);
  206. struct kobject *nvdimm_kobj(struct nvdimm *nvdimm)
  207. {
  208. return &nvdimm->dev.kobj;
  209. }
  210. EXPORT_SYMBOL_GPL(nvdimm_kobj);
  211. unsigned long nvdimm_cmd_mask(struct nvdimm *nvdimm)
  212. {
  213. return nvdimm->cmd_mask;
  214. }
  215. EXPORT_SYMBOL_GPL(nvdimm_cmd_mask);
  216. void *nvdimm_provider_data(struct nvdimm *nvdimm)
  217. {
  218. if (nvdimm)
  219. return nvdimm->provider_data;
  220. return NULL;
  221. }
  222. EXPORT_SYMBOL_GPL(nvdimm_provider_data);
  223. static ssize_t commands_show(struct device *dev,
  224. struct device_attribute *attr, char *buf)
  225. {
  226. struct nvdimm *nvdimm = to_nvdimm(dev);
  227. int cmd, len = 0;
  228. if (!nvdimm->cmd_mask)
  229. return sprintf(buf, "\n");
  230. for_each_set_bit(cmd, &nvdimm->cmd_mask, BITS_PER_LONG)
  231. len += sprintf(buf + len, "%s ", nvdimm_cmd_name(cmd));
  232. len += sprintf(buf + len, "\n");
  233. return len;
  234. }
  235. static DEVICE_ATTR_RO(commands);
  236. static ssize_t flags_show(struct device *dev,
  237. struct device_attribute *attr, char *buf)
  238. {
  239. struct nvdimm *nvdimm = to_nvdimm(dev);
  240. return sprintf(buf, "%s%s\n",
  241. test_bit(NDD_LABELING, &nvdimm->flags) ? "label " : "",
  242. test_bit(NDD_LOCKED, &nvdimm->flags) ? "lock " : "");
  243. }
  244. static DEVICE_ATTR_RO(flags);
  245. static ssize_t state_show(struct device *dev, struct device_attribute *attr,
  246. char *buf)
  247. {
  248. struct nvdimm *nvdimm = to_nvdimm(dev);
  249. /*
  250. * The state may be in the process of changing, userspace should
  251. * quiesce probing if it wants a static answer
  252. */
  253. nvdimm_bus_lock(dev);
  254. nvdimm_bus_unlock(dev);
  255. return sprintf(buf, "%s\n", atomic_read(&nvdimm->busy)
  256. ? "active" : "idle");
  257. }
  258. static DEVICE_ATTR_RO(state);
  259. static ssize_t __available_slots_show(struct nvdimm_drvdata *ndd, char *buf)
  260. {
  261. struct device *dev;
  262. u32 nfree;
  263. if (!ndd)
  264. return -ENXIO;
  265. dev = ndd->dev;
  266. guard(nvdimm_bus)(dev);
  267. nfree = nd_label_nfree(ndd);
  268. if (nfree - 1 > nfree) {
  269. dev_WARN_ONCE(dev, 1, "we ate our last label?\n");
  270. nfree = 0;
  271. } else
  272. nfree--;
  273. return sprintf(buf, "%d\n", nfree);
  274. }
  275. static ssize_t available_slots_show(struct device *dev,
  276. struct device_attribute *attr, char *buf)
  277. {
  278. ssize_t rc;
  279. device_lock(dev);
  280. rc = __available_slots_show(dev_get_drvdata(dev), buf);
  281. device_unlock(dev);
  282. return rc;
  283. }
  284. static DEVICE_ATTR_RO(available_slots);
  285. static ssize_t security_show(struct device *dev,
  286. struct device_attribute *attr, char *buf)
  287. {
  288. struct nvdimm *nvdimm = to_nvdimm(dev);
  289. /*
  290. * For the test version we need to poll the "hardware" in order
  291. * to get the updated status for unlock testing.
  292. */
  293. if (IS_ENABLED(CONFIG_NVDIMM_SECURITY_TEST))
  294. nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER);
  295. if (test_bit(NVDIMM_SECURITY_OVERWRITE, &nvdimm->sec.flags))
  296. return sprintf(buf, "overwrite\n");
  297. if (test_bit(NVDIMM_SECURITY_DISABLED, &nvdimm->sec.flags))
  298. return sprintf(buf, "disabled\n");
  299. if (test_bit(NVDIMM_SECURITY_UNLOCKED, &nvdimm->sec.flags))
  300. return sprintf(buf, "unlocked\n");
  301. if (test_bit(NVDIMM_SECURITY_LOCKED, &nvdimm->sec.flags))
  302. return sprintf(buf, "locked\n");
  303. return -ENOTTY;
  304. }
  305. static ssize_t frozen_show(struct device *dev,
  306. struct device_attribute *attr, char *buf)
  307. {
  308. struct nvdimm *nvdimm = to_nvdimm(dev);
  309. return sprintf(buf, "%d\n", test_bit(NVDIMM_SECURITY_FROZEN,
  310. &nvdimm->sec.flags));
  311. }
  312. static DEVICE_ATTR_RO(frozen);
  313. static ssize_t security_store(struct device *dev,
  314. struct device_attribute *attr, const char *buf, size_t len)
  315. {
  316. /*
  317. * Require all userspace triggered security management to be
  318. * done while probing is idle and the DIMM is not in active use
  319. * in any region.
  320. */
  321. guard(device)(dev);
  322. guard(nvdimm_bus)(dev);
  323. wait_nvdimm_bus_probe_idle(dev);
  324. return nvdimm_security_store(dev, buf, len);
  325. }
  326. static DEVICE_ATTR_RW(security);
  327. static struct attribute *nvdimm_attributes[] = {
  328. &dev_attr_state.attr,
  329. &dev_attr_flags.attr,
  330. &dev_attr_commands.attr,
  331. &dev_attr_available_slots.attr,
  332. &dev_attr_security.attr,
  333. &dev_attr_frozen.attr,
  334. NULL,
  335. };
  336. static umode_t nvdimm_visible(struct kobject *kobj, struct attribute *a, int n)
  337. {
  338. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  339. struct nvdimm *nvdimm = to_nvdimm(dev);
  340. if (a != &dev_attr_security.attr && a != &dev_attr_frozen.attr)
  341. return a->mode;
  342. if (!nvdimm->sec.flags)
  343. return 0;
  344. if (a == &dev_attr_security.attr) {
  345. /* Are there any state mutation ops (make writable)? */
  346. if (nvdimm->sec.ops->freeze || nvdimm->sec.ops->disable
  347. || nvdimm->sec.ops->change_key
  348. || nvdimm->sec.ops->erase
  349. || nvdimm->sec.ops->overwrite)
  350. return a->mode;
  351. return 0444;
  352. }
  353. if (nvdimm->sec.ops->freeze)
  354. return a->mode;
  355. return 0;
  356. }
  357. static const struct attribute_group nvdimm_attribute_group = {
  358. .attrs = nvdimm_attributes,
  359. .is_visible = nvdimm_visible,
  360. };
  361. static ssize_t result_show(struct device *dev, struct device_attribute *attr, char *buf)
  362. {
  363. struct nvdimm *nvdimm = to_nvdimm(dev);
  364. enum nvdimm_fwa_result result;
  365. if (!nvdimm->fw_ops)
  366. return -EOPNOTSUPP;
  367. guard(nvdimm_bus)(dev);
  368. result = nvdimm->fw_ops->activate_result(nvdimm);
  369. switch (result) {
  370. case NVDIMM_FWA_RESULT_NONE:
  371. return sprintf(buf, "none\n");
  372. case NVDIMM_FWA_RESULT_SUCCESS:
  373. return sprintf(buf, "success\n");
  374. case NVDIMM_FWA_RESULT_FAIL:
  375. return sprintf(buf, "fail\n");
  376. case NVDIMM_FWA_RESULT_NOTSTAGED:
  377. return sprintf(buf, "not_staged\n");
  378. case NVDIMM_FWA_RESULT_NEEDRESET:
  379. return sprintf(buf, "need_reset\n");
  380. default:
  381. return -ENXIO;
  382. }
  383. }
  384. static DEVICE_ATTR_ADMIN_RO(result);
  385. static ssize_t activate_show(struct device *dev, struct device_attribute *attr, char *buf)
  386. {
  387. struct nvdimm *nvdimm = to_nvdimm(dev);
  388. enum nvdimm_fwa_state state;
  389. if (!nvdimm->fw_ops)
  390. return -EOPNOTSUPP;
  391. guard(nvdimm_bus)(dev);
  392. state = nvdimm->fw_ops->activate_state(nvdimm);
  393. switch (state) {
  394. case NVDIMM_FWA_IDLE:
  395. return sprintf(buf, "idle\n");
  396. case NVDIMM_FWA_BUSY:
  397. return sprintf(buf, "busy\n");
  398. case NVDIMM_FWA_ARMED:
  399. return sprintf(buf, "armed\n");
  400. default:
  401. return -ENXIO;
  402. }
  403. }
  404. static ssize_t activate_store(struct device *dev, struct device_attribute *attr,
  405. const char *buf, size_t len)
  406. {
  407. struct nvdimm *nvdimm = to_nvdimm(dev);
  408. enum nvdimm_fwa_trigger arg;
  409. int rc;
  410. if (!nvdimm->fw_ops)
  411. return -EOPNOTSUPP;
  412. if (sysfs_streq(buf, "arm"))
  413. arg = NVDIMM_FWA_ARM;
  414. else if (sysfs_streq(buf, "disarm"))
  415. arg = NVDIMM_FWA_DISARM;
  416. else
  417. return -EINVAL;
  418. guard(nvdimm_bus)(dev);
  419. rc = nvdimm->fw_ops->arm(nvdimm, arg);
  420. if (rc < 0)
  421. return rc;
  422. return len;
  423. }
  424. static DEVICE_ATTR_ADMIN_RW(activate);
  425. static struct attribute *nvdimm_firmware_attributes[] = {
  426. &dev_attr_activate.attr,
  427. &dev_attr_result.attr,
  428. NULL,
  429. };
  430. static umode_t nvdimm_firmware_visible(struct kobject *kobj, struct attribute *a, int n)
  431. {
  432. struct device *dev = container_of(kobj, typeof(*dev), kobj);
  433. struct nvdimm_bus *nvdimm_bus = walk_to_nvdimm_bus(dev);
  434. struct nvdimm_bus_descriptor *nd_desc = nvdimm_bus->nd_desc;
  435. struct nvdimm *nvdimm = to_nvdimm(dev);
  436. enum nvdimm_fwa_capability cap;
  437. if (!nd_desc->fw_ops)
  438. return 0;
  439. if (!nvdimm->fw_ops)
  440. return 0;
  441. guard(nvdimm_bus)(dev);
  442. cap = nd_desc->fw_ops->capability(nd_desc);
  443. if (cap < NVDIMM_FWA_CAP_QUIESCE)
  444. return 0;
  445. return a->mode;
  446. }
  447. static const struct attribute_group nvdimm_firmware_attribute_group = {
  448. .name = "firmware",
  449. .attrs = nvdimm_firmware_attributes,
  450. .is_visible = nvdimm_firmware_visible,
  451. };
  452. static const struct attribute_group *nvdimm_attribute_groups[] = {
  453. &nd_device_attribute_group,
  454. &nvdimm_attribute_group,
  455. &nvdimm_firmware_attribute_group,
  456. NULL,
  457. };
  458. static const struct device_type nvdimm_device_type = {
  459. .name = "nvdimm",
  460. .release = nvdimm_release,
  461. .groups = nvdimm_attribute_groups,
  462. };
  463. bool is_nvdimm(const struct device *dev)
  464. {
  465. return dev->type == &nvdimm_device_type;
  466. }
  467. static struct lock_class_key nvdimm_key;
  468. struct nvdimm *__nvdimm_create(struct nvdimm_bus *nvdimm_bus,
  469. void *provider_data, const struct attribute_group **groups,
  470. unsigned long flags, unsigned long cmd_mask, int num_flush,
  471. struct resource *flush_wpq, const char *dimm_id,
  472. const struct nvdimm_security_ops *sec_ops,
  473. const struct nvdimm_fw_ops *fw_ops)
  474. {
  475. struct nvdimm *nvdimm = kzalloc_obj(*nvdimm);
  476. struct device *dev;
  477. if (!nvdimm)
  478. return NULL;
  479. nvdimm->id = ida_alloc(&dimm_ida, GFP_KERNEL);
  480. if (nvdimm->id < 0) {
  481. kfree(nvdimm);
  482. return NULL;
  483. }
  484. nvdimm->dimm_id = dimm_id;
  485. nvdimm->provider_data = provider_data;
  486. nvdimm->flags = flags;
  487. nvdimm->cmd_mask = cmd_mask;
  488. nvdimm->num_flush = num_flush;
  489. nvdimm->flush_wpq = flush_wpq;
  490. atomic_set(&nvdimm->busy, 0);
  491. dev = &nvdimm->dev;
  492. dev_set_name(dev, "nmem%d", nvdimm->id);
  493. dev->parent = &nvdimm_bus->dev;
  494. dev->type = &nvdimm_device_type;
  495. dev->devt = MKDEV(nvdimm_major, nvdimm->id);
  496. dev->groups = groups;
  497. nvdimm->sec.ops = sec_ops;
  498. nvdimm->fw_ops = fw_ops;
  499. nvdimm->sec.overwrite_tmo = 0;
  500. INIT_DELAYED_WORK(&nvdimm->dwork, nvdimm_security_overwrite_query);
  501. /*
  502. * Security state must be initialized before device_add() for
  503. * attribute visibility.
  504. */
  505. /* get security state and extended (master) state */
  506. nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER);
  507. nvdimm->sec.ext_flags = nvdimm_security_flags(nvdimm, NVDIMM_MASTER);
  508. device_initialize(dev);
  509. lockdep_set_class(&dev->mutex, &nvdimm_key);
  510. if (test_bit(NDD_REGISTER_SYNC, &flags))
  511. nd_device_register_sync(dev);
  512. else
  513. nd_device_register(dev);
  514. return nvdimm;
  515. }
  516. EXPORT_SYMBOL_GPL(__nvdimm_create);
  517. void nvdimm_delete(struct nvdimm *nvdimm)
  518. {
  519. struct device *dev = &nvdimm->dev;
  520. bool dev_put = false;
  521. /* We are shutting down. Make state frozen artificially. */
  522. scoped_guard(nvdimm_bus, dev) {
  523. set_bit(NVDIMM_SECURITY_FROZEN, &nvdimm->sec.flags);
  524. dev_put = test_and_clear_bit(NDD_WORK_PENDING, &nvdimm->flags);
  525. }
  526. cancel_delayed_work_sync(&nvdimm->dwork);
  527. if (dev_put)
  528. put_device(dev);
  529. nd_device_unregister(dev, ND_SYNC);
  530. }
  531. EXPORT_SYMBOL_GPL(nvdimm_delete);
  532. static void shutdown_security_notify(void *data)
  533. {
  534. struct nvdimm *nvdimm = data;
  535. sysfs_put(nvdimm->sec.overwrite_state);
  536. }
  537. int nvdimm_security_setup_events(struct device *dev)
  538. {
  539. struct nvdimm *nvdimm = to_nvdimm(dev);
  540. if (!nvdimm->sec.flags || !nvdimm->sec.ops
  541. || !nvdimm->sec.ops->overwrite)
  542. return 0;
  543. nvdimm->sec.overwrite_state = sysfs_get_dirent(dev->kobj.sd, "security");
  544. if (!nvdimm->sec.overwrite_state)
  545. return -ENOMEM;
  546. return devm_add_action_or_reset(dev, shutdown_security_notify, nvdimm);
  547. }
  548. EXPORT_SYMBOL_GPL(nvdimm_security_setup_events);
  549. int nvdimm_in_overwrite(struct nvdimm *nvdimm)
  550. {
  551. return test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags);
  552. }
  553. EXPORT_SYMBOL_GPL(nvdimm_in_overwrite);
  554. int nvdimm_security_freeze(struct nvdimm *nvdimm)
  555. {
  556. int rc;
  557. WARN_ON_ONCE(!is_nvdimm_bus_locked(&nvdimm->dev));
  558. if (!nvdimm->sec.ops || !nvdimm->sec.ops->freeze)
  559. return -EOPNOTSUPP;
  560. if (!nvdimm->sec.flags)
  561. return -EIO;
  562. if (test_bit(NDD_SECURITY_OVERWRITE, &nvdimm->flags)) {
  563. dev_warn(&nvdimm->dev, "Overwrite operation in progress.\n");
  564. return -EBUSY;
  565. }
  566. rc = nvdimm->sec.ops->freeze(nvdimm);
  567. nvdimm->sec.flags = nvdimm_security_flags(nvdimm, NVDIMM_USER);
  568. return rc;
  569. }
  570. static unsigned long dpa_align(struct nd_region *nd_region)
  571. {
  572. struct device *dev = &nd_region->dev;
  573. if (dev_WARN_ONCE(dev, !is_nvdimm_bus_locked(dev),
  574. "bus lock required for capacity provision\n"))
  575. return 0;
  576. if (dev_WARN_ONCE(dev, !nd_region->ndr_mappings || nd_region->align
  577. % nd_region->ndr_mappings,
  578. "invalid region align %#lx mappings: %d\n",
  579. nd_region->align, nd_region->ndr_mappings))
  580. return 0;
  581. return nd_region->align / nd_region->ndr_mappings;
  582. }
  583. /**
  584. * nd_pmem_max_contiguous_dpa - For the given dimm+region, return the max
  585. * contiguous unallocated dpa range.
  586. * @nd_region: constrain available space check to this reference region
  587. * @nd_mapping: container of dpa-resource-root + labels
  588. *
  589. * Returns: %0 if there is an alignment error, otherwise the max
  590. * unallocated dpa range
  591. */
  592. resource_size_t nd_pmem_max_contiguous_dpa(struct nd_region *nd_region,
  593. struct nd_mapping *nd_mapping)
  594. {
  595. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  596. struct nvdimm_bus *nvdimm_bus;
  597. resource_size_t max = 0;
  598. struct resource *res;
  599. unsigned long align;
  600. /* if a dimm is disabled the available capacity is zero */
  601. if (!ndd)
  602. return 0;
  603. align = dpa_align(nd_region);
  604. if (!align)
  605. return 0;
  606. nvdimm_bus = walk_to_nvdimm_bus(ndd->dev);
  607. if (__reserve_free_pmem(&nd_region->dev, nd_mapping->nvdimm))
  608. return 0;
  609. for_each_dpa_resource(ndd, res) {
  610. resource_size_t start, end;
  611. if (strcmp(res->name, "pmem-reserve") != 0)
  612. continue;
  613. /* trim free space relative to current alignment setting */
  614. start = ALIGN(res->start, align);
  615. end = ALIGN_DOWN(res->end + 1, align) - 1;
  616. if (end < start)
  617. continue;
  618. if (end - start + 1 > max)
  619. max = end - start + 1;
  620. }
  621. release_free_pmem(nvdimm_bus, nd_mapping);
  622. return max;
  623. }
  624. /**
  625. * nd_pmem_available_dpa - for the given dimm+region account unallocated dpa
  626. * @nd_mapping: container of dpa-resource-root + labels
  627. * @nd_region: constrain available space check to this reference region
  628. *
  629. * Validate that a PMEM label, if present, aligns with the start of an
  630. * interleave set.
  631. *
  632. * Returns: %0 if there is an alignment error, otherwise the unallocated dpa
  633. */
  634. resource_size_t nd_pmem_available_dpa(struct nd_region *nd_region,
  635. struct nd_mapping *nd_mapping)
  636. {
  637. struct nvdimm_drvdata *ndd = to_ndd(nd_mapping);
  638. resource_size_t map_start, map_end, busy = 0;
  639. struct resource *res;
  640. unsigned long align;
  641. if (!ndd)
  642. return 0;
  643. align = dpa_align(nd_region);
  644. if (!align)
  645. return 0;
  646. map_start = nd_mapping->start;
  647. map_end = map_start + nd_mapping->size - 1;
  648. for_each_dpa_resource(ndd, res) {
  649. resource_size_t start, end;
  650. start = ALIGN_DOWN(res->start, align);
  651. end = ALIGN(res->end + 1, align) - 1;
  652. if (start >= map_start && start < map_end) {
  653. if (end > map_end) {
  654. nd_dbg_dpa(nd_region, ndd, res,
  655. "misaligned to iset\n");
  656. return 0;
  657. }
  658. busy += end - start + 1;
  659. } else if (end >= map_start && end <= map_end) {
  660. busy += end - start + 1;
  661. } else if (map_start > start && map_start < end) {
  662. /* total eclipse of the mapping */
  663. busy += nd_mapping->size;
  664. }
  665. }
  666. if (busy < nd_mapping->size)
  667. return ALIGN_DOWN(nd_mapping->size - busy, align);
  668. return 0;
  669. }
  670. void nvdimm_free_dpa(struct nvdimm_drvdata *ndd, struct resource *res)
  671. {
  672. WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev));
  673. kfree(res->name);
  674. __release_region(&ndd->dpa, res->start, resource_size(res));
  675. }
  676. struct resource *nvdimm_allocate_dpa(struct nvdimm_drvdata *ndd,
  677. struct nd_label_id *label_id, resource_size_t start,
  678. resource_size_t n)
  679. {
  680. char *name = kmemdup(label_id, sizeof(*label_id), GFP_KERNEL);
  681. struct resource *res;
  682. if (!name)
  683. return NULL;
  684. WARN_ON_ONCE(!is_nvdimm_bus_locked(ndd->dev));
  685. res = __request_region(&ndd->dpa, start, n, name, 0);
  686. if (!res)
  687. kfree(name);
  688. return res;
  689. }
  690. /**
  691. * nvdimm_allocated_dpa - sum up the dpa currently allocated to this label_id
  692. * @ndd: container of dpa-resource-root + labels
  693. * @label_id: dpa resource name of the form pmem-<human readable uuid>
  694. *
  695. * Returns: sum of the dpa allocated to the label_id
  696. */
  697. resource_size_t nvdimm_allocated_dpa(struct nvdimm_drvdata *ndd,
  698. struct nd_label_id *label_id)
  699. {
  700. resource_size_t allocated = 0;
  701. struct resource *res;
  702. for_each_dpa_resource(ndd, res)
  703. if (strcmp(res->name, label_id->id) == 0)
  704. allocated += resource_size(res);
  705. return allocated;
  706. }
  707. static int count_dimms(struct device *dev, void *c)
  708. {
  709. int *count = c;
  710. if (is_nvdimm(dev))
  711. (*count)++;
  712. return 0;
  713. }
  714. int nvdimm_bus_check_dimm_count(struct nvdimm_bus *nvdimm_bus, int dimm_count)
  715. {
  716. int count = 0;
  717. /* Flush any possible dimm registration failures */
  718. nd_synchronize();
  719. device_for_each_child(&nvdimm_bus->dev, &count, count_dimms);
  720. dev_dbg(&nvdimm_bus->dev, "count: %d\n", count);
  721. if (count != dimm_count)
  722. return -ENXIO;
  723. return 0;
  724. }
  725. EXPORT_SYMBOL_GPL(nvdimm_bus_check_dimm_count);
  726. void __exit nvdimm_devs_exit(void)
  727. {
  728. ida_destroy(&dimm_ida);
  729. }