qcom_bam_dmux.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Qualcomm BAM-DMUX WWAN network driver
  4. * Copyright (c) 2020, Stephan Gerhold <stephan@gerhold.net>
  5. */
  6. #include <linux/atomic.h>
  7. #include <linux/bitops.h>
  8. #include <linux/completion.h>
  9. #include <linux/dma-mapping.h>
  10. #include <linux/dmaengine.h>
  11. #include <linux/if_arp.h>
  12. #include <linux/interrupt.h>
  13. #include <linux/mod_devicetable.h>
  14. #include <linux/module.h>
  15. #include <linux/netdevice.h>
  16. #include <linux/platform_device.h>
  17. #include <linux/pm_runtime.h>
  18. #include <linux/soc/qcom/smem_state.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/wait.h>
  21. #include <linux/workqueue.h>
  22. #include <net/pkt_sched.h>
  23. #define BAM_DMUX_BUFFER_SIZE SZ_2K
  24. #define BAM_DMUX_HDR_SIZE sizeof(struct bam_dmux_hdr)
  25. #define BAM_DMUX_MAX_DATA_SIZE (BAM_DMUX_BUFFER_SIZE - BAM_DMUX_HDR_SIZE)
  26. #define BAM_DMUX_NUM_SKB 32
  27. #define BAM_DMUX_HDR_MAGIC 0x33fc
  28. #define BAM_DMUX_AUTOSUSPEND_DELAY 1000
  29. #define BAM_DMUX_REMOTE_TIMEOUT msecs_to_jiffies(2000)
  30. enum {
  31. BAM_DMUX_CMD_DATA,
  32. BAM_DMUX_CMD_OPEN,
  33. BAM_DMUX_CMD_CLOSE,
  34. };
  35. enum {
  36. BAM_DMUX_CH_DATA_0,
  37. BAM_DMUX_CH_DATA_1,
  38. BAM_DMUX_CH_DATA_2,
  39. BAM_DMUX_CH_DATA_3,
  40. BAM_DMUX_CH_DATA_4,
  41. BAM_DMUX_CH_DATA_5,
  42. BAM_DMUX_CH_DATA_6,
  43. BAM_DMUX_CH_DATA_7,
  44. BAM_DMUX_NUM_CH
  45. };
  46. struct bam_dmux_hdr {
  47. u16 magic;
  48. u8 signal;
  49. u8 cmd;
  50. u8 pad;
  51. u8 ch;
  52. u16 len;
  53. };
  54. struct bam_dmux_skb_dma {
  55. struct bam_dmux *dmux;
  56. struct sk_buff *skb;
  57. dma_addr_t addr;
  58. };
  59. struct bam_dmux {
  60. struct device *dev;
  61. int pc_irq;
  62. bool pc_state, pc_ack_state;
  63. struct qcom_smem_state *pc, *pc_ack;
  64. u32 pc_mask, pc_ack_mask;
  65. wait_queue_head_t pc_wait;
  66. struct completion pc_ack_completion;
  67. struct dma_chan *rx, *tx;
  68. struct bam_dmux_skb_dma rx_skbs[BAM_DMUX_NUM_SKB];
  69. struct bam_dmux_skb_dma tx_skbs[BAM_DMUX_NUM_SKB];
  70. spinlock_t tx_lock; /* Protect tx_skbs, tx_next_skb */
  71. unsigned int tx_next_skb;
  72. atomic_long_t tx_deferred_skb;
  73. struct work_struct tx_wakeup_work;
  74. DECLARE_BITMAP(remote_channels, BAM_DMUX_NUM_CH);
  75. struct work_struct register_netdev_work;
  76. struct net_device *netdevs[BAM_DMUX_NUM_CH];
  77. };
  78. struct bam_dmux_netdev {
  79. struct bam_dmux *dmux;
  80. u8 ch;
  81. };
  82. static void bam_dmux_pc_vote(struct bam_dmux *dmux, bool enable)
  83. {
  84. reinit_completion(&dmux->pc_ack_completion);
  85. qcom_smem_state_update_bits(dmux->pc, dmux->pc_mask,
  86. enable ? dmux->pc_mask : 0);
  87. }
  88. static void bam_dmux_pc_ack(struct bam_dmux *dmux)
  89. {
  90. qcom_smem_state_update_bits(dmux->pc_ack, dmux->pc_ack_mask,
  91. dmux->pc_ack_state ? 0 : dmux->pc_ack_mask);
  92. dmux->pc_ack_state = !dmux->pc_ack_state;
  93. }
  94. static bool bam_dmux_skb_dma_map(struct bam_dmux_skb_dma *skb_dma,
  95. enum dma_data_direction dir)
  96. {
  97. struct device *dev = skb_dma->dmux->dev;
  98. skb_dma->addr = dma_map_single(dev, skb_dma->skb->data, skb_dma->skb->len, dir);
  99. if (dma_mapping_error(dev, skb_dma->addr)) {
  100. dev_err(dev, "Failed to DMA map buffer\n");
  101. skb_dma->addr = 0;
  102. return false;
  103. }
  104. return true;
  105. }
  106. static void bam_dmux_skb_dma_unmap(struct bam_dmux_skb_dma *skb_dma,
  107. enum dma_data_direction dir)
  108. {
  109. dma_unmap_single(skb_dma->dmux->dev, skb_dma->addr, skb_dma->skb->len, dir);
  110. skb_dma->addr = 0;
  111. }
  112. static void bam_dmux_tx_wake_queues(struct bam_dmux *dmux)
  113. {
  114. int i;
  115. dev_dbg(dmux->dev, "wake queues\n");
  116. for (i = 0; i < BAM_DMUX_NUM_CH; ++i) {
  117. struct net_device *netdev = dmux->netdevs[i];
  118. if (netdev && netif_running(netdev))
  119. netif_wake_queue(netdev);
  120. }
  121. }
  122. static void bam_dmux_tx_stop_queues(struct bam_dmux *dmux)
  123. {
  124. int i;
  125. dev_dbg(dmux->dev, "stop queues\n");
  126. for (i = 0; i < BAM_DMUX_NUM_CH; ++i) {
  127. struct net_device *netdev = dmux->netdevs[i];
  128. if (netdev)
  129. netif_stop_queue(netdev);
  130. }
  131. }
  132. static void bam_dmux_tx_done(struct bam_dmux_skb_dma *skb_dma)
  133. {
  134. struct bam_dmux *dmux = skb_dma->dmux;
  135. unsigned long flags;
  136. pm_runtime_put_autosuspend(dmux->dev);
  137. if (skb_dma->addr)
  138. bam_dmux_skb_dma_unmap(skb_dma, DMA_TO_DEVICE);
  139. spin_lock_irqsave(&dmux->tx_lock, flags);
  140. skb_dma->skb = NULL;
  141. if (skb_dma == &dmux->tx_skbs[dmux->tx_next_skb % BAM_DMUX_NUM_SKB])
  142. bam_dmux_tx_wake_queues(dmux);
  143. spin_unlock_irqrestore(&dmux->tx_lock, flags);
  144. }
  145. static void bam_dmux_tx_callback(void *data)
  146. {
  147. struct bam_dmux_skb_dma *skb_dma = data;
  148. struct sk_buff *skb = skb_dma->skb;
  149. bam_dmux_tx_done(skb_dma);
  150. dev_consume_skb_any(skb);
  151. }
  152. static bool bam_dmux_skb_dma_submit_tx(struct bam_dmux_skb_dma *skb_dma)
  153. {
  154. struct bam_dmux *dmux = skb_dma->dmux;
  155. struct dma_async_tx_descriptor *desc;
  156. desc = dmaengine_prep_slave_single(dmux->tx, skb_dma->addr,
  157. skb_dma->skb->len, DMA_MEM_TO_DEV,
  158. DMA_PREP_INTERRUPT);
  159. if (!desc) {
  160. dev_err(dmux->dev, "Failed to prepare TX DMA buffer\n");
  161. return false;
  162. }
  163. desc->callback = bam_dmux_tx_callback;
  164. desc->callback_param = skb_dma;
  165. desc->cookie = dmaengine_submit(desc);
  166. return true;
  167. }
  168. static struct bam_dmux_skb_dma *
  169. bam_dmux_tx_queue(struct bam_dmux *dmux, struct sk_buff *skb)
  170. {
  171. struct bam_dmux_skb_dma *skb_dma;
  172. unsigned long flags;
  173. spin_lock_irqsave(&dmux->tx_lock, flags);
  174. skb_dma = &dmux->tx_skbs[dmux->tx_next_skb % BAM_DMUX_NUM_SKB];
  175. if (skb_dma->skb) {
  176. bam_dmux_tx_stop_queues(dmux);
  177. spin_unlock_irqrestore(&dmux->tx_lock, flags);
  178. return NULL;
  179. }
  180. skb_dma->skb = skb;
  181. dmux->tx_next_skb++;
  182. if (dmux->tx_skbs[dmux->tx_next_skb % BAM_DMUX_NUM_SKB].skb)
  183. bam_dmux_tx_stop_queues(dmux);
  184. spin_unlock_irqrestore(&dmux->tx_lock, flags);
  185. return skb_dma;
  186. }
  187. static int bam_dmux_send_cmd(struct bam_dmux_netdev *bndev, u8 cmd)
  188. {
  189. struct bam_dmux *dmux = bndev->dmux;
  190. struct bam_dmux_skb_dma *skb_dma;
  191. struct bam_dmux_hdr *hdr;
  192. struct sk_buff *skb;
  193. int ret;
  194. skb = alloc_skb(sizeof(*hdr), GFP_KERNEL);
  195. if (!skb)
  196. return -ENOMEM;
  197. hdr = skb_put_zero(skb, sizeof(*hdr));
  198. hdr->magic = BAM_DMUX_HDR_MAGIC;
  199. hdr->cmd = cmd;
  200. hdr->ch = bndev->ch;
  201. skb_dma = bam_dmux_tx_queue(dmux, skb);
  202. if (!skb_dma) {
  203. ret = -EAGAIN;
  204. goto free_skb;
  205. }
  206. ret = pm_runtime_get_sync(dmux->dev);
  207. if (ret < 0)
  208. goto tx_fail;
  209. if (!bam_dmux_skb_dma_map(skb_dma, DMA_TO_DEVICE)) {
  210. ret = -ENOMEM;
  211. goto tx_fail;
  212. }
  213. if (!bam_dmux_skb_dma_submit_tx(skb_dma)) {
  214. ret = -EIO;
  215. goto tx_fail;
  216. }
  217. dma_async_issue_pending(dmux->tx);
  218. return 0;
  219. tx_fail:
  220. bam_dmux_tx_done(skb_dma);
  221. free_skb:
  222. dev_kfree_skb(skb);
  223. return ret;
  224. }
  225. static int bam_dmux_netdev_open(struct net_device *netdev)
  226. {
  227. struct bam_dmux_netdev *bndev = netdev_priv(netdev);
  228. int ret;
  229. ret = bam_dmux_send_cmd(bndev, BAM_DMUX_CMD_OPEN);
  230. if (ret)
  231. return ret;
  232. netif_start_queue(netdev);
  233. return 0;
  234. }
  235. static int bam_dmux_netdev_stop(struct net_device *netdev)
  236. {
  237. struct bam_dmux_netdev *bndev = netdev_priv(netdev);
  238. netif_stop_queue(netdev);
  239. bam_dmux_send_cmd(bndev, BAM_DMUX_CMD_CLOSE);
  240. return 0;
  241. }
  242. static unsigned int needed_room(unsigned int avail, unsigned int needed)
  243. {
  244. if (avail >= needed)
  245. return 0;
  246. return needed - avail;
  247. }
  248. static int bam_dmux_tx_prepare_skb(struct bam_dmux_netdev *bndev,
  249. struct sk_buff *skb)
  250. {
  251. unsigned int head = needed_room(skb_headroom(skb), BAM_DMUX_HDR_SIZE);
  252. unsigned int pad = sizeof(u32) - skb->len % sizeof(u32);
  253. unsigned int tail = needed_room(skb_tailroom(skb), pad);
  254. struct bam_dmux_hdr *hdr;
  255. int ret;
  256. if (head || tail || skb_cloned(skb)) {
  257. ret = pskb_expand_head(skb, head, tail, GFP_ATOMIC);
  258. if (ret)
  259. return ret;
  260. }
  261. hdr = skb_push(skb, sizeof(*hdr));
  262. hdr->magic = BAM_DMUX_HDR_MAGIC;
  263. hdr->signal = 0;
  264. hdr->cmd = BAM_DMUX_CMD_DATA;
  265. hdr->pad = pad;
  266. hdr->ch = bndev->ch;
  267. hdr->len = skb->len - sizeof(*hdr);
  268. if (pad)
  269. skb_put_zero(skb, pad);
  270. return 0;
  271. }
  272. static netdev_tx_t bam_dmux_netdev_start_xmit(struct sk_buff *skb,
  273. struct net_device *netdev)
  274. {
  275. struct bam_dmux_netdev *bndev = netdev_priv(netdev);
  276. struct bam_dmux *dmux = bndev->dmux;
  277. struct bam_dmux_skb_dma *skb_dma;
  278. int active, ret;
  279. skb_dma = bam_dmux_tx_queue(dmux, skb);
  280. if (!skb_dma)
  281. return NETDEV_TX_BUSY;
  282. active = pm_runtime_get(dmux->dev);
  283. if (active < 0 && active != -EINPROGRESS)
  284. goto drop;
  285. ret = bam_dmux_tx_prepare_skb(bndev, skb);
  286. if (ret)
  287. goto drop;
  288. if (!bam_dmux_skb_dma_map(skb_dma, DMA_TO_DEVICE))
  289. goto drop;
  290. if (active <= 0) {
  291. /* Cannot sleep here so mark skb for wakeup handler and return */
  292. if (!atomic_long_fetch_or(BIT(skb_dma - dmux->tx_skbs),
  293. &dmux->tx_deferred_skb))
  294. queue_pm_work(&dmux->tx_wakeup_work);
  295. return NETDEV_TX_OK;
  296. }
  297. if (!bam_dmux_skb_dma_submit_tx(skb_dma))
  298. goto drop;
  299. dma_async_issue_pending(dmux->tx);
  300. return NETDEV_TX_OK;
  301. drop:
  302. bam_dmux_tx_done(skb_dma);
  303. dev_kfree_skb_any(skb);
  304. return NETDEV_TX_OK;
  305. }
  306. static void bam_dmux_tx_wakeup_work(struct work_struct *work)
  307. {
  308. struct bam_dmux *dmux = container_of(work, struct bam_dmux, tx_wakeup_work);
  309. unsigned long pending;
  310. int ret, i;
  311. ret = pm_runtime_resume_and_get(dmux->dev);
  312. if (ret < 0) {
  313. dev_err(dmux->dev, "Failed to resume: %d\n", ret);
  314. return;
  315. }
  316. pending = atomic_long_xchg(&dmux->tx_deferred_skb, 0);
  317. if (!pending)
  318. goto out;
  319. dev_dbg(dmux->dev, "pending skbs after wakeup: %#lx\n", pending);
  320. for_each_set_bit(i, &pending, BAM_DMUX_NUM_SKB) {
  321. bam_dmux_skb_dma_submit_tx(&dmux->tx_skbs[i]);
  322. }
  323. dma_async_issue_pending(dmux->tx);
  324. out:
  325. pm_runtime_put_autosuspend(dmux->dev);
  326. }
  327. static const struct net_device_ops bam_dmux_ops = {
  328. .ndo_open = bam_dmux_netdev_open,
  329. .ndo_stop = bam_dmux_netdev_stop,
  330. .ndo_start_xmit = bam_dmux_netdev_start_xmit,
  331. };
  332. static const struct device_type wwan_type = {
  333. .name = "wwan",
  334. };
  335. static void bam_dmux_netdev_setup(struct net_device *dev)
  336. {
  337. dev->netdev_ops = &bam_dmux_ops;
  338. dev->type = ARPHRD_RAWIP;
  339. SET_NETDEV_DEVTYPE(dev, &wwan_type);
  340. dev->flags = IFF_POINTOPOINT | IFF_NOARP;
  341. dev->mtu = ETH_DATA_LEN;
  342. dev->max_mtu = BAM_DMUX_MAX_DATA_SIZE;
  343. dev->needed_headroom = sizeof(struct bam_dmux_hdr);
  344. dev->needed_tailroom = sizeof(u32); /* word-aligned */
  345. dev->tx_queue_len = DEFAULT_TX_QUEUE_LEN;
  346. /* This perm addr will be used as interface identifier by IPv6 */
  347. dev->addr_assign_type = NET_ADDR_RANDOM;
  348. eth_random_addr(dev->perm_addr);
  349. }
  350. static void bam_dmux_register_netdev_work(struct work_struct *work)
  351. {
  352. struct bam_dmux *dmux = container_of(work, struct bam_dmux, register_netdev_work);
  353. struct bam_dmux_netdev *bndev;
  354. struct net_device *netdev;
  355. int ch, ret;
  356. for_each_set_bit(ch, dmux->remote_channels, BAM_DMUX_NUM_CH) {
  357. if (dmux->netdevs[ch])
  358. continue;
  359. netdev = alloc_netdev(sizeof(*bndev), "wwan%d", NET_NAME_ENUM,
  360. bam_dmux_netdev_setup);
  361. if (!netdev)
  362. return;
  363. SET_NETDEV_DEV(netdev, dmux->dev);
  364. netdev->dev_port = ch;
  365. bndev = netdev_priv(netdev);
  366. bndev->dmux = dmux;
  367. bndev->ch = ch;
  368. ret = register_netdev(netdev);
  369. if (ret) {
  370. dev_err(dmux->dev, "Failed to register netdev for channel %u: %d\n",
  371. ch, ret);
  372. free_netdev(netdev);
  373. return;
  374. }
  375. dmux->netdevs[ch] = netdev;
  376. }
  377. }
  378. static void bam_dmux_rx_callback(void *data);
  379. static bool bam_dmux_skb_dma_submit_rx(struct bam_dmux_skb_dma *skb_dma)
  380. {
  381. struct bam_dmux *dmux = skb_dma->dmux;
  382. struct dma_async_tx_descriptor *desc;
  383. desc = dmaengine_prep_slave_single(dmux->rx, skb_dma->addr,
  384. skb_dma->skb->len, DMA_DEV_TO_MEM,
  385. DMA_PREP_INTERRUPT);
  386. if (!desc) {
  387. dev_err(dmux->dev, "Failed to prepare RX DMA buffer\n");
  388. return false;
  389. }
  390. desc->callback = bam_dmux_rx_callback;
  391. desc->callback_param = skb_dma;
  392. desc->cookie = dmaengine_submit(desc);
  393. return true;
  394. }
  395. static bool bam_dmux_skb_dma_queue_rx(struct bam_dmux_skb_dma *skb_dma, gfp_t gfp)
  396. {
  397. if (!skb_dma->skb) {
  398. skb_dma->skb = __netdev_alloc_skb(NULL, BAM_DMUX_BUFFER_SIZE, gfp);
  399. if (!skb_dma->skb)
  400. return false;
  401. skb_put(skb_dma->skb, BAM_DMUX_BUFFER_SIZE);
  402. }
  403. return bam_dmux_skb_dma_map(skb_dma, DMA_FROM_DEVICE) &&
  404. bam_dmux_skb_dma_submit_rx(skb_dma);
  405. }
  406. static void bam_dmux_cmd_data(struct bam_dmux_skb_dma *skb_dma)
  407. {
  408. struct bam_dmux *dmux = skb_dma->dmux;
  409. struct sk_buff *skb = skb_dma->skb;
  410. struct bam_dmux_hdr *hdr = (struct bam_dmux_hdr *)skb->data;
  411. struct net_device *netdev = dmux->netdevs[hdr->ch];
  412. if (!netdev || !netif_running(netdev)) {
  413. dev_warn(dmux->dev, "Data for inactive channel %u\n", hdr->ch);
  414. return;
  415. }
  416. if (hdr->len > BAM_DMUX_MAX_DATA_SIZE) {
  417. dev_err(dmux->dev, "Data larger than buffer? (%u > %u)\n",
  418. hdr->len, (u16)BAM_DMUX_MAX_DATA_SIZE);
  419. return;
  420. }
  421. skb_dma->skb = NULL; /* Hand over to network stack */
  422. skb_pull(skb, sizeof(*hdr));
  423. skb_trim(skb, hdr->len);
  424. skb->dev = netdev;
  425. /* Only Raw-IP/QMAP is supported by this driver */
  426. switch (skb->data[0] & 0xf0) {
  427. case 0x40:
  428. skb->protocol = htons(ETH_P_IP);
  429. break;
  430. case 0x60:
  431. skb->protocol = htons(ETH_P_IPV6);
  432. break;
  433. default:
  434. skb->protocol = htons(ETH_P_MAP);
  435. break;
  436. }
  437. netif_receive_skb(skb);
  438. }
  439. static void bam_dmux_cmd_open(struct bam_dmux *dmux, struct bam_dmux_hdr *hdr)
  440. {
  441. struct net_device *netdev = dmux->netdevs[hdr->ch];
  442. dev_dbg(dmux->dev, "open channel: %u\n", hdr->ch);
  443. if (__test_and_set_bit(hdr->ch, dmux->remote_channels)) {
  444. dev_warn(dmux->dev, "Channel already open: %u\n", hdr->ch);
  445. return;
  446. }
  447. if (netdev) {
  448. netif_device_attach(netdev);
  449. } else {
  450. /* Cannot sleep here, schedule work to register the netdev */
  451. schedule_work(&dmux->register_netdev_work);
  452. }
  453. }
  454. static void bam_dmux_cmd_close(struct bam_dmux *dmux, struct bam_dmux_hdr *hdr)
  455. {
  456. struct net_device *netdev = dmux->netdevs[hdr->ch];
  457. dev_dbg(dmux->dev, "close channel: %u\n", hdr->ch);
  458. if (!__test_and_clear_bit(hdr->ch, dmux->remote_channels)) {
  459. dev_err(dmux->dev, "Channel not open: %u\n", hdr->ch);
  460. return;
  461. }
  462. if (netdev)
  463. netif_device_detach(netdev);
  464. }
  465. static void bam_dmux_rx_callback(void *data)
  466. {
  467. struct bam_dmux_skb_dma *skb_dma = data;
  468. struct bam_dmux *dmux = skb_dma->dmux;
  469. struct sk_buff *skb = skb_dma->skb;
  470. struct bam_dmux_hdr *hdr = (struct bam_dmux_hdr *)skb->data;
  471. bam_dmux_skb_dma_unmap(skb_dma, DMA_FROM_DEVICE);
  472. if (hdr->magic != BAM_DMUX_HDR_MAGIC) {
  473. dev_err(dmux->dev, "Invalid magic in header: %#x\n", hdr->magic);
  474. goto out;
  475. }
  476. if (hdr->ch >= BAM_DMUX_NUM_CH) {
  477. dev_dbg(dmux->dev, "Unsupported channel: %u\n", hdr->ch);
  478. goto out;
  479. }
  480. switch (hdr->cmd) {
  481. case BAM_DMUX_CMD_DATA:
  482. bam_dmux_cmd_data(skb_dma);
  483. break;
  484. case BAM_DMUX_CMD_OPEN:
  485. bam_dmux_cmd_open(dmux, hdr);
  486. break;
  487. case BAM_DMUX_CMD_CLOSE:
  488. bam_dmux_cmd_close(dmux, hdr);
  489. break;
  490. default:
  491. dev_err(dmux->dev, "Unsupported command %u on channel %u\n",
  492. hdr->cmd, hdr->ch);
  493. break;
  494. }
  495. out:
  496. if (bam_dmux_skb_dma_queue_rx(skb_dma, GFP_ATOMIC))
  497. dma_async_issue_pending(dmux->rx);
  498. }
  499. static bool bam_dmux_power_on(struct bam_dmux *dmux)
  500. {
  501. struct device *dev = dmux->dev;
  502. struct dma_slave_config dma_rx_conf = {
  503. .direction = DMA_DEV_TO_MEM,
  504. .src_maxburst = BAM_DMUX_BUFFER_SIZE,
  505. };
  506. int i;
  507. dmux->rx = dma_request_chan(dev, "rx");
  508. if (IS_ERR(dmux->rx)) {
  509. dev_err(dev, "Failed to request RX DMA channel: %pe\n", dmux->rx);
  510. dmux->rx = NULL;
  511. return false;
  512. }
  513. dmaengine_slave_config(dmux->rx, &dma_rx_conf);
  514. for (i = 0; i < BAM_DMUX_NUM_SKB; i++) {
  515. if (!bam_dmux_skb_dma_queue_rx(&dmux->rx_skbs[i], GFP_KERNEL))
  516. return false;
  517. }
  518. dma_async_issue_pending(dmux->rx);
  519. return true;
  520. }
  521. static void bam_dmux_free_skbs(struct bam_dmux_skb_dma skbs[],
  522. enum dma_data_direction dir)
  523. {
  524. int i;
  525. for (i = 0; i < BAM_DMUX_NUM_SKB; i++) {
  526. struct bam_dmux_skb_dma *skb_dma = &skbs[i];
  527. if (skb_dma->addr)
  528. bam_dmux_skb_dma_unmap(skb_dma, dir);
  529. if (skb_dma->skb) {
  530. dev_kfree_skb(skb_dma->skb);
  531. skb_dma->skb = NULL;
  532. }
  533. }
  534. }
  535. static void bam_dmux_power_off(struct bam_dmux *dmux)
  536. {
  537. if (dmux->tx) {
  538. dmaengine_terminate_sync(dmux->tx);
  539. dma_release_channel(dmux->tx);
  540. dmux->tx = NULL;
  541. }
  542. if (dmux->rx) {
  543. dmaengine_terminate_sync(dmux->rx);
  544. dma_release_channel(dmux->rx);
  545. dmux->rx = NULL;
  546. }
  547. bam_dmux_free_skbs(dmux->rx_skbs, DMA_FROM_DEVICE);
  548. }
  549. static irqreturn_t bam_dmux_pc_irq(int irq, void *data)
  550. {
  551. struct bam_dmux *dmux = data;
  552. bool new_state = !dmux->pc_state;
  553. dev_dbg(dmux->dev, "pc: %u\n", new_state);
  554. if (new_state) {
  555. if (bam_dmux_power_on(dmux))
  556. bam_dmux_pc_ack(dmux);
  557. else
  558. bam_dmux_power_off(dmux);
  559. } else {
  560. bam_dmux_power_off(dmux);
  561. bam_dmux_pc_ack(dmux);
  562. }
  563. dmux->pc_state = new_state;
  564. wake_up_all(&dmux->pc_wait);
  565. return IRQ_HANDLED;
  566. }
  567. static irqreturn_t bam_dmux_pc_ack_irq(int irq, void *data)
  568. {
  569. struct bam_dmux *dmux = data;
  570. dev_dbg(dmux->dev, "pc ack\n");
  571. complete_all(&dmux->pc_ack_completion);
  572. return IRQ_HANDLED;
  573. }
  574. static int bam_dmux_runtime_suspend(struct device *dev)
  575. {
  576. struct bam_dmux *dmux = dev_get_drvdata(dev);
  577. dev_dbg(dev, "runtime suspend\n");
  578. bam_dmux_pc_vote(dmux, false);
  579. return 0;
  580. }
  581. static int __maybe_unused bam_dmux_runtime_resume(struct device *dev)
  582. {
  583. struct bam_dmux *dmux = dev_get_drvdata(dev);
  584. dev_dbg(dev, "runtime resume\n");
  585. /* Wait until previous power down was acked */
  586. if (!wait_for_completion_timeout(&dmux->pc_ack_completion,
  587. BAM_DMUX_REMOTE_TIMEOUT))
  588. return -ETIMEDOUT;
  589. /* Vote for power state */
  590. bam_dmux_pc_vote(dmux, true);
  591. /* Wait for ack */
  592. if (!wait_for_completion_timeout(&dmux->pc_ack_completion,
  593. BAM_DMUX_REMOTE_TIMEOUT)) {
  594. bam_dmux_pc_vote(dmux, false);
  595. return -ETIMEDOUT;
  596. }
  597. /* Wait until we're up */
  598. if (!wait_event_timeout(dmux->pc_wait, dmux->pc_state,
  599. BAM_DMUX_REMOTE_TIMEOUT)) {
  600. bam_dmux_pc_vote(dmux, false);
  601. return -ETIMEDOUT;
  602. }
  603. /* Ensure that we actually initialized successfully */
  604. if (!dmux->rx) {
  605. bam_dmux_pc_vote(dmux, false);
  606. return -ENXIO;
  607. }
  608. /* Request TX channel if necessary */
  609. if (dmux->tx)
  610. return 0;
  611. dmux->tx = dma_request_chan(dev, "tx");
  612. if (IS_ERR(dmux->tx)) {
  613. dev_err(dev, "Failed to request TX DMA channel: %pe\n", dmux->tx);
  614. dmux->tx = NULL;
  615. bam_dmux_runtime_suspend(dev);
  616. return -ENXIO;
  617. }
  618. return 0;
  619. }
  620. static int bam_dmux_probe(struct platform_device *pdev)
  621. {
  622. struct device *dev = &pdev->dev;
  623. struct bam_dmux *dmux;
  624. int ret, pc_ack_irq, i;
  625. unsigned int bit;
  626. dmux = devm_kzalloc(dev, sizeof(*dmux), GFP_KERNEL);
  627. if (!dmux)
  628. return -ENOMEM;
  629. dmux->dev = dev;
  630. platform_set_drvdata(pdev, dmux);
  631. dmux->pc_irq = platform_get_irq_byname(pdev, "pc");
  632. if (dmux->pc_irq < 0)
  633. return dmux->pc_irq;
  634. pc_ack_irq = platform_get_irq_byname(pdev, "pc-ack");
  635. if (pc_ack_irq < 0)
  636. return pc_ack_irq;
  637. dmux->pc = devm_qcom_smem_state_get(dev, "pc", &bit);
  638. if (IS_ERR(dmux->pc))
  639. return dev_err_probe(dev, PTR_ERR(dmux->pc),
  640. "Failed to get pc state\n");
  641. dmux->pc_mask = BIT(bit);
  642. dmux->pc_ack = devm_qcom_smem_state_get(dev, "pc-ack", &bit);
  643. if (IS_ERR(dmux->pc_ack))
  644. return dev_err_probe(dev, PTR_ERR(dmux->pc_ack),
  645. "Failed to get pc-ack state\n");
  646. dmux->pc_ack_mask = BIT(bit);
  647. init_waitqueue_head(&dmux->pc_wait);
  648. init_completion(&dmux->pc_ack_completion);
  649. complete_all(&dmux->pc_ack_completion);
  650. spin_lock_init(&dmux->tx_lock);
  651. INIT_WORK(&dmux->tx_wakeup_work, bam_dmux_tx_wakeup_work);
  652. INIT_WORK(&dmux->register_netdev_work, bam_dmux_register_netdev_work);
  653. for (i = 0; i < BAM_DMUX_NUM_SKB; i++) {
  654. dmux->rx_skbs[i].dmux = dmux;
  655. dmux->tx_skbs[i].dmux = dmux;
  656. }
  657. /* Runtime PM manages our own power vote.
  658. * Note that the RX path may be active even if we are runtime suspended,
  659. * since it is controlled by the remote side.
  660. */
  661. pm_runtime_set_autosuspend_delay(dev, BAM_DMUX_AUTOSUSPEND_DELAY);
  662. pm_runtime_use_autosuspend(dev);
  663. pm_runtime_enable(dev);
  664. ret = devm_request_threaded_irq(dev, pc_ack_irq, NULL, bam_dmux_pc_ack_irq,
  665. IRQF_ONESHOT, NULL, dmux);
  666. if (ret)
  667. goto err_disable_pm;
  668. ret = devm_request_threaded_irq(dev, dmux->pc_irq, NULL, bam_dmux_pc_irq,
  669. IRQF_ONESHOT, NULL, dmux);
  670. if (ret)
  671. goto err_disable_pm;
  672. ret = irq_get_irqchip_state(dmux->pc_irq, IRQCHIP_STATE_LINE_LEVEL,
  673. &dmux->pc_state);
  674. if (ret)
  675. goto err_disable_pm;
  676. /* Check if remote finished initialization before us */
  677. if (dmux->pc_state) {
  678. if (bam_dmux_power_on(dmux))
  679. bam_dmux_pc_ack(dmux);
  680. else
  681. bam_dmux_power_off(dmux);
  682. }
  683. return 0;
  684. err_disable_pm:
  685. pm_runtime_disable(dev);
  686. pm_runtime_dont_use_autosuspend(dev);
  687. return ret;
  688. }
  689. static void bam_dmux_remove(struct platform_device *pdev)
  690. {
  691. struct bam_dmux *dmux = platform_get_drvdata(pdev);
  692. struct device *dev = dmux->dev;
  693. LIST_HEAD(list);
  694. int i;
  695. /* Unregister network interfaces */
  696. cancel_work_sync(&dmux->register_netdev_work);
  697. rtnl_lock();
  698. for (i = 0; i < BAM_DMUX_NUM_CH; ++i)
  699. if (dmux->netdevs[i])
  700. unregister_netdevice_queue(dmux->netdevs[i], &list);
  701. unregister_netdevice_many(&list);
  702. rtnl_unlock();
  703. cancel_work_sync(&dmux->tx_wakeup_work);
  704. /* Drop our own power vote */
  705. pm_runtime_disable(dev);
  706. pm_runtime_dont_use_autosuspend(dev);
  707. bam_dmux_runtime_suspend(dev);
  708. pm_runtime_set_suspended(dev);
  709. /* Try to wait for remote side to drop power vote */
  710. if (!wait_event_timeout(dmux->pc_wait, !dmux->rx, BAM_DMUX_REMOTE_TIMEOUT))
  711. dev_err(dev, "Timed out waiting for remote side to suspend\n");
  712. /* Make sure everything is cleaned up before we return */
  713. disable_irq(dmux->pc_irq);
  714. bam_dmux_power_off(dmux);
  715. bam_dmux_free_skbs(dmux->tx_skbs, DMA_TO_DEVICE);
  716. }
  717. static const struct dev_pm_ops bam_dmux_pm_ops = {
  718. SET_RUNTIME_PM_OPS(bam_dmux_runtime_suspend, bam_dmux_runtime_resume, NULL)
  719. };
  720. static const struct of_device_id bam_dmux_of_match[] = {
  721. { .compatible = "qcom,bam-dmux" },
  722. { /* sentinel */ }
  723. };
  724. MODULE_DEVICE_TABLE(of, bam_dmux_of_match);
  725. static struct platform_driver bam_dmux_driver = {
  726. .probe = bam_dmux_probe,
  727. .remove = bam_dmux_remove,
  728. .driver = {
  729. .name = "bam-dmux",
  730. .pm = &bam_dmux_pm_ops,
  731. .of_match_table = bam_dmux_of_match,
  732. },
  733. };
  734. module_platform_driver(bam_dmux_driver);
  735. MODULE_LICENSE("GPL v2");
  736. MODULE_DESCRIPTION("Qualcomm BAM-DMUX WWAN Network Driver");
  737. MODULE_AUTHOR("Stephan Gerhold <stephan@gerhold.net>");