rt2x00queue.c 33 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. Copyright (C) 2010 Willow Garage <http://www.willowgarage.com>
  4. Copyright (C) 2004 - 2010 Ivo van Doorn <IvDoorn@gmail.com>
  5. Copyright (C) 2004 - 2009 Gertjan van Wingerde <gwingerde@gmail.com>
  6. <http://rt2x00.serialmonkey.com>
  7. */
  8. /*
  9. Module: rt2x00lib
  10. Abstract: rt2x00 queue specific routines.
  11. */
  12. #include <linux/slab.h>
  13. #include <linux/kernel.h>
  14. #include <linux/module.h>
  15. #include <linux/dma-mapping.h>
  16. #include "rt2x00.h"
  17. #include "rt2x00lib.h"
  18. struct sk_buff *rt2x00queue_alloc_rxskb(struct queue_entry *entry, gfp_t gfp)
  19. {
  20. struct data_queue *queue = entry->queue;
  21. struct rt2x00_dev *rt2x00dev = queue->rt2x00dev;
  22. struct sk_buff *skb;
  23. struct skb_frame_desc *skbdesc;
  24. unsigned int frame_size;
  25. unsigned int head_size = 0;
  26. unsigned int tail_size = 0;
  27. /*
  28. * The frame size includes descriptor size, because the
  29. * hardware directly receive the frame into the skbuffer.
  30. */
  31. frame_size = queue->data_size + queue->desc_size + queue->winfo_size;
  32. /*
  33. * The payload should be aligned to a 4-byte boundary,
  34. * this means we need at least 3 bytes for moving the frame
  35. * into the correct offset.
  36. */
  37. head_size = 4;
  38. /*
  39. * For IV/EIV/ICV assembly we must make sure there is
  40. * at least 8 bytes available in headroom for IV/EIV
  41. * and 8 bytes for ICV data as tailroon.
  42. */
  43. if (rt2x00_has_cap_hw_crypto(rt2x00dev)) {
  44. head_size += 8;
  45. tail_size += 8;
  46. }
  47. /*
  48. * Allocate skbuffer.
  49. */
  50. skb = __dev_alloc_skb(frame_size + head_size + tail_size, gfp);
  51. if (!skb)
  52. return NULL;
  53. /*
  54. * Make sure we not have a frame with the requested bytes
  55. * available in the head and tail.
  56. */
  57. skb_reserve(skb, head_size);
  58. skb_put(skb, frame_size);
  59. /*
  60. * Populate skbdesc.
  61. */
  62. skbdesc = get_skb_frame_desc(skb);
  63. memset(skbdesc, 0, sizeof(*skbdesc));
  64. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA)) {
  65. dma_addr_t skb_dma;
  66. skb_dma = dma_map_single(rt2x00dev->dev, skb->data, skb->len,
  67. DMA_FROM_DEVICE);
  68. if (unlikely(dma_mapping_error(rt2x00dev->dev, skb_dma))) {
  69. dev_kfree_skb_any(skb);
  70. return NULL;
  71. }
  72. skbdesc->skb_dma = skb_dma;
  73. skbdesc->flags |= SKBDESC_DMA_MAPPED_RX;
  74. }
  75. return skb;
  76. }
  77. int rt2x00queue_map_txskb(struct queue_entry *entry)
  78. {
  79. struct device *dev = entry->queue->rt2x00dev->dev;
  80. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  81. skbdesc->skb_dma =
  82. dma_map_single(dev, entry->skb->data, entry->skb->len, DMA_TO_DEVICE);
  83. if (unlikely(dma_mapping_error(dev, skbdesc->skb_dma)))
  84. return -ENOMEM;
  85. skbdesc->flags |= SKBDESC_DMA_MAPPED_TX;
  86. rt2x00lib_dmadone(entry);
  87. return 0;
  88. }
  89. EXPORT_SYMBOL_GPL(rt2x00queue_map_txskb);
  90. void rt2x00queue_unmap_skb(struct queue_entry *entry)
  91. {
  92. struct device *dev = entry->queue->rt2x00dev->dev;
  93. struct skb_frame_desc *skbdesc = get_skb_frame_desc(entry->skb);
  94. if (skbdesc->flags & SKBDESC_DMA_MAPPED_RX) {
  95. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  96. DMA_FROM_DEVICE);
  97. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_RX;
  98. } else if (skbdesc->flags & SKBDESC_DMA_MAPPED_TX) {
  99. dma_unmap_single(dev, skbdesc->skb_dma, entry->skb->len,
  100. DMA_TO_DEVICE);
  101. skbdesc->flags &= ~SKBDESC_DMA_MAPPED_TX;
  102. }
  103. }
  104. EXPORT_SYMBOL_GPL(rt2x00queue_unmap_skb);
  105. void rt2x00queue_free_skb(struct queue_entry *entry)
  106. {
  107. if (!entry->skb)
  108. return;
  109. rt2x00queue_unmap_skb(entry);
  110. dev_kfree_skb_any(entry->skb);
  111. entry->skb = NULL;
  112. }
  113. void rt2x00queue_align_frame(struct sk_buff *skb)
  114. {
  115. unsigned int frame_length = skb->len;
  116. unsigned int align = ALIGN_SIZE(skb, 0);
  117. if (!align)
  118. return;
  119. skb_push(skb, align);
  120. memmove(skb->data, skb->data + align, frame_length);
  121. skb_trim(skb, frame_length);
  122. }
  123. /*
  124. * H/W needs L2 padding between the header and the paylod if header size
  125. * is not 4 bytes aligned.
  126. */
  127. void rt2x00queue_insert_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  128. {
  129. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  130. if (!l2pad)
  131. return;
  132. skb_push(skb, l2pad);
  133. memmove(skb->data, skb->data + l2pad, hdr_len);
  134. }
  135. void rt2x00queue_remove_l2pad(struct sk_buff *skb, unsigned int hdr_len)
  136. {
  137. unsigned int l2pad = (skb->len > hdr_len) ? L2PAD_SIZE(hdr_len) : 0;
  138. if (!l2pad)
  139. return;
  140. memmove(skb->data + l2pad, skb->data, hdr_len);
  141. skb_pull(skb, l2pad);
  142. }
  143. static void rt2x00queue_create_tx_descriptor_seq(struct rt2x00_dev *rt2x00dev,
  144. struct sk_buff *skb,
  145. struct txentry_desc *txdesc)
  146. {
  147. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  148. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  149. struct rt2x00_intf *intf = vif_to_intf(tx_info->control.vif);
  150. u16 seqno;
  151. if (!(tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ))
  152. return;
  153. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  154. if (!rt2x00_has_cap_flag(rt2x00dev, REQUIRE_SW_SEQNO)) {
  155. /*
  156. * rt2800 has a H/W (or F/W) bug, device incorrectly increase
  157. * seqno on retransmitted data (non-QOS) and management frames.
  158. * To workaround the problem let's generate seqno in software.
  159. * Except for beacons which are transmitted periodically by H/W
  160. * hence hardware has to assign seqno for them.
  161. */
  162. if (ieee80211_is_beacon(hdr->frame_control)) {
  163. __set_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  164. /* H/W will generate sequence number */
  165. return;
  166. }
  167. __clear_bit(ENTRY_TXD_GENERATE_SEQ, &txdesc->flags);
  168. }
  169. /*
  170. * The hardware is not able to insert a sequence number. Assign a
  171. * software generated one here.
  172. *
  173. * This is wrong because beacons are not getting sequence
  174. * numbers assigned properly.
  175. *
  176. * A secondary problem exists for drivers that cannot toggle
  177. * sequence counting per-frame, since those will override the
  178. * sequence counter given by mac80211.
  179. */
  180. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  181. seqno = atomic_add_return(0x10, &intf->seqno);
  182. else
  183. seqno = atomic_read(&intf->seqno);
  184. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  185. hdr->seq_ctrl |= cpu_to_le16(seqno);
  186. }
  187. static void rt2x00queue_create_tx_descriptor_plcp(struct rt2x00_dev *rt2x00dev,
  188. struct sk_buff *skb,
  189. struct txentry_desc *txdesc,
  190. const struct rt2x00_rate *hwrate)
  191. {
  192. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  193. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  194. unsigned int data_length;
  195. unsigned int duration;
  196. unsigned int residual;
  197. /*
  198. * Determine with what IFS priority this frame should be send.
  199. * Set ifs to IFS_SIFS when the this is not the first fragment,
  200. * or this fragment came after RTS/CTS.
  201. */
  202. if (test_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags))
  203. txdesc->u.plcp.ifs = IFS_BACKOFF;
  204. else
  205. txdesc->u.plcp.ifs = IFS_SIFS;
  206. /* Data length + CRC + Crypto overhead (IV/EIV/ICV/MIC) */
  207. data_length = skb->len + 4;
  208. data_length += rt2x00crypto_tx_overhead(rt2x00dev, skb);
  209. /*
  210. * PLCP setup
  211. * Length calculation depends on OFDM/CCK rate.
  212. */
  213. txdesc->u.plcp.signal = hwrate->plcp;
  214. txdesc->u.plcp.service = 0x04;
  215. if (hwrate->flags & DEV_RATE_OFDM) {
  216. txdesc->u.plcp.length_high = (data_length >> 6) & 0x3f;
  217. txdesc->u.plcp.length_low = data_length & 0x3f;
  218. } else {
  219. /*
  220. * Convert length to microseconds.
  221. */
  222. residual = GET_DURATION_RES(data_length, hwrate->bitrate);
  223. duration = GET_DURATION(data_length, hwrate->bitrate);
  224. if (residual != 0) {
  225. duration++;
  226. /*
  227. * Check if we need to set the Length Extension
  228. */
  229. if (hwrate->bitrate == 110 && residual <= 30)
  230. txdesc->u.plcp.service |= 0x80;
  231. }
  232. txdesc->u.plcp.length_high = (duration >> 8) & 0xff;
  233. txdesc->u.plcp.length_low = duration & 0xff;
  234. /*
  235. * When preamble is enabled we should set the
  236. * preamble bit for the signal.
  237. */
  238. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  239. txdesc->u.plcp.signal |= 0x08;
  240. }
  241. }
  242. static void rt2x00queue_create_tx_descriptor_ht(struct rt2x00_dev *rt2x00dev,
  243. struct sk_buff *skb,
  244. struct txentry_desc *txdesc,
  245. struct ieee80211_sta *sta,
  246. const struct rt2x00_rate *hwrate)
  247. {
  248. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  249. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  250. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  251. struct rt2x00_sta *sta_priv = NULL;
  252. u8 density = 0;
  253. if (sta) {
  254. sta_priv = sta_to_rt2x00_sta(sta);
  255. txdesc->u.ht.wcid = sta_priv->wcid;
  256. density = sta->deflink.ht_cap.ampdu_density;
  257. }
  258. /*
  259. * If IEEE80211_TX_RC_MCS is set txrate->idx just contains the
  260. * mcs rate to be used
  261. */
  262. if (txrate->flags & IEEE80211_TX_RC_MCS) {
  263. txdesc->u.ht.mcs = txrate->idx;
  264. /*
  265. * MIMO PS should be set to 1 for STA's using dynamic SM PS
  266. * when using more then one tx stream (>MCS7).
  267. */
  268. if (sta && txdesc->u.ht.mcs > 7 &&
  269. sta->deflink.smps_mode == IEEE80211_SMPS_DYNAMIC)
  270. __set_bit(ENTRY_TXD_HT_MIMO_PS, &txdesc->flags);
  271. } else {
  272. txdesc->u.ht.mcs = rt2x00_get_rate_mcs(hwrate->mcs);
  273. if (txrate->flags & IEEE80211_TX_RC_USE_SHORT_PREAMBLE)
  274. txdesc->u.ht.mcs |= 0x08;
  275. }
  276. if (test_bit(CONFIG_HT_DISABLED, &rt2x00dev->flags)) {
  277. if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  278. txdesc->u.ht.txop = TXOP_SIFS;
  279. else
  280. txdesc->u.ht.txop = TXOP_BACKOFF;
  281. /* Left zero on all other settings. */
  282. return;
  283. }
  284. /*
  285. * Only one STBC stream is supported for now.
  286. */
  287. if (tx_info->flags & IEEE80211_TX_CTL_STBC)
  288. txdesc->u.ht.stbc = 1;
  289. /*
  290. * This frame is eligible for an AMPDU, however, don't aggregate
  291. * frames that are intended to probe a specific tx rate.
  292. */
  293. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU &&
  294. !(tx_info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)) {
  295. __set_bit(ENTRY_TXD_HT_AMPDU, &txdesc->flags);
  296. txdesc->u.ht.mpdu_density = density;
  297. txdesc->u.ht.ba_size = 7; /* FIXME: What value is needed? */
  298. }
  299. /*
  300. * Set 40Mhz mode if necessary (for legacy rates this will
  301. * duplicate the frame to both channels).
  302. */
  303. if (txrate->flags & IEEE80211_TX_RC_40_MHZ_WIDTH ||
  304. txrate->flags & IEEE80211_TX_RC_DUP_DATA)
  305. __set_bit(ENTRY_TXD_HT_BW_40, &txdesc->flags);
  306. if (txrate->flags & IEEE80211_TX_RC_SHORT_GI)
  307. __set_bit(ENTRY_TXD_HT_SHORT_GI, &txdesc->flags);
  308. /*
  309. * Determine IFS values
  310. * - Use TXOP_BACKOFF for management frames except beacons
  311. * - Use TXOP_SIFS for fragment bursts
  312. * - Use TXOP_HTTXOP for everything else
  313. *
  314. * Note: rt2800 devices won't use CTS protection (if used)
  315. * for frames not transmitted with TXOP_HTTXOP
  316. */
  317. if (ieee80211_is_mgmt(hdr->frame_control) &&
  318. !ieee80211_is_beacon(hdr->frame_control))
  319. txdesc->u.ht.txop = TXOP_BACKOFF;
  320. else if (!(tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT))
  321. txdesc->u.ht.txop = TXOP_SIFS;
  322. else
  323. txdesc->u.ht.txop = TXOP_HTTXOP;
  324. }
  325. static void rt2x00queue_create_tx_descriptor(struct rt2x00_dev *rt2x00dev,
  326. struct sk_buff *skb,
  327. struct txentry_desc *txdesc,
  328. struct ieee80211_sta *sta)
  329. {
  330. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  331. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  332. struct ieee80211_tx_rate *txrate = &tx_info->control.rates[0];
  333. struct ieee80211_rate *rate;
  334. const struct rt2x00_rate *hwrate = NULL;
  335. memset(txdesc, 0, sizeof(*txdesc));
  336. /*
  337. * Header and frame information.
  338. */
  339. txdesc->length = skb->len;
  340. txdesc->header_length = ieee80211_get_hdrlen_from_skb(skb);
  341. /*
  342. * Check whether this frame is to be acked.
  343. */
  344. if (!(tx_info->flags & IEEE80211_TX_CTL_NO_ACK))
  345. __set_bit(ENTRY_TXD_ACK, &txdesc->flags);
  346. /*
  347. * Check if this is a RTS/CTS frame
  348. */
  349. if (ieee80211_is_rts(hdr->frame_control) ||
  350. ieee80211_is_cts(hdr->frame_control)) {
  351. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  352. if (ieee80211_is_rts(hdr->frame_control))
  353. __set_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags);
  354. else
  355. __set_bit(ENTRY_TXD_CTS_FRAME, &txdesc->flags);
  356. }
  357. /*
  358. * Determine retry information.
  359. */
  360. txdesc->retry_limit = tx_info->control.rates[0].count - 1;
  361. if (txdesc->retry_limit >= rt2x00dev->long_retry)
  362. __set_bit(ENTRY_TXD_RETRY_MODE, &txdesc->flags);
  363. /*
  364. * Check if more fragments are pending
  365. */
  366. if (ieee80211_has_morefrags(hdr->frame_control)) {
  367. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  368. __set_bit(ENTRY_TXD_MORE_FRAG, &txdesc->flags);
  369. }
  370. /*
  371. * Check if more frames (!= fragments) are pending
  372. */
  373. if (tx_info->flags & IEEE80211_TX_CTL_MORE_FRAMES)
  374. __set_bit(ENTRY_TXD_BURST, &txdesc->flags);
  375. /*
  376. * Beacons and probe responses require the tsf timestamp
  377. * to be inserted into the frame.
  378. */
  379. if ((ieee80211_is_beacon(hdr->frame_control) ||
  380. ieee80211_is_probe_resp(hdr->frame_control)) &&
  381. !(tx_info->flags & IEEE80211_TX_CTL_INJECTED))
  382. __set_bit(ENTRY_TXD_REQ_TIMESTAMP, &txdesc->flags);
  383. if ((tx_info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT) &&
  384. !test_bit(ENTRY_TXD_RTS_FRAME, &txdesc->flags))
  385. __set_bit(ENTRY_TXD_FIRST_FRAGMENT, &txdesc->flags);
  386. /*
  387. * Determine rate modulation.
  388. */
  389. if (txrate->flags & IEEE80211_TX_RC_GREEN_FIELD)
  390. txdesc->rate_mode = RATE_MODE_HT_GREENFIELD;
  391. else if (txrate->flags & IEEE80211_TX_RC_MCS)
  392. txdesc->rate_mode = RATE_MODE_HT_MIX;
  393. else {
  394. rate = ieee80211_get_tx_rate(rt2x00dev->hw, tx_info);
  395. hwrate = rt2x00_get_rate(rate->hw_value);
  396. if (hwrate->flags & DEV_RATE_OFDM)
  397. txdesc->rate_mode = RATE_MODE_OFDM;
  398. else
  399. txdesc->rate_mode = RATE_MODE_CCK;
  400. }
  401. /*
  402. * Apply TX descriptor handling by components
  403. */
  404. rt2x00crypto_create_tx_descriptor(rt2x00dev, skb, txdesc);
  405. rt2x00queue_create_tx_descriptor_seq(rt2x00dev, skb, txdesc);
  406. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_HT_TX_DESC))
  407. rt2x00queue_create_tx_descriptor_ht(rt2x00dev, skb, txdesc,
  408. sta, hwrate);
  409. else
  410. rt2x00queue_create_tx_descriptor_plcp(rt2x00dev, skb, txdesc,
  411. hwrate);
  412. }
  413. static int rt2x00queue_write_tx_data(struct queue_entry *entry,
  414. struct txentry_desc *txdesc)
  415. {
  416. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  417. /*
  418. * This should not happen, we already checked the entry
  419. * was ours. When the hardware disagrees there has been
  420. * a queue corruption!
  421. */
  422. if (unlikely(rt2x00dev->ops->lib->get_entry_state &&
  423. rt2x00dev->ops->lib->get_entry_state(entry))) {
  424. rt2x00_err(rt2x00dev,
  425. "Corrupt queue %d, accessing entry which is not ours\n"
  426. "Please file bug report to %s\n",
  427. entry->queue->qid, DRV_PROJECT);
  428. return -EINVAL;
  429. }
  430. /*
  431. * Add the requested extra tx headroom in front of the skb.
  432. */
  433. skb_push(entry->skb, rt2x00dev->extra_tx_headroom);
  434. memset(entry->skb->data, 0, rt2x00dev->extra_tx_headroom);
  435. /*
  436. * Call the driver's write_tx_data function, if it exists.
  437. */
  438. if (rt2x00dev->ops->lib->write_tx_data)
  439. rt2x00dev->ops->lib->write_tx_data(entry, txdesc);
  440. /*
  441. * Map the skb to DMA.
  442. */
  443. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_DMA) &&
  444. rt2x00queue_map_txskb(entry))
  445. return -ENOMEM;
  446. return 0;
  447. }
  448. static void rt2x00queue_write_tx_descriptor(struct queue_entry *entry,
  449. struct txentry_desc *txdesc)
  450. {
  451. struct data_queue *queue = entry->queue;
  452. queue->rt2x00dev->ops->lib->write_tx_desc(entry, txdesc);
  453. /*
  454. * All processing on the frame has been completed, this means
  455. * it is now ready to be dumped to userspace through debugfs.
  456. */
  457. rt2x00debug_dump_frame(queue->rt2x00dev, DUMP_FRAME_TX, entry);
  458. }
  459. static void rt2x00queue_kick_tx_queue(struct data_queue *queue,
  460. struct txentry_desc *txdesc)
  461. {
  462. /*
  463. * Check if we need to kick the queue, there are however a few rules
  464. * 1) Don't kick unless this is the last in frame in a burst.
  465. * When the burst flag is set, this frame is always followed
  466. * by another frame which in some way are related to eachother.
  467. * This is true for fragments, RTS or CTS-to-self frames.
  468. * 2) Rule 1 can be broken when the available entries
  469. * in the queue are less then a certain threshold.
  470. */
  471. if (rt2x00queue_threshold(queue) ||
  472. !test_bit(ENTRY_TXD_BURST, &txdesc->flags))
  473. queue->rt2x00dev->ops->lib->kick_queue(queue);
  474. }
  475. static void rt2x00queue_bar_check(struct queue_entry *entry)
  476. {
  477. struct rt2x00_dev *rt2x00dev = entry->queue->rt2x00dev;
  478. struct ieee80211_bar *bar = (void *) (entry->skb->data +
  479. rt2x00dev->extra_tx_headroom);
  480. struct rt2x00_bar_list_entry *bar_entry;
  481. if (likely(!ieee80211_is_back_req(bar->frame_control)))
  482. return;
  483. bar_entry = kmalloc_obj(*bar_entry, GFP_ATOMIC);
  484. /*
  485. * If the alloc fails we still send the BAR out but just don't track
  486. * it in our bar list. And as a result we will report it to mac80211
  487. * back as failed.
  488. */
  489. if (!bar_entry)
  490. return;
  491. bar_entry->entry = entry;
  492. bar_entry->block_acked = 0;
  493. /*
  494. * Copy the relevant parts of the 802.11 BAR into out check list
  495. * such that we can use RCU for less-overhead in the RX path since
  496. * sending BARs and processing the according BlockAck should be
  497. * the exception.
  498. */
  499. memcpy(bar_entry->ra, bar->ra, sizeof(bar->ra));
  500. memcpy(bar_entry->ta, bar->ta, sizeof(bar->ta));
  501. bar_entry->control = bar->control;
  502. bar_entry->start_seq_num = bar->start_seq_num;
  503. /*
  504. * Insert BAR into our BAR check list.
  505. */
  506. spin_lock_bh(&rt2x00dev->bar_list_lock);
  507. list_add_tail_rcu(&bar_entry->list, &rt2x00dev->bar_list);
  508. spin_unlock_bh(&rt2x00dev->bar_list_lock);
  509. }
  510. int rt2x00queue_write_tx_frame(struct data_queue *queue, struct sk_buff *skb,
  511. struct ieee80211_sta *sta, bool local)
  512. {
  513. struct ieee80211_tx_info *tx_info;
  514. struct queue_entry *entry;
  515. struct txentry_desc txdesc;
  516. struct skb_frame_desc *skbdesc;
  517. u8 rate_idx, rate_flags;
  518. int ret = 0;
  519. /*
  520. * Copy all TX descriptor information into txdesc,
  521. * after that we are free to use the skb->cb array
  522. * for our information.
  523. */
  524. rt2x00queue_create_tx_descriptor(queue->rt2x00dev, skb, &txdesc, sta);
  525. /*
  526. * All information is retrieved from the skb->cb array,
  527. * now we should claim ownership of the driver part of that
  528. * array, preserving the bitrate index and flags.
  529. */
  530. tx_info = IEEE80211_SKB_CB(skb);
  531. rate_idx = tx_info->control.rates[0].idx;
  532. rate_flags = tx_info->control.rates[0].flags;
  533. skbdesc = get_skb_frame_desc(skb);
  534. memset(skbdesc, 0, sizeof(*skbdesc));
  535. skbdesc->tx_rate_idx = rate_idx;
  536. skbdesc->tx_rate_flags = rate_flags;
  537. if (local)
  538. skbdesc->flags |= SKBDESC_NOT_MAC80211;
  539. /*
  540. * When hardware encryption is supported, and this frame
  541. * is to be encrypted, we should strip the IV/EIV data from
  542. * the frame so we can provide it to the driver separately.
  543. */
  544. if (test_bit(ENTRY_TXD_ENCRYPT, &txdesc.flags) &&
  545. !test_bit(ENTRY_TXD_ENCRYPT_IV, &txdesc.flags)) {
  546. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_COPY_IV))
  547. rt2x00crypto_tx_copy_iv(skb, &txdesc);
  548. else
  549. rt2x00crypto_tx_remove_iv(skb, &txdesc);
  550. }
  551. /*
  552. * When DMA allocation is required we should guarantee to the
  553. * driver that the DMA is aligned to a 4-byte boundary.
  554. * However some drivers require L2 padding to pad the payload
  555. * rather then the header. This could be a requirement for
  556. * PCI and USB devices, while header alignment only is valid
  557. * for PCI devices.
  558. */
  559. if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_L2PAD))
  560. rt2x00queue_insert_l2pad(skb, txdesc.header_length);
  561. else if (rt2x00_has_cap_flag(queue->rt2x00dev, REQUIRE_DMA))
  562. rt2x00queue_align_frame(skb);
  563. /*
  564. * That function must be called with bh disabled.
  565. */
  566. spin_lock(&queue->tx_lock);
  567. if (unlikely(rt2x00queue_full(queue))) {
  568. rt2x00_dbg(queue->rt2x00dev, "Dropping frame due to full tx queue %d\n",
  569. queue->qid);
  570. ret = -ENOBUFS;
  571. goto out;
  572. }
  573. entry = rt2x00queue_get_entry(queue, Q_INDEX);
  574. if (unlikely(test_and_set_bit(ENTRY_OWNER_DEVICE_DATA,
  575. &entry->flags))) {
  576. rt2x00_err(queue->rt2x00dev,
  577. "Arrived at non-free entry in the non-full queue %d\n"
  578. "Please file bug report to %s\n",
  579. queue->qid, DRV_PROJECT);
  580. ret = -EINVAL;
  581. goto out;
  582. }
  583. entry->skb = skb;
  584. /*
  585. * It could be possible that the queue was corrupted and this
  586. * call failed. Since we always return NETDEV_TX_OK to mac80211,
  587. * this frame will simply be dropped.
  588. */
  589. if (unlikely(rt2x00queue_write_tx_data(entry, &txdesc))) {
  590. clear_bit(ENTRY_OWNER_DEVICE_DATA, &entry->flags);
  591. entry->skb = NULL;
  592. ret = -EIO;
  593. goto out;
  594. }
  595. /*
  596. * Put BlockAckReqs into our check list for driver BA processing.
  597. */
  598. rt2x00queue_bar_check(entry);
  599. set_bit(ENTRY_DATA_PENDING, &entry->flags);
  600. rt2x00queue_index_inc(entry, Q_INDEX);
  601. rt2x00queue_write_tx_descriptor(entry, &txdesc);
  602. rt2x00queue_kick_tx_queue(queue, &txdesc);
  603. out:
  604. /*
  605. * Pausing queue has to be serialized with rt2x00lib_txdone(), so we
  606. * do this under queue->tx_lock. Bottom halve was already disabled
  607. * before ieee80211_xmit() call.
  608. */
  609. if (rt2x00queue_threshold(queue))
  610. rt2x00queue_pause_queue(queue);
  611. spin_unlock(&queue->tx_lock);
  612. return ret;
  613. }
  614. int rt2x00queue_clear_beacon(struct rt2x00_dev *rt2x00dev,
  615. struct ieee80211_vif *vif)
  616. {
  617. struct rt2x00_intf *intf = vif_to_intf(vif);
  618. if (unlikely(!intf->beacon))
  619. return -ENOBUFS;
  620. /*
  621. * Clean up the beacon skb.
  622. */
  623. rt2x00queue_free_skb(intf->beacon);
  624. /*
  625. * Clear beacon (single bssid devices don't need to clear the beacon
  626. * since the beacon queue will get stopped anyway).
  627. */
  628. if (rt2x00dev->ops->lib->clear_beacon)
  629. rt2x00dev->ops->lib->clear_beacon(intf->beacon);
  630. return 0;
  631. }
  632. int rt2x00queue_update_beacon(struct rt2x00_dev *rt2x00dev,
  633. struct ieee80211_vif *vif)
  634. {
  635. struct rt2x00_intf *intf = vif_to_intf(vif);
  636. struct skb_frame_desc *skbdesc;
  637. struct txentry_desc txdesc;
  638. if (unlikely(!intf->beacon))
  639. return -ENOBUFS;
  640. /*
  641. * Clean up the beacon skb.
  642. */
  643. rt2x00queue_free_skb(intf->beacon);
  644. intf->beacon->skb = ieee80211_beacon_get(rt2x00dev->hw, vif, 0);
  645. if (!intf->beacon->skb)
  646. return -ENOMEM;
  647. /*
  648. * Copy all TX descriptor information into txdesc,
  649. * after that we are free to use the skb->cb array
  650. * for our information.
  651. */
  652. rt2x00queue_create_tx_descriptor(rt2x00dev, intf->beacon->skb, &txdesc, NULL);
  653. /*
  654. * Fill in skb descriptor
  655. */
  656. skbdesc = get_skb_frame_desc(intf->beacon->skb);
  657. memset(skbdesc, 0, sizeof(*skbdesc));
  658. /*
  659. * Send beacon to hardware.
  660. */
  661. rt2x00dev->ops->lib->write_beacon(intf->beacon, &txdesc);
  662. return 0;
  663. }
  664. bool rt2x00queue_for_each_entry(struct data_queue *queue,
  665. enum queue_index start,
  666. enum queue_index end,
  667. void *data,
  668. bool (*fn)(struct queue_entry *entry,
  669. void *data))
  670. {
  671. unsigned long irqflags;
  672. unsigned int index_start;
  673. unsigned int index_end;
  674. unsigned int i;
  675. if (unlikely(start >= Q_INDEX_MAX || end >= Q_INDEX_MAX)) {
  676. rt2x00_err(queue->rt2x00dev,
  677. "Entry requested from invalid index range (%d - %d)\n",
  678. start, end);
  679. return true;
  680. }
  681. /*
  682. * Only protect the range we are going to loop over,
  683. * if during our loop a extra entry is set to pending
  684. * it should not be kicked during this run, since it
  685. * is part of another TX operation.
  686. */
  687. spin_lock_irqsave(&queue->index_lock, irqflags);
  688. index_start = queue->index[start];
  689. index_end = queue->index[end];
  690. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  691. /*
  692. * Start from the TX done pointer, this guarantees that we will
  693. * send out all frames in the correct order.
  694. */
  695. if (index_start < index_end) {
  696. for (i = index_start; i < index_end; i++) {
  697. if (fn(&queue->entries[i], data))
  698. return true;
  699. }
  700. } else {
  701. for (i = index_start; i < queue->limit; i++) {
  702. if (fn(&queue->entries[i], data))
  703. return true;
  704. }
  705. for (i = 0; i < index_end; i++) {
  706. if (fn(&queue->entries[i], data))
  707. return true;
  708. }
  709. }
  710. return false;
  711. }
  712. EXPORT_SYMBOL_GPL(rt2x00queue_for_each_entry);
  713. struct queue_entry *rt2x00queue_get_entry(struct data_queue *queue,
  714. enum queue_index index)
  715. {
  716. struct queue_entry *entry;
  717. unsigned long irqflags;
  718. if (unlikely(index >= Q_INDEX_MAX)) {
  719. rt2x00_err(queue->rt2x00dev, "Entry requested from invalid index type (%d)\n",
  720. index);
  721. return NULL;
  722. }
  723. spin_lock_irqsave(&queue->index_lock, irqflags);
  724. entry = &queue->entries[queue->index[index]];
  725. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  726. return entry;
  727. }
  728. EXPORT_SYMBOL_GPL(rt2x00queue_get_entry);
  729. void rt2x00queue_index_inc(struct queue_entry *entry, enum queue_index index)
  730. {
  731. struct data_queue *queue = entry->queue;
  732. unsigned long irqflags;
  733. if (unlikely(index >= Q_INDEX_MAX)) {
  734. rt2x00_err(queue->rt2x00dev,
  735. "Index change on invalid index type (%d)\n", index);
  736. return;
  737. }
  738. spin_lock_irqsave(&queue->index_lock, irqflags);
  739. queue->index[index]++;
  740. if (queue->index[index] >= queue->limit)
  741. queue->index[index] = 0;
  742. entry->last_action = jiffies;
  743. if (index == Q_INDEX) {
  744. queue->length++;
  745. } else if (index == Q_INDEX_DONE) {
  746. queue->length--;
  747. queue->count++;
  748. }
  749. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  750. }
  751. static void rt2x00queue_pause_queue_nocheck(struct data_queue *queue)
  752. {
  753. switch (queue->qid) {
  754. case QID_AC_VO:
  755. case QID_AC_VI:
  756. case QID_AC_BE:
  757. case QID_AC_BK:
  758. /*
  759. * For TX queues, we have to disable the queue
  760. * inside mac80211.
  761. */
  762. ieee80211_stop_queue(queue->rt2x00dev->hw, queue->qid);
  763. break;
  764. default:
  765. break;
  766. }
  767. }
  768. void rt2x00queue_pause_queue(struct data_queue *queue)
  769. {
  770. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  771. !test_bit(QUEUE_STARTED, &queue->flags) ||
  772. test_and_set_bit(QUEUE_PAUSED, &queue->flags))
  773. return;
  774. rt2x00queue_pause_queue_nocheck(queue);
  775. }
  776. EXPORT_SYMBOL_GPL(rt2x00queue_pause_queue);
  777. void rt2x00queue_unpause_queue(struct data_queue *queue)
  778. {
  779. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  780. !test_bit(QUEUE_STARTED, &queue->flags) ||
  781. !test_and_clear_bit(QUEUE_PAUSED, &queue->flags))
  782. return;
  783. switch (queue->qid) {
  784. case QID_AC_VO:
  785. case QID_AC_VI:
  786. case QID_AC_BE:
  787. case QID_AC_BK:
  788. /*
  789. * For TX queues, we have to enable the queue
  790. * inside mac80211.
  791. */
  792. ieee80211_wake_queue(queue->rt2x00dev->hw, queue->qid);
  793. break;
  794. case QID_RX:
  795. /*
  796. * For RX we need to kick the queue now in order to
  797. * receive frames.
  798. */
  799. queue->rt2x00dev->ops->lib->kick_queue(queue);
  800. break;
  801. default:
  802. break;
  803. }
  804. }
  805. EXPORT_SYMBOL_GPL(rt2x00queue_unpause_queue);
  806. void rt2x00queue_start_queue(struct data_queue *queue)
  807. {
  808. mutex_lock(&queue->status_lock);
  809. if (!test_bit(DEVICE_STATE_PRESENT, &queue->rt2x00dev->flags) ||
  810. test_and_set_bit(QUEUE_STARTED, &queue->flags)) {
  811. mutex_unlock(&queue->status_lock);
  812. return;
  813. }
  814. set_bit(QUEUE_PAUSED, &queue->flags);
  815. queue->rt2x00dev->ops->lib->start_queue(queue);
  816. rt2x00queue_unpause_queue(queue);
  817. mutex_unlock(&queue->status_lock);
  818. }
  819. EXPORT_SYMBOL_GPL(rt2x00queue_start_queue);
  820. void rt2x00queue_stop_queue(struct data_queue *queue)
  821. {
  822. mutex_lock(&queue->status_lock);
  823. if (!test_and_clear_bit(QUEUE_STARTED, &queue->flags)) {
  824. mutex_unlock(&queue->status_lock);
  825. return;
  826. }
  827. rt2x00queue_pause_queue_nocheck(queue);
  828. queue->rt2x00dev->ops->lib->stop_queue(queue);
  829. mutex_unlock(&queue->status_lock);
  830. }
  831. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queue);
  832. void rt2x00queue_flush_queue(struct data_queue *queue, bool drop)
  833. {
  834. bool tx_queue =
  835. (queue->qid == QID_AC_VO) ||
  836. (queue->qid == QID_AC_VI) ||
  837. (queue->qid == QID_AC_BE) ||
  838. (queue->qid == QID_AC_BK);
  839. if (rt2x00queue_empty(queue))
  840. return;
  841. /*
  842. * If we are not supposed to drop any pending
  843. * frames, this means we must force a start (=kick)
  844. * to the queue to make sure the hardware will
  845. * start transmitting.
  846. */
  847. if (!drop && tx_queue)
  848. queue->rt2x00dev->ops->lib->kick_queue(queue);
  849. /*
  850. * Check if driver supports flushing, if that is the case we can
  851. * defer the flushing to the driver. Otherwise we must use the
  852. * alternative which just waits for the queue to become empty.
  853. */
  854. if (likely(queue->rt2x00dev->ops->lib->flush_queue))
  855. queue->rt2x00dev->ops->lib->flush_queue(queue, drop);
  856. /*
  857. * The queue flush has failed...
  858. */
  859. if (unlikely(!rt2x00queue_empty(queue)))
  860. rt2x00_warn(queue->rt2x00dev, "Queue %d failed to flush\n",
  861. queue->qid);
  862. }
  863. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queue);
  864. void rt2x00queue_start_queues(struct rt2x00_dev *rt2x00dev)
  865. {
  866. struct data_queue *queue;
  867. /*
  868. * rt2x00queue_start_queue will call ieee80211_wake_queue
  869. * for each queue after is has been properly initialized.
  870. */
  871. tx_queue_for_each(rt2x00dev, queue)
  872. rt2x00queue_start_queue(queue);
  873. rt2x00queue_start_queue(rt2x00dev->rx);
  874. }
  875. EXPORT_SYMBOL_GPL(rt2x00queue_start_queues);
  876. void rt2x00queue_stop_queues(struct rt2x00_dev *rt2x00dev)
  877. {
  878. struct data_queue *queue;
  879. /*
  880. * rt2x00queue_stop_queue will call ieee80211_stop_queue
  881. * as well, but we are completely shutting doing everything
  882. * now, so it is much safer to stop all TX queues at once,
  883. * and use rt2x00queue_stop_queue for cleaning up.
  884. */
  885. ieee80211_stop_queues(rt2x00dev->hw);
  886. tx_queue_for_each(rt2x00dev, queue)
  887. rt2x00queue_stop_queue(queue);
  888. rt2x00queue_stop_queue(rt2x00dev->rx);
  889. }
  890. EXPORT_SYMBOL_GPL(rt2x00queue_stop_queues);
  891. void rt2x00queue_flush_queues(struct rt2x00_dev *rt2x00dev, bool drop)
  892. {
  893. struct data_queue *queue;
  894. tx_queue_for_each(rt2x00dev, queue)
  895. rt2x00queue_flush_queue(queue, drop);
  896. rt2x00queue_flush_queue(rt2x00dev->rx, drop);
  897. }
  898. EXPORT_SYMBOL_GPL(rt2x00queue_flush_queues);
  899. static void rt2x00queue_reset(struct data_queue *queue)
  900. {
  901. unsigned long irqflags;
  902. unsigned int i;
  903. spin_lock_irqsave(&queue->index_lock, irqflags);
  904. queue->count = 0;
  905. queue->length = 0;
  906. for (i = 0; i < Q_INDEX_MAX; i++)
  907. queue->index[i] = 0;
  908. spin_unlock_irqrestore(&queue->index_lock, irqflags);
  909. }
  910. void rt2x00queue_init_queues(struct rt2x00_dev *rt2x00dev)
  911. {
  912. struct data_queue *queue;
  913. unsigned int i;
  914. queue_for_each(rt2x00dev, queue) {
  915. rt2x00queue_reset(queue);
  916. for (i = 0; i < queue->limit; i++)
  917. rt2x00dev->ops->lib->clear_entry(&queue->entries[i]);
  918. }
  919. }
  920. static int rt2x00queue_alloc_entries(struct data_queue *queue)
  921. {
  922. struct queue_entry *entries;
  923. unsigned int entry_size;
  924. unsigned int i;
  925. rt2x00queue_reset(queue);
  926. /*
  927. * Allocate all queue entries.
  928. */
  929. entry_size = sizeof(*entries) + queue->priv_size;
  930. entries = kcalloc(queue->limit, entry_size, GFP_KERNEL);
  931. if (!entries)
  932. return -ENOMEM;
  933. #define QUEUE_ENTRY_PRIV_OFFSET(__base, __index, __limit, __esize, __psize) \
  934. (((char *)(__base)) + ((__limit) * (__esize)) + \
  935. ((__index) * (__psize)))
  936. for (i = 0; i < queue->limit; i++) {
  937. entries[i].flags = 0;
  938. entries[i].queue = queue;
  939. entries[i].skb = NULL;
  940. entries[i].entry_idx = i;
  941. entries[i].priv_data =
  942. QUEUE_ENTRY_PRIV_OFFSET(entries, i, queue->limit,
  943. sizeof(*entries), queue->priv_size);
  944. }
  945. #undef QUEUE_ENTRY_PRIV_OFFSET
  946. queue->entries = entries;
  947. return 0;
  948. }
  949. static void rt2x00queue_free_skbs(struct data_queue *queue)
  950. {
  951. unsigned int i;
  952. if (!queue->entries)
  953. return;
  954. for (i = 0; i < queue->limit; i++) {
  955. rt2x00queue_free_skb(&queue->entries[i]);
  956. }
  957. }
  958. static int rt2x00queue_alloc_rxskbs(struct data_queue *queue)
  959. {
  960. unsigned int i;
  961. struct sk_buff *skb;
  962. for (i = 0; i < queue->limit; i++) {
  963. skb = rt2x00queue_alloc_rxskb(&queue->entries[i], GFP_KERNEL);
  964. if (!skb)
  965. return -ENOMEM;
  966. queue->entries[i].skb = skb;
  967. }
  968. return 0;
  969. }
  970. int rt2x00queue_initialize(struct rt2x00_dev *rt2x00dev)
  971. {
  972. struct data_queue *queue;
  973. int status;
  974. status = rt2x00queue_alloc_entries(rt2x00dev->rx);
  975. if (status)
  976. goto exit;
  977. tx_queue_for_each(rt2x00dev, queue) {
  978. status = rt2x00queue_alloc_entries(queue);
  979. if (status)
  980. goto exit;
  981. }
  982. status = rt2x00queue_alloc_entries(rt2x00dev->bcn);
  983. if (status)
  984. goto exit;
  985. if (rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE)) {
  986. status = rt2x00queue_alloc_entries(rt2x00dev->atim);
  987. if (status)
  988. goto exit;
  989. }
  990. status = rt2x00queue_alloc_rxskbs(rt2x00dev->rx);
  991. if (status)
  992. goto exit;
  993. return 0;
  994. exit:
  995. rt2x00_err(rt2x00dev, "Queue entries allocation failed\n");
  996. rt2x00queue_uninitialize(rt2x00dev);
  997. return status;
  998. }
  999. void rt2x00queue_uninitialize(struct rt2x00_dev *rt2x00dev)
  1000. {
  1001. struct data_queue *queue;
  1002. rt2x00queue_free_skbs(rt2x00dev->rx);
  1003. queue_for_each(rt2x00dev, queue) {
  1004. kfree(queue->entries);
  1005. queue->entries = NULL;
  1006. }
  1007. }
  1008. static void rt2x00queue_init(struct rt2x00_dev *rt2x00dev,
  1009. struct data_queue *queue, enum data_queue_qid qid)
  1010. {
  1011. mutex_init(&queue->status_lock);
  1012. spin_lock_init(&queue->tx_lock);
  1013. spin_lock_init(&queue->index_lock);
  1014. queue->rt2x00dev = rt2x00dev;
  1015. queue->qid = qid;
  1016. queue->txop = 0;
  1017. queue->aifs = 2;
  1018. queue->cw_min = 5;
  1019. queue->cw_max = 10;
  1020. rt2x00dev->ops->queue_init(queue);
  1021. queue->threshold = DIV_ROUND_UP(queue->limit, 10);
  1022. }
  1023. int rt2x00queue_allocate(struct rt2x00_dev *rt2x00dev)
  1024. {
  1025. struct data_queue *queue;
  1026. enum data_queue_qid qid;
  1027. unsigned int req_atim =
  1028. rt2x00_has_cap_flag(rt2x00dev, REQUIRE_ATIM_QUEUE);
  1029. /*
  1030. * We need the following queues:
  1031. * RX: 1
  1032. * TX: ops->tx_queues
  1033. * Beacon: 1
  1034. * Atim: 1 (if required)
  1035. */
  1036. rt2x00dev->data_queues = 2 + rt2x00dev->ops->tx_queues + req_atim;
  1037. queue = kzalloc_objs(*queue, rt2x00dev->data_queues);
  1038. if (!queue)
  1039. return -ENOMEM;
  1040. /*
  1041. * Initialize pointers
  1042. */
  1043. rt2x00dev->rx = queue;
  1044. rt2x00dev->tx = &queue[1];
  1045. rt2x00dev->bcn = &queue[1 + rt2x00dev->ops->tx_queues];
  1046. rt2x00dev->atim = req_atim ? &queue[2 + rt2x00dev->ops->tx_queues] : NULL;
  1047. /*
  1048. * Initialize queue parameters.
  1049. * RX: qid = QID_RX
  1050. * TX: qid = QID_AC_VO + index
  1051. * TX: cw_min: 2^5 = 32.
  1052. * TX: cw_max: 2^10 = 1024.
  1053. * BCN: qid = QID_BEACON
  1054. * ATIM: qid = QID_ATIM
  1055. */
  1056. rt2x00queue_init(rt2x00dev, rt2x00dev->rx, QID_RX);
  1057. qid = QID_AC_VO;
  1058. tx_queue_for_each(rt2x00dev, queue)
  1059. rt2x00queue_init(rt2x00dev, queue, qid++);
  1060. rt2x00queue_init(rt2x00dev, rt2x00dev->bcn, QID_BEACON);
  1061. if (req_atim)
  1062. rt2x00queue_init(rt2x00dev, rt2x00dev->atim, QID_ATIM);
  1063. return 0;
  1064. }
  1065. void rt2x00queue_free(struct rt2x00_dev *rt2x00dev)
  1066. {
  1067. kfree(rt2x00dev->rx);
  1068. rt2x00dev->rx = NULL;
  1069. rt2x00dev->tx = NULL;
  1070. rt2x00dev->bcn = NULL;
  1071. }