tx.c 8.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2014 Felix Fietkau <nbd@openwrt.org>
  4. * Copyright (C) 2015 Jakub Kicinski <kubakici@wp.pl>
  5. */
  6. #include "mt7601u.h"
  7. #include "trace.h"
  8. enum mt76_txq_id {
  9. MT_TXQ_VO = IEEE80211_AC_VO,
  10. MT_TXQ_VI = IEEE80211_AC_VI,
  11. MT_TXQ_BE = IEEE80211_AC_BE,
  12. MT_TXQ_BK = IEEE80211_AC_BK,
  13. MT_TXQ_PSD,
  14. MT_TXQ_MCU,
  15. __MT_TXQ_MAX
  16. };
  17. /* Hardware uses mirrored order of queues with Q0 having the highest priority */
  18. static u8 q2hwq(u8 q)
  19. {
  20. return q ^ 0x3;
  21. }
  22. /* Take mac80211 Q id from the skb and translate it to hardware Q id */
  23. static u8 skb2q(struct sk_buff *skb)
  24. {
  25. int qid = skb_get_queue_mapping(skb);
  26. if (WARN_ON(qid >= MT_TXQ_PSD)) {
  27. qid = MT_TXQ_BE;
  28. skb_set_queue_mapping(skb, qid);
  29. }
  30. return q2hwq(qid);
  31. }
  32. /* Note: TX retry reporting is a bit broken.
  33. * Retries are reported only once per AMPDU and often come a frame early
  34. * i.e. they are reported in the last status preceding the AMPDU. Apart
  35. * from the fact that it's hard to know the length of the AMPDU (which is
  36. * required to know to how many consecutive frames retries should be
  37. * applied), if status comes early on full FIFO it gets lost and retries
  38. * of the whole AMPDU become invisible.
  39. * As a work-around encode the desired rate in PKT_ID of TX descriptor
  40. * and based on that guess the retries (every rate is tried once).
  41. * Only downside here is that for MCS0 we have to rely solely on
  42. * transmission failures as no retries can ever be reported.
  43. * Not having to read EXT_FIFO has a nice effect of doubling the number
  44. * of reports which can be fetched.
  45. * Also the vendor driver never uses the EXT_FIFO register so it may be
  46. * undertested.
  47. */
  48. static u8 mt7601u_tx_pktid_enc(struct mt7601u_dev *dev, u8 rate, bool is_probe)
  49. {
  50. u8 encoded = (rate + 1) + is_probe * 8;
  51. /* Because PKT_ID 0 disables status reporting only 15 values are
  52. * available but 16 are needed (8 MCS * 2 for encoding is_probe)
  53. * - we need to cram together two rates. MCS0 and MCS7 with is_probe
  54. * share PKT_ID 9.
  55. */
  56. if (is_probe && rate == 7)
  57. return encoded - 7;
  58. return encoded;
  59. }
  60. static void
  61. mt7601u_tx_pktid_dec(struct mt7601u_dev *dev, struct mt76_tx_status *stat)
  62. {
  63. u8 req_rate = stat->pktid;
  64. u8 eff_rate = stat->rate & 0x7;
  65. req_rate -= 1;
  66. if (req_rate > 7) {
  67. stat->is_probe = true;
  68. req_rate -= 8;
  69. /* Decide between MCS0 and MCS7 which share pktid 9 */
  70. if (!req_rate && eff_rate)
  71. req_rate = 7;
  72. }
  73. stat->retry = req_rate - eff_rate;
  74. }
  75. static void mt7601u_tx_skb_remove_dma_overhead(struct sk_buff *skb,
  76. struct ieee80211_tx_info *info)
  77. {
  78. int pkt_len = (unsigned long)info->status.status_driver_data[0];
  79. skb_pull(skb, sizeof(struct mt76_txwi) + 4);
  80. if (ieee80211_get_hdrlen_from_skb(skb) % 4)
  81. mt76_remove_hdr_pad(skb);
  82. skb_trim(skb, pkt_len);
  83. }
  84. void mt7601u_tx_status(struct mt7601u_dev *dev, struct sk_buff *skb)
  85. {
  86. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  87. mt7601u_tx_skb_remove_dma_overhead(skb, info);
  88. ieee80211_tx_info_clear_status(info);
  89. info->status.rates[0].idx = -1;
  90. info->flags |= IEEE80211_TX_STAT_ACK;
  91. spin_lock_bh(&dev->mac_lock);
  92. ieee80211_tx_status_skb(dev->hw, skb);
  93. spin_unlock_bh(&dev->mac_lock);
  94. }
  95. static int mt7601u_skb_rooms(struct mt7601u_dev *dev, struct sk_buff *skb)
  96. {
  97. int hdr_len = ieee80211_get_hdrlen_from_skb(skb);
  98. u32 need_head;
  99. need_head = sizeof(struct mt76_txwi) + 4;
  100. if (hdr_len % 4)
  101. need_head += 2;
  102. return skb_cow(skb, need_head);
  103. }
  104. static struct mt76_txwi *
  105. mt7601u_push_txwi(struct mt7601u_dev *dev, struct sk_buff *skb,
  106. struct ieee80211_sta *sta, struct mt76_wcid *wcid,
  107. int pkt_len)
  108. {
  109. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  110. struct ieee80211_tx_rate *rate = &info->control.rates[0];
  111. struct mt76_txwi *txwi;
  112. unsigned long flags;
  113. bool is_probe;
  114. u32 pkt_id;
  115. u16 rate_ctl;
  116. u8 nss;
  117. txwi = skb_push(skb, sizeof(struct mt76_txwi));
  118. memset(txwi, 0, sizeof(*txwi));
  119. if (!wcid->tx_rate_set)
  120. ieee80211_get_tx_rates(info->control.vif, sta, skb,
  121. info->control.rates, 1);
  122. spin_lock_irqsave(&dev->lock, flags);
  123. if (rate->idx < 0 || !rate->count)
  124. rate_ctl = wcid->tx_rate;
  125. else
  126. rate_ctl = mt76_mac_tx_rate_val(dev, rate, &nss);
  127. spin_unlock_irqrestore(&dev->lock, flags);
  128. txwi->rate_ctl = cpu_to_le16(rate_ctl);
  129. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK))
  130. txwi->ack_ctl |= MT_TXWI_ACK_CTL_REQ;
  131. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ)
  132. txwi->ack_ctl |= MT_TXWI_ACK_CTL_NSEQ;
  133. if ((info->flags & IEEE80211_TX_CTL_AMPDU) && sta) {
  134. u8 ba_size = IEEE80211_MIN_AMPDU_BUF;
  135. ba_size <<= sta->deflink.ht_cap.ampdu_factor;
  136. ba_size = min_t(int, 63, ba_size);
  137. if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
  138. ba_size = 0;
  139. txwi->ack_ctl |= FIELD_PREP(MT_TXWI_ACK_CTL_BA_WINDOW, ba_size);
  140. txwi->flags =
  141. cpu_to_le16(MT_TXWI_FLAGS_AMPDU |
  142. FIELD_PREP(MT_TXWI_FLAGS_MPDU_DENSITY,
  143. sta->deflink.ht_cap.ampdu_density));
  144. if (info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE)
  145. txwi->flags = 0;
  146. }
  147. txwi->wcid = wcid->idx;
  148. is_probe = !!(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
  149. pkt_id = mt7601u_tx_pktid_enc(dev, rate_ctl & 0x7, is_probe);
  150. pkt_len |= FIELD_PREP(MT_TXWI_LEN_PKTID, pkt_id);
  151. txwi->len_ctl = cpu_to_le16(pkt_len);
  152. return txwi;
  153. }
  154. void mt7601u_tx(struct ieee80211_hw *hw, struct ieee80211_tx_control *control,
  155. struct sk_buff *skb)
  156. {
  157. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  158. struct mt7601u_dev *dev = hw->priv;
  159. struct ieee80211_vif *vif = info->control.vif;
  160. struct ieee80211_sta *sta = control->sta;
  161. struct mt76_sta *msta = NULL;
  162. struct mt76_wcid *wcid = dev->mon_wcid;
  163. struct mt76_txwi *txwi;
  164. int pkt_len = skb->len;
  165. int hw_q = skb2q(skb);
  166. BUILD_BUG_ON(ARRAY_SIZE(info->status.status_driver_data) < 1);
  167. info->status.status_driver_data[0] = (void *)(unsigned long)pkt_len;
  168. if (mt7601u_skb_rooms(dev, skb) || mt76_insert_hdr_pad(skb)) {
  169. ieee80211_free_txskb(dev->hw, skb);
  170. return;
  171. }
  172. if (sta) {
  173. msta = (struct mt76_sta *) sta->drv_priv;
  174. wcid = &msta->wcid;
  175. } else if (vif) {
  176. struct mt76_vif *mvif = (struct mt76_vif *)vif->drv_priv;
  177. wcid = &mvif->group_wcid;
  178. }
  179. txwi = mt7601u_push_txwi(dev, skb, sta, wcid, pkt_len);
  180. if (mt7601u_dma_enqueue_tx(dev, skb, wcid, hw_q))
  181. return;
  182. trace_mt_tx(dev, skb, msta, txwi);
  183. }
  184. void mt7601u_tx_stat(struct work_struct *work)
  185. {
  186. struct mt7601u_dev *dev = container_of(work, struct mt7601u_dev,
  187. stat_work.work);
  188. struct mt76_tx_status stat;
  189. unsigned long flags;
  190. int cleaned = 0;
  191. while (!test_bit(MT7601U_STATE_REMOVED, &dev->state)) {
  192. stat = mt7601u_mac_fetch_tx_status(dev);
  193. if (!stat.valid)
  194. break;
  195. mt7601u_tx_pktid_dec(dev, &stat);
  196. mt76_send_tx_status(dev, &stat);
  197. cleaned++;
  198. }
  199. trace_mt_tx_status_cleaned(dev, cleaned);
  200. spin_lock_irqsave(&dev->tx_lock, flags);
  201. if (cleaned)
  202. queue_delayed_work(dev->stat_wq, &dev->stat_work,
  203. msecs_to_jiffies(10));
  204. else if (test_and_clear_bit(MT7601U_STATE_MORE_STATS, &dev->state))
  205. queue_delayed_work(dev->stat_wq, &dev->stat_work,
  206. msecs_to_jiffies(20));
  207. else
  208. clear_bit(MT7601U_STATE_READING_STATS, &dev->state);
  209. spin_unlock_irqrestore(&dev->tx_lock, flags);
  210. }
  211. int mt7601u_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  212. unsigned int link_id, u16 queue,
  213. const struct ieee80211_tx_queue_params *params)
  214. {
  215. struct mt7601u_dev *dev = hw->priv;
  216. u8 cw_min = 5, cw_max = 10, hw_q = q2hwq(queue);
  217. u32 val;
  218. /* TODO: should we do funny things with the parameters?
  219. * See what mt7601u_set_default_edca() used to do in init.c.
  220. */
  221. if (params->cw_min)
  222. cw_min = fls(params->cw_min);
  223. if (params->cw_max)
  224. cw_max = fls(params->cw_max);
  225. WARN_ON(params->txop > 0xff);
  226. WARN_ON(params->aifs > 0xf);
  227. WARN_ON(cw_min > 0xf);
  228. WARN_ON(cw_max > 0xf);
  229. val = FIELD_PREP(MT_EDCA_CFG_AIFSN, params->aifs) |
  230. FIELD_PREP(MT_EDCA_CFG_CWMIN, cw_min) |
  231. FIELD_PREP(MT_EDCA_CFG_CWMAX, cw_max);
  232. /* TODO: based on user-controlled EnableTxBurst var vendor drv sets
  233. * a really long txop on AC0 (see connect.c:2009) but only on
  234. * connect? When not connected should be 0.
  235. */
  236. if (!hw_q)
  237. val |= 0x60;
  238. else
  239. val |= FIELD_PREP(MT_EDCA_CFG_TXOP, params->txop);
  240. mt76_wr(dev, MT_EDCA_CFG_AC(hw_q), val);
  241. val = mt76_rr(dev, MT_WMM_TXOP(hw_q));
  242. val &= ~(MT_WMM_TXOP_MASK << MT_WMM_TXOP_SHIFT(hw_q));
  243. val |= params->txop << MT_WMM_TXOP_SHIFT(hw_q);
  244. mt76_wr(dev, MT_WMM_TXOP(hw_q), val);
  245. val = mt76_rr(dev, MT_WMM_AIFSN);
  246. val &= ~(MT_WMM_AIFSN_MASK << MT_WMM_AIFSN_SHIFT(hw_q));
  247. val |= params->aifs << MT_WMM_AIFSN_SHIFT(hw_q);
  248. mt76_wr(dev, MT_WMM_AIFSN, val);
  249. val = mt76_rr(dev, MT_WMM_CWMIN);
  250. val &= ~(MT_WMM_CWMIN_MASK << MT_WMM_CWMIN_SHIFT(hw_q));
  251. val |= cw_min << MT_WMM_CWMIN_SHIFT(hw_q);
  252. mt76_wr(dev, MT_WMM_CWMIN, val);
  253. val = mt76_rr(dev, MT_WMM_CWMAX);
  254. val &= ~(MT_WMM_CWMAX_MASK << MT_WMM_CWMAX_SHIFT(hw_q));
  255. val |= cw_max << MT_WMM_CWMAX_SHIFT(hw_q);
  256. mt76_wr(dev, MT_WMM_CWMAX, val);
  257. return 0;
  258. }