main.c 52 KB

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  1. // SPDX-License-Identifier: ISC
  2. /*
  3. * Copyright (c) 2012-2017 Qualcomm Atheros, Inc.
  4. * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
  5. */
  6. #include <linux/moduleparam.h>
  7. #include <linux/if_arp.h>
  8. #include <linux/etherdevice.h>
  9. #include <linux/rtnetlink.h>
  10. #include "wil6210.h"
  11. #include "txrx.h"
  12. #include "txrx_edma.h"
  13. #include "wmi.h"
  14. #include "boot_loader.h"
  15. #define WAIT_FOR_HALP_VOTE_MS 100
  16. #define WAIT_FOR_SCAN_ABORT_MS 1000
  17. #define WIL_DEFAULT_NUM_RX_STATUS_RINGS 1
  18. #define WIL_BOARD_FILE_MAX_NAMELEN 128
  19. bool debug_fw; /* = false; */
  20. module_param(debug_fw, bool, 0444);
  21. MODULE_PARM_DESC(debug_fw, " do not perform card reset. For FW debug");
  22. static u8 oob_mode;
  23. module_param(oob_mode, byte, 0444);
  24. MODULE_PARM_DESC(oob_mode,
  25. " enable out of the box (OOB) mode in FW, for diagnostics and certification");
  26. bool no_fw_recovery;
  27. module_param(no_fw_recovery, bool, 0644);
  28. MODULE_PARM_DESC(no_fw_recovery, " disable automatic FW error recovery");
  29. /* if not set via modparam, will be set to default value of 1/8 of
  30. * rx ring size during init flow
  31. */
  32. unsigned short rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_INIT;
  33. module_param(rx_ring_overflow_thrsh, ushort, 0444);
  34. MODULE_PARM_DESC(rx_ring_overflow_thrsh,
  35. " RX ring overflow threshold in descriptors.");
  36. /* We allow allocation of more than 1 page buffers to support large packets.
  37. * It is suboptimal behavior performance wise in case MTU above page size.
  38. */
  39. unsigned int mtu_max = TXRX_BUF_LEN_DEFAULT - WIL_MAX_MPDU_OVERHEAD;
  40. static int mtu_max_set(const char *val, const struct kernel_param *kp)
  41. {
  42. int ret;
  43. /* sets mtu_max directly. no need to restore it in case of
  44. * illegal value since we assume this will fail insmod
  45. */
  46. ret = param_set_uint(val, kp);
  47. if (ret)
  48. return ret;
  49. if (mtu_max < 68 || mtu_max > WIL_MAX_ETH_MTU)
  50. ret = -EINVAL;
  51. return ret;
  52. }
  53. static const struct kernel_param_ops mtu_max_ops = {
  54. .set = mtu_max_set,
  55. .get = param_get_uint,
  56. };
  57. module_param_cb(mtu_max, &mtu_max_ops, &mtu_max, 0444);
  58. MODULE_PARM_DESC(mtu_max, " Max MTU value.");
  59. static uint rx_ring_order;
  60. static uint tx_ring_order = WIL_TX_RING_SIZE_ORDER_DEFAULT;
  61. static uint bcast_ring_order = WIL_BCAST_RING_SIZE_ORDER_DEFAULT;
  62. static int ring_order_set(const char *val, const struct kernel_param *kp)
  63. {
  64. int ret;
  65. uint x;
  66. ret = kstrtouint(val, 0, &x);
  67. if (ret)
  68. return ret;
  69. if ((x < WIL_RING_SIZE_ORDER_MIN) || (x > WIL_RING_SIZE_ORDER_MAX))
  70. return -EINVAL;
  71. *((uint *)kp->arg) = x;
  72. return 0;
  73. }
  74. static const struct kernel_param_ops ring_order_ops = {
  75. .set = ring_order_set,
  76. .get = param_get_uint,
  77. };
  78. module_param_cb(rx_ring_order, &ring_order_ops, &rx_ring_order, 0444);
  79. MODULE_PARM_DESC(rx_ring_order, " Rx ring order; size = 1 << order");
  80. module_param_cb(tx_ring_order, &ring_order_ops, &tx_ring_order, 0444);
  81. MODULE_PARM_DESC(tx_ring_order, " Tx ring order; size = 1 << order");
  82. module_param_cb(bcast_ring_order, &ring_order_ops, &bcast_ring_order, 0444);
  83. MODULE_PARM_DESC(bcast_ring_order, " Bcast ring order; size = 1 << order");
  84. enum {
  85. WIL_BOOT_ERR,
  86. WIL_BOOT_VANILLA,
  87. WIL_BOOT_PRODUCTION,
  88. WIL_BOOT_DEVELOPMENT,
  89. };
  90. enum {
  91. WIL_SIG_STATUS_VANILLA = 0x0,
  92. WIL_SIG_STATUS_DEVELOPMENT = 0x1,
  93. WIL_SIG_STATUS_PRODUCTION = 0x2,
  94. WIL_SIG_STATUS_CORRUPTED_PRODUCTION = 0x3,
  95. };
  96. #define RST_DELAY (20) /* msec, for loop in @wil_wait_device_ready */
  97. #define RST_COUNT (1 + 1000/RST_DELAY) /* round up to be above 1 sec total */
  98. #define PMU_READY_DELAY_MS (4) /* ms, for sleep in @wil_wait_device_ready */
  99. #define OTP_HW_DELAY (200) /* usec, loop in @wil_wait_device_ready_talyn_mb */
  100. /* round up to be above 2 ms total */
  101. #define OTP_HW_COUNT (1 + 2000 / OTP_HW_DELAY)
  102. /*
  103. * Due to a hardware issue,
  104. * one has to read/write to/from NIC in 32-bit chunks;
  105. * regular memcpy_fromio and siblings will
  106. * not work on 64-bit platform - it uses 64-bit transactions
  107. *
  108. * Force 32-bit transactions to enable NIC on 64-bit platforms
  109. *
  110. * To avoid byte swap on big endian host, __raw_{read|write}l
  111. * should be used - {read|write}l would swap bytes to provide
  112. * little endian on PCI value in host endianness.
  113. */
  114. void wil_memcpy_fromio_32(void *dst, const volatile void __iomem *src,
  115. size_t count)
  116. {
  117. u32 *d = dst;
  118. const volatile u32 __iomem *s = src;
  119. for (; count >= 4; count -= 4)
  120. *d++ = __raw_readl(s++);
  121. if (unlikely(count)) {
  122. /* count can be 1..3 */
  123. u32 tmp = __raw_readl(s);
  124. memcpy(d, &tmp, count);
  125. }
  126. }
  127. void wil_memcpy_toio_32(volatile void __iomem *dst, const void *src,
  128. size_t count)
  129. {
  130. volatile u32 __iomem *d = dst;
  131. const u32 *s = src;
  132. for (; count >= 4; count -= 4)
  133. __raw_writel(*s++, d++);
  134. if (unlikely(count)) {
  135. /* count can be 1..3 */
  136. u32 tmp = 0;
  137. memcpy(&tmp, s, count);
  138. __raw_writel(tmp, d);
  139. }
  140. }
  141. /* Device memory access is prohibited while reset or suspend.
  142. * wil_mem_access_lock protects accessing device memory in these cases
  143. */
  144. int wil_mem_access_lock(struct wil6210_priv *wil)
  145. {
  146. if (!down_read_trylock(&wil->mem_lock))
  147. return -EBUSY;
  148. if (test_bit(wil_status_suspending, wil->status) ||
  149. test_bit(wil_status_suspended, wil->status)) {
  150. up_read(&wil->mem_lock);
  151. return -EBUSY;
  152. }
  153. return 0;
  154. }
  155. void wil_mem_access_unlock(struct wil6210_priv *wil)
  156. {
  157. up_read(&wil->mem_lock);
  158. }
  159. static void wil_ring_fini_tx(struct wil6210_priv *wil, int id)
  160. {
  161. struct wil_ring *ring = &wil->ring_tx[id];
  162. struct wil_ring_tx_data *txdata = &wil->ring_tx_data[id];
  163. lockdep_assert_held(&wil->mutex);
  164. if (!ring->va)
  165. return;
  166. wil_dbg_misc(wil, "vring_fini_tx: id=%d\n", id);
  167. spin_lock_bh(&txdata->lock);
  168. txdata->dot1x_open = false;
  169. txdata->mid = U8_MAX;
  170. txdata->enabled = 0; /* no Tx can be in progress or start anew */
  171. spin_unlock_bh(&txdata->lock);
  172. /* napi_synchronize waits for completion of the current NAPI but will
  173. * not prevent the next NAPI run.
  174. * Add a memory barrier to guarantee that txdata->enabled is zeroed
  175. * before napi_synchronize so that the next scheduled NAPI will not
  176. * handle this vring
  177. */
  178. wmb();
  179. /* make sure NAPI won't touch this vring */
  180. if (test_bit(wil_status_napi_en, wil->status))
  181. napi_synchronize(&wil->napi_tx);
  182. wil->txrx_ops.ring_fini_tx(wil, ring);
  183. }
  184. static bool wil_vif_is_connected(struct wil6210_priv *wil, u8 mid)
  185. {
  186. int i;
  187. for (i = 0; i < wil->max_assoc_sta; i++) {
  188. if (wil->sta[i].mid == mid &&
  189. wil->sta[i].status == wil_sta_connected)
  190. return true;
  191. }
  192. return false;
  193. }
  194. static void wil_disconnect_cid_complete(struct wil6210_vif *vif, int cid,
  195. u16 reason_code)
  196. __acquires(&sta->tid_rx_lock) __releases(&sta->tid_rx_lock)
  197. {
  198. uint i;
  199. struct wil6210_priv *wil = vif_to_wil(vif);
  200. struct net_device *ndev = vif_to_ndev(vif);
  201. struct wireless_dev *wdev = vif_to_wdev(vif);
  202. struct wil_sta_info *sta = &wil->sta[cid];
  203. int min_ring_id = wil_get_min_tx_ring_id(wil);
  204. might_sleep();
  205. wil_dbg_misc(wil,
  206. "disconnect_cid_complete: CID %d, MID %d, status %d\n",
  207. cid, sta->mid, sta->status);
  208. /* inform upper layers */
  209. if (sta->status != wil_sta_unused) {
  210. if (vif->mid != sta->mid) {
  211. wil_err(wil, "STA MID mismatch with VIF MID(%d)\n",
  212. vif->mid);
  213. }
  214. switch (wdev->iftype) {
  215. case NL80211_IFTYPE_AP:
  216. case NL80211_IFTYPE_P2P_GO:
  217. /* AP-like interface */
  218. cfg80211_del_sta(ndev, sta->addr, GFP_KERNEL);
  219. break;
  220. default:
  221. break;
  222. }
  223. sta->status = wil_sta_unused;
  224. sta->mid = U8_MAX;
  225. }
  226. /* reorder buffers */
  227. for (i = 0; i < WIL_STA_TID_NUM; i++) {
  228. struct wil_tid_ampdu_rx *r;
  229. spin_lock_bh(&sta->tid_rx_lock);
  230. r = sta->tid_rx[i];
  231. sta->tid_rx[i] = NULL;
  232. wil_tid_ampdu_rx_free(wil, r);
  233. spin_unlock_bh(&sta->tid_rx_lock);
  234. }
  235. /* crypto context */
  236. memset(sta->tid_crypto_rx, 0, sizeof(sta->tid_crypto_rx));
  237. memset(&sta->group_crypto_rx, 0, sizeof(sta->group_crypto_rx));
  238. /* release vrings */
  239. for (i = min_ring_id; i < ARRAY_SIZE(wil->ring_tx); i++) {
  240. if (wil->ring2cid_tid[i][0] == cid)
  241. wil_ring_fini_tx(wil, i);
  242. }
  243. /* statistics */
  244. memset(&sta->stats, 0, sizeof(sta->stats));
  245. sta->stats.tx_latency_min_us = U32_MAX;
  246. }
  247. static void _wil6210_disconnect_complete(struct wil6210_vif *vif,
  248. const u8 *bssid, u16 reason_code)
  249. {
  250. struct wil6210_priv *wil = vif_to_wil(vif);
  251. int cid = -ENOENT;
  252. struct net_device *ndev;
  253. struct wireless_dev *wdev;
  254. ndev = vif_to_ndev(vif);
  255. wdev = vif_to_wdev(vif);
  256. might_sleep();
  257. wil_info(wil, "disconnect_complete: bssid=%pM, reason=%d\n",
  258. bssid, reason_code);
  259. /* Cases are:
  260. * - disconnect single STA, still connected
  261. * - disconnect single STA, already disconnected
  262. * - disconnect all
  263. *
  264. * For "disconnect all", there are 3 options:
  265. * - bssid == NULL
  266. * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
  267. * - bssid is our MAC address
  268. */
  269. if (bssid && !is_broadcast_ether_addr(bssid) &&
  270. !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
  271. cid = wil_find_cid(wil, vif->mid, bssid);
  272. wil_dbg_misc(wil,
  273. "Disconnect complete %pM, CID=%d, reason=%d\n",
  274. bssid, cid, reason_code);
  275. if (wil_cid_valid(wil, cid)) /* disconnect 1 peer */
  276. wil_disconnect_cid_complete(vif, cid, reason_code);
  277. } else { /* all */
  278. wil_dbg_misc(wil, "Disconnect complete all\n");
  279. for (cid = 0; cid < wil->max_assoc_sta; cid++)
  280. wil_disconnect_cid_complete(vif, cid, reason_code);
  281. }
  282. /* link state */
  283. switch (wdev->iftype) {
  284. case NL80211_IFTYPE_STATION:
  285. case NL80211_IFTYPE_P2P_CLIENT:
  286. wil_bcast_fini(vif);
  287. wil_update_net_queues_bh(wil, vif, NULL, true);
  288. netif_carrier_off(ndev);
  289. if (!wil_has_other_active_ifaces(wil, ndev, false, true))
  290. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  291. if (test_and_clear_bit(wil_vif_fwconnected, vif->status)) {
  292. atomic_dec(&wil->connected_vifs);
  293. cfg80211_disconnected(ndev, reason_code,
  294. NULL, 0,
  295. vif->locally_generated_disc,
  296. GFP_KERNEL);
  297. vif->locally_generated_disc = false;
  298. } else if (test_bit(wil_vif_fwconnecting, vif->status)) {
  299. cfg80211_connect_result(ndev, bssid, NULL, 0, NULL, 0,
  300. WLAN_STATUS_UNSPECIFIED_FAILURE,
  301. GFP_KERNEL);
  302. vif->bss = NULL;
  303. }
  304. clear_bit(wil_vif_fwconnecting, vif->status);
  305. clear_bit(wil_vif_ft_roam, vif->status);
  306. vif->ptk_rekey_state = WIL_REKEY_IDLE;
  307. break;
  308. case NL80211_IFTYPE_AP:
  309. case NL80211_IFTYPE_P2P_GO:
  310. if (!wil_vif_is_connected(wil, vif->mid)) {
  311. wil_update_net_queues_bh(wil, vif, NULL, true);
  312. if (test_and_clear_bit(wil_vif_fwconnected,
  313. vif->status))
  314. atomic_dec(&wil->connected_vifs);
  315. } else {
  316. wil_update_net_queues_bh(wil, vif, NULL, false);
  317. }
  318. break;
  319. default:
  320. break;
  321. }
  322. }
  323. static int wil_disconnect_cid(struct wil6210_vif *vif, int cid,
  324. u16 reason_code)
  325. {
  326. struct wil6210_priv *wil = vif_to_wil(vif);
  327. struct wireless_dev *wdev = vif_to_wdev(vif);
  328. struct wil_sta_info *sta = &wil->sta[cid];
  329. bool del_sta = false;
  330. might_sleep();
  331. wil_dbg_misc(wil, "disconnect_cid: CID %d, MID %d, status %d\n",
  332. cid, sta->mid, sta->status);
  333. if (sta->status == wil_sta_unused)
  334. return 0;
  335. if (vif->mid != sta->mid) {
  336. wil_err(wil, "STA MID mismatch with VIF MID(%d)\n", vif->mid);
  337. return -EINVAL;
  338. }
  339. /* inform lower layers */
  340. if (wdev->iftype == NL80211_IFTYPE_AP && disable_ap_sme)
  341. del_sta = true;
  342. /* disconnect by sending command disconnect/del_sta and wait
  343. * synchronously for WMI_DISCONNECT_EVENTID event.
  344. */
  345. return wmi_disconnect_sta(vif, sta->addr, reason_code, del_sta);
  346. }
  347. static void _wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  348. u16 reason_code)
  349. {
  350. struct wil6210_priv *wil;
  351. struct net_device *ndev;
  352. int cid = -ENOENT;
  353. if (unlikely(!vif))
  354. return;
  355. wil = vif_to_wil(vif);
  356. ndev = vif_to_ndev(vif);
  357. might_sleep();
  358. wil_info(wil, "disconnect bssid=%pM, reason=%d\n", bssid, reason_code);
  359. /* Cases are:
  360. * - disconnect single STA, still connected
  361. * - disconnect single STA, already disconnected
  362. * - disconnect all
  363. *
  364. * For "disconnect all", there are 3 options:
  365. * - bssid == NULL
  366. * - bssid is broadcast address (ff:ff:ff:ff:ff:ff)
  367. * - bssid is our MAC address
  368. */
  369. if (bssid && !is_broadcast_ether_addr(bssid) &&
  370. !ether_addr_equal_unaligned(ndev->dev_addr, bssid)) {
  371. cid = wil_find_cid(wil, vif->mid, bssid);
  372. wil_dbg_misc(wil, "Disconnect %pM, CID=%d, reason=%d\n",
  373. bssid, cid, reason_code);
  374. if (wil_cid_valid(wil, cid)) /* disconnect 1 peer */
  375. wil_disconnect_cid(vif, cid, reason_code);
  376. } else { /* all */
  377. wil_dbg_misc(wil, "Disconnect all\n");
  378. for (cid = 0; cid < wil->max_assoc_sta; cid++)
  379. wil_disconnect_cid(vif, cid, reason_code);
  380. }
  381. /* call event handler manually after processing wmi_call,
  382. * to avoid deadlock - disconnect event handler acquires
  383. * wil->mutex while it is already held here
  384. */
  385. _wil6210_disconnect_complete(vif, bssid, reason_code);
  386. }
  387. void wil_disconnect_worker(struct work_struct *work)
  388. {
  389. struct wil6210_vif *vif = container_of(work,
  390. struct wil6210_vif, disconnect_worker);
  391. struct wil6210_priv *wil = vif_to_wil(vif);
  392. struct net_device *ndev = vif_to_ndev(vif);
  393. int rc;
  394. struct {
  395. struct wmi_cmd_hdr wmi;
  396. struct wmi_disconnect_event evt;
  397. } __packed reply;
  398. if (test_bit(wil_vif_fwconnected, vif->status))
  399. /* connect succeeded after all */
  400. return;
  401. if (!test_bit(wil_vif_fwconnecting, vif->status))
  402. /* already disconnected */
  403. return;
  404. memset(&reply, 0, sizeof(reply));
  405. rc = wmi_call(wil, WMI_DISCONNECT_CMDID, vif->mid, NULL, 0,
  406. WMI_DISCONNECT_EVENTID, &reply, sizeof(reply),
  407. WIL6210_DISCONNECT_TO_MS);
  408. if (rc) {
  409. wil_err(wil, "disconnect error %d\n", rc);
  410. return;
  411. }
  412. wil_update_net_queues_bh(wil, vif, NULL, true);
  413. netif_carrier_off(ndev);
  414. cfg80211_connect_result(ndev, NULL, NULL, 0, NULL, 0,
  415. WLAN_STATUS_UNSPECIFIED_FAILURE, GFP_KERNEL);
  416. clear_bit(wil_vif_fwconnecting, vif->status);
  417. }
  418. static int wil_wait_for_recovery(struct wil6210_priv *wil)
  419. {
  420. if (wait_event_interruptible(wil->wq, wil->recovery_state !=
  421. fw_recovery_pending)) {
  422. wil_err(wil, "Interrupt, canceling recovery\n");
  423. return -ERESTARTSYS;
  424. }
  425. if (wil->recovery_state != fw_recovery_running) {
  426. wil_info(wil, "Recovery cancelled\n");
  427. return -EINTR;
  428. }
  429. wil_info(wil, "Proceed with recovery\n");
  430. return 0;
  431. }
  432. void wil_set_recovery_state(struct wil6210_priv *wil, int state)
  433. {
  434. wil_dbg_misc(wil, "set_recovery_state: %d -> %d\n",
  435. wil->recovery_state, state);
  436. wil->recovery_state = state;
  437. wake_up_interruptible(&wil->wq);
  438. }
  439. bool wil_is_recovery_blocked(struct wil6210_priv *wil)
  440. {
  441. return no_fw_recovery && (wil->recovery_state == fw_recovery_pending);
  442. }
  443. static void wil_fw_error_worker(struct work_struct *work)
  444. {
  445. struct wil6210_priv *wil = container_of(work, struct wil6210_priv,
  446. fw_error_worker);
  447. struct net_device *ndev = wil->main_ndev;
  448. struct wireless_dev *wdev;
  449. wil_dbg_misc(wil, "fw error worker\n");
  450. if (!ndev || !(ndev->flags & IFF_UP)) {
  451. wil_info(wil, "No recovery - interface is down\n");
  452. return;
  453. }
  454. wdev = ndev->ieee80211_ptr;
  455. /* increment @recovery_count if less then WIL6210_FW_RECOVERY_TO
  456. * passed since last recovery attempt
  457. */
  458. if (time_is_after_jiffies(wil->last_fw_recovery +
  459. WIL6210_FW_RECOVERY_TO))
  460. wil->recovery_count++;
  461. else
  462. wil->recovery_count = 1; /* fw was alive for a long time */
  463. if (wil->recovery_count > WIL6210_FW_RECOVERY_RETRIES) {
  464. wil_err(wil, "too many recovery attempts (%d), giving up\n",
  465. wil->recovery_count);
  466. return;
  467. }
  468. wil->last_fw_recovery = jiffies;
  469. wil_info(wil, "fw error recovery requested (try %d)...\n",
  470. wil->recovery_count);
  471. if (!no_fw_recovery)
  472. wil->recovery_state = fw_recovery_running;
  473. if (wil_wait_for_recovery(wil) != 0)
  474. return;
  475. rtnl_lock();
  476. mutex_lock(&wil->mutex);
  477. /* Needs adaptation for multiple VIFs
  478. * need to go over all VIFs and consider the appropriate
  479. * recovery because each one can have different iftype.
  480. */
  481. switch (wdev->iftype) {
  482. case NL80211_IFTYPE_STATION:
  483. case NL80211_IFTYPE_P2P_CLIENT:
  484. case NL80211_IFTYPE_MONITOR:
  485. /* silent recovery, upper layers will see disconnect */
  486. __wil_down(wil);
  487. __wil_up(wil);
  488. break;
  489. case NL80211_IFTYPE_AP:
  490. case NL80211_IFTYPE_P2P_GO:
  491. if (no_fw_recovery) /* upper layers do recovery */
  492. break;
  493. /* silent recovery, upper layers will see disconnect */
  494. __wil_down(wil);
  495. __wil_up(wil);
  496. mutex_unlock(&wil->mutex);
  497. wil_cfg80211_ap_recovery(wil);
  498. mutex_lock(&wil->mutex);
  499. wil_info(wil, "... completed\n");
  500. break;
  501. default:
  502. wil_err(wil, "No recovery - unknown interface type %d\n",
  503. wdev->iftype);
  504. break;
  505. }
  506. mutex_unlock(&wil->mutex);
  507. rtnl_unlock();
  508. }
  509. static int wil_find_free_ring(struct wil6210_priv *wil)
  510. {
  511. int i;
  512. int min_ring_id = wil_get_min_tx_ring_id(wil);
  513. for (i = min_ring_id; i < WIL6210_MAX_TX_RINGS; i++) {
  514. if (!wil->ring_tx[i].va)
  515. return i;
  516. }
  517. return -EINVAL;
  518. }
  519. int wil_ring_init_tx(struct wil6210_vif *vif, int cid)
  520. {
  521. struct wil6210_priv *wil = vif_to_wil(vif);
  522. int rc = -EINVAL, ringid;
  523. if (cid < 0) {
  524. wil_err(wil, "No connection pending\n");
  525. goto out;
  526. }
  527. ringid = wil_find_free_ring(wil);
  528. if (ringid < 0) {
  529. wil_err(wil, "No free vring found\n");
  530. goto out;
  531. }
  532. wil_dbg_wmi(wil, "Configure for connection CID %d MID %d ring %d\n",
  533. cid, vif->mid, ringid);
  534. rc = wil->txrx_ops.ring_init_tx(vif, ringid, 1 << tx_ring_order,
  535. cid, 0);
  536. if (rc)
  537. wil_err(wil, "init TX for CID %d MID %d vring %d failed\n",
  538. cid, vif->mid, ringid);
  539. out:
  540. return rc;
  541. }
  542. int wil_bcast_init(struct wil6210_vif *vif)
  543. {
  544. struct wil6210_priv *wil = vif_to_wil(vif);
  545. int ri = vif->bcast_ring, rc;
  546. if (ri >= 0 && wil->ring_tx[ri].va)
  547. return 0;
  548. ri = wil_find_free_ring(wil);
  549. if (ri < 0)
  550. return ri;
  551. vif->bcast_ring = ri;
  552. rc = wil->txrx_ops.ring_init_bcast(vif, ri, 1 << bcast_ring_order);
  553. if (rc)
  554. vif->bcast_ring = -1;
  555. return rc;
  556. }
  557. void wil_bcast_fini(struct wil6210_vif *vif)
  558. {
  559. struct wil6210_priv *wil = vif_to_wil(vif);
  560. int ri = vif->bcast_ring;
  561. if (ri < 0)
  562. return;
  563. vif->bcast_ring = -1;
  564. wil_ring_fini_tx(wil, ri);
  565. }
  566. void wil_bcast_fini_all(struct wil6210_priv *wil)
  567. {
  568. int i;
  569. struct wil6210_vif *vif;
  570. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  571. vif = wil->vifs[i];
  572. if (vif)
  573. wil_bcast_fini(vif);
  574. }
  575. }
  576. int wil_priv_init(struct wil6210_priv *wil)
  577. {
  578. uint i;
  579. wil_dbg_misc(wil, "priv_init\n");
  580. memset(wil->sta, 0, sizeof(wil->sta));
  581. for (i = 0; i < WIL6210_MAX_CID; i++) {
  582. spin_lock_init(&wil->sta[i].tid_rx_lock);
  583. wil->sta[i].mid = U8_MAX;
  584. }
  585. for (i = 0; i < WIL6210_MAX_TX_RINGS; i++) {
  586. spin_lock_init(&wil->ring_tx_data[i].lock);
  587. wil->ring2cid_tid[i][0] = WIL6210_MAX_CID;
  588. }
  589. mutex_init(&wil->mutex);
  590. mutex_init(&wil->vif_mutex);
  591. mutex_init(&wil->wmi_mutex);
  592. mutex_init(&wil->halp.lock);
  593. init_completion(&wil->wmi_ready);
  594. init_completion(&wil->wmi_call);
  595. init_completion(&wil->halp.comp);
  596. INIT_WORK(&wil->wmi_event_worker, wmi_event_worker);
  597. INIT_WORK(&wil->fw_error_worker, wil_fw_error_worker);
  598. INIT_LIST_HEAD(&wil->pending_wmi_ev);
  599. spin_lock_init(&wil->wmi_ev_lock);
  600. spin_lock_init(&wil->net_queue_lock);
  601. spin_lock_init(&wil->eap_lock);
  602. init_waitqueue_head(&wil->wq);
  603. init_rwsem(&wil->mem_lock);
  604. wil->wmi_wq = create_singlethread_workqueue(WIL_NAME "_wmi");
  605. if (!wil->wmi_wq)
  606. return -EAGAIN;
  607. wil->wq_service = create_singlethread_workqueue(WIL_NAME "_service");
  608. if (!wil->wq_service)
  609. goto out_wmi_wq;
  610. wil->last_fw_recovery = jiffies;
  611. wil->tx_interframe_timeout = WIL6210_ITR_TX_INTERFRAME_TIMEOUT_DEFAULT;
  612. wil->rx_interframe_timeout = WIL6210_ITR_RX_INTERFRAME_TIMEOUT_DEFAULT;
  613. wil->tx_max_burst_duration = WIL6210_ITR_TX_MAX_BURST_DURATION_DEFAULT;
  614. wil->rx_max_burst_duration = WIL6210_ITR_RX_MAX_BURST_DURATION_DEFAULT;
  615. if (rx_ring_overflow_thrsh == WIL6210_RX_HIGH_TRSH_INIT)
  616. rx_ring_overflow_thrsh = WIL6210_RX_HIGH_TRSH_DEFAULT;
  617. wil->ps_profile = WMI_PS_PROFILE_TYPE_DEFAULT;
  618. wil->wakeup_trigger = WMI_WAKEUP_TRIGGER_UCAST |
  619. WMI_WAKEUP_TRIGGER_BCAST;
  620. memset(&wil->suspend_stats, 0, sizeof(wil->suspend_stats));
  621. wil->ring_idle_trsh = 16;
  622. wil->reply_mid = U8_MAX;
  623. wil->max_vifs = 1;
  624. wil->max_assoc_sta = max_assoc_sta;
  625. /* edma configuration can be updated via debugfs before allocation */
  626. wil->num_rx_status_rings = WIL_DEFAULT_NUM_RX_STATUS_RINGS;
  627. wil->tx_status_ring_order = WIL_TX_SRING_SIZE_ORDER_DEFAULT;
  628. /* Rx status ring size should be bigger than the number of RX buffers
  629. * in order to prevent backpressure on the status ring, which may
  630. * cause HW freeze.
  631. */
  632. wil->rx_status_ring_order = WIL_RX_SRING_SIZE_ORDER_DEFAULT;
  633. /* Number of RX buffer IDs should be bigger than the RX descriptor
  634. * ring size as in HW reorder flow, the HW can consume additional
  635. * buffers before releasing the previous ones.
  636. */
  637. wil->rx_buff_id_count = WIL_RX_BUFF_ARR_SIZE_DEFAULT;
  638. wil->amsdu_en = true;
  639. return 0;
  640. out_wmi_wq:
  641. destroy_workqueue(wil->wmi_wq);
  642. return -EAGAIN;
  643. }
  644. void wil6210_bus_request(struct wil6210_priv *wil, u32 kbps)
  645. {
  646. if (wil->platform_ops.bus_request) {
  647. wil->bus_request_kbps = kbps;
  648. wil->platform_ops.bus_request(wil->platform_handle, kbps);
  649. }
  650. }
  651. /**
  652. * wil6210_disconnect - disconnect one connection
  653. * @vif: virtual interface context
  654. * @bssid: peer to disconnect, NULL to disconnect all
  655. * @reason_code: Reason code for the Disassociation frame
  656. *
  657. * Disconnect and release associated resources. Issue WMI
  658. * command(s) to trigger MAC disconnect. When command was issued
  659. * successfully, call the wil6210_disconnect_complete function
  660. * to handle the event synchronously
  661. */
  662. void wil6210_disconnect(struct wil6210_vif *vif, const u8 *bssid,
  663. u16 reason_code)
  664. {
  665. struct wil6210_priv *wil = vif_to_wil(vif);
  666. wil_dbg_misc(wil, "disconnecting\n");
  667. timer_delete_sync(&vif->connect_timer);
  668. _wil6210_disconnect(vif, bssid, reason_code);
  669. }
  670. /**
  671. * wil6210_disconnect_complete - handle disconnect event
  672. * @vif: virtual interface context
  673. * @bssid: peer to disconnect, NULL to disconnect all
  674. * @reason_code: Reason code for the Disassociation frame
  675. *
  676. * Release associated resources and indicate upper layers the
  677. * connection is terminated.
  678. */
  679. void wil6210_disconnect_complete(struct wil6210_vif *vif, const u8 *bssid,
  680. u16 reason_code)
  681. {
  682. struct wil6210_priv *wil = vif_to_wil(vif);
  683. wil_dbg_misc(wil, "got disconnect\n");
  684. timer_delete_sync(&vif->connect_timer);
  685. _wil6210_disconnect_complete(vif, bssid, reason_code);
  686. }
  687. void wil_priv_deinit(struct wil6210_priv *wil)
  688. {
  689. wil_dbg_misc(wil, "priv_deinit\n");
  690. wil_set_recovery_state(wil, fw_recovery_idle);
  691. cancel_work_sync(&wil->fw_error_worker);
  692. wmi_event_flush(wil);
  693. destroy_workqueue(wil->wq_service);
  694. destroy_workqueue(wil->wmi_wq);
  695. kfree(wil->brd_info);
  696. }
  697. static void wil_shutdown_bl(struct wil6210_priv *wil)
  698. {
  699. u32 val;
  700. wil_s(wil, RGF_USER_BL +
  701. offsetof(struct bl_dedicated_registers_v1,
  702. bl_shutdown_handshake), BL_SHUTDOWN_HS_GRTD);
  703. usleep_range(100, 150);
  704. val = wil_r(wil, RGF_USER_BL +
  705. offsetof(struct bl_dedicated_registers_v1,
  706. bl_shutdown_handshake));
  707. if (val & BL_SHUTDOWN_HS_RTD) {
  708. wil_dbg_misc(wil, "BL is ready for halt\n");
  709. return;
  710. }
  711. wil_err(wil, "BL did not report ready for halt\n");
  712. }
  713. /* this format is used by ARC embedded CPU for instruction memory */
  714. static inline u32 ARC_me_imm32(u32 d)
  715. {
  716. return ((d & 0xffff0000) >> 16) | ((d & 0x0000ffff) << 16);
  717. }
  718. /* defines access to interrupt vectors for wil_freeze_bl */
  719. #define ARC_IRQ_VECTOR_OFFSET(N) ((N) * 8)
  720. /* ARC long jump instruction */
  721. #define ARC_JAL_INST (0x20200f80)
  722. static void wil_freeze_bl(struct wil6210_priv *wil)
  723. {
  724. u32 jal, upc, saved;
  725. u32 ivt3 = ARC_IRQ_VECTOR_OFFSET(3);
  726. jal = wil_r(wil, wil->iccm_base + ivt3);
  727. if (jal != ARC_me_imm32(ARC_JAL_INST)) {
  728. wil_dbg_misc(wil, "invalid IVT entry found, skipping\n");
  729. return;
  730. }
  731. /* prevent the target from entering deep sleep
  732. * and disabling memory access
  733. */
  734. saved = wil_r(wil, RGF_USER_USAGE_8);
  735. wil_w(wil, RGF_USER_USAGE_8, saved | BIT_USER_PREVENT_DEEP_SLEEP);
  736. usleep_range(20, 25); /* let the BL process the bit */
  737. /* redirect to endless loop in the INT_L1 context and let it trap */
  738. wil_w(wil, wil->iccm_base + ivt3 + 4, ARC_me_imm32(ivt3));
  739. usleep_range(20, 25); /* let the BL get into the trap */
  740. /* verify the BL is frozen */
  741. upc = wil_r(wil, RGF_USER_CPU_PC);
  742. if (upc < ivt3 || (upc > (ivt3 + 8)))
  743. wil_dbg_misc(wil, "BL freeze failed, PC=0x%08X\n", upc);
  744. wil_w(wil, RGF_USER_USAGE_8, saved);
  745. }
  746. static void wil_bl_prepare_halt(struct wil6210_priv *wil)
  747. {
  748. u32 tmp, ver;
  749. /* before halting device CPU driver must make sure BL is not accessing
  750. * host memory. This is done differently depending on BL version:
  751. * 1. For very old BL versions the procedure is skipped
  752. * (not supported).
  753. * 2. For old BL version we use a special trick to freeze the BL
  754. * 3. For new BL versions we shutdown the BL using handshake procedure.
  755. */
  756. tmp = wil_r(wil, RGF_USER_BL +
  757. offsetof(struct bl_dedicated_registers_v0,
  758. boot_loader_struct_version));
  759. if (!tmp) {
  760. wil_dbg_misc(wil, "old BL, skipping halt preparation\n");
  761. return;
  762. }
  763. tmp = wil_r(wil, RGF_USER_BL +
  764. offsetof(struct bl_dedicated_registers_v1,
  765. bl_shutdown_handshake));
  766. ver = BL_SHUTDOWN_HS_PROT_VER(tmp);
  767. if (ver > 0)
  768. wil_shutdown_bl(wil);
  769. else
  770. wil_freeze_bl(wil);
  771. }
  772. static inline void wil_halt_cpu(struct wil6210_priv *wil)
  773. {
  774. if (wil->hw_version >= HW_VER_TALYN_MB) {
  775. wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB,
  776. BIT_USER_USER_CPU_MAN_RST);
  777. wil_w(wil, RGF_USER_MAC_CPU_0_TALYN_MB,
  778. BIT_USER_MAC_CPU_MAN_RST);
  779. } else {
  780. wil_w(wil, RGF_USER_USER_CPU_0, BIT_USER_USER_CPU_MAN_RST);
  781. wil_w(wil, RGF_USER_MAC_CPU_0, BIT_USER_MAC_CPU_MAN_RST);
  782. }
  783. }
  784. static inline void wil_release_cpu(struct wil6210_priv *wil)
  785. {
  786. /* Start CPU */
  787. if (wil->hw_version >= HW_VER_TALYN_MB)
  788. wil_w(wil, RGF_USER_USER_CPU_0_TALYN_MB, 1);
  789. else
  790. wil_w(wil, RGF_USER_USER_CPU_0, 1);
  791. }
  792. static void wil_set_oob_mode(struct wil6210_priv *wil, u8 mode)
  793. {
  794. wil_info(wil, "oob_mode to %d\n", mode);
  795. switch (mode) {
  796. case 0:
  797. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE |
  798. BIT_USER_OOB_R2_MODE);
  799. break;
  800. case 1:
  801. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  802. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  803. break;
  804. case 2:
  805. wil_c(wil, RGF_USER_USAGE_6, BIT_USER_OOB_MODE);
  806. wil_s(wil, RGF_USER_USAGE_6, BIT_USER_OOB_R2_MODE);
  807. break;
  808. default:
  809. wil_err(wil, "invalid oob_mode: %d\n", mode);
  810. }
  811. }
  812. static int wil_wait_device_ready(struct wil6210_priv *wil, int no_flash)
  813. {
  814. int delay = 0;
  815. u32 x, x1 = 0;
  816. /* wait until device ready. */
  817. if (no_flash) {
  818. msleep(PMU_READY_DELAY_MS);
  819. wil_dbg_misc(wil, "Reset completed\n");
  820. } else {
  821. do {
  822. msleep(RST_DELAY);
  823. x = wil_r(wil, RGF_USER_BL +
  824. offsetof(struct bl_dedicated_registers_v0,
  825. boot_loader_ready));
  826. if (x1 != x) {
  827. wil_dbg_misc(wil, "BL.ready 0x%08x => 0x%08x\n",
  828. x1, x);
  829. x1 = x;
  830. }
  831. if (delay++ > RST_COUNT) {
  832. wil_err(wil, "Reset not completed, bl.ready 0x%08x\n",
  833. x);
  834. return -ETIME;
  835. }
  836. } while (x != BL_READY);
  837. wil_dbg_misc(wil, "Reset completed in %d ms\n",
  838. delay * RST_DELAY);
  839. }
  840. return 0;
  841. }
  842. static int wil_wait_device_ready_talyn_mb(struct wil6210_priv *wil)
  843. {
  844. u32 otp_hw;
  845. u8 signature_status;
  846. bool otp_signature_err;
  847. bool hw_section_done;
  848. u32 otp_qc_secured;
  849. int delay = 0;
  850. /* Wait for OTP signature test to complete */
  851. usleep_range(2000, 2200);
  852. wil->boot_config = WIL_BOOT_ERR;
  853. /* Poll until OTP signature status is valid.
  854. * In vanilla and development modes, when signature test is complete
  855. * HW sets BIT_OTP_SIGNATURE_ERR_TALYN_MB.
  856. * In production mode BIT_OTP_SIGNATURE_ERR_TALYN_MB remains 0, poll
  857. * for signature status change to 2 or 3.
  858. */
  859. do {
  860. otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
  861. signature_status = WIL_GET_BITS(otp_hw, 8, 9);
  862. otp_signature_err = otp_hw & BIT_OTP_SIGNATURE_ERR_TALYN_MB;
  863. if (otp_signature_err &&
  864. signature_status == WIL_SIG_STATUS_VANILLA) {
  865. wil->boot_config = WIL_BOOT_VANILLA;
  866. break;
  867. }
  868. if (otp_signature_err &&
  869. signature_status == WIL_SIG_STATUS_DEVELOPMENT) {
  870. wil->boot_config = WIL_BOOT_DEVELOPMENT;
  871. break;
  872. }
  873. if (!otp_signature_err &&
  874. signature_status == WIL_SIG_STATUS_PRODUCTION) {
  875. wil->boot_config = WIL_BOOT_PRODUCTION;
  876. break;
  877. }
  878. if (!otp_signature_err &&
  879. signature_status ==
  880. WIL_SIG_STATUS_CORRUPTED_PRODUCTION) {
  881. /* Unrecognized OTP signature found. Possibly a
  882. * corrupted production signature, access control
  883. * is applied as in production mode, therefore
  884. * do not fail
  885. */
  886. wil->boot_config = WIL_BOOT_PRODUCTION;
  887. break;
  888. }
  889. if (delay++ > OTP_HW_COUNT)
  890. break;
  891. usleep_range(OTP_HW_DELAY, OTP_HW_DELAY + 10);
  892. } while (!otp_signature_err && signature_status == 0);
  893. if (wil->boot_config == WIL_BOOT_ERR) {
  894. wil_err(wil,
  895. "invalid boot config, signature_status %d otp_signature_err %d\n",
  896. signature_status, otp_signature_err);
  897. return -ETIME;
  898. }
  899. wil_dbg_misc(wil,
  900. "signature test done in %d usec, otp_hw 0x%x, boot_config %d\n",
  901. delay * OTP_HW_DELAY, otp_hw, wil->boot_config);
  902. if (wil->boot_config == WIL_BOOT_VANILLA)
  903. /* Assuming not SPI boot (currently not supported) */
  904. goto out;
  905. hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
  906. delay = 0;
  907. while (!hw_section_done) {
  908. msleep(RST_DELAY);
  909. otp_hw = wil_r(wil, RGF_USER_OTP_HW_RD_MACHINE_1);
  910. hw_section_done = otp_hw & BIT_OTP_HW_SECTION_DONE_TALYN_MB;
  911. if (delay++ > RST_COUNT) {
  912. wil_err(wil, "TO waiting for hw_section_done\n");
  913. return -ETIME;
  914. }
  915. }
  916. wil_dbg_misc(wil, "HW section done in %d ms\n", delay * RST_DELAY);
  917. otp_qc_secured = wil_r(wil, RGF_OTP_QC_SECURED);
  918. wil->secured_boot = otp_qc_secured & BIT_BOOT_FROM_ROM ? 1 : 0;
  919. wil_dbg_misc(wil, "secured boot is %sabled\n",
  920. wil->secured_boot ? "en" : "dis");
  921. out:
  922. wil_dbg_misc(wil, "Reset completed\n");
  923. return 0;
  924. }
  925. static int wil_target_reset(struct wil6210_priv *wil, int no_flash)
  926. {
  927. u32 x;
  928. int rc;
  929. wil_dbg_misc(wil, "Resetting \"%s\"...\n", wil->hw_name);
  930. if (wil->hw_version < HW_VER_TALYN) {
  931. /* Clear MAC link up */
  932. wil_s(wil, RGF_HP_CTRL, BIT(15));
  933. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0,
  934. BIT_HPAL_PERST_FROM_PAD);
  935. wil_s(wil, RGF_USER_CLKS_CTL_SW_RST_MASK_0, BIT_CAR_PERST_RST);
  936. }
  937. wil_halt_cpu(wil);
  938. if (!no_flash) {
  939. /* clear all boot loader "ready" bits */
  940. wil_w(wil, RGF_USER_BL +
  941. offsetof(struct bl_dedicated_registers_v0,
  942. boot_loader_ready), 0);
  943. /* this should be safe to write even with old BLs */
  944. wil_w(wil, RGF_USER_BL +
  945. offsetof(struct bl_dedicated_registers_v1,
  946. bl_shutdown_handshake), 0);
  947. }
  948. /* Clear Fw Download notification */
  949. wil_c(wil, RGF_USER_USAGE_6, BIT(0));
  950. wil_s(wil, RGF_CAF_OSC_CONTROL, BIT_CAF_OSC_XTAL_EN);
  951. /* XTAL stabilization should take about 3ms */
  952. usleep_range(5000, 7000);
  953. x = wil_r(wil, RGF_CAF_PLL_LOCK_STATUS);
  954. if (!(x & BIT_CAF_OSC_DIG_XTAL_STABLE)) {
  955. wil_err(wil, "Xtal stabilization timeout\n"
  956. "RGF_CAF_PLL_LOCK_STATUS = 0x%08x\n", x);
  957. return -ETIME;
  958. }
  959. /* switch 10k to XTAL*/
  960. wil_c(wil, RGF_USER_SPARROW_M_4, BIT_SPARROW_M_4_SEL_SLEEP_OR_REF);
  961. /* 40 MHz */
  962. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_CAR_AHB_SW_SEL);
  963. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x3ff81f);
  964. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0xf);
  965. if (wil->hw_version >= HW_VER_TALYN_MB) {
  966. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x7e000000);
  967. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
  968. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0xc00000f0);
  969. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
  970. } else {
  971. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0xfe000000);
  972. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0x0000003f);
  973. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x000000f0);
  974. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0xffe7fe00);
  975. }
  976. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_0, 0x0);
  977. wil_w(wil, RGF_USER_CLKS_CTL_EXT_SW_RST_VEC_1, 0x0);
  978. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0);
  979. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0);
  980. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_1, 0);
  981. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  982. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_3, 0x00000003);
  983. /* reset A2 PCIE AHB */
  984. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_2, 0x00008000);
  985. wil_w(wil, RGF_USER_CLKS_CTL_SW_RST_VEC_0, 0);
  986. if (wil->hw_version == HW_VER_TALYN_MB)
  987. rc = wil_wait_device_ready_talyn_mb(wil);
  988. else
  989. rc = wil_wait_device_ready(wil, no_flash);
  990. if (rc)
  991. return rc;
  992. wil_c(wil, RGF_USER_CLKS_CTL_0, BIT_USER_CLKS_RST_PWGD);
  993. /* enable fix for HW bug related to the SA/DA swap in AP Rx */
  994. wil_s(wil, RGF_DMA_OFUL_NID_0, BIT_DMA_OFUL_NID_0_RX_EXT_TR_EN |
  995. BIT_DMA_OFUL_NID_0_RX_EXT_A3_SRC);
  996. if (wil->hw_version < HW_VER_TALYN_MB && no_flash) {
  997. /* Reset OTP HW vectors to fit 40MHz */
  998. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME1, 0x60001);
  999. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME2, 0x20027);
  1000. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME3, 0x1);
  1001. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME4, 0x20027);
  1002. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME5, 0x30003);
  1003. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME6, 0x20002);
  1004. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME7, 0x60001);
  1005. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME8, 0x60001);
  1006. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME9, 0x60001);
  1007. wil_w(wil, RGF_USER_XPM_IFC_RD_TIME10, 0x60001);
  1008. wil_w(wil, RGF_USER_XPM_RD_DOUT_SAMPLE_TIME, 0x57);
  1009. }
  1010. return 0;
  1011. }
  1012. static void wil_collect_fw_info(struct wil6210_priv *wil)
  1013. {
  1014. struct wiphy *wiphy = wil_to_wiphy(wil);
  1015. u8 retry_short;
  1016. int rc;
  1017. wil_refresh_fw_capabilities(wil);
  1018. rc = wmi_get_mgmt_retry(wil, &retry_short);
  1019. if (!rc) {
  1020. wiphy->retry_short = retry_short;
  1021. wil_dbg_misc(wil, "FW retry_short: %d\n", retry_short);
  1022. }
  1023. }
  1024. void wil_refresh_fw_capabilities(struct wil6210_priv *wil)
  1025. {
  1026. struct wiphy *wiphy = wil_to_wiphy(wil);
  1027. int features;
  1028. wil->keep_radio_on_during_sleep =
  1029. test_bit(WIL_PLATFORM_CAPA_RADIO_ON_IN_SUSPEND,
  1030. wil->platform_capa) &&
  1031. test_bit(WMI_FW_CAPABILITY_D3_SUSPEND, wil->fw_capabilities);
  1032. wil_info(wil, "keep_radio_on_during_sleep (%d)\n",
  1033. wil->keep_radio_on_during_sleep);
  1034. if (test_bit(WMI_FW_CAPABILITY_RSSI_REPORTING, wil->fw_capabilities))
  1035. wiphy->signal_type = CFG80211_SIGNAL_TYPE_MBM;
  1036. else
  1037. wiphy->signal_type = CFG80211_SIGNAL_TYPE_UNSPEC;
  1038. if (test_bit(WMI_FW_CAPABILITY_PNO, wil->fw_capabilities)) {
  1039. wiphy->max_sched_scan_reqs = 1;
  1040. wiphy->max_sched_scan_ssids = WMI_MAX_PNO_SSID_NUM;
  1041. wiphy->max_match_sets = WMI_MAX_PNO_SSID_NUM;
  1042. wiphy->max_sched_scan_ie_len = WMI_MAX_IE_LEN;
  1043. wiphy->max_sched_scan_plans = WMI_MAX_PLANS_NUM;
  1044. }
  1045. if (test_bit(WMI_FW_CAPABILITY_TX_REQ_EXT, wil->fw_capabilities))
  1046. wiphy->flags |= WIPHY_FLAG_OFFCHAN_TX;
  1047. if (wil->platform_ops.set_features) {
  1048. features = (test_bit(WMI_FW_CAPABILITY_REF_CLOCK_CONTROL,
  1049. wil->fw_capabilities) &&
  1050. test_bit(WIL_PLATFORM_CAPA_EXT_CLK,
  1051. wil->platform_capa)) ?
  1052. BIT(WIL_PLATFORM_FEATURE_FW_EXT_CLK_CONTROL) : 0;
  1053. if (wil->n_msi == 3)
  1054. features |= BIT(WIL_PLATFORM_FEATURE_TRIPLE_MSI);
  1055. wil->platform_ops.set_features(wil->platform_handle, features);
  1056. }
  1057. if (test_bit(WMI_FW_CAPABILITY_BACK_WIN_SIZE_64,
  1058. wil->fw_capabilities)) {
  1059. wil->max_agg_wsize = WIL_MAX_AGG_WSIZE_64;
  1060. wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE_128;
  1061. } else {
  1062. wil->max_agg_wsize = WIL_MAX_AGG_WSIZE;
  1063. wil->max_ampdu_size = WIL_MAX_AMPDU_SIZE;
  1064. }
  1065. update_supported_bands(wil);
  1066. }
  1067. void wil_mbox_ring_le2cpus(struct wil6210_mbox_ring *r)
  1068. {
  1069. le32_to_cpus(&r->base);
  1070. le16_to_cpus(&r->entry_size);
  1071. le16_to_cpus(&r->size);
  1072. le32_to_cpus(&r->tail);
  1073. le32_to_cpus(&r->head);
  1074. }
  1075. /* construct actual board file name to use */
  1076. void wil_get_board_file(struct wil6210_priv *wil, char *buf, size_t len)
  1077. {
  1078. const char *board_file;
  1079. const char *wil_talyn_fw_name = ftm_mode ? WIL_FW_NAME_FTM_TALYN :
  1080. WIL_FW_NAME_TALYN;
  1081. if (wil->board_file) {
  1082. board_file = wil->board_file;
  1083. } else {
  1084. /* If specific FW file is used for Talyn,
  1085. * use specific board file
  1086. */
  1087. if (strcmp(wil->wil_fw_name, wil_talyn_fw_name) == 0)
  1088. board_file = WIL_BRD_NAME_TALYN;
  1089. else
  1090. board_file = WIL_BOARD_FILE_NAME;
  1091. }
  1092. strscpy(buf, board_file, len);
  1093. }
  1094. static int wil_get_bl_info(struct wil6210_priv *wil)
  1095. {
  1096. struct net_device *ndev = wil->main_ndev;
  1097. struct wiphy *wiphy = wil_to_wiphy(wil);
  1098. union {
  1099. struct bl_dedicated_registers_v0 bl0;
  1100. struct bl_dedicated_registers_v1 bl1;
  1101. } bl;
  1102. u32 bl_ver;
  1103. u8 *mac;
  1104. u16 rf_status;
  1105. wil_memcpy_fromio_32(&bl, wil->csr + HOSTADDR(RGF_USER_BL),
  1106. sizeof(bl));
  1107. bl_ver = le32_to_cpu(bl.bl0.boot_loader_struct_version);
  1108. mac = bl.bl0.mac_address;
  1109. if (bl_ver == 0) {
  1110. le32_to_cpus(&bl.bl0.rf_type);
  1111. le32_to_cpus(&bl.bl0.baseband_type);
  1112. rf_status = 0; /* actually, unknown */
  1113. wil_info(wil,
  1114. "Boot Loader struct v%d: MAC = %pM RF = 0x%08x bband = 0x%08x\n",
  1115. bl_ver, mac,
  1116. bl.bl0.rf_type, bl.bl0.baseband_type);
  1117. wil_info(wil, "Boot Loader build unknown for struct v0\n");
  1118. } else {
  1119. le16_to_cpus(&bl.bl1.rf_type);
  1120. rf_status = le16_to_cpu(bl.bl1.rf_status);
  1121. le32_to_cpus(&bl.bl1.baseband_type);
  1122. le16_to_cpus(&bl.bl1.bl_version_subminor);
  1123. le16_to_cpus(&bl.bl1.bl_version_build);
  1124. wil_info(wil,
  1125. "Boot Loader struct v%d: MAC = %pM RF = 0x%04x (status 0x%04x) bband = 0x%08x\n",
  1126. bl_ver, mac,
  1127. bl.bl1.rf_type, rf_status,
  1128. bl.bl1.baseband_type);
  1129. wil_info(wil, "Boot Loader build %d.%d.%d.%d\n",
  1130. bl.bl1.bl_version_major, bl.bl1.bl_version_minor,
  1131. bl.bl1.bl_version_subminor, bl.bl1.bl_version_build);
  1132. }
  1133. if (!is_valid_ether_addr(mac)) {
  1134. wil_err(wil, "BL: Invalid MAC %pM\n", mac);
  1135. return -EINVAL;
  1136. }
  1137. ether_addr_copy(ndev->perm_addr, mac);
  1138. ether_addr_copy(wiphy->perm_addr, mac);
  1139. if (!is_valid_ether_addr(ndev->dev_addr))
  1140. eth_hw_addr_set(ndev, mac);
  1141. if (rf_status) {/* bad RF cable? */
  1142. wil_err(wil, "RF communication error 0x%04x",
  1143. rf_status);
  1144. return -EAGAIN;
  1145. }
  1146. return 0;
  1147. }
  1148. static void wil_bl_crash_info(struct wil6210_priv *wil, bool is_err)
  1149. {
  1150. u32 bl_assert_code, bl_assert_blink, bl_magic_number;
  1151. u32 bl_ver = wil_r(wil, RGF_USER_BL +
  1152. offsetof(struct bl_dedicated_registers_v0,
  1153. boot_loader_struct_version));
  1154. if (bl_ver < 2)
  1155. return;
  1156. bl_assert_code = wil_r(wil, RGF_USER_BL +
  1157. offsetof(struct bl_dedicated_registers_v1,
  1158. bl_assert_code));
  1159. bl_assert_blink = wil_r(wil, RGF_USER_BL +
  1160. offsetof(struct bl_dedicated_registers_v1,
  1161. bl_assert_blink));
  1162. bl_magic_number = wil_r(wil, RGF_USER_BL +
  1163. offsetof(struct bl_dedicated_registers_v1,
  1164. bl_magic_number));
  1165. if (is_err) {
  1166. wil_err(wil,
  1167. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  1168. bl_assert_code, bl_assert_blink, bl_magic_number);
  1169. } else {
  1170. wil_dbg_misc(wil,
  1171. "BL assert code 0x%08x blink 0x%08x magic 0x%08x\n",
  1172. bl_assert_code, bl_assert_blink, bl_magic_number);
  1173. }
  1174. }
  1175. static int wil_get_otp_info(struct wil6210_priv *wil)
  1176. {
  1177. struct net_device *ndev = wil->main_ndev;
  1178. struct wiphy *wiphy = wil_to_wiphy(wil);
  1179. u8 mac[8];
  1180. int mac_addr;
  1181. /* OEM MAC has precedence */
  1182. mac_addr = RGF_OTP_OEM_MAC;
  1183. wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr), sizeof(mac));
  1184. if (is_valid_ether_addr(mac)) {
  1185. wil_info(wil, "using OEM MAC %pM\n", mac);
  1186. } else {
  1187. if (wil->hw_version >= HW_VER_TALYN_MB)
  1188. mac_addr = RGF_OTP_MAC_TALYN_MB;
  1189. else
  1190. mac_addr = RGF_OTP_MAC;
  1191. wil_memcpy_fromio_32(mac, wil->csr + HOSTADDR(mac_addr),
  1192. sizeof(mac));
  1193. }
  1194. if (!is_valid_ether_addr(mac)) {
  1195. wil_err(wil, "Invalid MAC %pM\n", mac);
  1196. return -EINVAL;
  1197. }
  1198. ether_addr_copy(ndev->perm_addr, mac);
  1199. ether_addr_copy(wiphy->perm_addr, mac);
  1200. if (!is_valid_ether_addr(ndev->dev_addr))
  1201. eth_hw_addr_set(ndev, mac);
  1202. return 0;
  1203. }
  1204. static int wil_wait_for_fw_ready(struct wil6210_priv *wil)
  1205. {
  1206. ulong to = msecs_to_jiffies(2000);
  1207. ulong left = wait_for_completion_timeout(&wil->wmi_ready, to);
  1208. if (0 == left) {
  1209. wil_err(wil, "Firmware not ready\n");
  1210. return -ETIME;
  1211. } else {
  1212. wil_info(wil, "FW ready after %d ms. HW version 0x%08x\n",
  1213. jiffies_to_msecs(to-left), wil->hw_version);
  1214. }
  1215. return 0;
  1216. }
  1217. void wil_abort_scan(struct wil6210_vif *vif, bool sync)
  1218. {
  1219. struct wil6210_priv *wil = vif_to_wil(vif);
  1220. int rc;
  1221. struct cfg80211_scan_info info = {
  1222. .aborted = true,
  1223. };
  1224. lockdep_assert_held(&wil->vif_mutex);
  1225. if (!vif->scan_request)
  1226. return;
  1227. wil_dbg_misc(wil, "Abort scan_request 0x%p\n", vif->scan_request);
  1228. timer_delete_sync(&vif->scan_timer);
  1229. mutex_unlock(&wil->vif_mutex);
  1230. rc = wmi_abort_scan(vif);
  1231. if (!rc && sync)
  1232. wait_event_interruptible_timeout(wil->wq, !vif->scan_request,
  1233. msecs_to_jiffies(
  1234. WAIT_FOR_SCAN_ABORT_MS));
  1235. mutex_lock(&wil->vif_mutex);
  1236. if (vif->scan_request) {
  1237. cfg80211_scan_done(vif->scan_request, &info);
  1238. vif->scan_request = NULL;
  1239. }
  1240. }
  1241. void wil_abort_scan_all_vifs(struct wil6210_priv *wil, bool sync)
  1242. {
  1243. int i;
  1244. lockdep_assert_held(&wil->vif_mutex);
  1245. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  1246. struct wil6210_vif *vif = wil->vifs[i];
  1247. if (vif)
  1248. wil_abort_scan(vif, sync);
  1249. }
  1250. }
  1251. int wil_ps_update(struct wil6210_priv *wil, enum wmi_ps_profile_type ps_profile)
  1252. {
  1253. int rc;
  1254. if (!test_bit(WMI_FW_CAPABILITY_PS_CONFIG, wil->fw_capabilities)) {
  1255. wil_err(wil, "set_power_mgmt not supported\n");
  1256. return -EOPNOTSUPP;
  1257. }
  1258. rc = wmi_ps_dev_profile_cfg(wil, ps_profile);
  1259. if (rc)
  1260. wil_err(wil, "wmi_ps_dev_profile_cfg failed (%d)\n", rc);
  1261. else
  1262. wil->ps_profile = ps_profile;
  1263. return rc;
  1264. }
  1265. static void wil_pre_fw_config(struct wil6210_priv *wil)
  1266. {
  1267. wil_clear_fw_log_addr(wil);
  1268. /* Mark FW as loaded from host */
  1269. wil_s(wil, RGF_USER_USAGE_6, 1);
  1270. /* clear any interrupts which on-card-firmware
  1271. * may have set
  1272. */
  1273. wil6210_clear_irq(wil);
  1274. /* CAF_ICR - clear and mask */
  1275. /* it is W1C, clear by writing back same value */
  1276. if (wil->hw_version < HW_VER_TALYN_MB) {
  1277. wil_s(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, ICR), 0);
  1278. wil_w(wil, RGF_CAF_ICR + offsetof(struct RGF_ICR, IMV), ~0);
  1279. }
  1280. /* clear PAL_UNIT_ICR (potential D0->D3 leftover)
  1281. * In Talyn-MB host cannot access this register due to
  1282. * access control, hence PAL_UNIT_ICR is cleared by the FW
  1283. */
  1284. if (wil->hw_version < HW_VER_TALYN_MB)
  1285. wil_s(wil, RGF_PAL_UNIT_ICR + offsetof(struct RGF_ICR, ICR),
  1286. 0);
  1287. if (wil->fw_calib_result > 0) {
  1288. __le32 val = cpu_to_le32(wil->fw_calib_result |
  1289. (CALIB_RESULT_SIGNATURE << 8));
  1290. wil_w(wil, RGF_USER_FW_CALIB_RESULT, (u32 __force)val);
  1291. }
  1292. }
  1293. static int wil_restore_vifs(struct wil6210_priv *wil)
  1294. {
  1295. struct wil6210_vif *vif;
  1296. struct net_device *ndev;
  1297. struct wireless_dev *wdev;
  1298. int i, rc;
  1299. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  1300. vif = wil->vifs[i];
  1301. if (!vif)
  1302. continue;
  1303. vif->ap_isolate = 0;
  1304. if (vif->mid) {
  1305. ndev = vif_to_ndev(vif);
  1306. wdev = vif_to_wdev(vif);
  1307. rc = wmi_port_allocate(wil, vif->mid, ndev->dev_addr,
  1308. wdev->iftype);
  1309. if (rc) {
  1310. wil_err(wil, "fail to restore VIF %d type %d, rc %d\n",
  1311. i, wdev->iftype, rc);
  1312. return rc;
  1313. }
  1314. }
  1315. }
  1316. return 0;
  1317. }
  1318. /*
  1319. * Clear FW and ucode log start addr to indicate FW log is not ready. The host
  1320. * driver clears the addresses before FW starts and FW initializes the address
  1321. * when it is ready to send logs.
  1322. */
  1323. void wil_clear_fw_log_addr(struct wil6210_priv *wil)
  1324. {
  1325. /* FW log addr */
  1326. wil_w(wil, RGF_USER_USAGE_1, 0);
  1327. /* ucode log addr */
  1328. wil_w(wil, RGF_USER_USAGE_2, 0);
  1329. wil_dbg_misc(wil, "Cleared FW and ucode log address");
  1330. }
  1331. /*
  1332. * We reset all the structures, and we reset the UMAC.
  1333. * After calling this routine, you're expected to reload
  1334. * the firmware.
  1335. */
  1336. int wil_reset(struct wil6210_priv *wil, bool load_fw)
  1337. {
  1338. int rc, i;
  1339. unsigned long status_flags = BIT(wil_status_resetting);
  1340. int no_flash;
  1341. struct wil6210_vif *vif;
  1342. wil_dbg_misc(wil, "reset\n");
  1343. WARN_ON(!mutex_is_locked(&wil->mutex));
  1344. WARN_ON(test_bit(wil_status_napi_en, wil->status));
  1345. if (debug_fw) {
  1346. static const u8 mac[ETH_ALEN] = {
  1347. 0x00, 0xde, 0xad, 0x12, 0x34, 0x56,
  1348. };
  1349. struct net_device *ndev = wil->main_ndev;
  1350. ether_addr_copy(ndev->perm_addr, mac);
  1351. eth_hw_addr_set(ndev, ndev->perm_addr);
  1352. return 0;
  1353. }
  1354. if (wil->hw_version == HW_VER_UNKNOWN)
  1355. return -ENODEV;
  1356. if (test_bit(WIL_PLATFORM_CAPA_T_PWR_ON_0, wil->platform_capa) &&
  1357. wil->hw_version < HW_VER_TALYN_MB) {
  1358. wil_dbg_misc(wil, "Notify FW to set T_POWER_ON=0\n");
  1359. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_SUPPORT_T_POWER_ON_0);
  1360. }
  1361. if (test_bit(WIL_PLATFORM_CAPA_EXT_CLK, wil->platform_capa)) {
  1362. wil_dbg_misc(wil, "Notify FW on ext clock configuration\n");
  1363. wil_s(wil, RGF_USER_USAGE_8, BIT_USER_EXT_CLK);
  1364. }
  1365. if (wil->platform_ops.notify) {
  1366. rc = wil->platform_ops.notify(wil->platform_handle,
  1367. WIL_PLATFORM_EVT_PRE_RESET);
  1368. if (rc)
  1369. wil_err(wil, "PRE_RESET platform notify failed, rc %d\n",
  1370. rc);
  1371. }
  1372. set_bit(wil_status_resetting, wil->status);
  1373. mutex_lock(&wil->vif_mutex);
  1374. wil_abort_scan_all_vifs(wil, false);
  1375. mutex_unlock(&wil->vif_mutex);
  1376. for (i = 0; i < GET_MAX_VIFS(wil); i++) {
  1377. vif = wil->vifs[i];
  1378. if (vif) {
  1379. cancel_work_sync(&vif->disconnect_worker);
  1380. wil6210_disconnect(vif, NULL,
  1381. WLAN_REASON_DEAUTH_LEAVING);
  1382. vif->ptk_rekey_state = WIL_REKEY_IDLE;
  1383. }
  1384. }
  1385. wil_bcast_fini_all(wil);
  1386. /* Disable device led before reset*/
  1387. wmi_led_cfg(wil, false);
  1388. down_write(&wil->mem_lock);
  1389. /* prevent NAPI from being scheduled and prevent wmi commands */
  1390. mutex_lock(&wil->wmi_mutex);
  1391. if (test_bit(wil_status_suspending, wil->status))
  1392. status_flags |= BIT(wil_status_suspending);
  1393. bitmap_and(wil->status, wil->status, &status_flags,
  1394. wil_status_last);
  1395. wil_dbg_misc(wil, "wil->status (0x%lx)\n", *wil->status);
  1396. mutex_unlock(&wil->wmi_mutex);
  1397. wil_mask_irq(wil);
  1398. wmi_event_flush(wil);
  1399. flush_workqueue(wil->wq_service);
  1400. flush_workqueue(wil->wmi_wq);
  1401. no_flash = test_bit(hw_capa_no_flash, wil->hw_capa);
  1402. if (!no_flash)
  1403. wil_bl_crash_info(wil, false);
  1404. wil_disable_irq(wil);
  1405. rc = wil_target_reset(wil, no_flash);
  1406. wil6210_clear_irq(wil);
  1407. wil_enable_irq(wil);
  1408. wil->txrx_ops.rx_fini(wil);
  1409. wil->txrx_ops.tx_fini(wil);
  1410. if (rc) {
  1411. if (!no_flash)
  1412. wil_bl_crash_info(wil, true);
  1413. goto out;
  1414. }
  1415. if (no_flash) {
  1416. rc = wil_get_otp_info(wil);
  1417. } else {
  1418. rc = wil_get_bl_info(wil);
  1419. if (rc == -EAGAIN && !load_fw)
  1420. /* ignore RF error if not going up */
  1421. rc = 0;
  1422. }
  1423. if (rc)
  1424. goto out;
  1425. wil_set_oob_mode(wil, oob_mode);
  1426. if (load_fw) {
  1427. char board_file[WIL_BOARD_FILE_MAX_NAMELEN];
  1428. if (wil->secured_boot) {
  1429. wil_err(wil, "secured boot is not supported\n");
  1430. up_write(&wil->mem_lock);
  1431. return -ENOTSUPP;
  1432. }
  1433. board_file[0] = '\0';
  1434. wil_get_board_file(wil, board_file, sizeof(board_file));
  1435. wil_info(wil, "Use firmware <%s> + board <%s>\n",
  1436. wil->wil_fw_name, board_file);
  1437. if (!no_flash)
  1438. wil_bl_prepare_halt(wil);
  1439. wil_halt_cpu(wil);
  1440. memset(wil->fw_version, 0, sizeof(wil->fw_version));
  1441. /* Loading f/w from the file */
  1442. rc = wil_request_firmware(wil, wil->wil_fw_name, true);
  1443. if (rc)
  1444. goto out;
  1445. if (wil->num_of_brd_entries)
  1446. rc = wil_request_board(wil, board_file);
  1447. else
  1448. rc = wil_request_firmware(wil, board_file, true);
  1449. if (rc)
  1450. goto out;
  1451. wil_pre_fw_config(wil);
  1452. wil_release_cpu(wil);
  1453. }
  1454. /* init after reset */
  1455. reinit_completion(&wil->wmi_ready);
  1456. reinit_completion(&wil->wmi_call);
  1457. reinit_completion(&wil->halp.comp);
  1458. clear_bit(wil_status_resetting, wil->status);
  1459. up_write(&wil->mem_lock);
  1460. if (load_fw) {
  1461. wil_unmask_irq(wil);
  1462. /* we just started MAC, wait for FW ready */
  1463. rc = wil_wait_for_fw_ready(wil);
  1464. if (rc)
  1465. return rc;
  1466. /* check FW is responsive */
  1467. rc = wmi_echo(wil);
  1468. if (rc) {
  1469. wil_err(wil, "wmi_echo failed, rc %d\n", rc);
  1470. return rc;
  1471. }
  1472. wil->txrx_ops.configure_interrupt_moderation(wil);
  1473. /* Enable OFU rdy valid bug fix, to prevent hang in oful34_rx
  1474. * while there is back-pressure from Host during RX
  1475. */
  1476. if (wil->hw_version >= HW_VER_TALYN_MB)
  1477. wil_s(wil, RGF_DMA_MISC_CTL,
  1478. BIT_OFUL34_RDY_VALID_BUG_FIX_EN);
  1479. rc = wil_restore_vifs(wil);
  1480. if (rc) {
  1481. wil_err(wil, "failed to restore vifs, rc %d\n", rc);
  1482. return rc;
  1483. }
  1484. wil_collect_fw_info(wil);
  1485. if (wil->ps_profile != WMI_PS_PROFILE_TYPE_DEFAULT)
  1486. wil_ps_update(wil, wil->ps_profile);
  1487. if (wil->platform_ops.notify) {
  1488. rc = wil->platform_ops.notify(wil->platform_handle,
  1489. WIL_PLATFORM_EVT_FW_RDY);
  1490. if (rc) {
  1491. wil_err(wil, "FW_RDY notify failed, rc %d\n",
  1492. rc);
  1493. rc = 0;
  1494. }
  1495. }
  1496. }
  1497. return rc;
  1498. out:
  1499. up_write(&wil->mem_lock);
  1500. clear_bit(wil_status_resetting, wil->status);
  1501. return rc;
  1502. }
  1503. void wil_fw_error_recovery(struct wil6210_priv *wil)
  1504. {
  1505. wil_dbg_misc(wil, "starting fw error recovery\n");
  1506. if (test_bit(wil_status_resetting, wil->status)) {
  1507. wil_info(wil, "Reset already in progress\n");
  1508. return;
  1509. }
  1510. wil->recovery_state = fw_recovery_pending;
  1511. schedule_work(&wil->fw_error_worker);
  1512. }
  1513. int __wil_up(struct wil6210_priv *wil)
  1514. {
  1515. struct net_device *ndev = wil->main_ndev;
  1516. struct wireless_dev *wdev = ndev->ieee80211_ptr;
  1517. int rc;
  1518. WARN_ON(!mutex_is_locked(&wil->mutex));
  1519. rc = wil_reset(wil, true);
  1520. if (rc)
  1521. return rc;
  1522. /* Rx RING. After MAC and beacon */
  1523. if (rx_ring_order == 0)
  1524. rx_ring_order = wil->hw_version < HW_VER_TALYN_MB ?
  1525. WIL_RX_RING_SIZE_ORDER_DEFAULT :
  1526. WIL_RX_RING_SIZE_ORDER_TALYN_DEFAULT;
  1527. rc = wil->txrx_ops.rx_init(wil, rx_ring_order);
  1528. if (rc)
  1529. return rc;
  1530. rc = wil->txrx_ops.tx_init(wil);
  1531. if (rc)
  1532. return rc;
  1533. switch (wdev->iftype) {
  1534. case NL80211_IFTYPE_STATION:
  1535. wil_dbg_misc(wil, "type: STATION\n");
  1536. ndev->type = ARPHRD_ETHER;
  1537. break;
  1538. case NL80211_IFTYPE_AP:
  1539. wil_dbg_misc(wil, "type: AP\n");
  1540. ndev->type = ARPHRD_ETHER;
  1541. break;
  1542. case NL80211_IFTYPE_P2P_CLIENT:
  1543. wil_dbg_misc(wil, "type: P2P_CLIENT\n");
  1544. ndev->type = ARPHRD_ETHER;
  1545. break;
  1546. case NL80211_IFTYPE_P2P_GO:
  1547. wil_dbg_misc(wil, "type: P2P_GO\n");
  1548. ndev->type = ARPHRD_ETHER;
  1549. break;
  1550. case NL80211_IFTYPE_MONITOR:
  1551. wil_dbg_misc(wil, "type: Monitor\n");
  1552. ndev->type = ARPHRD_IEEE80211_RADIOTAP;
  1553. /* ARPHRD_IEEE80211 or ARPHRD_IEEE80211_RADIOTAP ? */
  1554. break;
  1555. default:
  1556. return -EOPNOTSUPP;
  1557. }
  1558. /* MAC address - pre-requisite for other commands */
  1559. wmi_set_mac_address(wil, ndev->dev_addr);
  1560. wil_dbg_misc(wil, "NAPI enable\n");
  1561. napi_enable(&wil->napi_rx);
  1562. napi_enable(&wil->napi_tx);
  1563. set_bit(wil_status_napi_en, wil->status);
  1564. wil6210_bus_request(wil, WIL_DEFAULT_BUS_REQUEST_KBPS);
  1565. return 0;
  1566. }
  1567. int wil_up(struct wil6210_priv *wil)
  1568. {
  1569. int rc;
  1570. wil_dbg_misc(wil, "up\n");
  1571. mutex_lock(&wil->mutex);
  1572. rc = __wil_up(wil);
  1573. mutex_unlock(&wil->mutex);
  1574. return rc;
  1575. }
  1576. int __wil_down(struct wil6210_priv *wil)
  1577. {
  1578. int rc;
  1579. WARN_ON(!mutex_is_locked(&wil->mutex));
  1580. set_bit(wil_status_resetting, wil->status);
  1581. wil6210_bus_request(wil, 0);
  1582. wil_disable_irq(wil);
  1583. if (test_and_clear_bit(wil_status_napi_en, wil->status)) {
  1584. napi_disable(&wil->napi_rx);
  1585. napi_disable(&wil->napi_tx);
  1586. wil_dbg_misc(wil, "NAPI disable\n");
  1587. }
  1588. wil_enable_irq(wil);
  1589. mutex_lock(&wil->vif_mutex);
  1590. wil_p2p_stop_radio_operations(wil);
  1591. wil_abort_scan_all_vifs(wil, false);
  1592. mutex_unlock(&wil->vif_mutex);
  1593. rc = wil_reset(wil, false);
  1594. return rc;
  1595. }
  1596. int wil_down(struct wil6210_priv *wil)
  1597. {
  1598. int rc;
  1599. wil_dbg_misc(wil, "down\n");
  1600. wil_set_recovery_state(wil, fw_recovery_idle);
  1601. mutex_lock(&wil->mutex);
  1602. rc = __wil_down(wil);
  1603. mutex_unlock(&wil->mutex);
  1604. return rc;
  1605. }
  1606. int wil_find_cid(struct wil6210_priv *wil, u8 mid, const u8 *mac)
  1607. {
  1608. int i;
  1609. int rc = -ENOENT;
  1610. for (i = 0; i < wil->max_assoc_sta; i++) {
  1611. if (wil->sta[i].mid == mid &&
  1612. wil->sta[i].status != wil_sta_unused &&
  1613. ether_addr_equal(wil->sta[i].addr, mac)) {
  1614. rc = i;
  1615. break;
  1616. }
  1617. }
  1618. return rc;
  1619. }
  1620. void wil_halp_vote(struct wil6210_priv *wil)
  1621. {
  1622. unsigned long rc;
  1623. unsigned long to_jiffies = msecs_to_jiffies(WAIT_FOR_HALP_VOTE_MS);
  1624. if (wil->hw_version >= HW_VER_TALYN_MB)
  1625. return;
  1626. mutex_lock(&wil->halp.lock);
  1627. wil_dbg_irq(wil, "halp_vote: start, HALP ref_cnt (%d)\n",
  1628. wil->halp.ref_cnt);
  1629. if (++wil->halp.ref_cnt == 1) {
  1630. reinit_completion(&wil->halp.comp);
  1631. /* mark to IRQ context to handle HALP ICR */
  1632. wil->halp.handle_icr = true;
  1633. wil6210_set_halp(wil);
  1634. rc = wait_for_completion_timeout(&wil->halp.comp, to_jiffies);
  1635. if (!rc) {
  1636. wil_err(wil, "HALP vote timed out\n");
  1637. /* Mask HALP as done in case the interrupt is raised */
  1638. wil->halp.handle_icr = false;
  1639. wil6210_mask_halp(wil);
  1640. } else {
  1641. wil_dbg_irq(wil,
  1642. "halp_vote: HALP vote completed after %d ms\n",
  1643. jiffies_to_msecs(to_jiffies - rc));
  1644. }
  1645. }
  1646. wil_dbg_irq(wil, "halp_vote: end, HALP ref_cnt (%d)\n",
  1647. wil->halp.ref_cnt);
  1648. mutex_unlock(&wil->halp.lock);
  1649. }
  1650. void wil_halp_unvote(struct wil6210_priv *wil)
  1651. {
  1652. if (wil->hw_version >= HW_VER_TALYN_MB)
  1653. return;
  1654. WARN_ON(wil->halp.ref_cnt == 0);
  1655. mutex_lock(&wil->halp.lock);
  1656. wil_dbg_irq(wil, "halp_unvote: start, HALP ref_cnt (%d)\n",
  1657. wil->halp.ref_cnt);
  1658. if (--wil->halp.ref_cnt == 0) {
  1659. wil6210_clear_halp(wil);
  1660. wil_dbg_irq(wil, "HALP unvote\n");
  1661. }
  1662. wil_dbg_irq(wil, "halp_unvote:end, HALP ref_cnt (%d)\n",
  1663. wil->halp.ref_cnt);
  1664. mutex_unlock(&wil->halp.lock);
  1665. }
  1666. void wil_init_txrx_ops(struct wil6210_priv *wil)
  1667. {
  1668. if (wil->use_enhanced_dma_hw)
  1669. wil_init_txrx_ops_edma(wil);
  1670. else
  1671. wil_init_txrx_ops_legacy_dma(wil);
  1672. }