slic_ds26522.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * drivers/net/wan/slic_ds26522.c
  4. *
  5. * Copyright (C) 2016 Freescale Semiconductor, Inc.
  6. *
  7. * Author:Zhao Qiang<qiang.zhao@nxp.com>
  8. */
  9. #include <linux/bitrev.h>
  10. #include <linux/module.h>
  11. #include <linux/device.h>
  12. #include <linux/kernel.h>
  13. #include <linux/sched.h>
  14. #include <linux/kthread.h>
  15. #include <linux/spi/spi.h>
  16. #include <linux/wait.h>
  17. #include <linux/param.h>
  18. #include <linux/delay.h>
  19. #include <linux/of.h>
  20. #include <linux/of_address.h>
  21. #include <linux/io.h>
  22. #include "slic_ds26522.h"
  23. #define SLIC_TRANS_LEN 1
  24. #define SLIC_TWO_LEN 2
  25. #define SLIC_THREE_LEN 3
  26. static struct spi_device *g_spi;
  27. MODULE_DESCRIPTION("Slic Maxim DS26522 driver");
  28. MODULE_LICENSE("GPL");
  29. MODULE_AUTHOR("Zhao Qiang<B45475@freescale.com>");
  30. /* the read/write format of address is
  31. * w/r|A13|A12|A11|A10|A9|A8|A7|A6|A5|A4|A3|A2|A1|A0|x
  32. */
  33. static void slic_write(struct spi_device *spi, u16 addr,
  34. u8 data)
  35. {
  36. u8 temp[3];
  37. addr = bitrev16(addr) >> 1;
  38. data = bitrev8(data);
  39. temp[0] = (u8)((addr >> 8) & 0x7f);
  40. temp[1] = (u8)(addr & 0xfe);
  41. temp[2] = data;
  42. /* write spi addr and value */
  43. spi_write(spi, &temp[0], SLIC_THREE_LEN);
  44. }
  45. static u8 slic_read(struct spi_device *spi, u16 addr)
  46. {
  47. u8 temp[2];
  48. u8 data;
  49. addr = bitrev16(addr) >> 1;
  50. temp[0] = (u8)(((addr >> 8) & 0x7f) | 0x80);
  51. temp[1] = (u8)(addr & 0xfe);
  52. spi_write_then_read(spi, &temp[0], SLIC_TWO_LEN, &data,
  53. SLIC_TRANS_LEN);
  54. data = bitrev8(data);
  55. return data;
  56. }
  57. static bool get_slic_product_code(struct spi_device *spi)
  58. {
  59. u8 device_id;
  60. device_id = slic_read(spi, DS26522_IDR_ADDR);
  61. if ((device_id & 0xf8) == 0x68)
  62. return true;
  63. else
  64. return false;
  65. }
  66. static void ds26522_e1_spec_config(struct spi_device *spi)
  67. {
  68. /* Receive E1 Mode, Framer Disabled */
  69. slic_write(spi, DS26522_RMMR_ADDR, DS26522_RMMR_E1);
  70. /* Transmit E1 Mode, Framer Disable */
  71. slic_write(spi, DS26522_TMMR_ADDR, DS26522_TMMR_E1);
  72. /* Receive E1 Mode Framer Enable */
  73. slic_write(spi, DS26522_RMMR_ADDR,
  74. slic_read(spi, DS26522_RMMR_ADDR) | DS26522_RMMR_FRM_EN);
  75. /* Transmit E1 Mode Framer Enable */
  76. slic_write(spi, DS26522_TMMR_ADDR,
  77. slic_read(spi, DS26522_TMMR_ADDR) | DS26522_TMMR_FRM_EN);
  78. /* RCR1, receive E1 B8zs & ESF */
  79. slic_write(spi, DS26522_RCR1_ADDR,
  80. DS26522_RCR1_E1_HDB3 | DS26522_RCR1_E1_CCS);
  81. /* RSYSCLK=2.048MHz, RSYNC-Output */
  82. slic_write(spi, DS26522_RIOCR_ADDR,
  83. DS26522_RIOCR_2048KHZ | DS26522_RIOCR_RSIO_OUT);
  84. /* TCR1 Transmit E1 b8zs */
  85. slic_write(spi, DS26522_TCR1_ADDR, DS26522_TCR1_TB8ZS);
  86. /* TSYSCLK=2.048MHz, TSYNC-Output */
  87. slic_write(spi, DS26522_TIOCR_ADDR,
  88. DS26522_TIOCR_2048KHZ | DS26522_TIOCR_TSIO_OUT);
  89. /* Set E1TAF */
  90. slic_write(spi, DS26522_E1TAF_ADDR, DS26522_E1TAF_DEFAULT);
  91. /* Set E1TNAF register */
  92. slic_write(spi, DS26522_E1TNAF_ADDR, DS26522_E1TNAF_DEFAULT);
  93. /* Receive E1 Mode Framer Enable & init Done */
  94. slic_write(spi, DS26522_RMMR_ADDR, slic_read(spi, DS26522_RMMR_ADDR) |
  95. DS26522_RMMR_INIT_DONE);
  96. /* Transmit E1 Mode Framer Enable & init Done */
  97. slic_write(spi, DS26522_TMMR_ADDR, slic_read(spi, DS26522_TMMR_ADDR) |
  98. DS26522_TMMR_INIT_DONE);
  99. /* Configure LIU E1 mode */
  100. slic_write(spi, DS26522_LTRCR_ADDR, DS26522_LTRCR_E1);
  101. /* E1 Mode default 75 ohm w/Transmit Impedance Matlinking */
  102. slic_write(spi, DS26522_LTITSR_ADDR,
  103. DS26522_LTITSR_TLIS_75OHM | DS26522_LTITSR_LBOS_75OHM);
  104. /* E1 Mode default 75 ohm Long Haul w/Receive Impedance Matlinking */
  105. slic_write(spi, DS26522_LRISMR_ADDR,
  106. DS26522_LRISMR_75OHM | DS26522_LRISMR_MAX);
  107. /* Enable Transmit output */
  108. slic_write(spi, DS26522_LMCR_ADDR, DS26522_LMCR_TE);
  109. }
  110. static int slic_ds26522_init_configure(struct spi_device *spi)
  111. {
  112. u16 addr;
  113. /* set clock */
  114. slic_write(spi, DS26522_GTCCR_ADDR, DS26522_GTCCR_BPREFSEL_REFCLKIN |
  115. DS26522_GTCCR_BFREQSEL_2048KHZ |
  116. DS26522_GTCCR_FREQSEL_2048KHZ);
  117. slic_write(spi, DS26522_GTCR2_ADDR, DS26522_GTCR2_TSSYNCOUT);
  118. slic_write(spi, DS26522_GFCR_ADDR, DS26522_GFCR_BPCLK_2048KHZ);
  119. /* set gtcr */
  120. slic_write(spi, DS26522_GTCR1_ADDR, DS26522_GTCR1);
  121. /* Global LIU Software Reset Register */
  122. slic_write(spi, DS26522_GLSRR_ADDR, DS26522_GLSRR_RESET);
  123. /* Global Framer and BERT Software Reset Register */
  124. slic_write(spi, DS26522_GFSRR_ADDR, DS26522_GFSRR_RESET);
  125. usleep_range(100, 120);
  126. slic_write(spi, DS26522_GLSRR_ADDR, DS26522_GLSRR_NORMAL);
  127. slic_write(spi, DS26522_GFSRR_ADDR, DS26522_GFSRR_NORMAL);
  128. /* Perform RX/TX SRESET,Reset receiver */
  129. slic_write(spi, DS26522_RMMR_ADDR, DS26522_RMMR_SFTRST);
  130. /* Reset tranceiver */
  131. slic_write(spi, DS26522_TMMR_ADDR, DS26522_TMMR_SFTRST);
  132. usleep_range(100, 120);
  133. /* Zero all Framer Registers */
  134. for (addr = DS26522_RF_ADDR_START; addr <= DS26522_RF_ADDR_END;
  135. addr++)
  136. slic_write(spi, addr, 0);
  137. for (addr = DS26522_TF_ADDR_START; addr <= DS26522_TF_ADDR_END;
  138. addr++)
  139. slic_write(spi, addr, 0);
  140. for (addr = DS26522_LIU_ADDR_START; addr <= DS26522_LIU_ADDR_END;
  141. addr++)
  142. slic_write(spi, addr, 0);
  143. for (addr = DS26522_BERT_ADDR_START; addr <= DS26522_BERT_ADDR_END;
  144. addr++)
  145. slic_write(spi, addr, 0);
  146. /* setup ds26522 for E1 specification */
  147. ds26522_e1_spec_config(spi);
  148. slic_write(spi, DS26522_GTCR1_ADDR, 0x00);
  149. return 0;
  150. }
  151. static void slic_ds26522_remove(struct spi_device *spi)
  152. {
  153. pr_info("DS26522 module uninstalled\n");
  154. }
  155. static int slic_ds26522_probe(struct spi_device *spi)
  156. {
  157. int ret = 0;
  158. g_spi = spi;
  159. spi->bits_per_word = 8;
  160. if (!get_slic_product_code(spi))
  161. return ret;
  162. ret = slic_ds26522_init_configure(spi);
  163. if (ret == 0)
  164. pr_info("DS26522 cs%d configured\n", spi_get_chipselect(spi, 0));
  165. return ret;
  166. }
  167. static const struct spi_device_id slic_ds26522_id[] = {
  168. { .name = "ds26522" },
  169. { /* sentinel */ },
  170. };
  171. MODULE_DEVICE_TABLE(spi, slic_ds26522_id);
  172. static const struct of_device_id slic_ds26522_match[] = {
  173. {
  174. .compatible = "maxim,ds26522",
  175. },
  176. {},
  177. };
  178. MODULE_DEVICE_TABLE(of, slic_ds26522_match);
  179. static struct spi_driver slic_ds26522_driver = {
  180. .driver = {
  181. .name = "ds26522",
  182. .bus = &spi_bus_type,
  183. .of_match_table = slic_ds26522_match,
  184. },
  185. .probe = slic_ds26522_probe,
  186. .remove = slic_ds26522_remove,
  187. .id_table = slic_ds26522_id,
  188. };
  189. module_spi_driver(slic_ds26522_driver);