aqc111.c 38 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /* Aquantia Corp. Aquantia AQtion USB to 5GbE Controller
  3. * Copyright (C) 2003-2005 David Hollis <dhollis@davehollis.com>
  4. * Copyright (C) 2005 Phil Chang <pchang23@sbcglobal.net>
  5. * Copyright (C) 2002-2003 TiVo Inc.
  6. * Copyright (C) 2017-2018 ASIX
  7. * Copyright (C) 2018 Aquantia Corp.
  8. */
  9. #include <linux/module.h>
  10. #include <linux/netdevice.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/mii.h>
  13. #include <linux/usb.h>
  14. #include <linux/crc32.h>
  15. #include <linux/if_vlan.h>
  16. #include <linux/usb/cdc.h>
  17. #include <linux/usb/usbnet.h>
  18. #include <linux/linkmode.h>
  19. #include "aqc111.h"
  20. static int aqc111_read_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
  21. u16 index, u16 size, void *data)
  22. {
  23. int ret;
  24. ret = usbnet_read_cmd_nopm(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR |
  25. USB_RECIP_DEVICE, value, index, data, size);
  26. if (unlikely(ret < size)) {
  27. netdev_warn(dev->net,
  28. "Failed to read(0x%x) reg index 0x%04x: %d\n",
  29. cmd, index, ret);
  30. ret = ret < 0 ? ret : -ENODATA;
  31. }
  32. return ret;
  33. }
  34. static int aqc111_read_cmd(struct usbnet *dev, u8 cmd, u16 value,
  35. u16 index, u16 size, void *data)
  36. {
  37. int ret;
  38. ret = usbnet_read_cmd(dev, cmd, USB_DIR_IN | USB_TYPE_VENDOR |
  39. USB_RECIP_DEVICE, value, index, data, size);
  40. if (unlikely(ret < size)) {
  41. netdev_warn(dev->net,
  42. "Failed to read(0x%x) reg index 0x%04x: %d\n",
  43. cmd, index, ret);
  44. ret = ret < 0 ? ret : -ENODATA;
  45. }
  46. return ret;
  47. }
  48. static int aqc111_read16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
  49. u16 index, u16 *data)
  50. {
  51. int ret = 0;
  52. ret = aqc111_read_cmd_nopm(dev, cmd, value, index, sizeof(*data), data);
  53. le16_to_cpus(data);
  54. return ret;
  55. }
  56. static int aqc111_read16_cmd(struct usbnet *dev, u8 cmd, u16 value,
  57. u16 index, u16 *data)
  58. {
  59. int ret = 0;
  60. ret = aqc111_read_cmd(dev, cmd, value, index, sizeof(*data), data);
  61. le16_to_cpus(data);
  62. return ret;
  63. }
  64. static int __aqc111_write_cmd(struct usbnet *dev, u8 cmd, u8 reqtype,
  65. u16 value, u16 index, u16 size, const void *data)
  66. {
  67. int err = -ENOMEM;
  68. void *buf = NULL;
  69. netdev_dbg(dev->net,
  70. "%s cmd=%#x reqtype=%#x value=%#x index=%#x size=%d\n",
  71. __func__, cmd, reqtype, value, index, size);
  72. if (data) {
  73. buf = kmemdup(data, size, GFP_KERNEL);
  74. if (!buf)
  75. goto out;
  76. }
  77. err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0),
  78. cmd, reqtype, value, index, buf, size,
  79. (cmd == AQ_PHY_POWER) ? AQ_USB_PHY_SET_TIMEOUT :
  80. AQ_USB_SET_TIMEOUT);
  81. if (unlikely(err < 0))
  82. netdev_warn(dev->net,
  83. "Failed to write(0x%x) reg index 0x%04x: %d\n",
  84. cmd, index, err);
  85. kfree(buf);
  86. out:
  87. return err;
  88. }
  89. static int aqc111_write_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
  90. u16 index, u16 size, void *data)
  91. {
  92. int ret;
  93. ret = __aqc111_write_cmd(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
  94. USB_RECIP_DEVICE, value, index, size, data);
  95. return ret;
  96. }
  97. static int aqc111_write_cmd(struct usbnet *dev, u8 cmd, u16 value,
  98. u16 index, u16 size, const void *data)
  99. {
  100. int ret;
  101. if (usb_autopm_get_interface(dev->intf) < 0)
  102. return -ENODEV;
  103. ret = __aqc111_write_cmd(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
  104. USB_RECIP_DEVICE, value, index, size, data);
  105. usb_autopm_put_interface(dev->intf);
  106. return ret;
  107. }
  108. static int aqc111_write16_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
  109. u16 index, u16 *data)
  110. {
  111. u16 tmp = *data;
  112. cpu_to_le16s(&tmp);
  113. return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp);
  114. }
  115. static int aqc111_write16_cmd(struct usbnet *dev, u8 cmd, u16 value,
  116. u16 index, u16 *data)
  117. {
  118. u16 tmp = *data;
  119. cpu_to_le16s(&tmp);
  120. return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp);
  121. }
  122. static int aqc111_write32_cmd_nopm(struct usbnet *dev, u8 cmd, u16 value,
  123. u16 index, u32 *data)
  124. {
  125. u32 tmp = *data;
  126. cpu_to_le32s(&tmp);
  127. return aqc111_write_cmd_nopm(dev, cmd, value, index, sizeof(tmp), &tmp);
  128. }
  129. static int aqc111_write32_cmd(struct usbnet *dev, u8 cmd, u16 value,
  130. u16 index, u32 *data)
  131. {
  132. u32 tmp = *data;
  133. cpu_to_le32s(&tmp);
  134. return aqc111_write_cmd(dev, cmd, value, index, sizeof(tmp), &tmp);
  135. }
  136. static int aqc111_write_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
  137. u16 index, u16 size, void *data)
  138. {
  139. return usbnet_write_cmd_async(dev, cmd, USB_DIR_OUT | USB_TYPE_VENDOR |
  140. USB_RECIP_DEVICE, value, index, data,
  141. size);
  142. }
  143. static int aqc111_write16_cmd_async(struct usbnet *dev, u8 cmd, u16 value,
  144. u16 index, u16 *data)
  145. {
  146. u16 tmp = *data;
  147. cpu_to_le16s(&tmp);
  148. return aqc111_write_cmd_async(dev, cmd, value, index,
  149. sizeof(tmp), &tmp);
  150. }
  151. static void aqc111_get_drvinfo(struct net_device *net,
  152. struct ethtool_drvinfo *info)
  153. {
  154. struct usbnet *dev = netdev_priv(net);
  155. struct aqc111_data *aqc111_data = dev->driver_priv;
  156. /* Inherit standard device info */
  157. usbnet_get_drvinfo(net, info);
  158. snprintf(info->fw_version, sizeof(info->fw_version), "%u.%u.%u",
  159. aqc111_data->fw_ver.major,
  160. aqc111_data->fw_ver.minor,
  161. aqc111_data->fw_ver.rev);
  162. }
  163. static void aqc111_get_wol(struct net_device *net,
  164. struct ethtool_wolinfo *wolinfo)
  165. {
  166. struct usbnet *dev = netdev_priv(net);
  167. struct aqc111_data *aqc111_data = dev->driver_priv;
  168. wolinfo->supported = WAKE_MAGIC;
  169. wolinfo->wolopts = 0;
  170. if (aqc111_data->wol_flags & AQ_WOL_FLAG_MP)
  171. wolinfo->wolopts |= WAKE_MAGIC;
  172. }
  173. static int aqc111_set_wol(struct net_device *net,
  174. struct ethtool_wolinfo *wolinfo)
  175. {
  176. struct usbnet *dev = netdev_priv(net);
  177. struct aqc111_data *aqc111_data = dev->driver_priv;
  178. if (wolinfo->wolopts & ~WAKE_MAGIC)
  179. return -EINVAL;
  180. aqc111_data->wol_flags = 0;
  181. if (wolinfo->wolopts & WAKE_MAGIC)
  182. aqc111_data->wol_flags |= AQ_WOL_FLAG_MP;
  183. return 0;
  184. }
  185. static void aqc111_speed_to_link_mode(u32 speed,
  186. struct ethtool_link_ksettings *elk)
  187. {
  188. switch (speed) {
  189. case SPEED_5000:
  190. ethtool_link_ksettings_add_link_mode(elk, advertising,
  191. 5000baseT_Full);
  192. break;
  193. case SPEED_2500:
  194. ethtool_link_ksettings_add_link_mode(elk, advertising,
  195. 2500baseT_Full);
  196. break;
  197. case SPEED_1000:
  198. ethtool_link_ksettings_add_link_mode(elk, advertising,
  199. 1000baseT_Full);
  200. break;
  201. case SPEED_100:
  202. ethtool_link_ksettings_add_link_mode(elk, advertising,
  203. 100baseT_Full);
  204. break;
  205. }
  206. }
  207. static int aqc111_get_link_ksettings(struct net_device *net,
  208. struct ethtool_link_ksettings *elk)
  209. {
  210. struct usbnet *dev = netdev_priv(net);
  211. struct aqc111_data *aqc111_data = dev->driver_priv;
  212. enum usb_device_speed usb_speed = dev->udev->speed;
  213. u32 speed = SPEED_UNKNOWN;
  214. ethtool_link_ksettings_zero_link_mode(elk, supported);
  215. ethtool_link_ksettings_add_link_mode(elk, supported,
  216. 100baseT_Full);
  217. ethtool_link_ksettings_add_link_mode(elk, supported,
  218. 1000baseT_Full);
  219. if (usb_speed == USB_SPEED_SUPER) {
  220. ethtool_link_ksettings_add_link_mode(elk, supported,
  221. 2500baseT_Full);
  222. ethtool_link_ksettings_add_link_mode(elk, supported,
  223. 5000baseT_Full);
  224. }
  225. ethtool_link_ksettings_add_link_mode(elk, supported, TP);
  226. ethtool_link_ksettings_add_link_mode(elk, supported, Autoneg);
  227. elk->base.port = PORT_TP;
  228. elk->base.transceiver = XCVR_INTERNAL;
  229. elk->base.mdio_support = 0x00; /*Not supported*/
  230. if (aqc111_data->autoneg)
  231. linkmode_copy(elk->link_modes.advertising,
  232. elk->link_modes.supported);
  233. else
  234. aqc111_speed_to_link_mode(aqc111_data->advertised_speed, elk);
  235. elk->base.autoneg = aqc111_data->autoneg;
  236. switch (aqc111_data->link_speed) {
  237. case AQ_INT_SPEED_5G:
  238. speed = SPEED_5000;
  239. break;
  240. case AQ_INT_SPEED_2_5G:
  241. speed = SPEED_2500;
  242. break;
  243. case AQ_INT_SPEED_1G:
  244. speed = SPEED_1000;
  245. break;
  246. case AQ_INT_SPEED_100M:
  247. speed = SPEED_100;
  248. break;
  249. }
  250. elk->base.duplex = DUPLEX_FULL;
  251. elk->base.speed = speed;
  252. return 0;
  253. }
  254. static void aqc111_set_phy_speed(struct usbnet *dev, u8 autoneg, u16 speed)
  255. {
  256. struct aqc111_data *aqc111_data = dev->driver_priv;
  257. aqc111_data->phy_cfg &= ~AQ_ADV_MASK;
  258. aqc111_data->phy_cfg |= AQ_PAUSE;
  259. aqc111_data->phy_cfg |= AQ_ASYM_PAUSE;
  260. aqc111_data->phy_cfg |= AQ_DOWNSHIFT;
  261. aqc111_data->phy_cfg &= ~AQ_DSH_RETRIES_MASK;
  262. aqc111_data->phy_cfg |= (3 << AQ_DSH_RETRIES_SHIFT) &
  263. AQ_DSH_RETRIES_MASK;
  264. if (autoneg == AUTONEG_ENABLE) {
  265. switch (speed) {
  266. case SPEED_5000:
  267. aqc111_data->phy_cfg |= AQ_ADV_5G;
  268. fallthrough;
  269. case SPEED_2500:
  270. aqc111_data->phy_cfg |= AQ_ADV_2G5;
  271. fallthrough;
  272. case SPEED_1000:
  273. aqc111_data->phy_cfg |= AQ_ADV_1G;
  274. fallthrough;
  275. case SPEED_100:
  276. aqc111_data->phy_cfg |= AQ_ADV_100M;
  277. /* fall-through */
  278. }
  279. } else {
  280. switch (speed) {
  281. case SPEED_5000:
  282. aqc111_data->phy_cfg |= AQ_ADV_5G;
  283. break;
  284. case SPEED_2500:
  285. aqc111_data->phy_cfg |= AQ_ADV_2G5;
  286. break;
  287. case SPEED_1000:
  288. aqc111_data->phy_cfg |= AQ_ADV_1G;
  289. break;
  290. case SPEED_100:
  291. aqc111_data->phy_cfg |= AQ_ADV_100M;
  292. break;
  293. }
  294. }
  295. aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0, &aqc111_data->phy_cfg);
  296. }
  297. static int aqc111_set_link_ksettings(struct net_device *net,
  298. const struct ethtool_link_ksettings *elk)
  299. {
  300. struct usbnet *dev = netdev_priv(net);
  301. struct aqc111_data *aqc111_data = dev->driver_priv;
  302. enum usb_device_speed usb_speed = dev->udev->speed;
  303. u8 autoneg = elk->base.autoneg;
  304. u32 speed = elk->base.speed;
  305. if (autoneg == AUTONEG_ENABLE) {
  306. if (aqc111_data->autoneg != AUTONEG_ENABLE) {
  307. aqc111_data->autoneg = AUTONEG_ENABLE;
  308. aqc111_data->advertised_speed =
  309. (usb_speed == USB_SPEED_SUPER) ?
  310. SPEED_5000 : SPEED_1000;
  311. aqc111_set_phy_speed(dev, aqc111_data->autoneg,
  312. aqc111_data->advertised_speed);
  313. }
  314. } else {
  315. if (speed != SPEED_100 &&
  316. speed != SPEED_1000 &&
  317. speed != SPEED_2500 &&
  318. speed != SPEED_5000 &&
  319. speed != SPEED_UNKNOWN)
  320. return -EINVAL;
  321. if (elk->base.duplex != DUPLEX_FULL)
  322. return -EINVAL;
  323. if (usb_speed != USB_SPEED_SUPER && speed > SPEED_1000)
  324. return -EINVAL;
  325. aqc111_data->autoneg = AUTONEG_DISABLE;
  326. if (speed != SPEED_UNKNOWN)
  327. aqc111_data->advertised_speed = speed;
  328. aqc111_set_phy_speed(dev, aqc111_data->autoneg,
  329. aqc111_data->advertised_speed);
  330. }
  331. return 0;
  332. }
  333. static const struct ethtool_ops aqc111_ethtool_ops = {
  334. .get_drvinfo = aqc111_get_drvinfo,
  335. .get_wol = aqc111_get_wol,
  336. .set_wol = aqc111_set_wol,
  337. .get_msglevel = usbnet_get_msglevel,
  338. .set_msglevel = usbnet_set_msglevel,
  339. .get_link = ethtool_op_get_link,
  340. .get_link_ksettings = aqc111_get_link_ksettings,
  341. .set_link_ksettings = aqc111_set_link_ksettings
  342. };
  343. static int aqc111_change_mtu(struct net_device *net, int new_mtu)
  344. {
  345. struct usbnet *dev = netdev_priv(net);
  346. u16 reg16 = 0;
  347. u8 buf[5];
  348. WRITE_ONCE(net->mtu, new_mtu);
  349. dev->hard_mtu = net->mtu + net->hard_header_len;
  350. aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  351. 2, &reg16);
  352. if (net->mtu > 1500)
  353. reg16 |= SFR_MEDIUM_JUMBO_EN;
  354. else
  355. reg16 &= ~SFR_MEDIUM_JUMBO_EN;
  356. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  357. 2, &reg16);
  358. if (dev->net->mtu > 12500) {
  359. memcpy(buf, &AQC111_BULKIN_SIZE[2], 5);
  360. /* RX bulk configuration */
  361. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL,
  362. 5, 5, buf);
  363. }
  364. /* Set high low water level */
  365. if (dev->net->mtu <= 4500)
  366. reg16 = 0x0810;
  367. else if (dev->net->mtu <= 9500)
  368. reg16 = 0x1020;
  369. else if (dev->net->mtu <= 12500)
  370. reg16 = 0x1420;
  371. else
  372. reg16 = 0x1A20;
  373. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,
  374. 2, &reg16);
  375. return 0;
  376. }
  377. static int aqc111_set_mac_addr(struct net_device *net, void *p)
  378. {
  379. struct usbnet *dev = netdev_priv(net);
  380. int ret = 0;
  381. ret = eth_mac_addr(net, p);
  382. if (ret < 0)
  383. return ret;
  384. /* Set the MAC address */
  385. return aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN,
  386. ETH_ALEN, net->dev_addr);
  387. }
  388. static int aqc111_vlan_rx_kill_vid(struct net_device *net,
  389. __be16 proto, u16 vid)
  390. {
  391. struct usbnet *dev = netdev_priv(net);
  392. u8 vlan_ctrl = 0;
  393. u16 reg16 = 0;
  394. u8 reg8 = 0;
  395. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  396. vlan_ctrl = reg8;
  397. /* Address */
  398. reg8 = (vid / 16);
  399. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, &reg8);
  400. /* Data */
  401. reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD;
  402. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  403. aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);
  404. reg16 &= ~(1 << (vid % 16));
  405. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);
  406. reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE;
  407. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  408. return 0;
  409. }
  410. static int aqc111_vlan_rx_add_vid(struct net_device *net, __be16 proto, u16 vid)
  411. {
  412. struct usbnet *dev = netdev_priv(net);
  413. u8 vlan_ctrl = 0;
  414. u16 reg16 = 0;
  415. u8 reg8 = 0;
  416. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  417. vlan_ctrl = reg8;
  418. /* Address */
  419. reg8 = (vid / 16);
  420. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_ADDRESS, 1, 1, &reg8);
  421. /* Data */
  422. reg8 = vlan_ctrl | SFR_VLAN_CONTROL_RD;
  423. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  424. aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);
  425. reg16 |= (1 << (vid % 16));
  426. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_DATA0, 2, &reg16);
  427. reg8 = vlan_ctrl | SFR_VLAN_CONTROL_WE;
  428. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  429. return 0;
  430. }
  431. static void aqc111_set_rx_mode(struct net_device *net)
  432. {
  433. struct usbnet *dev = netdev_priv(net);
  434. struct aqc111_data *aqc111_data = dev->driver_priv;
  435. int mc_count = 0;
  436. mc_count = netdev_mc_count(net);
  437. aqc111_data->rxctl &= ~(SFR_RX_CTL_PRO | SFR_RX_CTL_AMALL |
  438. SFR_RX_CTL_AM);
  439. if (net->flags & IFF_PROMISC) {
  440. aqc111_data->rxctl |= SFR_RX_CTL_PRO;
  441. } else if ((net->flags & IFF_ALLMULTI) || mc_count > AQ_MAX_MCAST) {
  442. aqc111_data->rxctl |= SFR_RX_CTL_AMALL;
  443. } else if (!netdev_mc_empty(net)) {
  444. u8 m_filter[AQ_MCAST_FILTER_SIZE] = { 0 };
  445. struct netdev_hw_addr *ha = NULL;
  446. u32 crc_bits = 0;
  447. netdev_for_each_mc_addr(ha, net) {
  448. crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26;
  449. m_filter[crc_bits >> 3] |= BIT(crc_bits & 7);
  450. }
  451. aqc111_write_cmd_async(dev, AQ_ACCESS_MAC,
  452. SFR_MULTI_FILTER_ARRY,
  453. AQ_MCAST_FILTER_SIZE,
  454. AQ_MCAST_FILTER_SIZE, m_filter);
  455. aqc111_data->rxctl |= SFR_RX_CTL_AM;
  456. }
  457. aqc111_write16_cmd_async(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
  458. 2, &aqc111_data->rxctl);
  459. }
  460. static int aqc111_set_features(struct net_device *net,
  461. netdev_features_t features)
  462. {
  463. struct usbnet *dev = netdev_priv(net);
  464. struct aqc111_data *aqc111_data = dev->driver_priv;
  465. netdev_features_t changed = net->features ^ features;
  466. u16 reg16 = 0;
  467. u8 reg8 = 0;
  468. if (changed & NETIF_F_IP_CSUM) {
  469. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);
  470. reg8 ^= SFR_TXCOE_TCP | SFR_TXCOE_UDP;
  471. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL,
  472. 1, 1, &reg8);
  473. }
  474. if (changed & NETIF_F_IPV6_CSUM) {
  475. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);
  476. reg8 ^= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6;
  477. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL,
  478. 1, 1, &reg8);
  479. }
  480. if (changed & NETIF_F_RXCSUM) {
  481. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, &reg8);
  482. if (features & NETIF_F_RXCSUM) {
  483. aqc111_data->rx_checksum = 1;
  484. reg8 &= ~(SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
  485. SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6);
  486. } else {
  487. aqc111_data->rx_checksum = 0;
  488. reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
  489. SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6;
  490. }
  491. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL,
  492. 1, 1, &reg8);
  493. }
  494. if (changed & NETIF_F_HW_VLAN_CTAG_FILTER) {
  495. if (features & NETIF_F_HW_VLAN_CTAG_FILTER) {
  496. u16 i = 0;
  497. for (i = 0; i < 256; i++) {
  498. /* Address */
  499. reg8 = i;
  500. aqc111_write_cmd(dev, AQ_ACCESS_MAC,
  501. SFR_VLAN_ID_ADDRESS,
  502. 1, 1, &reg8);
  503. /* Data */
  504. aqc111_write16_cmd(dev, AQ_ACCESS_MAC,
  505. SFR_VLAN_ID_DATA0,
  506. 2, &reg16);
  507. reg8 = SFR_VLAN_CONTROL_WE;
  508. aqc111_write_cmd(dev, AQ_ACCESS_MAC,
  509. SFR_VLAN_ID_CONTROL,
  510. 1, 1, &reg8);
  511. }
  512. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
  513. 1, 1, &reg8);
  514. reg8 |= SFR_VLAN_CONTROL_VFE;
  515. aqc111_write_cmd(dev, AQ_ACCESS_MAC,
  516. SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  517. } else {
  518. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
  519. 1, 1, &reg8);
  520. reg8 &= ~SFR_VLAN_CONTROL_VFE;
  521. aqc111_write_cmd(dev, AQ_ACCESS_MAC,
  522. SFR_VLAN_ID_CONTROL, 1, 1, &reg8);
  523. }
  524. }
  525. return 0;
  526. }
  527. static const struct net_device_ops aqc111_netdev_ops = {
  528. .ndo_open = usbnet_open,
  529. .ndo_stop = usbnet_stop,
  530. .ndo_start_xmit = usbnet_start_xmit,
  531. .ndo_tx_timeout = usbnet_tx_timeout,
  532. .ndo_get_stats64 = dev_get_tstats64,
  533. .ndo_change_mtu = aqc111_change_mtu,
  534. .ndo_set_mac_address = aqc111_set_mac_addr,
  535. .ndo_validate_addr = eth_validate_addr,
  536. .ndo_vlan_rx_add_vid = aqc111_vlan_rx_add_vid,
  537. .ndo_vlan_rx_kill_vid = aqc111_vlan_rx_kill_vid,
  538. .ndo_set_rx_mode = aqc111_set_rx_mode,
  539. .ndo_set_features = aqc111_set_features,
  540. };
  541. static int aqc111_read_perm_mac(struct usbnet *dev)
  542. {
  543. u8 buf[ETH_ALEN];
  544. int ret;
  545. ret = aqc111_read_cmd(dev, AQ_FLASH_PARAMETERS, 0, 0, ETH_ALEN, buf);
  546. if (ret < 0)
  547. goto out;
  548. ether_addr_copy(dev->net->perm_addr, buf);
  549. return 0;
  550. out:
  551. return ret;
  552. }
  553. static void aqc111_read_fw_version(struct usbnet *dev,
  554. struct aqc111_data *aqc111_data)
  555. {
  556. aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MAJOR,
  557. 1, 1, &aqc111_data->fw_ver.major);
  558. aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_MINOR,
  559. 1, 1, &aqc111_data->fw_ver.minor);
  560. aqc111_read_cmd(dev, AQ_ACCESS_MAC, AQ_FW_VER_REV,
  561. 1, 1, &aqc111_data->fw_ver.rev);
  562. if (aqc111_data->fw_ver.major & 0x80)
  563. aqc111_data->fw_ver.major &= ~0x80;
  564. }
  565. static int aqc111_bind(struct usbnet *dev, struct usb_interface *intf)
  566. {
  567. struct usb_device *udev = interface_to_usbdev(intf);
  568. enum usb_device_speed usb_speed = udev->speed;
  569. struct aqc111_data *aqc111_data;
  570. int ret;
  571. /* Check if vendor configuration */
  572. if (udev->actconfig->desc.bConfigurationValue != 1) {
  573. usb_driver_set_configuration(udev, 1);
  574. return -ENODEV;
  575. }
  576. usb_reset_configuration(dev->udev);
  577. ret = usbnet_get_endpoints(dev, intf);
  578. if (ret < 0) {
  579. netdev_dbg(dev->net, "usbnet_get_endpoints failed");
  580. return ret;
  581. }
  582. aqc111_data = kzalloc_obj(*aqc111_data);
  583. if (!aqc111_data)
  584. return -ENOMEM;
  585. /* store aqc111_data pointer in device data field */
  586. dev->driver_priv = aqc111_data;
  587. /* Init the MAC address */
  588. ret = aqc111_read_perm_mac(dev);
  589. if (ret)
  590. goto out;
  591. eth_hw_addr_set(dev->net, dev->net->perm_addr);
  592. /* Set Rx urb size */
  593. dev->rx_urb_size = URB_SIZE;
  594. /* Set TX needed headroom & tailroom */
  595. dev->net->needed_headroom += sizeof(u64);
  596. dev->net->needed_tailroom += sizeof(u64);
  597. dev->net->max_mtu = 16334;
  598. dev->net->netdev_ops = &aqc111_netdev_ops;
  599. dev->net->ethtool_ops = &aqc111_ethtool_ops;
  600. if (usb_device_no_sg_constraint(dev->udev))
  601. dev->can_dma_sg = 1;
  602. dev->net->hw_features |= AQ_SUPPORT_HW_FEATURE;
  603. dev->net->features |= AQ_SUPPORT_FEATURE;
  604. dev->net->vlan_features |= AQ_SUPPORT_VLAN_FEATURE;
  605. netif_set_tso_max_size(dev->net, 65535);
  606. aqc111_read_fw_version(dev, aqc111_data);
  607. aqc111_data->autoneg = AUTONEG_ENABLE;
  608. aqc111_data->advertised_speed = (usb_speed == USB_SPEED_SUPER) ?
  609. SPEED_5000 : SPEED_1000;
  610. return 0;
  611. out:
  612. kfree(aqc111_data);
  613. return ret;
  614. }
  615. static void aqc111_unbind(struct usbnet *dev, struct usb_interface *intf)
  616. {
  617. struct aqc111_data *aqc111_data = dev->driver_priv;
  618. u16 reg16;
  619. /* Force bz */
  620. reg16 = SFR_PHYPWR_RSTCTL_BZ;
  621. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
  622. 2, &reg16);
  623. reg16 = 0;
  624. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
  625. 2, &reg16);
  626. /* Power down ethernet PHY */
  627. aqc111_data->phy_cfg &= ~AQ_ADV_MASK;
  628. aqc111_data->phy_cfg |= AQ_LOW_POWER;
  629. aqc111_data->phy_cfg &= ~AQ_PHY_POWER_EN;
  630. aqc111_write32_cmd_nopm(dev, AQ_PHY_OPS, 0, 0,
  631. &aqc111_data->phy_cfg);
  632. kfree(aqc111_data);
  633. }
  634. static void aqc111_status(struct usbnet *dev, struct urb *urb)
  635. {
  636. struct aqc111_data *aqc111_data = dev->driver_priv;
  637. u64 *event_data = NULL;
  638. int link = 0;
  639. if (urb->actual_length < sizeof(*event_data))
  640. return;
  641. event_data = urb->transfer_buffer;
  642. le64_to_cpus(event_data);
  643. if (*event_data & AQ_LS_MASK)
  644. link = 1;
  645. else
  646. link = 0;
  647. aqc111_data->link_speed = (*event_data & AQ_SPEED_MASK) >>
  648. AQ_SPEED_SHIFT;
  649. aqc111_data->link = link;
  650. if (netif_carrier_ok(dev->net) != link)
  651. usbnet_defer_kevent(dev, EVENT_LINK_RESET);
  652. }
  653. static void aqc111_configure_rx(struct usbnet *dev,
  654. struct aqc111_data *aqc111_data)
  655. {
  656. enum usb_device_speed usb_speed = dev->udev->speed;
  657. u16 link_speed = 0, usb_host = 0;
  658. u8 buf[5] = { 0 };
  659. u8 queue_num = 0;
  660. u16 reg16 = 0;
  661. u8 reg8 = 0;
  662. buf[0] = 0x00;
  663. buf[1] = 0xF8;
  664. buf[2] = 0x07;
  665. switch (aqc111_data->link_speed) {
  666. case AQ_INT_SPEED_5G:
  667. link_speed = 5000;
  668. reg8 = 0x05;
  669. reg16 = 0x001F;
  670. break;
  671. case AQ_INT_SPEED_2_5G:
  672. link_speed = 2500;
  673. reg16 = 0x003F;
  674. break;
  675. case AQ_INT_SPEED_1G:
  676. link_speed = 1000;
  677. reg16 = 0x009F;
  678. break;
  679. case AQ_INT_SPEED_100M:
  680. link_speed = 100;
  681. queue_num = 1;
  682. reg16 = 0x063F;
  683. buf[1] = 0xFB;
  684. buf[2] = 0x4;
  685. break;
  686. }
  687. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_INTER_PACKET_GAP_0,
  688. 1, 1, &reg8);
  689. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TX_PAUSE_RESEND_T, 3, 3, buf);
  690. switch (usb_speed) {
  691. case USB_SPEED_SUPER:
  692. usb_host = 3;
  693. break;
  694. case USB_SPEED_HIGH:
  695. usb_host = 2;
  696. break;
  697. case USB_SPEED_FULL:
  698. case USB_SPEED_LOW:
  699. usb_host = 1;
  700. queue_num = 0;
  701. break;
  702. default:
  703. usb_host = 0;
  704. break;
  705. }
  706. if (dev->net->mtu > 12500 && dev->net->mtu <= 16334)
  707. queue_num = 2; /* For Jumbo packet 16KB */
  708. memcpy(buf, &AQC111_BULKIN_SIZE[queue_num], 5);
  709. /* RX bulk configuration */
  710. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL, 5, 5, buf);
  711. /* Set high low water level */
  712. if (dev->net->mtu <= 4500)
  713. reg16 = 0x0810;
  714. else if (dev->net->mtu <= 9500)
  715. reg16 = 0x1020;
  716. else if (dev->net->mtu <= 12500)
  717. reg16 = 0x1420;
  718. else if (dev->net->mtu <= 16334)
  719. reg16 = 0x1A20;
  720. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_PAUSE_WATERLVL_LOW,
  721. 2, &reg16);
  722. netdev_info(dev->net, "Link Speed %d, USB %d", link_speed, usb_host);
  723. }
  724. static void aqc111_configure_csum_offload(struct usbnet *dev)
  725. {
  726. u8 reg8 = 0;
  727. if (dev->net->features & NETIF_F_RXCSUM) {
  728. reg8 |= SFR_RXCOE_IP | SFR_RXCOE_TCP | SFR_RXCOE_UDP |
  729. SFR_RXCOE_TCPV6 | SFR_RXCOE_UDPV6;
  730. }
  731. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_RXCOE_CTL, 1, 1, &reg8);
  732. reg8 = 0;
  733. if (dev->net->features & NETIF_F_IP_CSUM)
  734. reg8 |= SFR_TXCOE_IP | SFR_TXCOE_TCP | SFR_TXCOE_UDP;
  735. if (dev->net->features & NETIF_F_IPV6_CSUM)
  736. reg8 |= SFR_TXCOE_TCPV6 | SFR_TXCOE_UDPV6;
  737. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_TXCOE_CTL, 1, 1, &reg8);
  738. }
  739. static int aqc111_link_reset(struct usbnet *dev)
  740. {
  741. struct aqc111_data *aqc111_data = dev->driver_priv;
  742. u16 reg16 = 0;
  743. u8 reg8 = 0;
  744. if (aqc111_data->link == 1) { /* Link up */
  745. aqc111_configure_rx(dev, aqc111_data);
  746. /* Vlan Tag Filter */
  747. reg8 = SFR_VLAN_CONTROL_VSO;
  748. if (dev->net->features & NETIF_F_HW_VLAN_CTAG_FILTER)
  749. reg8 |= SFR_VLAN_CONTROL_VFE;
  750. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_VLAN_ID_CONTROL,
  751. 1, 1, &reg8);
  752. reg8 = 0x0;
  753. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,
  754. 1, 1, &reg8);
  755. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMTX_DMA_CONTROL,
  756. 1, 1, &reg8);
  757. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ARC_CTRL, 1, 1, &reg8);
  758. reg16 = SFR_RX_CTL_IPE | SFR_RX_CTL_AB;
  759. aqc111_data->rxctl = reg16;
  760. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);
  761. reg8 = SFR_RX_PATH_READY;
  762. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
  763. 1, 1, &reg8);
  764. reg8 = SFR_BULK_OUT_EFF_EN;
  765. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
  766. 1, 1, &reg8);
  767. reg16 = 0;
  768. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  769. 2, &reg16);
  770. reg16 = SFR_MEDIUM_XGMIIMODE | SFR_MEDIUM_FULL_DUPLEX;
  771. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  772. 2, &reg16);
  773. aqc111_configure_csum_offload(dev);
  774. aqc111_set_rx_mode(dev->net);
  775. aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  776. 2, &reg16);
  777. if (dev->net->mtu > 1500)
  778. reg16 |= SFR_MEDIUM_JUMBO_EN;
  779. reg16 |= SFR_MEDIUM_RECEIVE_EN | SFR_MEDIUM_RXFLOW_CTRLEN |
  780. SFR_MEDIUM_TXFLOW_CTRLEN;
  781. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  782. 2, &reg16);
  783. aqc111_data->rxctl |= SFR_RX_CTL_START;
  784. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
  785. 2, &aqc111_data->rxctl);
  786. netif_carrier_on(dev->net);
  787. } else {
  788. aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  789. 2, &reg16);
  790. reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
  791. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  792. 2, &reg16);
  793. aqc111_data->rxctl &= ~SFR_RX_CTL_START;
  794. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
  795. 2, &aqc111_data->rxctl);
  796. reg8 = SFR_BULK_OUT_FLUSH_EN | SFR_BULK_OUT_EFF_EN;
  797. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
  798. 1, 1, &reg8);
  799. reg8 = SFR_BULK_OUT_EFF_EN;
  800. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
  801. 1, 1, &reg8);
  802. netif_carrier_off(dev->net);
  803. }
  804. return 0;
  805. }
  806. static int aqc111_reset(struct usbnet *dev)
  807. {
  808. struct aqc111_data *aqc111_data = dev->driver_priv;
  809. u8 reg8 = 0;
  810. dev->rx_urb_size = URB_SIZE;
  811. if (usb_device_no_sg_constraint(dev->udev))
  812. dev->can_dma_sg = 1;
  813. dev->net->hw_features |= AQ_SUPPORT_HW_FEATURE;
  814. dev->net->features |= AQ_SUPPORT_FEATURE;
  815. dev->net->vlan_features |= AQ_SUPPORT_VLAN_FEATURE;
  816. /* Power up ethernet PHY */
  817. aqc111_data->phy_cfg = AQ_PHY_POWER_EN;
  818. aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0,
  819. &aqc111_data->phy_cfg);
  820. /* Set the MAC address */
  821. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_NODE_ID, ETH_ALEN,
  822. ETH_ALEN, dev->net->dev_addr);
  823. reg8 = 0xFF;
  824. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK, 1, 1, &reg8);
  825. reg8 = 0x0;
  826. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_SWP_CTRL, 1, 1, &reg8);
  827. aqc111_read_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);
  828. reg8 &= ~(SFR_MONITOR_MODE_EPHYRW | SFR_MONITOR_MODE_RWLC |
  829. SFR_MONITOR_MODE_RWMP | SFR_MONITOR_MODE_RWWF |
  830. SFR_MONITOR_MODE_RW_FLAG);
  831. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_MONITOR_MODE, 1, 1, &reg8);
  832. netif_carrier_off(dev->net);
  833. /* Phy advertise */
  834. aqc111_set_phy_speed(dev, aqc111_data->autoneg,
  835. aqc111_data->advertised_speed);
  836. return 0;
  837. }
  838. static int aqc111_stop(struct usbnet *dev)
  839. {
  840. struct aqc111_data *aqc111_data = dev->driver_priv;
  841. u16 reg16 = 0;
  842. aqc111_read16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  843. 2, &reg16);
  844. reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
  845. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  846. 2, &reg16);
  847. reg16 = 0;
  848. aqc111_write16_cmd(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);
  849. /* Put PHY to low power*/
  850. aqc111_data->phy_cfg |= AQ_LOW_POWER;
  851. aqc111_write32_cmd(dev, AQ_PHY_OPS, 0, 0,
  852. &aqc111_data->phy_cfg);
  853. netif_carrier_off(dev->net);
  854. return 0;
  855. }
  856. static void aqc111_rx_checksum(struct sk_buff *skb, u64 pkt_desc)
  857. {
  858. u32 pkt_type = 0;
  859. skb->ip_summed = CHECKSUM_NONE;
  860. /* checksum error bit is set */
  861. if (pkt_desc & AQ_RX_PD_L4_ERR || pkt_desc & AQ_RX_PD_L3_ERR)
  862. return;
  863. pkt_type = pkt_desc & AQ_RX_PD_L4_TYPE_MASK;
  864. /* It must be a TCP or UDP packet with a valid checksum */
  865. if (pkt_type == AQ_RX_PD_L4_TCP || pkt_type == AQ_RX_PD_L4_UDP)
  866. skb->ip_summed = CHECKSUM_UNNECESSARY;
  867. }
  868. static int aqc111_rx_fixup(struct usbnet *dev, struct sk_buff *skb)
  869. {
  870. struct aqc111_data *aqc111_data = dev->driver_priv;
  871. struct sk_buff *new_skb = NULL;
  872. u32 pkt_total_offset = 0;
  873. u64 *pkt_desc_ptr = NULL;
  874. u32 start_of_descs = 0;
  875. u32 desc_offset = 0; /*RX Header Offset*/
  876. u16 pkt_count = 0;
  877. u64 desc_hdr = 0;
  878. u16 vlan_tag = 0;
  879. u32 skb_len;
  880. if (!skb)
  881. goto err;
  882. skb_len = skb->len;
  883. if (skb_len < sizeof(desc_hdr))
  884. goto err;
  885. /* RX Descriptor Header */
  886. skb_trim(skb, skb_len - sizeof(desc_hdr));
  887. desc_hdr = le64_to_cpup((u64 *)skb_tail_pointer(skb));
  888. /* Check these packets */
  889. desc_offset = (desc_hdr & AQ_RX_DH_DESC_OFFSET_MASK) >>
  890. AQ_RX_DH_DESC_OFFSET_SHIFT;
  891. pkt_count = desc_hdr & AQ_RX_DH_PKT_CNT_MASK;
  892. start_of_descs = skb_len - ((pkt_count + 1) * sizeof(desc_hdr));
  893. /* self check descs position */
  894. if (start_of_descs != desc_offset)
  895. goto err;
  896. /* self check desc_offset from header and make sure that the
  897. * bounds of the metadata array are inside the SKB
  898. */
  899. if (pkt_count * 2 + desc_offset >= skb_len)
  900. goto err;
  901. /* Packets must not overlap the metadata array */
  902. skb_trim(skb, desc_offset);
  903. if (pkt_count == 0)
  904. goto err;
  905. /* Get the first RX packet descriptor */
  906. pkt_desc_ptr = (u64 *)(skb->data + desc_offset);
  907. while (pkt_count--) {
  908. u64 pkt_desc = le64_to_cpup(pkt_desc_ptr);
  909. u32 pkt_len_with_padd = 0;
  910. u32 pkt_len = 0;
  911. pkt_len = (u32)((pkt_desc & AQ_RX_PD_LEN_MASK) >>
  912. AQ_RX_PD_LEN_SHIFT);
  913. pkt_len_with_padd = ((pkt_len + 7) & 0x7FFF8);
  914. pkt_total_offset += pkt_len_with_padd;
  915. if (pkt_total_offset > desc_offset ||
  916. (pkt_count == 0 && pkt_total_offset != desc_offset)) {
  917. goto err;
  918. }
  919. if (pkt_desc & AQ_RX_PD_DROP ||
  920. !(pkt_desc & AQ_RX_PD_RX_OK) ||
  921. pkt_len > (dev->hard_mtu + AQ_RX_HW_PAD)) {
  922. skb_pull(skb, pkt_len_with_padd);
  923. /* Next RX Packet Descriptor */
  924. pkt_desc_ptr++;
  925. continue;
  926. }
  927. new_skb = netdev_alloc_skb_ip_align(dev->net, pkt_len);
  928. if (!new_skb)
  929. goto err;
  930. skb_put(new_skb, pkt_len);
  931. memcpy(new_skb->data, skb->data, pkt_len);
  932. skb_pull(new_skb, AQ_RX_HW_PAD);
  933. if (aqc111_data->rx_checksum)
  934. aqc111_rx_checksum(new_skb, pkt_desc);
  935. if (pkt_desc & AQ_RX_PD_VLAN) {
  936. vlan_tag = pkt_desc >> AQ_RX_PD_VLAN_SHIFT;
  937. __vlan_hwaccel_put_tag(new_skb, htons(ETH_P_8021Q),
  938. vlan_tag & VLAN_VID_MASK);
  939. }
  940. usbnet_skb_return(dev, new_skb);
  941. if (pkt_count == 0)
  942. break;
  943. skb_pull(skb, pkt_len_with_padd);
  944. /* Next RX Packet Header */
  945. pkt_desc_ptr++;
  946. new_skb = NULL;
  947. }
  948. return 1;
  949. err:
  950. return 0;
  951. }
  952. static struct sk_buff *aqc111_tx_fixup(struct usbnet *dev, struct sk_buff *skb,
  953. gfp_t flags)
  954. {
  955. int frame_size = dev->maxpacket;
  956. struct sk_buff *new_skb = NULL;
  957. u64 *tx_desc_ptr = NULL;
  958. int padding_size = 0;
  959. int headroom = 0;
  960. int tailroom = 0;
  961. u64 tx_desc = 0;
  962. u16 tci = 0;
  963. /*Length of actual data*/
  964. tx_desc |= skb->len & AQ_TX_DESC_LEN_MASK;
  965. /* TSO MSS */
  966. tx_desc |= ((u64)(skb_shinfo(skb)->gso_size & AQ_TX_DESC_MSS_MASK)) <<
  967. AQ_TX_DESC_MSS_SHIFT;
  968. headroom = (skb->len + sizeof(tx_desc)) % 8;
  969. if (headroom != 0)
  970. padding_size = 8 - headroom;
  971. if (((skb->len + sizeof(tx_desc) + padding_size) % frame_size) == 0) {
  972. padding_size += 8;
  973. tx_desc |= AQ_TX_DESC_DROP_PADD;
  974. }
  975. /* Vlan Tag */
  976. if (vlan_get_tag(skb, &tci) >= 0) {
  977. tx_desc |= AQ_TX_DESC_VLAN;
  978. tx_desc |= ((u64)tci & AQ_TX_DESC_VLAN_MASK) <<
  979. AQ_TX_DESC_VLAN_SHIFT;
  980. }
  981. if (!dev->can_dma_sg && (dev->net->features & NETIF_F_SG) &&
  982. skb_linearize(skb))
  983. return NULL;
  984. headroom = skb_headroom(skb);
  985. tailroom = skb_tailroom(skb);
  986. if (!(headroom >= sizeof(tx_desc) && tailroom >= padding_size)) {
  987. new_skb = skb_copy_expand(skb, sizeof(tx_desc),
  988. padding_size, flags);
  989. dev_kfree_skb_any(skb);
  990. skb = new_skb;
  991. if (!skb)
  992. return NULL;
  993. }
  994. if (padding_size != 0)
  995. skb_put_zero(skb, padding_size);
  996. /* Copy TX header */
  997. tx_desc_ptr = skb_push(skb, sizeof(tx_desc));
  998. *tx_desc_ptr = cpu_to_le64(tx_desc);
  999. usbnet_set_skb_tx_stats(skb, 1, 0);
  1000. return skb;
  1001. }
  1002. static const struct driver_info aqc111_info = {
  1003. .description = "Aquantia AQtion USB to 5GbE Controller",
  1004. .bind = aqc111_bind,
  1005. .unbind = aqc111_unbind,
  1006. .status = aqc111_status,
  1007. .link_reset = aqc111_link_reset,
  1008. .reset = aqc111_reset,
  1009. .stop = aqc111_stop,
  1010. .flags = FLAG_ETHER | FLAG_FRAMING_AX |
  1011. FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
  1012. .rx_fixup = aqc111_rx_fixup,
  1013. .tx_fixup = aqc111_tx_fixup,
  1014. };
  1015. #define ASIX111_DESC \
  1016. "ASIX USB 3.1 Gen1 to 5G Multi-Gigabit Ethernet Adapter"
  1017. static const struct driver_info asix111_info = {
  1018. .description = ASIX111_DESC,
  1019. .bind = aqc111_bind,
  1020. .unbind = aqc111_unbind,
  1021. .status = aqc111_status,
  1022. .link_reset = aqc111_link_reset,
  1023. .reset = aqc111_reset,
  1024. .stop = aqc111_stop,
  1025. .flags = FLAG_ETHER | FLAG_FRAMING_AX |
  1026. FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
  1027. .rx_fixup = aqc111_rx_fixup,
  1028. .tx_fixup = aqc111_tx_fixup,
  1029. };
  1030. #undef ASIX111_DESC
  1031. #define ASIX112_DESC \
  1032. "ASIX USB 3.1 Gen1 to 2.5G Multi-Gigabit Ethernet Adapter"
  1033. static const struct driver_info asix112_info = {
  1034. .description = ASIX112_DESC,
  1035. .bind = aqc111_bind,
  1036. .unbind = aqc111_unbind,
  1037. .status = aqc111_status,
  1038. .link_reset = aqc111_link_reset,
  1039. .reset = aqc111_reset,
  1040. .stop = aqc111_stop,
  1041. .flags = FLAG_ETHER | FLAG_FRAMING_AX |
  1042. FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
  1043. .rx_fixup = aqc111_rx_fixup,
  1044. .tx_fixup = aqc111_tx_fixup,
  1045. };
  1046. #undef ASIX112_DESC
  1047. static const struct driver_info trendnet_info = {
  1048. .description = "USB-C 3.1 to 5GBASE-T Ethernet Adapter",
  1049. .bind = aqc111_bind,
  1050. .unbind = aqc111_unbind,
  1051. .status = aqc111_status,
  1052. .link_reset = aqc111_link_reset,
  1053. .reset = aqc111_reset,
  1054. .stop = aqc111_stop,
  1055. .flags = FLAG_ETHER | FLAG_FRAMING_AX |
  1056. FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
  1057. .rx_fixup = aqc111_rx_fixup,
  1058. .tx_fixup = aqc111_tx_fixup,
  1059. };
  1060. static const struct driver_info qnap_info = {
  1061. .description = "QNAP QNA-UC5G1T USB to 5GbE Adapter",
  1062. .bind = aqc111_bind,
  1063. .unbind = aqc111_unbind,
  1064. .status = aqc111_status,
  1065. .link_reset = aqc111_link_reset,
  1066. .reset = aqc111_reset,
  1067. .stop = aqc111_stop,
  1068. .flags = FLAG_ETHER | FLAG_FRAMING_AX |
  1069. FLAG_AVOID_UNLINK_URBS | FLAG_MULTI_PACKET,
  1070. .rx_fixup = aqc111_rx_fixup,
  1071. .tx_fixup = aqc111_tx_fixup,
  1072. };
  1073. static int aqc111_suspend(struct usb_interface *intf, pm_message_t message)
  1074. {
  1075. struct usbnet *dev = usb_get_intfdata(intf);
  1076. struct aqc111_data *aqc111_data = dev->driver_priv;
  1077. u16 temp_rx_ctrl = 0x00;
  1078. u16 reg16;
  1079. u8 reg8;
  1080. usbnet_suspend(intf, message);
  1081. aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);
  1082. temp_rx_ctrl = reg16;
  1083. /* Stop RX operations*/
  1084. reg16 &= ~SFR_RX_CTL_START;
  1085. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);
  1086. /* Force bz */
  1087. aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
  1088. 2, &reg16);
  1089. reg16 |= SFR_PHYPWR_RSTCTL_BZ;
  1090. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_PHYPWR_RSTCTL,
  1091. 2, &reg16);
  1092. reg8 = SFR_BULK_OUT_EFF_EN;
  1093. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BULK_OUT_CTRL,
  1094. 1, 1, &reg8);
  1095. temp_rx_ctrl &= ~(SFR_RX_CTL_START | SFR_RX_CTL_RF_WAK |
  1096. SFR_RX_CTL_AP | SFR_RX_CTL_AM);
  1097. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
  1098. 2, &temp_rx_ctrl);
  1099. reg8 = 0x00;
  1100. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
  1101. 1, 1, &reg8);
  1102. if (aqc111_data->wol_flags) {
  1103. struct aqc111_wol_cfg wol_cfg;
  1104. memset(&wol_cfg, 0, sizeof(struct aqc111_wol_cfg));
  1105. aqc111_data->phy_cfg |= AQ_WOL;
  1106. ether_addr_copy(wol_cfg.hw_addr, dev->net->dev_addr);
  1107. wol_cfg.flags = aqc111_data->wol_flags;
  1108. temp_rx_ctrl |= (SFR_RX_CTL_AB | SFR_RX_CTL_START);
  1109. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL,
  1110. 2, &temp_rx_ctrl);
  1111. reg8 = 0x00;
  1112. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK,
  1113. 1, 1, &reg8);
  1114. reg8 = SFR_BMRX_DMA_EN;
  1115. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL,
  1116. 1, 1, &reg8);
  1117. reg8 = SFR_RX_PATH_READY;
  1118. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
  1119. 1, 1, &reg8);
  1120. reg8 = 0x07;
  1121. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QCTRL,
  1122. 1, 1, &reg8);
  1123. reg8 = 0x00;
  1124. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC,
  1125. SFR_RX_BULKIN_QTIMR_LOW, 1, 1, &reg8);
  1126. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC,
  1127. SFR_RX_BULKIN_QTIMR_HIGH, 1, 1, &reg8);
  1128. reg8 = 0xFF;
  1129. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QSIZE,
  1130. 1, 1, &reg8);
  1131. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_BULKIN_QIFG,
  1132. 1, 1, &reg8);
  1133. aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC,
  1134. SFR_MEDIUM_STATUS_MODE, 2, &reg16);
  1135. reg16 |= SFR_MEDIUM_RECEIVE_EN;
  1136. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC,
  1137. SFR_MEDIUM_STATUS_MODE, 2, &reg16);
  1138. aqc111_write_cmd_nopm(dev, AQ_WOL_CFG, 0, 0,
  1139. WOL_CFG_SIZE, &wol_cfg);
  1140. aqc111_write32_cmd_nopm(dev, AQ_PHY_OPS, 0, 0,
  1141. &aqc111_data->phy_cfg);
  1142. } else {
  1143. aqc111_data->phy_cfg |= AQ_LOW_POWER;
  1144. aqc111_write32_cmd_nopm(dev, AQ_PHY_OPS, 0, 0,
  1145. &aqc111_data->phy_cfg);
  1146. /* Disable RX path */
  1147. aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC,
  1148. SFR_MEDIUM_STATUS_MODE, 2, &reg16);
  1149. reg16 &= ~SFR_MEDIUM_RECEIVE_EN;
  1150. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC,
  1151. SFR_MEDIUM_STATUS_MODE, 2, &reg16);
  1152. }
  1153. return 0;
  1154. }
  1155. static int aqc111_resume(struct usb_interface *intf)
  1156. {
  1157. struct usbnet *dev = usb_get_intfdata(intf);
  1158. struct aqc111_data *aqc111_data = dev->driver_priv;
  1159. u16 reg16;
  1160. u8 reg8;
  1161. netif_carrier_off(dev->net);
  1162. /* Power up ethernet PHY */
  1163. aqc111_data->phy_cfg |= AQ_PHY_POWER_EN;
  1164. aqc111_data->phy_cfg &= ~AQ_LOW_POWER;
  1165. aqc111_data->phy_cfg &= ~AQ_WOL;
  1166. reg8 = 0xFF;
  1167. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_BM_INT_MASK,
  1168. 1, 1, &reg8);
  1169. /* Configure RX control register => start operation */
  1170. reg16 = aqc111_data->rxctl;
  1171. reg16 &= ~SFR_RX_CTL_START;
  1172. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);
  1173. reg16 |= SFR_RX_CTL_START;
  1174. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_RX_CTL, 2, &reg16);
  1175. aqc111_set_phy_speed(dev, aqc111_data->autoneg,
  1176. aqc111_data->advertised_speed);
  1177. aqc111_read16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  1178. 2, &reg16);
  1179. reg16 |= SFR_MEDIUM_RECEIVE_EN;
  1180. aqc111_write16_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_MEDIUM_STATUS_MODE,
  1181. 2, &reg16);
  1182. reg8 = SFR_RX_PATH_READY;
  1183. aqc111_write_cmd_nopm(dev, AQ_ACCESS_MAC, SFR_ETH_MAC_PATH,
  1184. 1, 1, &reg8);
  1185. reg8 = 0x0;
  1186. aqc111_write_cmd(dev, AQ_ACCESS_MAC, SFR_BMRX_DMA_CONTROL, 1, 1, &reg8);
  1187. return usbnet_resume(intf);
  1188. }
  1189. #define AQC111_USB_ETH_DEV(vid, pid, table) \
  1190. USB_DEVICE_INTERFACE_CLASS((vid), (pid), USB_CLASS_VENDOR_SPEC), \
  1191. .driver_info = (unsigned long)&(table) \
  1192. }, \
  1193. { \
  1194. USB_DEVICE_AND_INTERFACE_INFO((vid), (pid), \
  1195. USB_CLASS_COMM, \
  1196. USB_CDC_SUBCLASS_ETHERNET, \
  1197. USB_CDC_PROTO_NONE), \
  1198. .driver_info = (unsigned long)&(table),
  1199. static const struct usb_device_id products[] = {
  1200. {AQC111_USB_ETH_DEV(0x2eca, 0xc101, aqc111_info)},
  1201. {AQC111_USB_ETH_DEV(0x0b95, 0x2790, asix111_info)},
  1202. {AQC111_USB_ETH_DEV(0x0b95, 0x2791, asix112_info)},
  1203. {AQC111_USB_ETH_DEV(0x20f4, 0xe05a, trendnet_info)},
  1204. {AQC111_USB_ETH_DEV(0x1c04, 0x0015, qnap_info)},
  1205. { },/* END */
  1206. };
  1207. MODULE_DEVICE_TABLE(usb, products);
  1208. static struct usb_driver aq_driver = {
  1209. .name = "aqc111",
  1210. .id_table = products,
  1211. .probe = usbnet_probe,
  1212. .suspend = aqc111_suspend,
  1213. .resume = aqc111_resume,
  1214. .disconnect = usbnet_disconnect,
  1215. };
  1216. module_usb_driver(aq_driver);
  1217. MODULE_DESCRIPTION("Aquantia AQtion USB to 5/2.5GbE Controllers");
  1218. MODULE_LICENSE("GPL");