marvell.c 105 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * drivers/net/phy/marvell.c
  4. *
  5. * Driver for Marvell PHYs
  6. *
  7. * Author: Andy Fleming
  8. *
  9. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  10. *
  11. * Copyright (c) 2013 Michael Stapelberg <michael@stapelberg.de>
  12. */
  13. #include <linux/kernel.h>
  14. #include <linux/string.h>
  15. #include <linux/ctype.h>
  16. #include <linux/errno.h>
  17. #include <linux/unistd.h>
  18. #include <linux/hwmon.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/init.h>
  21. #include <linux/delay.h>
  22. #include <linux/netdevice.h>
  23. #include <linux/etherdevice.h>
  24. #include <linux/skbuff.h>
  25. #include <linux/spinlock.h>
  26. #include <linux/mm.h>
  27. #include <linux/module.h>
  28. #include <linux/mii.h>
  29. #include <linux/ethtool.h>
  30. #include <linux/ethtool_netlink.h>
  31. #include <linux/phy.h>
  32. #include <linux/phy_port.h>
  33. #include <linux/marvell_phy.h>
  34. #include <linux/bitfield.h>
  35. #include <linux/of.h>
  36. #include <linux/io.h>
  37. #include <asm/irq.h>
  38. #include <linux/uaccess.h>
  39. #define MII_MARVELL_PHY_PAGE 22
  40. #define MII_MARVELL_COPPER_PAGE 0x00
  41. #define MII_MARVELL_FIBER_PAGE 0x01
  42. #define MII_MARVELL_MSCR_PAGE 0x02
  43. #define MII_MARVELL_LED_PAGE 0x03
  44. #define MII_MARVELL_VCT5_PAGE 0x05
  45. #define MII_MARVELL_MISC_TEST_PAGE 0x06
  46. #define MII_MARVELL_VCT7_PAGE 0x07
  47. #define MII_MARVELL_WOL_PAGE 0x11
  48. #define MII_MARVELL_MODE_PAGE 0x12
  49. #define MII_M1011_IEVENT 0x13
  50. #define MII_M1011_IEVENT_CLEAR 0x0000
  51. #define MII_M1011_IMASK 0x12
  52. #define MII_M1011_IMASK_INIT 0x6400
  53. #define MII_M1011_IMASK_CLEAR 0x0000
  54. #define MII_M1011_PHY_SCR 0x10
  55. #define MII_M1011_PHY_SCR_DOWNSHIFT_EN BIT(11)
  56. #define MII_M1011_PHY_SCR_DOWNSHIFT_MASK GENMASK(14, 12)
  57. #define MII_M1011_PHY_SCR_DOWNSHIFT_MAX 8
  58. #define MII_M1011_PHY_SCR_MDI (0x0 << 5)
  59. #define MII_M1011_PHY_SCR_MDI_X (0x1 << 5)
  60. #define MII_M1011_PHY_SCR_AUTO_CROSS (0x3 << 5)
  61. #define MII_M1011_PHY_SSR 0x11
  62. #define MII_M1011_PHY_SSR_DOWNSHIFT BIT(5)
  63. #define MII_M1111_PHY_LED_CONTROL 0x18
  64. #define MII_M1111_PHY_LED_DIRECT 0x4100
  65. #define MII_M1111_PHY_LED_COMBINE 0x411c
  66. #define MII_M1111_PHY_EXT_CR 0x14
  67. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK GENMASK(11, 9)
  68. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX 8
  69. #define MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN BIT(8)
  70. #define MII_M1111_RGMII_RX_DELAY BIT(7)
  71. #define MII_M1111_RGMII_TX_DELAY BIT(1)
  72. #define MII_M1111_PHY_EXT_SR 0x1b
  73. #define MII_M1111_HWCFG_MODE_MASK 0xf
  74. #define MII_M1111_HWCFG_MODE_FIBER_RGMII 0x3
  75. #define MII_M1111_HWCFG_MODE_SGMII_NO_CLK 0x4
  76. #define MII_M1111_HWCFG_MODE_RTBI 0x7
  77. #define MII_M1111_HWCFG_MODE_COPPER_1000X_AN 0x8
  78. #define MII_M1111_HWCFG_MODE_COPPER_RTBI 0x9
  79. #define MII_M1111_HWCFG_MODE_COPPER_RGMII 0xb
  80. #define MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN 0xc
  81. #define MII_M1111_HWCFG_SERIAL_AN_BYPASS BIT(12)
  82. #define MII_M1111_HWCFG_FIBER_COPPER_RES BIT(13)
  83. #define MII_M1111_HWCFG_FIBER_COPPER_AUTO BIT(15)
  84. #define MII_88E1121_PHY_MSCR_REG 21
  85. #define MII_88E1121_PHY_MSCR_RX_DELAY BIT(5)
  86. #define MII_88E1121_PHY_MSCR_TX_DELAY BIT(4)
  87. #define MII_88E1121_PHY_MSCR_DELAY_MASK (BIT(5) | BIT(4))
  88. #define MII_88E1121_MISC_TEST 0x1a
  89. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK 0x1f00
  90. #define MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT 8
  91. #define MII_88E1510_MISC_TEST_TEMP_IRQ_EN BIT(7)
  92. #define MII_88E1510_MISC_TEST_TEMP_IRQ BIT(6)
  93. #define MII_88E1121_MISC_TEST_TEMP_SENSOR_EN BIT(5)
  94. #define MII_88E1121_MISC_TEST_TEMP_MASK 0x1f
  95. #define MII_88E1510_TEMP_SENSOR 0x1b
  96. #define MII_88E1510_TEMP_SENSOR_MASK 0xff
  97. #define MII_88E1540_COPPER_CTRL3 0x1a
  98. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK GENMASK(11, 10)
  99. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS 0
  100. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS 1
  101. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS 2
  102. #define MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS 3
  103. #define MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN BIT(9)
  104. #define MII_88E6390_MISC_TEST 0x1b
  105. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S (0x0 << 14)
  106. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE (0x1 << 14)
  107. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_ONESHOT (0x2 << 14)
  108. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE (0x3 << 14)
  109. #define MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK (0x3 << 14)
  110. #define MII_88E6393_MISC_TEST_SAMPLES_2048 (0x0 << 11)
  111. #define MII_88E6393_MISC_TEST_SAMPLES_4096 (0x1 << 11)
  112. #define MII_88E6393_MISC_TEST_SAMPLES_8192 (0x2 << 11)
  113. #define MII_88E6393_MISC_TEST_SAMPLES_16384 (0x3 << 11)
  114. #define MII_88E6393_MISC_TEST_SAMPLES_MASK (0x3 << 11)
  115. #define MII_88E6393_MISC_TEST_RATE_2_3MS (0x5 << 8)
  116. #define MII_88E6393_MISC_TEST_RATE_6_4MS (0x6 << 8)
  117. #define MII_88E6393_MISC_TEST_RATE_11_9MS (0x7 << 8)
  118. #define MII_88E6393_MISC_TEST_RATE_MASK (0x7 << 8)
  119. #define MII_88E6390_TEMP_SENSOR 0x1c
  120. #define MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK 0xff00
  121. #define MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT 8
  122. #define MII_88E6390_TEMP_SENSOR_MASK 0xff
  123. #define MII_88E6390_TEMP_SENSOR_SAMPLES 10
  124. #define MII_88E1318S_PHY_MSCR1_REG 16
  125. #define MII_88E1318S_PHY_MSCR1_PAD_ODD BIT(6)
  126. /* Copper Specific Interrupt Enable Register */
  127. #define MII_88E1318S_PHY_CSIER 0x12
  128. /* WOL Event Interrupt Enable */
  129. #define MII_88E1318S_PHY_CSIER_WOL_EIE BIT(7)
  130. #define MII_88E1318S_PHY_LED_FUNC 0x10
  131. #define MII_88E1318S_PHY_LED_FUNC_OFF (0x8)
  132. #define MII_88E1318S_PHY_LED_FUNC_ON (0x9)
  133. #define MII_88E1318S_PHY_LED_FUNC_HI_Z (0xa)
  134. #define MII_88E1318S_PHY_LED_FUNC_BLINK (0xb)
  135. #define MII_88E1318S_PHY_LED_TCR 0x12
  136. #define MII_88E1318S_PHY_LED_TCR_FORCE_INT BIT(15)
  137. #define MII_88E1318S_PHY_LED_TCR_INTn_ENABLE BIT(7)
  138. #define MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW BIT(11)
  139. /* Magic Packet MAC address registers */
  140. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD2 0x17
  141. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD1 0x18
  142. #define MII_88E1318S_PHY_MAGIC_PACKET_WORD0 0x19
  143. #define MII_88E1318S_PHY_WOL_CTRL 0x10
  144. #define MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS BIT(12)
  145. #define MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE BIT(13)
  146. #define MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE BIT(14)
  147. #define MII_PHY_LED_CTRL 16
  148. #define MII_88E1121_PHY_LED_DEF 0x0030
  149. #define MII_88E1510_PHY_LED_DEF 0x1177
  150. #define MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE 0x1040
  151. #define MII_M1011_PHY_STATUS 0x11
  152. #define MII_M1011_PHY_STATUS_1000 0x8000
  153. #define MII_M1011_PHY_STATUS_100 0x4000
  154. #define MII_M1011_PHY_STATUS_SPD_MASK 0xc000
  155. #define MII_M1011_PHY_STATUS_FULLDUPLEX 0x2000
  156. #define MII_M1011_PHY_STATUS_RESOLVED 0x0800
  157. #define MII_M1011_PHY_STATUS_LINK 0x0400
  158. #define MII_M1011_PHY_STATUS_MDIX BIT(6)
  159. #define MII_88E3016_PHY_SPEC_CTRL 0x10
  160. #define MII_88E3016_DISABLE_SCRAMBLER 0x0200
  161. #define MII_88E3016_AUTO_MDIX_CROSSOVER 0x0030
  162. #define MII_88E1510_GEN_CTRL_REG_1 0x14
  163. #define MII_88E1510_GEN_CTRL_REG_1_MODE_MASK 0x7
  164. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII 0x0 /* RGMII to copper */
  165. #define MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII 0x1 /* SGMII to copper */
  166. /* RGMII to 1000BASE-X */
  167. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X 0x2
  168. /* RGMII to 100BASE-FX */
  169. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX 0x3
  170. /* RGMII to SGMII */
  171. #define MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII 0x4
  172. #define MII_88E1510_GEN_CTRL_REG_1_RESET 0x8000 /* Soft reset */
  173. #define MII_88E1510_MSCR_2 0x15
  174. #define MII_VCT5_TX_RX_MDI0_COUPLING 0x10
  175. #define MII_VCT5_TX_RX_MDI1_COUPLING 0x11
  176. #define MII_VCT5_TX_RX_MDI2_COUPLING 0x12
  177. #define MII_VCT5_TX_RX_MDI3_COUPLING 0x13
  178. #define MII_VCT5_TX_RX_AMPLITUDE_MASK 0x7f00
  179. #define MII_VCT5_TX_RX_AMPLITUDE_SHIFT 8
  180. #define MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION BIT(15)
  181. #define MII_VCT5_CTRL 0x17
  182. #define MII_VCT5_CTRL_ENABLE BIT(15)
  183. #define MII_VCT5_CTRL_COMPLETE BIT(14)
  184. #define MII_VCT5_CTRL_TX_SAME_CHANNEL (0x0 << 11)
  185. #define MII_VCT5_CTRL_TX0_CHANNEL (0x4 << 11)
  186. #define MII_VCT5_CTRL_TX1_CHANNEL (0x5 << 11)
  187. #define MII_VCT5_CTRL_TX2_CHANNEL (0x6 << 11)
  188. #define MII_VCT5_CTRL_TX3_CHANNEL (0x7 << 11)
  189. #define MII_VCT5_CTRL_SAMPLES_2 (0x0 << 8)
  190. #define MII_VCT5_CTRL_SAMPLES_4 (0x1 << 8)
  191. #define MII_VCT5_CTRL_SAMPLES_8 (0x2 << 8)
  192. #define MII_VCT5_CTRL_SAMPLES_16 (0x3 << 8)
  193. #define MII_VCT5_CTRL_SAMPLES_32 (0x4 << 8)
  194. #define MII_VCT5_CTRL_SAMPLES_64 (0x5 << 8)
  195. #define MII_VCT5_CTRL_SAMPLES_128 (0x6 << 8)
  196. #define MII_VCT5_CTRL_SAMPLES_DEFAULT (0x6 << 8)
  197. #define MII_VCT5_CTRL_SAMPLES_256 (0x7 << 8)
  198. #define MII_VCT5_CTRL_SAMPLES_SHIFT 8
  199. #define MII_VCT5_CTRL_MODE_MAXIMUM_PEEK (0x0 << 6)
  200. #define MII_VCT5_CTRL_MODE_FIRST_LAST_PEEK (0x1 << 6)
  201. #define MII_VCT5_CTRL_MODE_OFFSET (0x2 << 6)
  202. #define MII_VCT5_CTRL_SAMPLE_POINT (0x3 << 6)
  203. #define MII_VCT5_CTRL_PEEK_HYST_DEFAULT 3
  204. #define MII_VCT5_SAMPLE_POINT_DISTANCE 0x18
  205. #define MII_VCT5_SAMPLE_POINT_DISTANCE_MAX 511
  206. #define MII_VCT5_TX_PULSE_CTRL 0x1c
  207. #define MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN BIT(12)
  208. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS (0x0 << 10)
  209. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_96nS (0x1 << 10)
  210. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_64nS (0x2 << 10)
  211. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS (0x3 << 10)
  212. #define MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_SHIFT 10
  213. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_1000mV (0x0 << 8)
  214. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_750mV (0x1 << 8)
  215. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_500mV (0x2 << 8)
  216. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_250mV (0x3 << 8)
  217. #define MII_VCT5_TX_PULSE_CTRL_PULSE_AMPLITUDE_SHIFT 8
  218. #define MII_VCT5_TX_PULSE_CTRL_MAX_AMP BIT(7)
  219. #define MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV (0x6 << 0)
  220. /* For TDR measurements less than 11 meters, a short pulse should be
  221. * used.
  222. */
  223. #define TDR_SHORT_CABLE_LENGTH 11
  224. #define MII_VCT7_PAIR_0_DISTANCE 0x10
  225. #define MII_VCT7_PAIR_1_DISTANCE 0x11
  226. #define MII_VCT7_PAIR_2_DISTANCE 0x12
  227. #define MII_VCT7_PAIR_3_DISTANCE 0x13
  228. #define MII_VCT7_RESULTS 0x14
  229. #define MII_VCT7_RESULTS_PAIR3_MASK 0xf000
  230. #define MII_VCT7_RESULTS_PAIR2_MASK 0x0f00
  231. #define MII_VCT7_RESULTS_PAIR1_MASK 0x00f0
  232. #define MII_VCT7_RESULTS_PAIR0_MASK 0x000f
  233. #define MII_VCT7_RESULTS_PAIR3_SHIFT 12
  234. #define MII_VCT7_RESULTS_PAIR2_SHIFT 8
  235. #define MII_VCT7_RESULTS_PAIR1_SHIFT 4
  236. #define MII_VCT7_RESULTS_PAIR0_SHIFT 0
  237. #define MII_VCT7_RESULTS_INVALID 0
  238. #define MII_VCT7_RESULTS_OK 1
  239. #define MII_VCT7_RESULTS_OPEN 2
  240. #define MII_VCT7_RESULTS_SAME_SHORT 3
  241. #define MII_VCT7_RESULTS_CROSS_SHORT 4
  242. #define MII_VCT7_RESULTS_BUSY 9
  243. #define MII_VCT7_CTRL 0x15
  244. #define MII_VCT7_CTRL_RUN_NOW BIT(15)
  245. #define MII_VCT7_CTRL_RUN_ANEG BIT(14)
  246. #define MII_VCT7_CTRL_DISABLE_CROSS BIT(13)
  247. #define MII_VCT7_CTRL_RUN_AFTER_BREAK_LINK BIT(12)
  248. #define MII_VCT7_CTRL_IN_PROGRESS BIT(11)
  249. #define MII_VCT7_CTRL_METERS BIT(10)
  250. #define MII_VCT7_CTRL_CENTIMETERS 0
  251. #define MII_VCT_TXPINS 0x1A
  252. #define MII_VCT_RXPINS 0x1B
  253. #define MII_VCT_SR 0x1C
  254. #define MII_VCT_TXPINS_ENVCT BIT(15)
  255. #define MII_VCT_TXRXPINS_VCTTST GENMASK(14, 13)
  256. #define MII_VCT_TXRXPINS_VCTTST_SHIFT 13
  257. #define MII_VCT_TXRXPINS_VCTTST_OK 0
  258. #define MII_VCT_TXRXPINS_VCTTST_SHORT 1
  259. #define MII_VCT_TXRXPINS_VCTTST_OPEN 2
  260. #define MII_VCT_TXRXPINS_VCTTST_FAIL 3
  261. #define MII_VCT_TXRXPINS_AMPRFLN GENMASK(12, 8)
  262. #define MII_VCT_TXRXPINS_AMPRFLN_SHIFT 8
  263. #define MII_VCT_TXRXPINS_DISTRFLN GENMASK(7, 0)
  264. #define MII_VCT_TXRXPINS_DISTRFLN_MAX 0xff
  265. #define M88E3082_PAIR_A BIT(0)
  266. #define M88E3082_PAIR_B BIT(1)
  267. #define LPA_PAUSE_FIBER 0x180
  268. #define LPA_PAUSE_ASYM_FIBER 0x100
  269. #define NB_FIBER_STATS 1
  270. #define NB_STAT_MAX 3
  271. MODULE_DESCRIPTION("Marvell PHY driver");
  272. MODULE_AUTHOR("Andy Fleming");
  273. MODULE_LICENSE("GPL");
  274. struct marvell_hw_stat {
  275. const char *string;
  276. u8 page;
  277. u8 reg;
  278. u8 bits;
  279. };
  280. static const struct marvell_hw_stat marvell_hw_stats[] = {
  281. { "phy_receive_errors_copper", 0, 21, 16},
  282. { "phy_idle_errors", 0, 10, 8 },
  283. { "phy_receive_errors_fiber", 1, 21, 16},
  284. };
  285. static_assert(ARRAY_SIZE(marvell_hw_stats) <= NB_STAT_MAX);
  286. /* "simple" stat list + corresponding marvell_get_*_simple functions are used
  287. * on PHYs without a page register
  288. */
  289. struct marvell_hw_stat_simple {
  290. const char *string;
  291. u8 reg;
  292. u8 bits;
  293. };
  294. static const struct marvell_hw_stat_simple marvell_hw_stats_simple[] = {
  295. { "phy_receive_errors", 21, 16},
  296. };
  297. static_assert(ARRAY_SIZE(marvell_hw_stats_simple) <= NB_STAT_MAX);
  298. enum {
  299. M88E3082_VCT_OFF,
  300. M88E3082_VCT_PHASE1,
  301. M88E3082_VCT_PHASE2,
  302. };
  303. struct marvell_priv {
  304. u64 stats[NB_STAT_MAX];
  305. char *hwmon_name;
  306. struct device *hwmon_dev;
  307. bool cable_test_tdr;
  308. u32 first;
  309. u32 last;
  310. u32 step;
  311. s8 pair;
  312. u8 vct_phase;
  313. };
  314. static int marvell_read_page(struct phy_device *phydev)
  315. {
  316. return __phy_read(phydev, MII_MARVELL_PHY_PAGE);
  317. }
  318. static int marvell_write_page(struct phy_device *phydev, int page)
  319. {
  320. return __phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  321. }
  322. static int marvell_set_page(struct phy_device *phydev, int page)
  323. {
  324. return phy_write(phydev, MII_MARVELL_PHY_PAGE, page);
  325. }
  326. static int marvell_ack_interrupt(struct phy_device *phydev)
  327. {
  328. int err;
  329. /* Clear the interrupts by reading the reg */
  330. err = phy_read(phydev, MII_M1011_IEVENT);
  331. if (err < 0)
  332. return err;
  333. return 0;
  334. }
  335. static int marvell_config_intr(struct phy_device *phydev)
  336. {
  337. int err;
  338. if (phydev->interrupts == PHY_INTERRUPT_ENABLED) {
  339. err = marvell_ack_interrupt(phydev);
  340. if (err)
  341. return err;
  342. err = phy_write(phydev, MII_M1011_IMASK,
  343. MII_M1011_IMASK_INIT);
  344. } else {
  345. err = phy_write(phydev, MII_M1011_IMASK,
  346. MII_M1011_IMASK_CLEAR);
  347. if (err)
  348. return err;
  349. err = marvell_ack_interrupt(phydev);
  350. }
  351. return err;
  352. }
  353. static irqreturn_t marvell_handle_interrupt(struct phy_device *phydev)
  354. {
  355. int irq_status;
  356. irq_status = phy_read(phydev, MII_M1011_IEVENT);
  357. if (irq_status < 0) {
  358. phy_error(phydev);
  359. return IRQ_NONE;
  360. }
  361. if (!(irq_status & MII_M1011_IMASK_INIT))
  362. return IRQ_NONE;
  363. phy_trigger_machine(phydev);
  364. return IRQ_HANDLED;
  365. }
  366. static int marvell_set_polarity(struct phy_device *phydev, int polarity)
  367. {
  368. u16 val;
  369. switch (polarity) {
  370. case ETH_TP_MDI:
  371. val = MII_M1011_PHY_SCR_MDI;
  372. break;
  373. case ETH_TP_MDI_X:
  374. val = MII_M1011_PHY_SCR_MDI_X;
  375. break;
  376. case ETH_TP_MDI_AUTO:
  377. case ETH_TP_MDI_INVALID:
  378. default:
  379. val = MII_M1011_PHY_SCR_AUTO_CROSS;
  380. break;
  381. }
  382. return phy_modify_changed(phydev, MII_M1011_PHY_SCR,
  383. MII_M1011_PHY_SCR_AUTO_CROSS, val);
  384. }
  385. static int marvell_config_aneg(struct phy_device *phydev)
  386. {
  387. int changed = 0;
  388. int err;
  389. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  390. if (err < 0)
  391. return err;
  392. changed = err;
  393. err = phy_write(phydev, MII_M1111_PHY_LED_CONTROL,
  394. MII_M1111_PHY_LED_DIRECT);
  395. if (err < 0)
  396. return err;
  397. err = genphy_config_aneg(phydev);
  398. if (err < 0)
  399. return err;
  400. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  401. /* A write to speed/duplex bits (that is performed by
  402. * genphy_config_aneg() call above) must be followed by
  403. * a software reset. Otherwise, the write has no effect.
  404. */
  405. err = genphy_soft_reset(phydev);
  406. if (err < 0)
  407. return err;
  408. }
  409. return 0;
  410. }
  411. static int m88e1101_config_aneg(struct phy_device *phydev)
  412. {
  413. int err;
  414. /* This Marvell PHY has an errata which requires
  415. * that certain registers get written in order
  416. * to restart autonegotiation
  417. */
  418. err = genphy_soft_reset(phydev);
  419. if (err < 0)
  420. return err;
  421. err = phy_write(phydev, 0x1d, 0x1f);
  422. if (err < 0)
  423. return err;
  424. err = phy_write(phydev, 0x1e, 0x200c);
  425. if (err < 0)
  426. return err;
  427. err = phy_write(phydev, 0x1d, 0x5);
  428. if (err < 0)
  429. return err;
  430. err = phy_write(phydev, 0x1e, 0);
  431. if (err < 0)
  432. return err;
  433. err = phy_write(phydev, 0x1e, 0x100);
  434. if (err < 0)
  435. return err;
  436. return marvell_config_aneg(phydev);
  437. }
  438. #if IS_ENABLED(CONFIG_OF_MDIO)
  439. /* Set and/or override some configuration registers based on the
  440. * marvell,reg-init property stored in the of_node for the phydev.
  441. *
  442. * marvell,reg-init = <reg-page reg mask value>,...;
  443. *
  444. * There may be one or more sets of <reg-page reg mask value>:
  445. *
  446. * reg-page: which register bank to use.
  447. * reg: the register.
  448. * mask: if non-zero, ANDed with existing register value.
  449. * value: ORed with the masked value and written to the regiser.
  450. *
  451. */
  452. static int marvell_of_reg_init(struct phy_device *phydev)
  453. {
  454. const __be32 *paddr;
  455. int len, i, saved_page, current_page, ret = 0;
  456. if (!phydev->mdio.dev.of_node)
  457. return 0;
  458. paddr = of_get_property(phydev->mdio.dev.of_node,
  459. "marvell,reg-init", &len);
  460. if (!paddr || len < (4 * sizeof(*paddr)))
  461. return 0;
  462. saved_page = phy_save_page(phydev);
  463. if (saved_page < 0)
  464. goto err;
  465. current_page = saved_page;
  466. len /= sizeof(*paddr);
  467. for (i = 0; i < len - 3; i += 4) {
  468. u16 page = be32_to_cpup(paddr + i);
  469. u16 reg = be32_to_cpup(paddr + i + 1);
  470. u16 mask = be32_to_cpup(paddr + i + 2);
  471. u16 val_bits = be32_to_cpup(paddr + i + 3);
  472. int val;
  473. if (page != current_page) {
  474. current_page = page;
  475. ret = marvell_write_page(phydev, page);
  476. if (ret < 0)
  477. goto err;
  478. }
  479. val = 0;
  480. if (mask) {
  481. val = __phy_read(phydev, reg);
  482. if (val < 0) {
  483. ret = val;
  484. goto err;
  485. }
  486. val &= mask;
  487. }
  488. val |= val_bits;
  489. ret = __phy_write(phydev, reg, val);
  490. if (ret < 0)
  491. goto err;
  492. }
  493. err:
  494. return phy_restore_page(phydev, saved_page, ret);
  495. }
  496. #else
  497. static int marvell_of_reg_init(struct phy_device *phydev)
  498. {
  499. return 0;
  500. }
  501. #endif /* CONFIG_OF_MDIO */
  502. static int m88e1121_config_aneg_rgmii_delays(struct phy_device *phydev)
  503. {
  504. int mscr;
  505. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID)
  506. mscr = MII_88E1121_PHY_MSCR_RX_DELAY |
  507. MII_88E1121_PHY_MSCR_TX_DELAY;
  508. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)
  509. mscr = MII_88E1121_PHY_MSCR_RX_DELAY;
  510. else if (phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
  511. mscr = MII_88E1121_PHY_MSCR_TX_DELAY;
  512. else
  513. mscr = 0;
  514. return phy_modify_paged_changed(phydev, MII_MARVELL_MSCR_PAGE,
  515. MII_88E1121_PHY_MSCR_REG,
  516. MII_88E1121_PHY_MSCR_DELAY_MASK, mscr);
  517. }
  518. static int m88e1121_config_aneg(struct phy_device *phydev)
  519. {
  520. int changed = 0;
  521. int err = 0;
  522. if (phy_interface_is_rgmii(phydev)) {
  523. err = m88e1121_config_aneg_rgmii_delays(phydev);
  524. if (err < 0)
  525. return err;
  526. }
  527. changed = err;
  528. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  529. if (err < 0)
  530. return err;
  531. changed |= err;
  532. err = genphy_config_aneg(phydev);
  533. if (err < 0)
  534. return err;
  535. if (phydev->autoneg != AUTONEG_ENABLE || changed) {
  536. /* A software reset is used to ensure a "commit" of the
  537. * changes is done.
  538. */
  539. err = genphy_soft_reset(phydev);
  540. if (err < 0)
  541. return err;
  542. }
  543. return 0;
  544. }
  545. static int m88e1318_config_aneg(struct phy_device *phydev)
  546. {
  547. int err;
  548. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  549. MII_88E1318S_PHY_MSCR1_REG,
  550. 0, MII_88E1318S_PHY_MSCR1_PAD_ODD);
  551. if (err < 0)
  552. return err;
  553. return m88e1121_config_aneg(phydev);
  554. }
  555. /**
  556. * linkmode_adv_to_fiber_adv_t
  557. * @advertise: the linkmode advertisement settings
  558. *
  559. * A small helper function that translates linkmode advertisement
  560. * settings to phy autonegotiation advertisements for the MII_ADV
  561. * register for fiber link.
  562. */
  563. static inline u32 linkmode_adv_to_fiber_adv_t(unsigned long *advertise)
  564. {
  565. u32 result = 0;
  566. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT, advertise))
  567. result |= ADVERTISE_1000XHALF;
  568. if (linkmode_test_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT, advertise))
  569. result |= ADVERTISE_1000XFULL;
  570. if (linkmode_test_bit(ETHTOOL_LINK_MODE_Asym_Pause_BIT, advertise) &&
  571. linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  572. result |= ADVERTISE_1000XPSE_ASYM;
  573. else if (linkmode_test_bit(ETHTOOL_LINK_MODE_Pause_BIT, advertise))
  574. result |= ADVERTISE_1000XPAUSE;
  575. return result;
  576. }
  577. /**
  578. * marvell_config_aneg_fiber - restart auto-negotiation or write BMCR
  579. * @phydev: target phy_device struct
  580. *
  581. * Description: If auto-negotiation is enabled, we configure the
  582. * advertising, and then restart auto-negotiation. If it is not
  583. * enabled, then we write the BMCR. Adapted for fiber link in
  584. * some Marvell's devices.
  585. */
  586. static int marvell_config_aneg_fiber(struct phy_device *phydev)
  587. {
  588. int changed = 0;
  589. int err;
  590. u16 adv;
  591. if (phydev->autoneg != AUTONEG_ENABLE)
  592. return genphy_setup_forced(phydev);
  593. /* Only allow advertising what this PHY supports */
  594. linkmode_and(phydev->advertising, phydev->advertising,
  595. phydev->supported);
  596. adv = linkmode_adv_to_fiber_adv_t(phydev->advertising);
  597. /* Setup fiber advertisement */
  598. err = phy_modify_changed(phydev, MII_ADVERTISE,
  599. ADVERTISE_1000XHALF | ADVERTISE_1000XFULL |
  600. ADVERTISE_1000XPAUSE | ADVERTISE_1000XPSE_ASYM,
  601. adv);
  602. if (err < 0)
  603. return err;
  604. if (err > 0)
  605. changed = 1;
  606. return genphy_check_and_restart_aneg(phydev, changed);
  607. }
  608. static unsigned int m88e1111_inband_caps(struct phy_device *phydev,
  609. phy_interface_t interface)
  610. {
  611. /* In 1000base-X and SGMII modes, the inband mode can be changed
  612. * through the Fibre page BMCR ANENABLE bit.
  613. */
  614. if (interface == PHY_INTERFACE_MODE_1000BASEX ||
  615. interface == PHY_INTERFACE_MODE_SGMII)
  616. return LINK_INBAND_DISABLE | LINK_INBAND_ENABLE |
  617. LINK_INBAND_BYPASS;
  618. return 0;
  619. }
  620. static int m88e1111_config_inband(struct phy_device *phydev, unsigned int modes)
  621. {
  622. u16 extsr, bmcr;
  623. int err;
  624. if (phydev->interface != PHY_INTERFACE_MODE_1000BASEX &&
  625. phydev->interface != PHY_INTERFACE_MODE_SGMII)
  626. return -EINVAL;
  627. if (modes == LINK_INBAND_BYPASS)
  628. extsr = MII_M1111_HWCFG_SERIAL_AN_BYPASS;
  629. else
  630. extsr = 0;
  631. if (modes == LINK_INBAND_DISABLE)
  632. bmcr = 0;
  633. else
  634. bmcr = BMCR_ANENABLE;
  635. err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  636. MII_M1111_HWCFG_SERIAL_AN_BYPASS, extsr);
  637. if (err < 0)
  638. return extsr;
  639. return phy_modify_paged(phydev, MII_MARVELL_FIBER_PAGE, MII_BMCR,
  640. BMCR_ANENABLE, bmcr);
  641. }
  642. static int m88e1111_config_aneg(struct phy_device *phydev)
  643. {
  644. int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  645. int err;
  646. if (extsr < 0)
  647. return extsr;
  648. /* If not using SGMII or copper 1000BaseX modes, use normal process.
  649. * Steps below are only required for these modes.
  650. */
  651. if (phydev->interface != PHY_INTERFACE_MODE_SGMII &&
  652. (extsr & MII_M1111_HWCFG_MODE_MASK) !=
  653. MII_M1111_HWCFG_MODE_COPPER_1000X_AN)
  654. return marvell_config_aneg(phydev);
  655. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  656. if (err < 0)
  657. goto error;
  658. /* Configure the copper link first */
  659. err = marvell_config_aneg(phydev);
  660. if (err < 0)
  661. goto error;
  662. /* Then the fiber link */
  663. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  664. if (err < 0)
  665. goto error;
  666. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  667. /* Do not touch the fiber advertisement if we're in copper->sgmii mode.
  668. * Just ensure that SGMII-side autonegotiation is enabled.
  669. * If we switched from some other mode to SGMII it may not be.
  670. */
  671. err = genphy_check_and_restart_aneg(phydev, false);
  672. else
  673. err = marvell_config_aneg_fiber(phydev);
  674. if (err < 0)
  675. goto error;
  676. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  677. error:
  678. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  679. return err;
  680. }
  681. static int m88e1510_config_aneg(struct phy_device *phydev)
  682. {
  683. int err;
  684. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  685. if (err < 0)
  686. goto error;
  687. /* Configure the copper link first */
  688. err = m88e1318_config_aneg(phydev);
  689. if (err < 0)
  690. goto error;
  691. /* Do not touch the fiber page if we're in copper->sgmii mode */
  692. if (phydev->interface == PHY_INTERFACE_MODE_SGMII)
  693. return 0;
  694. /* Then the fiber link */
  695. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  696. if (err < 0)
  697. goto error;
  698. err = marvell_config_aneg_fiber(phydev);
  699. if (err < 0)
  700. goto error;
  701. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  702. error:
  703. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  704. return err;
  705. }
  706. static void marvell_config_led(struct phy_device *phydev)
  707. {
  708. u16 def_config;
  709. int err;
  710. switch (MARVELL_PHY_FAMILY_ID(phydev->phy_id)) {
  711. /* Default PHY LED config: LED[0] .. Link, LED[1] .. Activity */
  712. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1121R):
  713. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1318S):
  714. def_config = MII_88E1121_PHY_LED_DEF;
  715. break;
  716. /* Default PHY LED config:
  717. * LED[0] .. 1000Mbps Link
  718. * LED[1] .. 100Mbps Link
  719. * LED[2] .. Blink, Activity
  720. */
  721. case MARVELL_PHY_FAMILY_ID(MARVELL_PHY_ID_88E1510):
  722. if (phydev->dev_flags & MARVELL_PHY_LED0_LINK_LED1_ACTIVE)
  723. def_config = MII_88E1510_PHY_LED0_LINK_LED1_ACTIVE;
  724. else
  725. def_config = MII_88E1510_PHY_LED_DEF;
  726. break;
  727. default:
  728. return;
  729. }
  730. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, MII_PHY_LED_CTRL,
  731. def_config);
  732. if (err < 0)
  733. phydev_warn(phydev, "Fail to config marvell phy LED.\n");
  734. }
  735. static int marvell_config_init(struct phy_device *phydev)
  736. {
  737. /* Set default LED */
  738. marvell_config_led(phydev);
  739. /* Set registers from marvell,reg-init DT property */
  740. return marvell_of_reg_init(phydev);
  741. }
  742. static int m88e3016_config_init(struct phy_device *phydev)
  743. {
  744. int ret;
  745. /* Enable Scrambler and Auto-Crossover */
  746. ret = phy_modify(phydev, MII_88E3016_PHY_SPEC_CTRL,
  747. MII_88E3016_DISABLE_SCRAMBLER,
  748. MII_88E3016_AUTO_MDIX_CROSSOVER);
  749. if (ret < 0)
  750. return ret;
  751. return marvell_config_init(phydev);
  752. }
  753. static int m88e1111_config_init_hwcfg_mode(struct phy_device *phydev,
  754. u16 mode,
  755. int fibre_copper_auto)
  756. {
  757. if (fibre_copper_auto)
  758. mode |= MII_M1111_HWCFG_FIBER_COPPER_AUTO;
  759. return phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  760. MII_M1111_HWCFG_MODE_MASK |
  761. MII_M1111_HWCFG_FIBER_COPPER_AUTO |
  762. MII_M1111_HWCFG_FIBER_COPPER_RES,
  763. mode);
  764. }
  765. static int m88e1111_config_init_rgmii_delays(struct phy_device *phydev)
  766. {
  767. int delay;
  768. switch (phydev->interface) {
  769. case PHY_INTERFACE_MODE_RGMII_ID:
  770. delay = MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY;
  771. break;
  772. case PHY_INTERFACE_MODE_RGMII_RXID:
  773. delay = MII_M1111_RGMII_RX_DELAY;
  774. break;
  775. case PHY_INTERFACE_MODE_RGMII_TXID:
  776. delay = MII_M1111_RGMII_TX_DELAY;
  777. break;
  778. default:
  779. delay = 0;
  780. break;
  781. }
  782. return phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  783. MII_M1111_RGMII_RX_DELAY | MII_M1111_RGMII_TX_DELAY,
  784. delay);
  785. }
  786. static int m88e1111_config_init_rgmii(struct phy_device *phydev)
  787. {
  788. int temp;
  789. int err;
  790. err = m88e1111_config_init_rgmii_delays(phydev);
  791. if (err < 0)
  792. return err;
  793. temp = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  794. if (temp < 0)
  795. return temp;
  796. temp &= ~(MII_M1111_HWCFG_MODE_MASK);
  797. if (temp & MII_M1111_HWCFG_FIBER_COPPER_RES)
  798. temp |= MII_M1111_HWCFG_MODE_FIBER_RGMII;
  799. else
  800. temp |= MII_M1111_HWCFG_MODE_COPPER_RGMII;
  801. return phy_write(phydev, MII_M1111_PHY_EXT_SR, temp);
  802. }
  803. static int m88e1111_config_init_sgmii(struct phy_device *phydev)
  804. {
  805. int err;
  806. err = m88e1111_config_init_hwcfg_mode(
  807. phydev,
  808. MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  809. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  810. if (err < 0)
  811. return err;
  812. /* make sure copper is selected */
  813. return marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  814. }
  815. static int m88e1111_config_init_rtbi(struct phy_device *phydev)
  816. {
  817. int err;
  818. err = m88e1111_config_init_rgmii_delays(phydev);
  819. if (err < 0)
  820. return err;
  821. err = m88e1111_config_init_hwcfg_mode(
  822. phydev,
  823. MII_M1111_HWCFG_MODE_RTBI,
  824. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  825. if (err < 0)
  826. return err;
  827. /* soft reset */
  828. err = genphy_soft_reset(phydev);
  829. if (err < 0)
  830. return err;
  831. return m88e1111_config_init_hwcfg_mode(
  832. phydev,
  833. MII_M1111_HWCFG_MODE_RTBI,
  834. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  835. }
  836. static int m88e1111_config_init_1000basex(struct phy_device *phydev)
  837. {
  838. int extsr = phy_read(phydev, MII_M1111_PHY_EXT_SR);
  839. int err, mode;
  840. if (extsr < 0)
  841. return extsr;
  842. /* If using copper mode, ensure 1000BaseX auto-negotiation is enabled.
  843. * FIXME: this does not actually enable 1000BaseX auto-negotiation if
  844. * it was previously disabled in the Fiber BMCR!
  845. */
  846. mode = extsr & MII_M1111_HWCFG_MODE_MASK;
  847. if (mode == MII_M1111_HWCFG_MODE_COPPER_1000X_NOAN) {
  848. err = phy_modify(phydev, MII_M1111_PHY_EXT_SR,
  849. MII_M1111_HWCFG_MODE_MASK |
  850. MII_M1111_HWCFG_SERIAL_AN_BYPASS,
  851. MII_M1111_HWCFG_MODE_COPPER_1000X_AN |
  852. MII_M1111_HWCFG_SERIAL_AN_BYPASS);
  853. if (err < 0)
  854. return err;
  855. }
  856. return 0;
  857. }
  858. static int m88e1111_config_init(struct phy_device *phydev)
  859. {
  860. int err;
  861. if (phy_interface_is_rgmii(phydev)) {
  862. err = m88e1111_config_init_rgmii(phydev);
  863. if (err < 0)
  864. return err;
  865. }
  866. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  867. err = m88e1111_config_init_sgmii(phydev);
  868. if (err < 0)
  869. return err;
  870. }
  871. if (phydev->interface == PHY_INTERFACE_MODE_RTBI) {
  872. err = m88e1111_config_init_rtbi(phydev);
  873. if (err < 0)
  874. return err;
  875. }
  876. if (phydev->interface == PHY_INTERFACE_MODE_1000BASEX) {
  877. err = m88e1111_config_init_1000basex(phydev);
  878. if (err < 0)
  879. return err;
  880. }
  881. err = marvell_of_reg_init(phydev);
  882. if (err < 0)
  883. return err;
  884. err = genphy_soft_reset(phydev);
  885. if (err < 0)
  886. return err;
  887. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  888. /* If the HWCFG_MODE was changed from another mode (such as
  889. * 1000BaseX) to SGMII, the state of the support bits may have
  890. * also changed now that the PHY has been reset.
  891. * Update the PHY abilities accordingly.
  892. */
  893. err = genphy_read_abilities(phydev);
  894. linkmode_or(phydev->advertising, phydev->advertising,
  895. phydev->supported);
  896. }
  897. return err;
  898. }
  899. static int m88e1111_get_downshift(struct phy_device *phydev, u8 *data)
  900. {
  901. int val, cnt, enable;
  902. val = phy_read(phydev, MII_M1111_PHY_EXT_CR);
  903. if (val < 0)
  904. return val;
  905. enable = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN, val);
  906. cnt = FIELD_GET(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, val) + 1;
  907. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  908. return 0;
  909. }
  910. static int m88e1111_set_downshift(struct phy_device *phydev, u8 cnt)
  911. {
  912. int val, err;
  913. if (cnt > MII_M1111_PHY_EXT_CR_DOWNSHIFT_MAX)
  914. return -E2BIG;
  915. if (!cnt) {
  916. err = phy_clear_bits(phydev, MII_M1111_PHY_EXT_CR,
  917. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN);
  918. } else {
  919. val = MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN;
  920. val |= FIELD_PREP(MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK, cnt - 1);
  921. err = phy_modify(phydev, MII_M1111_PHY_EXT_CR,
  922. MII_M1111_PHY_EXT_CR_DOWNSHIFT_EN |
  923. MII_M1111_PHY_EXT_CR_DOWNSHIFT_MASK,
  924. val);
  925. }
  926. if (err < 0)
  927. return err;
  928. return genphy_soft_reset(phydev);
  929. }
  930. static int m88e1111_get_tunable(struct phy_device *phydev,
  931. struct ethtool_tunable *tuna, void *data)
  932. {
  933. switch (tuna->id) {
  934. case ETHTOOL_PHY_DOWNSHIFT:
  935. return m88e1111_get_downshift(phydev, data);
  936. default:
  937. return -EOPNOTSUPP;
  938. }
  939. }
  940. static int m88e1111_set_tunable(struct phy_device *phydev,
  941. struct ethtool_tunable *tuna, const void *data)
  942. {
  943. switch (tuna->id) {
  944. case ETHTOOL_PHY_DOWNSHIFT:
  945. return m88e1111_set_downshift(phydev, *(const u8 *)data);
  946. default:
  947. return -EOPNOTSUPP;
  948. }
  949. }
  950. static int m88e1011_get_downshift(struct phy_device *phydev, u8 *data)
  951. {
  952. int val, cnt, enable;
  953. val = phy_read(phydev, MII_M1011_PHY_SCR);
  954. if (val < 0)
  955. return val;
  956. enable = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_EN, val);
  957. cnt = FIELD_GET(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, val) + 1;
  958. *data = enable ? cnt : DOWNSHIFT_DEV_DISABLE;
  959. return 0;
  960. }
  961. static int m88e1011_set_downshift(struct phy_device *phydev, u8 cnt)
  962. {
  963. int val, err;
  964. if (cnt > MII_M1011_PHY_SCR_DOWNSHIFT_MAX)
  965. return -E2BIG;
  966. if (!cnt) {
  967. err = phy_clear_bits(phydev, MII_M1011_PHY_SCR,
  968. MII_M1011_PHY_SCR_DOWNSHIFT_EN);
  969. } else {
  970. val = MII_M1011_PHY_SCR_DOWNSHIFT_EN;
  971. val |= FIELD_PREP(MII_M1011_PHY_SCR_DOWNSHIFT_MASK, cnt - 1);
  972. err = phy_modify(phydev, MII_M1011_PHY_SCR,
  973. MII_M1011_PHY_SCR_DOWNSHIFT_EN |
  974. MII_M1011_PHY_SCR_DOWNSHIFT_MASK,
  975. val);
  976. }
  977. if (err < 0)
  978. return err;
  979. return genphy_soft_reset(phydev);
  980. }
  981. static int m88e1011_get_tunable(struct phy_device *phydev,
  982. struct ethtool_tunable *tuna, void *data)
  983. {
  984. switch (tuna->id) {
  985. case ETHTOOL_PHY_DOWNSHIFT:
  986. return m88e1011_get_downshift(phydev, data);
  987. default:
  988. return -EOPNOTSUPP;
  989. }
  990. }
  991. static int m88e1011_set_tunable(struct phy_device *phydev,
  992. struct ethtool_tunable *tuna, const void *data)
  993. {
  994. switch (tuna->id) {
  995. case ETHTOOL_PHY_DOWNSHIFT:
  996. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  997. default:
  998. return -EOPNOTSUPP;
  999. }
  1000. }
  1001. static int m88e1112_config_init(struct phy_device *phydev)
  1002. {
  1003. int err;
  1004. err = m88e1011_set_downshift(phydev, 3);
  1005. if (err < 0)
  1006. return err;
  1007. return m88e1111_config_init(phydev);
  1008. }
  1009. static int m88e1111gbe_config_init(struct phy_device *phydev)
  1010. {
  1011. int err;
  1012. err = m88e1111_set_downshift(phydev, 3);
  1013. if (err < 0)
  1014. return err;
  1015. return m88e1111_config_init(phydev);
  1016. }
  1017. static int marvell_1011gbe_config_init(struct phy_device *phydev)
  1018. {
  1019. int err;
  1020. err = m88e1011_set_downshift(phydev, 3);
  1021. if (err < 0)
  1022. return err;
  1023. return marvell_config_init(phydev);
  1024. }
  1025. static int m88e1116r_config_init(struct phy_device *phydev)
  1026. {
  1027. int err;
  1028. err = genphy_soft_reset(phydev);
  1029. if (err < 0)
  1030. return err;
  1031. msleep(500);
  1032. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1033. if (err < 0)
  1034. return err;
  1035. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  1036. if (err < 0)
  1037. return err;
  1038. err = m88e1011_set_downshift(phydev, 8);
  1039. if (err < 0)
  1040. return err;
  1041. if (phy_interface_is_rgmii(phydev)) {
  1042. err = m88e1121_config_aneg_rgmii_delays(phydev);
  1043. if (err < 0)
  1044. return err;
  1045. }
  1046. err = genphy_soft_reset(phydev);
  1047. if (err < 0)
  1048. return err;
  1049. return marvell_config_init(phydev);
  1050. }
  1051. static int m88e1318_config_init(struct phy_device *phydev)
  1052. {
  1053. if (phy_interrupt_is_valid(phydev)) {
  1054. int err = phy_modify_paged(
  1055. phydev, MII_MARVELL_LED_PAGE,
  1056. MII_88E1318S_PHY_LED_TCR,
  1057. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1058. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1059. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1060. if (err < 0)
  1061. return err;
  1062. }
  1063. return marvell_config_init(phydev);
  1064. }
  1065. static int m88e1510_config_init(struct phy_device *phydev)
  1066. {
  1067. static const struct {
  1068. u16 reg17, reg16;
  1069. } errata_vals[] = {
  1070. { 0x214b, 0x2144 },
  1071. { 0x0c28, 0x2146 },
  1072. { 0xb233, 0x214d },
  1073. { 0xcc0c, 0x2159 },
  1074. };
  1075. int err;
  1076. int i;
  1077. /* As per Marvell Release Notes - Alaska 88E1510/88E1518/88E1512/
  1078. * 88E1514 Rev A0, Errata Section 5.1:
  1079. * If EEE is intended to be used, the following register writes
  1080. * must be done once after every hardware reset.
  1081. */
  1082. err = marvell_set_page(phydev, 0x00FF);
  1083. if (err < 0)
  1084. return err;
  1085. for (i = 0; i < ARRAY_SIZE(errata_vals); ++i) {
  1086. err = phy_write(phydev, 17, errata_vals[i].reg17);
  1087. if (err)
  1088. return err;
  1089. err = phy_write(phydev, 16, errata_vals[i].reg16);
  1090. if (err)
  1091. return err;
  1092. }
  1093. err = marvell_set_page(phydev, 0x00FB);
  1094. if (err < 0)
  1095. return err;
  1096. err = phy_write(phydev, 07, 0xC00D);
  1097. if (err < 0)
  1098. return err;
  1099. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1100. if (err < 0)
  1101. return err;
  1102. /* SGMII-to-Copper mode initialization */
  1103. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  1104. /* Select page 18 */
  1105. err = marvell_set_page(phydev, 18);
  1106. if (err < 0)
  1107. return err;
  1108. /* In reg 20, write MODE[2:0] = 0x1 (SGMII to Copper) */
  1109. err = phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  1110. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK,
  1111. MII_88E1510_GEN_CTRL_REG_1_MODE_SGMII);
  1112. if (err < 0)
  1113. return err;
  1114. /* PHY reset is necessary after changing MODE[2:0] */
  1115. err = phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  1116. MII_88E1510_GEN_CTRL_REG_1_RESET);
  1117. if (err < 0)
  1118. return err;
  1119. /* Reset page selection */
  1120. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1121. if (err < 0)
  1122. return err;
  1123. }
  1124. err = m88e1011_set_downshift(phydev, 3);
  1125. if (err < 0)
  1126. return err;
  1127. return m88e1318_config_init(phydev);
  1128. }
  1129. static int m88e1118_config_aneg(struct phy_device *phydev)
  1130. {
  1131. int err;
  1132. err = marvell_set_polarity(phydev, phydev->mdix_ctrl);
  1133. if (err < 0)
  1134. return err;
  1135. err = genphy_config_aneg(phydev);
  1136. if (err < 0)
  1137. return err;
  1138. return genphy_soft_reset(phydev);
  1139. }
  1140. static int m88e1118_config_init(struct phy_device *phydev)
  1141. {
  1142. u16 leds;
  1143. int err;
  1144. /* Enable 1000 Mbit */
  1145. err = phy_write_paged(phydev, MII_MARVELL_MSCR_PAGE,
  1146. MII_88E1121_PHY_MSCR_REG, 0x1070);
  1147. if (err < 0)
  1148. return err;
  1149. if (phy_interface_is_rgmii(phydev)) {
  1150. err = m88e1121_config_aneg_rgmii_delays(phydev);
  1151. if (err < 0)
  1152. return err;
  1153. }
  1154. /* Adjust LED Control */
  1155. if (phydev->dev_flags & MARVELL_PHY_M1118_DNS323_LEDS)
  1156. leds = 0x1100;
  1157. else
  1158. leds = 0x021e;
  1159. err = phy_write_paged(phydev, MII_MARVELL_LED_PAGE, 0x10, leds);
  1160. if (err < 0)
  1161. return err;
  1162. err = marvell_of_reg_init(phydev);
  1163. if (err < 0)
  1164. return err;
  1165. /* Reset page register */
  1166. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1167. if (err < 0)
  1168. return err;
  1169. return genphy_soft_reset(phydev);
  1170. }
  1171. static int m88e1149_config_init(struct phy_device *phydev)
  1172. {
  1173. int err;
  1174. /* Change address */
  1175. err = marvell_set_page(phydev, MII_MARVELL_MSCR_PAGE);
  1176. if (err < 0)
  1177. return err;
  1178. /* Enable 1000 Mbit */
  1179. err = phy_write(phydev, 0x15, 0x1048);
  1180. if (err < 0)
  1181. return err;
  1182. err = marvell_of_reg_init(phydev);
  1183. if (err < 0)
  1184. return err;
  1185. /* Reset address */
  1186. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1187. if (err < 0)
  1188. return err;
  1189. return genphy_soft_reset(phydev);
  1190. }
  1191. static int m88e1145_config_init_rgmii(struct phy_device *phydev)
  1192. {
  1193. int err;
  1194. err = m88e1111_config_init_rgmii_delays(phydev);
  1195. if (err < 0)
  1196. return err;
  1197. if (phydev->dev_flags & MARVELL_PHY_M1145_FLAGS_RESISTANCE) {
  1198. err = phy_write(phydev, 0x1d, 0x0012);
  1199. if (err < 0)
  1200. return err;
  1201. err = phy_modify(phydev, 0x1e, 0x0fc0,
  1202. 2 << 9 | /* 36 ohm */
  1203. 2 << 6); /* 39 ohm */
  1204. if (err < 0)
  1205. return err;
  1206. err = phy_write(phydev, 0x1d, 0x3);
  1207. if (err < 0)
  1208. return err;
  1209. err = phy_write(phydev, 0x1e, 0x8000);
  1210. }
  1211. return err;
  1212. }
  1213. static int m88e1145_config_init_sgmii(struct phy_device *phydev)
  1214. {
  1215. return m88e1111_config_init_hwcfg_mode(
  1216. phydev, MII_M1111_HWCFG_MODE_SGMII_NO_CLK,
  1217. MII_M1111_HWCFG_FIBER_COPPER_AUTO);
  1218. }
  1219. static int m88e1145_config_init(struct phy_device *phydev)
  1220. {
  1221. int err;
  1222. /* Take care of errata E0 & E1 */
  1223. err = phy_write(phydev, 0x1d, 0x001b);
  1224. if (err < 0)
  1225. return err;
  1226. err = phy_write(phydev, 0x1e, 0x418f);
  1227. if (err < 0)
  1228. return err;
  1229. err = phy_write(phydev, 0x1d, 0x0016);
  1230. if (err < 0)
  1231. return err;
  1232. err = phy_write(phydev, 0x1e, 0xa2da);
  1233. if (err < 0)
  1234. return err;
  1235. if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID) {
  1236. err = m88e1145_config_init_rgmii(phydev);
  1237. if (err < 0)
  1238. return err;
  1239. }
  1240. if (phydev->interface == PHY_INTERFACE_MODE_SGMII) {
  1241. err = m88e1145_config_init_sgmii(phydev);
  1242. if (err < 0)
  1243. return err;
  1244. }
  1245. err = m88e1111_set_downshift(phydev, 3);
  1246. if (err < 0)
  1247. return err;
  1248. err = marvell_of_reg_init(phydev);
  1249. if (err < 0)
  1250. return err;
  1251. return 0;
  1252. }
  1253. static int m88e1540_get_fld(struct phy_device *phydev, u8 *msecs)
  1254. {
  1255. int val;
  1256. val = phy_read(phydev, MII_88E1540_COPPER_CTRL3);
  1257. if (val < 0)
  1258. return val;
  1259. if (!(val & MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN)) {
  1260. *msecs = ETHTOOL_PHY_FAST_LINK_DOWN_OFF;
  1261. return 0;
  1262. }
  1263. val = FIELD_GET(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1264. switch (val) {
  1265. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS:
  1266. *msecs = 0;
  1267. break;
  1268. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS:
  1269. *msecs = 10;
  1270. break;
  1271. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS:
  1272. *msecs = 20;
  1273. break;
  1274. case MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS:
  1275. *msecs = 40;
  1276. break;
  1277. default:
  1278. return -EINVAL;
  1279. }
  1280. return 0;
  1281. }
  1282. static int m88e1540_set_fld(struct phy_device *phydev, const u8 *msecs)
  1283. {
  1284. int val, ret;
  1285. if (*msecs == ETHTOOL_PHY_FAST_LINK_DOWN_OFF)
  1286. return phy_clear_bits(phydev, MII_88E1540_COPPER_CTRL3,
  1287. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  1288. /* According to the Marvell data sheet EEE must be disabled for
  1289. * Fast Link Down detection to work properly
  1290. */
  1291. if (phydev->eee_cfg.eee_enabled) {
  1292. phydev_warn(phydev, "Fast Link Down detection requires EEE to be disabled!\n");
  1293. return -EBUSY;
  1294. }
  1295. if (*msecs <= 5)
  1296. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_00MS;
  1297. else if (*msecs <= 15)
  1298. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_10MS;
  1299. else if (*msecs <= 30)
  1300. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_20MS;
  1301. else
  1302. val = MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_40MS;
  1303. val = FIELD_PREP(MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1304. ret = phy_modify(phydev, MII_88E1540_COPPER_CTRL3,
  1305. MII_88E1540_COPPER_CTRL3_LINK_DOWN_DELAY_MASK, val);
  1306. if (ret)
  1307. return ret;
  1308. return phy_set_bits(phydev, MII_88E1540_COPPER_CTRL3,
  1309. MII_88E1540_COPPER_CTRL3_FAST_LINK_DOWN);
  1310. }
  1311. static int m88e1540_get_tunable(struct phy_device *phydev,
  1312. struct ethtool_tunable *tuna, void *data)
  1313. {
  1314. switch (tuna->id) {
  1315. case ETHTOOL_PHY_FAST_LINK_DOWN:
  1316. return m88e1540_get_fld(phydev, data);
  1317. case ETHTOOL_PHY_DOWNSHIFT:
  1318. return m88e1011_get_downshift(phydev, data);
  1319. default:
  1320. return -EOPNOTSUPP;
  1321. }
  1322. }
  1323. static int m88e1540_set_tunable(struct phy_device *phydev,
  1324. struct ethtool_tunable *tuna, const void *data)
  1325. {
  1326. switch (tuna->id) {
  1327. case ETHTOOL_PHY_FAST_LINK_DOWN:
  1328. return m88e1540_set_fld(phydev, data);
  1329. case ETHTOOL_PHY_DOWNSHIFT:
  1330. return m88e1011_set_downshift(phydev, *(const u8 *)data);
  1331. default:
  1332. return -EOPNOTSUPP;
  1333. }
  1334. }
  1335. /* The VOD can be out of specification on link up. Poke an
  1336. * undocumented register, in an undocumented page, with a magic value
  1337. * to fix this.
  1338. */
  1339. static int m88e6390_errata(struct phy_device *phydev)
  1340. {
  1341. int err;
  1342. err = phy_write(phydev, MII_BMCR,
  1343. BMCR_ANENABLE | BMCR_SPEED1000 | BMCR_FULLDPLX);
  1344. if (err)
  1345. return err;
  1346. usleep_range(300, 400);
  1347. err = phy_write_paged(phydev, 0xf8, 0x08, 0x36);
  1348. if (err)
  1349. return err;
  1350. return genphy_soft_reset(phydev);
  1351. }
  1352. static int m88e6390_config_aneg(struct phy_device *phydev)
  1353. {
  1354. int err;
  1355. err = m88e6390_errata(phydev);
  1356. if (err)
  1357. return err;
  1358. return m88e1510_config_aneg(phydev);
  1359. }
  1360. /**
  1361. * fiber_lpa_mod_linkmode_lpa_t
  1362. * @advertising: the linkmode advertisement settings
  1363. * @lpa: value of the MII_LPA register for fiber link
  1364. *
  1365. * A small helper function that translates MII_LPA bits to linkmode LP
  1366. * advertisement settings. Other bits in advertising are left
  1367. * unchanged.
  1368. */
  1369. static void fiber_lpa_mod_linkmode_lpa_t(unsigned long *advertising, u32 lpa)
  1370. {
  1371. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Half_BIT,
  1372. advertising, lpa & LPA_1000XHALF);
  1373. linkmode_mod_bit(ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
  1374. advertising, lpa & LPA_1000XFULL);
  1375. }
  1376. static int marvell_read_status_page_an(struct phy_device *phydev,
  1377. int fiber, int status)
  1378. {
  1379. int lpa;
  1380. int err;
  1381. if (!(status & MII_M1011_PHY_STATUS_RESOLVED)) {
  1382. phydev->link = 0;
  1383. return 0;
  1384. }
  1385. if (status & MII_M1011_PHY_STATUS_FULLDUPLEX)
  1386. phydev->duplex = DUPLEX_FULL;
  1387. else
  1388. phydev->duplex = DUPLEX_HALF;
  1389. switch (status & MII_M1011_PHY_STATUS_SPD_MASK) {
  1390. case MII_M1011_PHY_STATUS_1000:
  1391. phydev->speed = SPEED_1000;
  1392. break;
  1393. case MII_M1011_PHY_STATUS_100:
  1394. phydev->speed = SPEED_100;
  1395. break;
  1396. default:
  1397. phydev->speed = SPEED_10;
  1398. break;
  1399. }
  1400. if (!fiber) {
  1401. err = genphy_read_lpa(phydev);
  1402. if (err < 0)
  1403. return err;
  1404. phy_resolve_aneg_pause(phydev);
  1405. } else {
  1406. lpa = phy_read(phydev, MII_LPA);
  1407. if (lpa < 0)
  1408. return lpa;
  1409. /* The fiber link is only 1000M capable */
  1410. fiber_lpa_mod_linkmode_lpa_t(phydev->lp_advertising, lpa);
  1411. if (phydev->duplex == DUPLEX_FULL) {
  1412. if (!(lpa & LPA_PAUSE_FIBER)) {
  1413. phydev->pause = 0;
  1414. phydev->asym_pause = 0;
  1415. } else if ((lpa & LPA_PAUSE_ASYM_FIBER)) {
  1416. phydev->pause = 1;
  1417. phydev->asym_pause = 1;
  1418. } else {
  1419. phydev->pause = 1;
  1420. phydev->asym_pause = 0;
  1421. }
  1422. }
  1423. }
  1424. return 0;
  1425. }
  1426. /* marvell_read_status_page
  1427. *
  1428. * Description:
  1429. * Check the link, then figure out the current state
  1430. * by comparing what we advertise with what the link partner
  1431. * advertises. Start by checking the gigabit possibilities,
  1432. * then move on to 10/100.
  1433. */
  1434. static int marvell_read_status_page(struct phy_device *phydev, int page)
  1435. {
  1436. int status;
  1437. int fiber;
  1438. int err;
  1439. status = phy_read(phydev, MII_M1011_PHY_STATUS);
  1440. if (status < 0)
  1441. return status;
  1442. /* Use the generic register for copper link status,
  1443. * and the PHY status register for fiber link status.
  1444. */
  1445. if (page == MII_MARVELL_FIBER_PAGE) {
  1446. phydev->link = !!(status & MII_M1011_PHY_STATUS_LINK);
  1447. } else {
  1448. err = genphy_update_link(phydev);
  1449. if (err)
  1450. return err;
  1451. }
  1452. if (page == MII_MARVELL_FIBER_PAGE)
  1453. fiber = 1;
  1454. else
  1455. fiber = 0;
  1456. linkmode_zero(phydev->lp_advertising);
  1457. phydev->pause = 0;
  1458. phydev->asym_pause = 0;
  1459. phydev->speed = SPEED_UNKNOWN;
  1460. phydev->duplex = DUPLEX_UNKNOWN;
  1461. phydev->port = fiber ? PORT_FIBRE : PORT_TP;
  1462. if (fiber) {
  1463. phydev->mdix = ETH_TP_MDI_INVALID;
  1464. } else {
  1465. /* The MDI-X state is set regardless of Autoneg being enabled
  1466. * and reflects forced MDI-X state as well as auto resolution
  1467. */
  1468. if (status & MII_M1011_PHY_STATUS_RESOLVED)
  1469. phydev->mdix = status & MII_M1011_PHY_STATUS_MDIX ?
  1470. ETH_TP_MDI_X : ETH_TP_MDI;
  1471. else
  1472. phydev->mdix = ETH_TP_MDI_INVALID;
  1473. }
  1474. if (phydev->autoneg == AUTONEG_ENABLE)
  1475. err = marvell_read_status_page_an(phydev, fiber, status);
  1476. else
  1477. err = genphy_read_status_fixed(phydev);
  1478. return err;
  1479. }
  1480. /* marvell_read_status
  1481. *
  1482. * Some Marvell's phys have two modes: fiber and copper.
  1483. * Both need status checked.
  1484. * Description:
  1485. * First, check the fiber link and status.
  1486. * If the fiber link is down, check the copper link and status which
  1487. * will be the default value if both link are down.
  1488. */
  1489. static int marvell_read_status(struct phy_device *phydev)
  1490. {
  1491. int err;
  1492. /* Check the fiber mode first */
  1493. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1494. phydev->supported) &&
  1495. phydev->interface != PHY_INTERFACE_MODE_SGMII) {
  1496. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1497. if (err < 0)
  1498. goto error;
  1499. err = marvell_read_status_page(phydev, MII_MARVELL_FIBER_PAGE);
  1500. if (err < 0)
  1501. goto error;
  1502. /* If the fiber link is up, it is the selected and
  1503. * used link. In this case, we need to stay in the
  1504. * fiber page. Please to be careful about that, avoid
  1505. * to restore Copper page in other functions which
  1506. * could break the behaviour for some fiber phy like
  1507. * 88E1512.
  1508. */
  1509. if (phydev->link)
  1510. return 0;
  1511. /* If fiber link is down, check and save copper mode state */
  1512. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1513. if (err < 0)
  1514. goto error;
  1515. }
  1516. return marvell_read_status_page(phydev, MII_MARVELL_COPPER_PAGE);
  1517. error:
  1518. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1519. return err;
  1520. }
  1521. /* marvell_suspend
  1522. *
  1523. * Some Marvell's phys have two modes: fiber and copper.
  1524. * Both need to be suspended
  1525. */
  1526. static int marvell_suspend(struct phy_device *phydev)
  1527. {
  1528. int err;
  1529. /* Suspend the fiber mode first */
  1530. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1531. phydev->supported)) {
  1532. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1533. if (err < 0)
  1534. goto error;
  1535. /* With the page set, use the generic suspend */
  1536. err = genphy_suspend(phydev);
  1537. if (err < 0)
  1538. goto error;
  1539. /* Then, the copper link */
  1540. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1541. if (err < 0)
  1542. goto error;
  1543. }
  1544. /* With the page set, use the generic suspend */
  1545. return genphy_suspend(phydev);
  1546. error:
  1547. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1548. return err;
  1549. }
  1550. /* marvell_resume
  1551. *
  1552. * Some Marvell's phys have two modes: fiber and copper.
  1553. * Both need to be resumed
  1554. */
  1555. static int marvell_resume(struct phy_device *phydev)
  1556. {
  1557. int err;
  1558. /* Resume the fiber mode first */
  1559. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1560. phydev->supported)) {
  1561. err = marvell_set_page(phydev, MII_MARVELL_FIBER_PAGE);
  1562. if (err < 0)
  1563. goto error;
  1564. /* With the page set, use the generic resume */
  1565. err = genphy_resume(phydev);
  1566. if (err < 0)
  1567. goto error;
  1568. /* Then, the copper link */
  1569. err = marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1570. if (err < 0)
  1571. goto error;
  1572. }
  1573. /* With the page set, use the generic resume */
  1574. return genphy_resume(phydev);
  1575. error:
  1576. marvell_set_page(phydev, MII_MARVELL_COPPER_PAGE);
  1577. return err;
  1578. }
  1579. /* m88e1510_resume
  1580. *
  1581. * The 88e1510 PHY has an erratum where the phy downshift counter is not cleared
  1582. * after phy being suspended(BMCR_PDOWN set) and then later resumed(BMCR_PDOWN
  1583. * cleared). This can cause the link to intermittently downshift to a lower speed.
  1584. *
  1585. * Disabling and re-enabling the downshift feature clears the counter, allowing
  1586. * the PHY to retry gigabit link negotiation up to the programmed retry count
  1587. * before downshifting. This behavior has been observed on copper links.
  1588. */
  1589. static int m88e1510_resume(struct phy_device *phydev)
  1590. {
  1591. int err;
  1592. u8 cnt = 0;
  1593. err = marvell_resume(phydev);
  1594. if (err < 0)
  1595. return err;
  1596. /* read downshift counter value */
  1597. err = m88e1011_get_downshift(phydev, &cnt);
  1598. if (err < 0)
  1599. return err;
  1600. if (cnt) {
  1601. /* downshift disabled */
  1602. err = m88e1011_set_downshift(phydev, 0);
  1603. if (err < 0)
  1604. return err;
  1605. /* downshift enabled, with previous counter value */
  1606. err = m88e1011_set_downshift(phydev, cnt);
  1607. }
  1608. return err;
  1609. }
  1610. static int marvell_aneg_done(struct phy_device *phydev)
  1611. {
  1612. int retval = phy_read(phydev, MII_M1011_PHY_STATUS);
  1613. return (retval < 0) ? retval : (retval & MII_M1011_PHY_STATUS_RESOLVED);
  1614. }
  1615. static void m88e1318_get_wol(struct phy_device *phydev,
  1616. struct ethtool_wolinfo *wol)
  1617. {
  1618. int ret;
  1619. wol->supported = WAKE_MAGIC | WAKE_PHY;
  1620. wol->wolopts = 0;
  1621. ret = phy_read_paged(phydev, MII_MARVELL_WOL_PAGE,
  1622. MII_88E1318S_PHY_WOL_CTRL);
  1623. if (ret < 0)
  1624. return;
  1625. if (ret & MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE)
  1626. wol->wolopts |= WAKE_MAGIC;
  1627. if (ret & MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE)
  1628. wol->wolopts |= WAKE_PHY;
  1629. }
  1630. static int m88e1318_set_wol(struct phy_device *phydev,
  1631. struct ethtool_wolinfo *wol)
  1632. {
  1633. int err = 0, oldpage;
  1634. oldpage = phy_save_page(phydev);
  1635. if (oldpage < 0)
  1636. goto error;
  1637. if (wol->wolopts & (WAKE_MAGIC | WAKE_PHY)) {
  1638. /* Explicitly switch to page 0x00, just to be sure */
  1639. err = marvell_write_page(phydev, MII_MARVELL_COPPER_PAGE);
  1640. if (err < 0)
  1641. goto error;
  1642. /* If WOL event happened once, the LED[2] interrupt pin
  1643. * will not be cleared unless we reading the interrupt status
  1644. * register. If interrupts are in use, the normal interrupt
  1645. * handling will clear the WOL event. Clear the WOL event
  1646. * before enabling it if !phy_interrupt_is_valid()
  1647. */
  1648. if (!phy_interrupt_is_valid(phydev))
  1649. __phy_read(phydev, MII_M1011_IEVENT);
  1650. /* Enable the WOL interrupt */
  1651. err = __phy_set_bits(phydev, MII_88E1318S_PHY_CSIER,
  1652. MII_88E1318S_PHY_CSIER_WOL_EIE);
  1653. if (err < 0)
  1654. goto error;
  1655. err = marvell_write_page(phydev, MII_MARVELL_LED_PAGE);
  1656. if (err < 0)
  1657. goto error;
  1658. /* Setup LED[2] as interrupt pin (active low) */
  1659. err = __phy_modify(phydev, MII_88E1318S_PHY_LED_TCR,
  1660. MII_88E1318S_PHY_LED_TCR_FORCE_INT,
  1661. MII_88E1318S_PHY_LED_TCR_INTn_ENABLE |
  1662. MII_88E1318S_PHY_LED_TCR_INT_ACTIVE_LOW);
  1663. if (err < 0)
  1664. goto error;
  1665. }
  1666. if (wol->wolopts & WAKE_MAGIC) {
  1667. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1668. if (err < 0)
  1669. goto error;
  1670. /* Store the device address for the magic packet */
  1671. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD2,
  1672. ((phydev->attached_dev->dev_addr[5] << 8) |
  1673. phydev->attached_dev->dev_addr[4]));
  1674. if (err < 0)
  1675. goto error;
  1676. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD1,
  1677. ((phydev->attached_dev->dev_addr[3] << 8) |
  1678. phydev->attached_dev->dev_addr[2]));
  1679. if (err < 0)
  1680. goto error;
  1681. err = __phy_write(phydev, MII_88E1318S_PHY_MAGIC_PACKET_WORD0,
  1682. ((phydev->attached_dev->dev_addr[1] << 8) |
  1683. phydev->attached_dev->dev_addr[0]));
  1684. if (err < 0)
  1685. goto error;
  1686. /* Clear WOL status and enable magic packet matching */
  1687. err = __phy_set_bits(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1688. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1689. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE);
  1690. if (err < 0)
  1691. goto error;
  1692. } else {
  1693. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1694. if (err < 0)
  1695. goto error;
  1696. /* Clear WOL status and disable magic packet matching */
  1697. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1698. MII_88E1318S_PHY_WOL_CTRL_MAGIC_PACKET_MATCH_ENABLE,
  1699. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1700. if (err < 0)
  1701. goto error;
  1702. }
  1703. if (wol->wolopts & WAKE_PHY) {
  1704. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1705. if (err < 0)
  1706. goto error;
  1707. /* Clear WOL status and enable link up event */
  1708. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL, 0,
  1709. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS |
  1710. MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE);
  1711. if (err < 0)
  1712. goto error;
  1713. } else {
  1714. err = marvell_write_page(phydev, MII_MARVELL_WOL_PAGE);
  1715. if (err < 0)
  1716. goto error;
  1717. /* Clear WOL status and disable link up event */
  1718. err = __phy_modify(phydev, MII_88E1318S_PHY_WOL_CTRL,
  1719. MII_88E1318S_PHY_WOL_CTRL_LINK_UP_ENABLE,
  1720. MII_88E1318S_PHY_WOL_CTRL_CLEAR_WOL_STATUS);
  1721. if (err < 0)
  1722. goto error;
  1723. }
  1724. error:
  1725. return phy_restore_page(phydev, oldpage, err);
  1726. }
  1727. static int marvell_get_sset_count(struct phy_device *phydev)
  1728. {
  1729. if (linkmode_test_bit(ETHTOOL_LINK_MODE_FIBRE_BIT,
  1730. phydev->supported))
  1731. return ARRAY_SIZE(marvell_hw_stats);
  1732. else
  1733. return ARRAY_SIZE(marvell_hw_stats) - NB_FIBER_STATS;
  1734. }
  1735. static int marvell_get_sset_count_simple(struct phy_device *phydev)
  1736. {
  1737. return ARRAY_SIZE(marvell_hw_stats_simple);
  1738. }
  1739. static void marvell_get_strings(struct phy_device *phydev, u8 *data)
  1740. {
  1741. int count = marvell_get_sset_count(phydev);
  1742. int i;
  1743. for (i = 0; i < count; i++)
  1744. ethtool_puts(&data, marvell_hw_stats[i].string);
  1745. }
  1746. static void marvell_get_strings_simple(struct phy_device *phydev, u8 *data)
  1747. {
  1748. int count = marvell_get_sset_count_simple(phydev);
  1749. int i;
  1750. for (i = 0; i < count; i++)
  1751. ethtool_puts(&data, marvell_hw_stats_simple[i].string);
  1752. }
  1753. static u64 marvell_get_stat(struct phy_device *phydev, int i)
  1754. {
  1755. struct marvell_hw_stat stat = marvell_hw_stats[i];
  1756. struct marvell_priv *priv = phydev->priv;
  1757. int val;
  1758. u64 ret;
  1759. val = phy_read_paged(phydev, stat.page, stat.reg);
  1760. if (val < 0) {
  1761. ret = U64_MAX;
  1762. } else {
  1763. val = val & ((1 << stat.bits) - 1);
  1764. priv->stats[i] += val;
  1765. ret = priv->stats[i];
  1766. }
  1767. return ret;
  1768. }
  1769. static u64 marvell_get_stat_simple(struct phy_device *phydev, int i)
  1770. {
  1771. struct marvell_hw_stat_simple stat = marvell_hw_stats_simple[i];
  1772. struct marvell_priv *priv = phydev->priv;
  1773. int val;
  1774. u64 ret;
  1775. val = phy_read(phydev, stat.reg);
  1776. if (val < 0) {
  1777. ret = U64_MAX;
  1778. } else {
  1779. val = val & ((1 << stat.bits) - 1);
  1780. priv->stats[i] += val;
  1781. ret = priv->stats[i];
  1782. }
  1783. return ret;
  1784. }
  1785. static void marvell_get_stats(struct phy_device *phydev,
  1786. struct ethtool_stats *stats, u64 *data)
  1787. {
  1788. int count = marvell_get_sset_count(phydev);
  1789. int i;
  1790. for (i = 0; i < count; i++)
  1791. data[i] = marvell_get_stat(phydev, i);
  1792. }
  1793. static void marvell_get_stats_simple(struct phy_device *phydev,
  1794. struct ethtool_stats *stats, u64 *data)
  1795. {
  1796. int count = marvell_get_sset_count_simple(phydev);
  1797. int i;
  1798. for (i = 0; i < count; i++)
  1799. data[i] = marvell_get_stat_simple(phydev, i);
  1800. }
  1801. static int m88e1510_loopback(struct phy_device *phydev, bool enable, int speed)
  1802. {
  1803. u16 bmcr_ctl, mscr2_ctl = 0;
  1804. int err;
  1805. if (!enable)
  1806. return genphy_loopback(phydev, enable, 0);
  1807. if (speed == SPEED_10 || speed == SPEED_100 || speed == SPEED_1000)
  1808. phydev->speed = speed;
  1809. else if (speed)
  1810. return -EINVAL;
  1811. bmcr_ctl = mii_bmcr_encode_fixed(phydev->speed, phydev->duplex);
  1812. err = phy_write(phydev, MII_BMCR, bmcr_ctl);
  1813. if (err < 0)
  1814. return err;
  1815. if (phydev->speed == SPEED_1000)
  1816. mscr2_ctl = BMCR_SPEED1000;
  1817. else if (phydev->speed == SPEED_100)
  1818. mscr2_ctl = BMCR_SPEED100;
  1819. err = phy_modify_paged(phydev, MII_MARVELL_MSCR_PAGE,
  1820. MII_88E1510_MSCR_2, BMCR_SPEED1000 |
  1821. BMCR_SPEED100, mscr2_ctl);
  1822. if (err < 0)
  1823. return err;
  1824. /* Need soft reset to have speed configuration takes effect */
  1825. err = genphy_soft_reset(phydev);
  1826. if (err < 0)
  1827. return err;
  1828. err = phy_modify(phydev, MII_BMCR, BMCR_LOOPBACK,
  1829. BMCR_LOOPBACK);
  1830. if (!err) {
  1831. /*
  1832. * It takes some time for PHY device to switch into loopback
  1833. * mode.
  1834. */
  1835. msleep(1000);
  1836. }
  1837. return err;
  1838. }
  1839. static int marvell_vct5_wait_complete(struct phy_device *phydev)
  1840. {
  1841. int i;
  1842. int val;
  1843. for (i = 0; i < 32; i++) {
  1844. val = __phy_read(phydev, MII_VCT5_CTRL);
  1845. if (val < 0)
  1846. return val;
  1847. if (val & MII_VCT5_CTRL_COMPLETE)
  1848. return 0;
  1849. }
  1850. phydev_err(phydev, "Timeout while waiting for cable test to finish\n");
  1851. return -ETIMEDOUT;
  1852. }
  1853. static int marvell_vct5_amplitude(struct phy_device *phydev, int pair)
  1854. {
  1855. int amplitude;
  1856. int val;
  1857. int reg;
  1858. reg = MII_VCT5_TX_RX_MDI0_COUPLING + pair;
  1859. val = __phy_read(phydev, reg);
  1860. if (val < 0)
  1861. return 0;
  1862. amplitude = (val & MII_VCT5_TX_RX_AMPLITUDE_MASK) >>
  1863. MII_VCT5_TX_RX_AMPLITUDE_SHIFT;
  1864. if (!(val & MII_VCT5_TX_RX_COUPLING_POSITIVE_REFLECTION))
  1865. amplitude = -amplitude;
  1866. return 1000 * amplitude / 128;
  1867. }
  1868. static u32 marvell_vct5_distance2cm(int distance)
  1869. {
  1870. return distance * 805 / 10;
  1871. }
  1872. static u32 marvell_vct5_cm2distance(int cm)
  1873. {
  1874. return cm * 10 / 805;
  1875. }
  1876. static int marvell_vct5_amplitude_distance(struct phy_device *phydev,
  1877. int distance, int pair)
  1878. {
  1879. u16 reg;
  1880. int err;
  1881. int mV;
  1882. int i;
  1883. err = __phy_write(phydev, MII_VCT5_SAMPLE_POINT_DISTANCE,
  1884. distance);
  1885. if (err)
  1886. return err;
  1887. reg = MII_VCT5_CTRL_ENABLE |
  1888. MII_VCT5_CTRL_TX_SAME_CHANNEL |
  1889. MII_VCT5_CTRL_SAMPLES_DEFAULT |
  1890. MII_VCT5_CTRL_SAMPLE_POINT |
  1891. MII_VCT5_CTRL_PEEK_HYST_DEFAULT;
  1892. err = __phy_write(phydev, MII_VCT5_CTRL, reg);
  1893. if (err)
  1894. return err;
  1895. err = marvell_vct5_wait_complete(phydev);
  1896. if (err)
  1897. return err;
  1898. for (i = 0; i < 4; i++) {
  1899. if (pair != PHY_PAIR_ALL && i != pair)
  1900. continue;
  1901. mV = marvell_vct5_amplitude(phydev, i);
  1902. ethnl_cable_test_amplitude(phydev, i, mV);
  1903. }
  1904. return 0;
  1905. }
  1906. static int marvell_vct5_amplitude_graph(struct phy_device *phydev)
  1907. {
  1908. struct marvell_priv *priv = phydev->priv;
  1909. int distance;
  1910. u16 width;
  1911. int page;
  1912. int err;
  1913. u16 reg;
  1914. if (priv->first <= TDR_SHORT_CABLE_LENGTH)
  1915. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS;
  1916. else
  1917. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
  1918. reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
  1919. MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
  1920. MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
  1921. err = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1922. MII_VCT5_TX_PULSE_CTRL, reg);
  1923. if (err)
  1924. return err;
  1925. /* Reading the TDR data is very MDIO heavy. We need to optimize
  1926. * access to keep the time to a minimum. So lock the bus once,
  1927. * and don't release it until complete. We can then avoid having
  1928. * to change the page for every access, greatly speeding things
  1929. * up.
  1930. */
  1931. page = phy_select_page(phydev, MII_MARVELL_VCT5_PAGE);
  1932. if (page < 0)
  1933. goto restore_page;
  1934. for (distance = priv->first;
  1935. distance <= priv->last;
  1936. distance += priv->step) {
  1937. err = marvell_vct5_amplitude_distance(phydev, distance,
  1938. priv->pair);
  1939. if (err)
  1940. goto restore_page;
  1941. if (distance > TDR_SHORT_CABLE_LENGTH &&
  1942. width == MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_32nS) {
  1943. width = MII_VCT5_TX_PULSE_CTRL_PULSE_WIDTH_128nS;
  1944. reg = MII_VCT5_TX_PULSE_CTRL_GT_140m_46_86mV |
  1945. MII_VCT5_TX_PULSE_CTRL_DONT_WAIT_LINK_DOWN |
  1946. MII_VCT5_TX_PULSE_CTRL_MAX_AMP | width;
  1947. err = __phy_write(phydev, MII_VCT5_TX_PULSE_CTRL, reg);
  1948. if (err)
  1949. goto restore_page;
  1950. }
  1951. }
  1952. restore_page:
  1953. return phy_restore_page(phydev, page, err);
  1954. }
  1955. static int marvell_cable_test_start_common(struct phy_device *phydev)
  1956. {
  1957. int bmcr, bmsr, ret;
  1958. /* If auto-negotiation is enabled, but not complete, the cable
  1959. * test never completes. So disable auto-neg.
  1960. */
  1961. bmcr = phy_read(phydev, MII_BMCR);
  1962. if (bmcr < 0)
  1963. return bmcr;
  1964. bmsr = phy_read(phydev, MII_BMSR);
  1965. if (bmsr < 0)
  1966. return bmsr;
  1967. if (bmcr & BMCR_ANENABLE) {
  1968. ret = phy_clear_bits(phydev, MII_BMCR, BMCR_ANENABLE);
  1969. if (ret < 0)
  1970. return ret;
  1971. ret = genphy_soft_reset(phydev);
  1972. if (ret < 0)
  1973. return ret;
  1974. }
  1975. /* If the link is up, allow it some time to go down */
  1976. if (bmsr & BMSR_LSTATUS)
  1977. msleep(1500);
  1978. return 0;
  1979. }
  1980. static int marvell_vct7_cable_test_start(struct phy_device *phydev)
  1981. {
  1982. struct marvell_priv *priv = phydev->priv;
  1983. int ret;
  1984. ret = marvell_cable_test_start_common(phydev);
  1985. if (ret)
  1986. return ret;
  1987. priv->cable_test_tdr = false;
  1988. /* Reset the VCT5 API control to defaults, otherwise
  1989. * VCT7 does not work correctly.
  1990. */
  1991. ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  1992. MII_VCT5_CTRL,
  1993. MII_VCT5_CTRL_TX_SAME_CHANNEL |
  1994. MII_VCT5_CTRL_SAMPLES_DEFAULT |
  1995. MII_VCT5_CTRL_MODE_MAXIMUM_PEEK |
  1996. MII_VCT5_CTRL_PEEK_HYST_DEFAULT);
  1997. if (ret)
  1998. return ret;
  1999. ret = phy_write_paged(phydev, MII_MARVELL_VCT5_PAGE,
  2000. MII_VCT5_SAMPLE_POINT_DISTANCE, 0);
  2001. if (ret)
  2002. return ret;
  2003. return phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2004. MII_VCT7_CTRL,
  2005. MII_VCT7_CTRL_RUN_NOW |
  2006. MII_VCT7_CTRL_CENTIMETERS);
  2007. }
  2008. static int marvell_vct5_cable_test_tdr_start(struct phy_device *phydev,
  2009. const struct phy_tdr_config *cfg)
  2010. {
  2011. struct marvell_priv *priv = phydev->priv;
  2012. int ret;
  2013. priv->cable_test_tdr = true;
  2014. priv->first = marvell_vct5_cm2distance(cfg->first);
  2015. priv->last = marvell_vct5_cm2distance(cfg->last);
  2016. priv->step = marvell_vct5_cm2distance(cfg->step);
  2017. priv->pair = cfg->pair;
  2018. if (priv->first > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
  2019. return -EINVAL;
  2020. if (priv->last > MII_VCT5_SAMPLE_POINT_DISTANCE_MAX)
  2021. return -EINVAL;
  2022. /* Disable VCT7 */
  2023. ret = phy_write_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2024. MII_VCT7_CTRL, 0);
  2025. if (ret)
  2026. return ret;
  2027. ret = marvell_cable_test_start_common(phydev);
  2028. if (ret)
  2029. return ret;
  2030. ret = ethnl_cable_test_pulse(phydev, 1000);
  2031. if (ret)
  2032. return ret;
  2033. return ethnl_cable_test_step(phydev,
  2034. marvell_vct5_distance2cm(priv->first),
  2035. marvell_vct5_distance2cm(priv->last),
  2036. marvell_vct5_distance2cm(priv->step));
  2037. }
  2038. static int marvell_vct7_distance_to_length(int distance, bool meter)
  2039. {
  2040. if (meter)
  2041. distance *= 100;
  2042. return distance;
  2043. }
  2044. static bool marvell_vct7_distance_valid(int result)
  2045. {
  2046. switch (result) {
  2047. case MII_VCT7_RESULTS_OPEN:
  2048. case MII_VCT7_RESULTS_SAME_SHORT:
  2049. case MII_VCT7_RESULTS_CROSS_SHORT:
  2050. return true;
  2051. }
  2052. return false;
  2053. }
  2054. static int marvell_vct7_report_length(struct phy_device *phydev,
  2055. int pair, bool meter)
  2056. {
  2057. int length;
  2058. int ret;
  2059. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2060. MII_VCT7_PAIR_0_DISTANCE + pair);
  2061. if (ret < 0)
  2062. return ret;
  2063. length = marvell_vct7_distance_to_length(ret, meter);
  2064. ethnl_cable_test_fault_length(phydev, pair, length);
  2065. return 0;
  2066. }
  2067. static int marvell_vct7_cable_test_report_trans(int result)
  2068. {
  2069. switch (result) {
  2070. case MII_VCT7_RESULTS_OK:
  2071. return ETHTOOL_A_CABLE_RESULT_CODE_OK;
  2072. case MII_VCT7_RESULTS_OPEN:
  2073. return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
  2074. case MII_VCT7_RESULTS_SAME_SHORT:
  2075. return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
  2076. case MII_VCT7_RESULTS_CROSS_SHORT:
  2077. return ETHTOOL_A_CABLE_RESULT_CODE_CROSS_SHORT;
  2078. default:
  2079. return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
  2080. }
  2081. }
  2082. static int marvell_vct7_cable_test_report(struct phy_device *phydev)
  2083. {
  2084. int pair0, pair1, pair2, pair3;
  2085. bool meter;
  2086. int ret;
  2087. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2088. MII_VCT7_RESULTS);
  2089. if (ret < 0)
  2090. return ret;
  2091. pair3 = (ret & MII_VCT7_RESULTS_PAIR3_MASK) >>
  2092. MII_VCT7_RESULTS_PAIR3_SHIFT;
  2093. pair2 = (ret & MII_VCT7_RESULTS_PAIR2_MASK) >>
  2094. MII_VCT7_RESULTS_PAIR2_SHIFT;
  2095. pair1 = (ret & MII_VCT7_RESULTS_PAIR1_MASK) >>
  2096. MII_VCT7_RESULTS_PAIR1_SHIFT;
  2097. pair0 = (ret & MII_VCT7_RESULTS_PAIR0_MASK) >>
  2098. MII_VCT7_RESULTS_PAIR0_SHIFT;
  2099. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
  2100. marvell_vct7_cable_test_report_trans(pair0));
  2101. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
  2102. marvell_vct7_cable_test_report_trans(pair1));
  2103. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_C,
  2104. marvell_vct7_cable_test_report_trans(pair2));
  2105. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_D,
  2106. marvell_vct7_cable_test_report_trans(pair3));
  2107. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE, MII_VCT7_CTRL);
  2108. if (ret < 0)
  2109. return ret;
  2110. meter = ret & MII_VCT7_CTRL_METERS;
  2111. if (marvell_vct7_distance_valid(pair0))
  2112. marvell_vct7_report_length(phydev, 0, meter);
  2113. if (marvell_vct7_distance_valid(pair1))
  2114. marvell_vct7_report_length(phydev, 1, meter);
  2115. if (marvell_vct7_distance_valid(pair2))
  2116. marvell_vct7_report_length(phydev, 2, meter);
  2117. if (marvell_vct7_distance_valid(pair3))
  2118. marvell_vct7_report_length(phydev, 3, meter);
  2119. return 0;
  2120. }
  2121. static int marvell_vct7_cable_test_get_status(struct phy_device *phydev,
  2122. bool *finished)
  2123. {
  2124. struct marvell_priv *priv = phydev->priv;
  2125. int ret;
  2126. if (priv->cable_test_tdr) {
  2127. ret = marvell_vct5_amplitude_graph(phydev);
  2128. *finished = true;
  2129. return ret;
  2130. }
  2131. *finished = false;
  2132. ret = phy_read_paged(phydev, MII_MARVELL_VCT7_PAGE,
  2133. MII_VCT7_CTRL);
  2134. if (ret < 0)
  2135. return ret;
  2136. if (!(ret & MII_VCT7_CTRL_IN_PROGRESS)) {
  2137. *finished = true;
  2138. return marvell_vct7_cable_test_report(phydev);
  2139. }
  2140. return 0;
  2141. }
  2142. static int m88e3082_vct_cable_test_start(struct phy_device *phydev)
  2143. {
  2144. struct marvell_priv *priv = phydev->priv;
  2145. int ret;
  2146. /* It needs some magic workarounds described in VCT manual for this PHY.
  2147. */
  2148. ret = phy_write(phydev, 29, 0x0003);
  2149. if (ret < 0)
  2150. return ret;
  2151. ret = phy_write(phydev, 30, 0x6440);
  2152. if (ret < 0)
  2153. return ret;
  2154. if (priv->vct_phase == M88E3082_VCT_PHASE1) {
  2155. ret = phy_write(phydev, 29, 0x000a);
  2156. if (ret < 0)
  2157. return ret;
  2158. ret = phy_write(phydev, 30, 0x0002);
  2159. if (ret < 0)
  2160. return ret;
  2161. }
  2162. ret = phy_write(phydev, MII_BMCR,
  2163. BMCR_RESET | BMCR_SPEED100 | BMCR_FULLDPLX);
  2164. if (ret < 0)
  2165. return ret;
  2166. ret = phy_write(phydev, MII_VCT_TXPINS, MII_VCT_TXPINS_ENVCT);
  2167. if (ret < 0)
  2168. return ret;
  2169. ret = phy_write(phydev, 29, 0x0003);
  2170. if (ret < 0)
  2171. return ret;
  2172. ret = phy_write(phydev, 30, 0x0);
  2173. if (ret < 0)
  2174. return ret;
  2175. if (priv->vct_phase == M88E3082_VCT_OFF) {
  2176. priv->vct_phase = M88E3082_VCT_PHASE1;
  2177. priv->pair = 0;
  2178. return 0;
  2179. }
  2180. ret = phy_write(phydev, 29, 0x000a);
  2181. if (ret < 0)
  2182. return ret;
  2183. ret = phy_write(phydev, 30, 0x0);
  2184. if (ret < 0)
  2185. return ret;
  2186. priv->vct_phase = M88E3082_VCT_PHASE2;
  2187. return 0;
  2188. }
  2189. static int m88e3082_vct_cable_test_report_trans(int result, u8 distance)
  2190. {
  2191. switch (result) {
  2192. case MII_VCT_TXRXPINS_VCTTST_OK:
  2193. if (distance == MII_VCT_TXRXPINS_DISTRFLN_MAX)
  2194. return ETHTOOL_A_CABLE_RESULT_CODE_OK;
  2195. return ETHTOOL_A_CABLE_RESULT_CODE_IMPEDANCE_MISMATCH;
  2196. case MII_VCT_TXRXPINS_VCTTST_SHORT:
  2197. return ETHTOOL_A_CABLE_RESULT_CODE_SAME_SHORT;
  2198. case MII_VCT_TXRXPINS_VCTTST_OPEN:
  2199. return ETHTOOL_A_CABLE_RESULT_CODE_OPEN;
  2200. default:
  2201. return ETHTOOL_A_CABLE_RESULT_CODE_UNSPEC;
  2202. }
  2203. }
  2204. static u32 m88e3082_vct_distrfln_2_cm(u8 distrfln)
  2205. {
  2206. if (distrfln < 24)
  2207. return 0;
  2208. /* Original function for meters: y = 0.7861x - 18.862 */
  2209. return (7861 * distrfln - 188620) / 100;
  2210. }
  2211. static int m88e3082_vct_cable_test_get_status(struct phy_device *phydev,
  2212. bool *finished)
  2213. {
  2214. u8 tx_vcttst_res, rx_vcttst_res, tx_distrfln, rx_distrfln;
  2215. struct marvell_priv *priv = phydev->priv;
  2216. int ret, tx_result, rx_result;
  2217. bool done_phase = true;
  2218. *finished = false;
  2219. ret = phy_read(phydev, MII_VCT_TXPINS);
  2220. if (ret < 0)
  2221. return ret;
  2222. else if (ret & MII_VCT_TXPINS_ENVCT)
  2223. return 0;
  2224. tx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
  2225. tx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
  2226. MII_VCT_TXRXPINS_VCTTST_SHIFT;
  2227. ret = phy_read(phydev, MII_VCT_RXPINS);
  2228. if (ret < 0)
  2229. return ret;
  2230. rx_distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
  2231. rx_vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
  2232. MII_VCT_TXRXPINS_VCTTST_SHIFT;
  2233. *finished = true;
  2234. switch (priv->vct_phase) {
  2235. case M88E3082_VCT_PHASE1:
  2236. tx_result = m88e3082_vct_cable_test_report_trans(tx_vcttst_res,
  2237. tx_distrfln);
  2238. rx_result = m88e3082_vct_cable_test_report_trans(rx_vcttst_res,
  2239. rx_distrfln);
  2240. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_A,
  2241. tx_result);
  2242. ethnl_cable_test_result(phydev, ETHTOOL_A_CABLE_PAIR_B,
  2243. rx_result);
  2244. if (tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
  2245. done_phase = false;
  2246. priv->pair |= M88E3082_PAIR_A;
  2247. } else if (tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2248. u8 pair = ETHTOOL_A_CABLE_PAIR_A;
  2249. u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
  2250. ethnl_cable_test_fault_length(phydev, pair, cm);
  2251. }
  2252. if (rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN) {
  2253. done_phase = false;
  2254. priv->pair |= M88E3082_PAIR_B;
  2255. } else if (rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2256. u8 pair = ETHTOOL_A_CABLE_PAIR_B;
  2257. u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
  2258. ethnl_cable_test_fault_length(phydev, pair, cm);
  2259. }
  2260. break;
  2261. case M88E3082_VCT_PHASE2:
  2262. if (priv->pair & M88E3082_PAIR_A &&
  2263. tx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
  2264. tx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2265. u8 pair = ETHTOOL_A_CABLE_PAIR_A;
  2266. u32 cm = m88e3082_vct_distrfln_2_cm(tx_distrfln);
  2267. ethnl_cable_test_fault_length(phydev, pair, cm);
  2268. }
  2269. if (priv->pair & M88E3082_PAIR_B &&
  2270. rx_vcttst_res == MII_VCT_TXRXPINS_VCTTST_OPEN &&
  2271. rx_distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2272. u8 pair = ETHTOOL_A_CABLE_PAIR_B;
  2273. u32 cm = m88e3082_vct_distrfln_2_cm(rx_distrfln);
  2274. ethnl_cable_test_fault_length(phydev, pair, cm);
  2275. }
  2276. break;
  2277. default:
  2278. return -EINVAL;
  2279. }
  2280. if (!done_phase) {
  2281. *finished = false;
  2282. return m88e3082_vct_cable_test_start(phydev);
  2283. }
  2284. if (*finished)
  2285. priv->vct_phase = M88E3082_VCT_OFF;
  2286. return 0;
  2287. }
  2288. static int m88e1111_vct_cable_test_start(struct phy_device *phydev)
  2289. {
  2290. int ret;
  2291. ret = marvell_cable_test_start_common(phydev);
  2292. if (ret)
  2293. return ret;
  2294. /* It needs some magic workarounds described in VCT manual for this PHY.
  2295. */
  2296. ret = phy_write(phydev, 29, 0x0018);
  2297. if (ret < 0)
  2298. return ret;
  2299. ret = phy_write(phydev, 30, 0x00c2);
  2300. if (ret < 0)
  2301. return ret;
  2302. ret = phy_write(phydev, 30, 0x00ca);
  2303. if (ret < 0)
  2304. return ret;
  2305. ret = phy_write(phydev, 30, 0x00c2);
  2306. if (ret < 0)
  2307. return ret;
  2308. ret = phy_write_paged(phydev, MII_MARVELL_COPPER_PAGE, MII_VCT_SR,
  2309. MII_VCT_TXPINS_ENVCT);
  2310. if (ret < 0)
  2311. return ret;
  2312. ret = phy_write(phydev, 29, 0x0018);
  2313. if (ret < 0)
  2314. return ret;
  2315. ret = phy_write(phydev, 30, 0x0042);
  2316. if (ret < 0)
  2317. return ret;
  2318. return 0;
  2319. }
  2320. static u32 m88e1111_vct_distrfln_2_cm(u8 distrfln)
  2321. {
  2322. if (distrfln < 36)
  2323. return 0;
  2324. /* Original function for meters: y = 0.8018x - 28.751 */
  2325. return (8018 * distrfln - 287510) / 100;
  2326. }
  2327. static int m88e1111_vct_cable_test_get_status(struct phy_device *phydev,
  2328. bool *finished)
  2329. {
  2330. u8 vcttst_res, distrfln;
  2331. int ret, result;
  2332. *finished = false;
  2333. /* Each pair use one page: A-0, B-1, C-2, D-3 */
  2334. for (u8 i = 0; i < 4; i++) {
  2335. ret = phy_read_paged(phydev, i, MII_VCT_SR);
  2336. if (ret < 0)
  2337. return ret;
  2338. else if (i == 0 && ret & MII_VCT_TXPINS_ENVCT)
  2339. return 0;
  2340. distrfln = ret & MII_VCT_TXRXPINS_DISTRFLN;
  2341. vcttst_res = (ret & MII_VCT_TXRXPINS_VCTTST) >>
  2342. MII_VCT_TXRXPINS_VCTTST_SHIFT;
  2343. result = m88e3082_vct_cable_test_report_trans(vcttst_res,
  2344. distrfln);
  2345. ethnl_cable_test_result(phydev, i, result);
  2346. if (distrfln < MII_VCT_TXRXPINS_DISTRFLN_MAX) {
  2347. u32 cm = m88e1111_vct_distrfln_2_cm(distrfln);
  2348. ethnl_cable_test_fault_length(phydev, i, cm);
  2349. }
  2350. }
  2351. *finished = true;
  2352. return 0;
  2353. }
  2354. #ifdef CONFIG_HWMON
  2355. struct marvell_hwmon_ops {
  2356. int (*config)(struct phy_device *phydev);
  2357. int (*get_temp)(struct phy_device *phydev, long *temp);
  2358. int (*get_temp_critical)(struct phy_device *phydev, long *temp);
  2359. int (*set_temp_critical)(struct phy_device *phydev, long temp);
  2360. int (*get_temp_alarm)(struct phy_device *phydev, long *alarm);
  2361. };
  2362. static const struct marvell_hwmon_ops *
  2363. to_marvell_hwmon_ops(const struct phy_device *phydev)
  2364. {
  2365. return phydev->drv->driver_data;
  2366. }
  2367. static int m88e1121_get_temp(struct phy_device *phydev, long *temp)
  2368. {
  2369. int oldpage;
  2370. int ret = 0;
  2371. int val;
  2372. *temp = 0;
  2373. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  2374. if (oldpage < 0)
  2375. goto error;
  2376. /* Enable temperature sensor */
  2377. ret = __phy_read(phydev, MII_88E1121_MISC_TEST);
  2378. if (ret < 0)
  2379. goto error;
  2380. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  2381. ret | MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  2382. if (ret < 0)
  2383. goto error;
  2384. /* Wait for temperature to stabilize */
  2385. usleep_range(10000, 12000);
  2386. val = __phy_read(phydev, MII_88E1121_MISC_TEST);
  2387. if (val < 0) {
  2388. ret = val;
  2389. goto error;
  2390. }
  2391. /* Disable temperature sensor */
  2392. ret = __phy_write(phydev, MII_88E1121_MISC_TEST,
  2393. ret & ~MII_88E1121_MISC_TEST_TEMP_SENSOR_EN);
  2394. if (ret < 0)
  2395. goto error;
  2396. *temp = ((val & MII_88E1121_MISC_TEST_TEMP_MASK) - 5) * 5000;
  2397. error:
  2398. return phy_restore_page(phydev, oldpage, ret);
  2399. }
  2400. static int m88e1510_get_temp(struct phy_device *phydev, long *temp)
  2401. {
  2402. int ret;
  2403. *temp = 0;
  2404. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2405. MII_88E1510_TEMP_SENSOR);
  2406. if (ret < 0)
  2407. return ret;
  2408. *temp = ((ret & MII_88E1510_TEMP_SENSOR_MASK) - 25) * 1000;
  2409. return 0;
  2410. }
  2411. static int m88e1510_get_temp_critical(struct phy_device *phydev, long *temp)
  2412. {
  2413. int ret;
  2414. *temp = 0;
  2415. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2416. MII_88E1121_MISC_TEST);
  2417. if (ret < 0)
  2418. return ret;
  2419. *temp = (((ret & MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK) >>
  2420. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT) * 5) - 25;
  2421. /* convert to mC */
  2422. *temp *= 1000;
  2423. return 0;
  2424. }
  2425. static int m88e1510_set_temp_critical(struct phy_device *phydev, long temp)
  2426. {
  2427. temp = temp / 1000;
  2428. temp = clamp_val(DIV_ROUND_CLOSEST(temp, 5) + 5, 0, 0x1f);
  2429. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2430. MII_88E1121_MISC_TEST,
  2431. MII_88E1510_MISC_TEST_TEMP_THRESHOLD_MASK,
  2432. temp << MII_88E1510_MISC_TEST_TEMP_THRESHOLD_SHIFT);
  2433. }
  2434. static int m88e1510_get_temp_alarm(struct phy_device *phydev, long *alarm)
  2435. {
  2436. int ret;
  2437. *alarm = false;
  2438. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2439. MII_88E1121_MISC_TEST);
  2440. if (ret < 0)
  2441. return ret;
  2442. *alarm = !!(ret & MII_88E1510_MISC_TEST_TEMP_IRQ);
  2443. return 0;
  2444. }
  2445. static int m88e6390_get_temp(struct phy_device *phydev, long *temp)
  2446. {
  2447. int sum = 0;
  2448. int oldpage;
  2449. int ret = 0;
  2450. int i;
  2451. *temp = 0;
  2452. oldpage = phy_select_page(phydev, MII_MARVELL_MISC_TEST_PAGE);
  2453. if (oldpage < 0)
  2454. goto error;
  2455. /* Enable temperature sensor */
  2456. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  2457. if (ret < 0)
  2458. goto error;
  2459. ret &= ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
  2460. ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE_SAMPLE_1S;
  2461. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  2462. if (ret < 0)
  2463. goto error;
  2464. /* Wait for temperature to stabilize */
  2465. usleep_range(10000, 12000);
  2466. /* Reading the temperature sense has an errata. You need to read
  2467. * a number of times and take an average.
  2468. */
  2469. for (i = 0; i < MII_88E6390_TEMP_SENSOR_SAMPLES; i++) {
  2470. ret = __phy_read(phydev, MII_88E6390_TEMP_SENSOR);
  2471. if (ret < 0)
  2472. goto error;
  2473. sum += ret & MII_88E6390_TEMP_SENSOR_MASK;
  2474. }
  2475. sum /= MII_88E6390_TEMP_SENSOR_SAMPLES;
  2476. *temp = (sum - 75) * 1000;
  2477. /* Disable temperature sensor */
  2478. ret = __phy_read(phydev, MII_88E6390_MISC_TEST);
  2479. if (ret < 0)
  2480. goto error;
  2481. ret = ret & ~MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK;
  2482. ret |= MII_88E6390_MISC_TEST_TEMP_SENSOR_DISABLE;
  2483. ret = __phy_write(phydev, MII_88E6390_MISC_TEST, ret);
  2484. error:
  2485. phy_restore_page(phydev, oldpage, ret);
  2486. return ret;
  2487. }
  2488. static int m88e6393_get_temp(struct phy_device *phydev, long *temp)
  2489. {
  2490. int err;
  2491. err = m88e1510_get_temp(phydev, temp);
  2492. /* 88E1510 measures T + 25, while the PHY on 88E6393X switch
  2493. * T + 75, so we have to subtract another 50
  2494. */
  2495. *temp -= 50000;
  2496. return err;
  2497. }
  2498. static int m88e6393_get_temp_critical(struct phy_device *phydev, long *temp)
  2499. {
  2500. int ret;
  2501. *temp = 0;
  2502. ret = phy_read_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2503. MII_88E6390_TEMP_SENSOR);
  2504. if (ret < 0)
  2505. return ret;
  2506. *temp = (((ret & MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK) >>
  2507. MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT) - 75) * 1000;
  2508. return 0;
  2509. }
  2510. static int m88e6393_set_temp_critical(struct phy_device *phydev, long temp)
  2511. {
  2512. temp = (temp / 1000) + 75;
  2513. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2514. MII_88E6390_TEMP_SENSOR,
  2515. MII_88E6393_TEMP_SENSOR_THRESHOLD_MASK,
  2516. temp << MII_88E6393_TEMP_SENSOR_THRESHOLD_SHIFT);
  2517. }
  2518. static int m88e6393_hwmon_config(struct phy_device *phydev)
  2519. {
  2520. int err;
  2521. err = m88e6393_set_temp_critical(phydev, 100000);
  2522. if (err)
  2523. return err;
  2524. return phy_modify_paged(phydev, MII_MARVELL_MISC_TEST_PAGE,
  2525. MII_88E6390_MISC_TEST,
  2526. MII_88E6390_MISC_TEST_TEMP_SENSOR_MASK |
  2527. MII_88E6393_MISC_TEST_SAMPLES_MASK |
  2528. MII_88E6393_MISC_TEST_RATE_MASK,
  2529. MII_88E6390_MISC_TEST_TEMP_SENSOR_ENABLE |
  2530. MII_88E6393_MISC_TEST_SAMPLES_2048 |
  2531. MII_88E6393_MISC_TEST_RATE_2_3MS);
  2532. }
  2533. static int marvell_hwmon_read(struct device *dev, enum hwmon_sensor_types type,
  2534. u32 attr, int channel, long *temp)
  2535. {
  2536. struct phy_device *phydev = dev_get_drvdata(dev);
  2537. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2538. int err = -EOPNOTSUPP;
  2539. switch (attr) {
  2540. case hwmon_temp_input:
  2541. if (ops->get_temp)
  2542. err = ops->get_temp(phydev, temp);
  2543. break;
  2544. case hwmon_temp_crit:
  2545. if (ops->get_temp_critical)
  2546. err = ops->get_temp_critical(phydev, temp);
  2547. break;
  2548. case hwmon_temp_max_alarm:
  2549. if (ops->get_temp_alarm)
  2550. err = ops->get_temp_alarm(phydev, temp);
  2551. break;
  2552. }
  2553. return err;
  2554. }
  2555. static int marvell_hwmon_write(struct device *dev, enum hwmon_sensor_types type,
  2556. u32 attr, int channel, long temp)
  2557. {
  2558. struct phy_device *phydev = dev_get_drvdata(dev);
  2559. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2560. int err = -EOPNOTSUPP;
  2561. switch (attr) {
  2562. case hwmon_temp_crit:
  2563. if (ops->set_temp_critical)
  2564. err = ops->set_temp_critical(phydev, temp);
  2565. break;
  2566. }
  2567. return err;
  2568. }
  2569. static umode_t marvell_hwmon_is_visible(const void *data,
  2570. enum hwmon_sensor_types type,
  2571. u32 attr, int channel)
  2572. {
  2573. const struct phy_device *phydev = data;
  2574. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2575. if (type != hwmon_temp)
  2576. return 0;
  2577. switch (attr) {
  2578. case hwmon_temp_input:
  2579. return ops->get_temp ? 0444 : 0;
  2580. case hwmon_temp_max_alarm:
  2581. return ops->get_temp_alarm ? 0444 : 0;
  2582. case hwmon_temp_crit:
  2583. return (ops->get_temp_critical ? 0444 : 0) |
  2584. (ops->set_temp_critical ? 0200 : 0);
  2585. default:
  2586. return 0;
  2587. }
  2588. }
  2589. /* we can define HWMON_T_CRIT and HWMON_T_MAX_ALARM even though these are not
  2590. * defined for all PHYs, because the hwmon code checks whether the attributes
  2591. * exists via the .is_visible method
  2592. */
  2593. static const struct hwmon_channel_info * const marvell_hwmon_info[] = {
  2594. HWMON_CHANNEL_INFO(chip, HWMON_C_REGISTER_TZ),
  2595. HWMON_CHANNEL_INFO(temp, HWMON_T_INPUT | HWMON_T_CRIT | HWMON_T_MAX_ALARM),
  2596. NULL
  2597. };
  2598. static const struct hwmon_ops marvell_hwmon_hwmon_ops = {
  2599. .is_visible = marvell_hwmon_is_visible,
  2600. .read = marvell_hwmon_read,
  2601. .write = marvell_hwmon_write,
  2602. };
  2603. static const struct hwmon_chip_info marvell_hwmon_chip_info = {
  2604. .ops = &marvell_hwmon_hwmon_ops,
  2605. .info = marvell_hwmon_info,
  2606. };
  2607. static int marvell_hwmon_name(struct phy_device *phydev)
  2608. {
  2609. struct marvell_priv *priv = phydev->priv;
  2610. struct device *dev = &phydev->mdio.dev;
  2611. const char *devname = dev_name(dev);
  2612. size_t len = strlen(devname);
  2613. int i, j;
  2614. priv->hwmon_name = devm_kzalloc(dev, len, GFP_KERNEL);
  2615. if (!priv->hwmon_name)
  2616. return -ENOMEM;
  2617. for (i = j = 0; i < len && devname[i]; i++) {
  2618. if (isalnum(devname[i]))
  2619. priv->hwmon_name[j++] = devname[i];
  2620. }
  2621. return 0;
  2622. }
  2623. static int marvell_hwmon_probe(struct phy_device *phydev)
  2624. {
  2625. const struct marvell_hwmon_ops *ops = to_marvell_hwmon_ops(phydev);
  2626. struct marvell_priv *priv = phydev->priv;
  2627. struct device *dev = &phydev->mdio.dev;
  2628. int err;
  2629. if (!ops)
  2630. return 0;
  2631. err = marvell_hwmon_name(phydev);
  2632. if (err)
  2633. return err;
  2634. priv->hwmon_dev = devm_hwmon_device_register_with_info(
  2635. dev, priv->hwmon_name, phydev, &marvell_hwmon_chip_info, NULL);
  2636. if (IS_ERR(priv->hwmon_dev))
  2637. return PTR_ERR(priv->hwmon_dev);
  2638. if (ops->config)
  2639. err = ops->config(phydev);
  2640. return err;
  2641. }
  2642. static const struct marvell_hwmon_ops m88e1121_hwmon_ops = {
  2643. .get_temp = m88e1121_get_temp,
  2644. };
  2645. static const struct marvell_hwmon_ops m88e1510_hwmon_ops = {
  2646. .get_temp = m88e1510_get_temp,
  2647. .get_temp_critical = m88e1510_get_temp_critical,
  2648. .set_temp_critical = m88e1510_set_temp_critical,
  2649. .get_temp_alarm = m88e1510_get_temp_alarm,
  2650. };
  2651. static const struct marvell_hwmon_ops m88e6390_hwmon_ops = {
  2652. .get_temp = m88e6390_get_temp,
  2653. };
  2654. static const struct marvell_hwmon_ops m88e6393_hwmon_ops = {
  2655. .config = m88e6393_hwmon_config,
  2656. .get_temp = m88e6393_get_temp,
  2657. .get_temp_critical = m88e6393_get_temp_critical,
  2658. .set_temp_critical = m88e6393_set_temp_critical,
  2659. .get_temp_alarm = m88e1510_get_temp_alarm,
  2660. };
  2661. #define DEF_MARVELL_HWMON_OPS(s) (&(s))
  2662. #else
  2663. #define DEF_MARVELL_HWMON_OPS(s) NULL
  2664. static int marvell_hwmon_probe(struct phy_device *phydev)
  2665. {
  2666. return 0;
  2667. }
  2668. #endif
  2669. static int m88e1318_led_brightness_set(struct phy_device *phydev,
  2670. u8 index, enum led_brightness value)
  2671. {
  2672. int reg;
  2673. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2674. MII_88E1318S_PHY_LED_FUNC);
  2675. if (reg < 0)
  2676. return reg;
  2677. switch (index) {
  2678. case 0:
  2679. case 1:
  2680. case 2:
  2681. reg &= ~(0xf << (4 * index));
  2682. if (value == LED_OFF)
  2683. reg |= MII_88E1318S_PHY_LED_FUNC_OFF << (4 * index);
  2684. else
  2685. reg |= MII_88E1318S_PHY_LED_FUNC_ON << (4 * index);
  2686. break;
  2687. default:
  2688. return -EINVAL;
  2689. }
  2690. return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  2691. MII_88E1318S_PHY_LED_FUNC, reg);
  2692. }
  2693. static int m88e1318_led_blink_set(struct phy_device *phydev, u8 index,
  2694. unsigned long *delay_on,
  2695. unsigned long *delay_off)
  2696. {
  2697. int reg;
  2698. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2699. MII_88E1318S_PHY_LED_FUNC);
  2700. if (reg < 0)
  2701. return reg;
  2702. switch (index) {
  2703. case 0:
  2704. case 1:
  2705. case 2:
  2706. reg &= ~(0xf << (4 * index));
  2707. reg |= MII_88E1318S_PHY_LED_FUNC_BLINK << (4 * index);
  2708. /* Reset default is 84ms */
  2709. *delay_on = 84 / 2;
  2710. *delay_off = 84 / 2;
  2711. break;
  2712. default:
  2713. return -EINVAL;
  2714. }
  2715. return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  2716. MII_88E1318S_PHY_LED_FUNC, reg);
  2717. }
  2718. struct marvell_led_rules {
  2719. int mode;
  2720. unsigned long rules;
  2721. };
  2722. static const struct marvell_led_rules marvell_led0[] = {
  2723. {
  2724. .mode = 0,
  2725. .rules = BIT(TRIGGER_NETDEV_LINK),
  2726. },
  2727. {
  2728. .mode = 1,
  2729. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2730. BIT(TRIGGER_NETDEV_RX) |
  2731. BIT(TRIGGER_NETDEV_TX)),
  2732. },
  2733. {
  2734. .mode = 3,
  2735. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2736. BIT(TRIGGER_NETDEV_TX)),
  2737. },
  2738. {
  2739. .mode = 4,
  2740. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2741. BIT(TRIGGER_NETDEV_TX)),
  2742. },
  2743. {
  2744. .mode = 5,
  2745. .rules = BIT(TRIGGER_NETDEV_TX),
  2746. },
  2747. {
  2748. .mode = 6,
  2749. .rules = BIT(TRIGGER_NETDEV_LINK),
  2750. },
  2751. {
  2752. .mode = 7,
  2753. .rules = BIT(TRIGGER_NETDEV_LINK_1000),
  2754. },
  2755. {
  2756. .mode = 8,
  2757. .rules = 0,
  2758. },
  2759. };
  2760. static const struct marvell_led_rules marvell_led1[] = {
  2761. {
  2762. .mode = 1,
  2763. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2764. BIT(TRIGGER_NETDEV_RX) |
  2765. BIT(TRIGGER_NETDEV_TX)),
  2766. },
  2767. {
  2768. .mode = 2,
  2769. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2770. BIT(TRIGGER_NETDEV_RX)),
  2771. },
  2772. {
  2773. .mode = 3,
  2774. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2775. BIT(TRIGGER_NETDEV_TX)),
  2776. },
  2777. {
  2778. .mode = 4,
  2779. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2780. BIT(TRIGGER_NETDEV_TX)),
  2781. },
  2782. {
  2783. .mode = 6,
  2784. .rules = (BIT(TRIGGER_NETDEV_LINK_100) |
  2785. BIT(TRIGGER_NETDEV_LINK_1000)),
  2786. },
  2787. {
  2788. .mode = 7,
  2789. .rules = BIT(TRIGGER_NETDEV_LINK_100),
  2790. },
  2791. {
  2792. .mode = 8,
  2793. .rules = 0,
  2794. },
  2795. };
  2796. static const struct marvell_led_rules marvell_led2[] = {
  2797. {
  2798. .mode = 0,
  2799. .rules = BIT(TRIGGER_NETDEV_LINK),
  2800. },
  2801. {
  2802. .mode = 1,
  2803. .rules = (BIT(TRIGGER_NETDEV_LINK) |
  2804. BIT(TRIGGER_NETDEV_RX) |
  2805. BIT(TRIGGER_NETDEV_TX)),
  2806. },
  2807. {
  2808. .mode = 3,
  2809. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2810. BIT(TRIGGER_NETDEV_TX)),
  2811. },
  2812. {
  2813. .mode = 4,
  2814. .rules = (BIT(TRIGGER_NETDEV_RX) |
  2815. BIT(TRIGGER_NETDEV_TX)),
  2816. },
  2817. {
  2818. .mode = 5,
  2819. .rules = BIT(TRIGGER_NETDEV_TX),
  2820. },
  2821. {
  2822. .mode = 6,
  2823. .rules = (BIT(TRIGGER_NETDEV_LINK_10) |
  2824. BIT(TRIGGER_NETDEV_LINK_1000)),
  2825. },
  2826. {
  2827. .mode = 7,
  2828. .rules = BIT(TRIGGER_NETDEV_LINK_10),
  2829. },
  2830. {
  2831. .mode = 8,
  2832. .rules = 0,
  2833. },
  2834. };
  2835. static int marvell_find_led_mode(unsigned long rules,
  2836. const struct marvell_led_rules *marvell_rules,
  2837. int count,
  2838. int *mode)
  2839. {
  2840. int i;
  2841. for (i = 0; i < count; i++) {
  2842. if (marvell_rules[i].rules == rules) {
  2843. *mode = marvell_rules[i].mode;
  2844. return 0;
  2845. }
  2846. }
  2847. return -EOPNOTSUPP;
  2848. }
  2849. static int marvell_get_led_mode(u8 index, unsigned long rules, int *mode)
  2850. {
  2851. int ret;
  2852. switch (index) {
  2853. case 0:
  2854. ret = marvell_find_led_mode(rules, marvell_led0,
  2855. ARRAY_SIZE(marvell_led0), mode);
  2856. break;
  2857. case 1:
  2858. ret = marvell_find_led_mode(rules, marvell_led1,
  2859. ARRAY_SIZE(marvell_led1), mode);
  2860. break;
  2861. case 2:
  2862. ret = marvell_find_led_mode(rules, marvell_led2,
  2863. ARRAY_SIZE(marvell_led2), mode);
  2864. break;
  2865. default:
  2866. ret = -EINVAL;
  2867. }
  2868. return ret;
  2869. }
  2870. static int marvell_find_led_rules(unsigned long *rules,
  2871. const struct marvell_led_rules *marvell_rules,
  2872. int count,
  2873. int mode)
  2874. {
  2875. int i;
  2876. for (i = 0; i < count; i++) {
  2877. if (marvell_rules[i].mode == mode) {
  2878. *rules = marvell_rules[i].rules;
  2879. return 0;
  2880. }
  2881. }
  2882. return -EOPNOTSUPP;
  2883. }
  2884. static int marvell_get_led_rules(u8 index, unsigned long *rules, int mode)
  2885. {
  2886. int ret;
  2887. switch (index) {
  2888. case 0:
  2889. ret = marvell_find_led_rules(rules, marvell_led0,
  2890. ARRAY_SIZE(marvell_led0), mode);
  2891. break;
  2892. case 1:
  2893. ret = marvell_find_led_rules(rules, marvell_led1,
  2894. ARRAY_SIZE(marvell_led1), mode);
  2895. break;
  2896. case 2:
  2897. ret = marvell_find_led_rules(rules, marvell_led2,
  2898. ARRAY_SIZE(marvell_led2), mode);
  2899. break;
  2900. default:
  2901. ret = -EOPNOTSUPP;
  2902. }
  2903. return ret;
  2904. }
  2905. static int m88e1318_led_hw_is_supported(struct phy_device *phydev, u8 index,
  2906. unsigned long rules)
  2907. {
  2908. int mode, ret;
  2909. switch (index) {
  2910. case 0:
  2911. case 1:
  2912. case 2:
  2913. ret = marvell_get_led_mode(index, rules, &mode);
  2914. break;
  2915. default:
  2916. ret = -EINVAL;
  2917. }
  2918. return ret;
  2919. }
  2920. static int m88e1318_led_hw_control_set(struct phy_device *phydev, u8 index,
  2921. unsigned long rules)
  2922. {
  2923. int mode, ret, reg;
  2924. switch (index) {
  2925. case 0:
  2926. case 1:
  2927. case 2:
  2928. ret = marvell_get_led_mode(index, rules, &mode);
  2929. break;
  2930. default:
  2931. ret = -EINVAL;
  2932. }
  2933. if (ret < 0)
  2934. return ret;
  2935. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2936. MII_88E1318S_PHY_LED_FUNC);
  2937. if (reg < 0)
  2938. return reg;
  2939. reg &= ~(0xf << (4 * index));
  2940. reg |= mode << (4 * index);
  2941. return phy_write_paged(phydev, MII_MARVELL_LED_PAGE,
  2942. MII_88E1318S_PHY_LED_FUNC, reg);
  2943. }
  2944. static int m88e1318_led_hw_control_get(struct phy_device *phydev, u8 index,
  2945. unsigned long *rules)
  2946. {
  2947. int mode, reg;
  2948. if (index > 2)
  2949. return -EINVAL;
  2950. reg = phy_read_paged(phydev, MII_MARVELL_LED_PAGE,
  2951. MII_88E1318S_PHY_LED_FUNC);
  2952. if (reg < 0)
  2953. return reg;
  2954. mode = (reg >> (4 * index)) & 0xf;
  2955. return marvell_get_led_rules(index, rules, mode);
  2956. }
  2957. static int marvell_probe(struct phy_device *phydev)
  2958. {
  2959. struct marvell_priv *priv;
  2960. priv = devm_kzalloc(&phydev->mdio.dev, sizeof(*priv), GFP_KERNEL);
  2961. if (!priv)
  2962. return -ENOMEM;
  2963. phydev->priv = priv;
  2964. return marvell_hwmon_probe(phydev);
  2965. }
  2966. static int m88e1510_port_configure_serdes(struct phy_port *port, bool enable,
  2967. phy_interface_t interface)
  2968. {
  2969. struct phy_device *phydev = port_phydev(port);
  2970. struct device *dev;
  2971. int oldpage;
  2972. int ret = 0;
  2973. u16 mode;
  2974. dev = &phydev->mdio.dev;
  2975. if (enable) {
  2976. switch (interface) {
  2977. case PHY_INTERFACE_MODE_1000BASEX:
  2978. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_1000X;
  2979. break;
  2980. case PHY_INTERFACE_MODE_100BASEX:
  2981. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_100FX;
  2982. break;
  2983. case PHY_INTERFACE_MODE_SGMII:
  2984. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII_SGMII;
  2985. break;
  2986. default:
  2987. dev_err(dev, "Incompatible SFP module inserted\n");
  2988. return -EINVAL;
  2989. }
  2990. } else {
  2991. mode = MII_88E1510_GEN_CTRL_REG_1_MODE_RGMII;
  2992. }
  2993. oldpage = phy_select_page(phydev, MII_MARVELL_MODE_PAGE);
  2994. if (oldpage < 0)
  2995. goto error;
  2996. ret = __phy_modify(phydev, MII_88E1510_GEN_CTRL_REG_1,
  2997. MII_88E1510_GEN_CTRL_REG_1_MODE_MASK, mode);
  2998. if (ret < 0)
  2999. goto error;
  3000. ret = __phy_set_bits(phydev, MII_88E1510_GEN_CTRL_REG_1,
  3001. MII_88E1510_GEN_CTRL_REG_1_RESET);
  3002. error:
  3003. return phy_restore_page(phydev, oldpage, ret);
  3004. }
  3005. static const struct phy_port_ops m88e1510_serdes_port_ops = {
  3006. .configure_mii = m88e1510_port_configure_serdes,
  3007. };
  3008. static int m88e1510_attach_mii_port(struct phy_device *phy_device,
  3009. struct phy_port *port)
  3010. {
  3011. port->ops = &m88e1510_serdes_port_ops;
  3012. __set_bit(PHY_INTERFACE_MODE_SGMII, port->interfaces);
  3013. __set_bit(PHY_INTERFACE_MODE_1000BASEX, port->interfaces);
  3014. __set_bit(PHY_INTERFACE_MODE_100BASEX, port->interfaces);
  3015. return 0;
  3016. }
  3017. static struct phy_driver marvell_drivers[] = {
  3018. {
  3019. .phy_id = MARVELL_PHY_ID_88E1101,
  3020. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3021. .name = "Marvell 88E1101",
  3022. /* PHY_GBIT_FEATURES */
  3023. .probe = marvell_probe,
  3024. .config_init = marvell_config_init,
  3025. .config_aneg = m88e1101_config_aneg,
  3026. .config_intr = marvell_config_intr,
  3027. .handle_interrupt = marvell_handle_interrupt,
  3028. .resume = genphy_resume,
  3029. .suspend = genphy_suspend,
  3030. .read_page = marvell_read_page,
  3031. .write_page = marvell_write_page,
  3032. .get_sset_count = marvell_get_sset_count,
  3033. .get_strings = marvell_get_strings,
  3034. .get_stats = marvell_get_stats,
  3035. },
  3036. {
  3037. .phy_id = MARVELL_PHY_ID_88E3082,
  3038. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3039. .name = "Marvell 88E308X/88E609X Family",
  3040. /* PHY_BASIC_FEATURES */
  3041. .probe = marvell_probe,
  3042. .config_init = marvell_config_init,
  3043. .aneg_done = marvell_aneg_done,
  3044. .read_status = marvell_read_status,
  3045. .resume = genphy_resume,
  3046. .suspend = genphy_suspend,
  3047. .cable_test_start = m88e3082_vct_cable_test_start,
  3048. .cable_test_get_status = m88e3082_vct_cable_test_get_status,
  3049. },
  3050. {
  3051. .phy_id = MARVELL_PHY_ID_88E1112,
  3052. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3053. .name = "Marvell 88E1112",
  3054. /* PHY_GBIT_FEATURES */
  3055. .probe = marvell_probe,
  3056. .inband_caps = m88e1111_inband_caps,
  3057. .config_inband = m88e1111_config_inband,
  3058. .config_init = m88e1112_config_init,
  3059. .config_aneg = marvell_config_aneg,
  3060. .config_intr = marvell_config_intr,
  3061. .handle_interrupt = marvell_handle_interrupt,
  3062. .resume = genphy_resume,
  3063. .suspend = genphy_suspend,
  3064. .read_page = marvell_read_page,
  3065. .write_page = marvell_write_page,
  3066. .get_sset_count = marvell_get_sset_count,
  3067. .get_strings = marvell_get_strings,
  3068. .get_stats = marvell_get_stats,
  3069. .get_tunable = m88e1011_get_tunable,
  3070. .set_tunable = m88e1011_set_tunable,
  3071. },
  3072. {
  3073. .phy_id = MARVELL_PHY_ID_88E1111,
  3074. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3075. .name = "Marvell 88E1111",
  3076. /* PHY_GBIT_FEATURES */
  3077. .flags = PHY_POLL_CABLE_TEST,
  3078. .probe = marvell_probe,
  3079. .inband_caps = m88e1111_inband_caps,
  3080. .config_inband = m88e1111_config_inband,
  3081. .config_init = m88e1111gbe_config_init,
  3082. .config_aneg = m88e1111_config_aneg,
  3083. .read_status = marvell_read_status,
  3084. .config_intr = marvell_config_intr,
  3085. .handle_interrupt = marvell_handle_interrupt,
  3086. .resume = genphy_resume,
  3087. .suspend = genphy_suspend,
  3088. .read_page = marvell_read_page,
  3089. .write_page = marvell_write_page,
  3090. .get_sset_count = marvell_get_sset_count,
  3091. .get_strings = marvell_get_strings,
  3092. .get_stats = marvell_get_stats,
  3093. .get_tunable = m88e1111_get_tunable,
  3094. .set_tunable = m88e1111_set_tunable,
  3095. .cable_test_start = m88e1111_vct_cable_test_start,
  3096. .cable_test_get_status = m88e1111_vct_cable_test_get_status,
  3097. },
  3098. {
  3099. .phy_id = MARVELL_PHY_ID_88E1111_FINISAR,
  3100. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3101. .name = "Marvell 88E1111 (Finisar)",
  3102. /* PHY_GBIT_FEATURES */
  3103. .probe = marvell_probe,
  3104. .inband_caps = m88e1111_inband_caps,
  3105. .config_inband = m88e1111_config_inband,
  3106. .config_init = m88e1111gbe_config_init,
  3107. .config_aneg = m88e1111_config_aneg,
  3108. .read_status = marvell_read_status,
  3109. .config_intr = marvell_config_intr,
  3110. .handle_interrupt = marvell_handle_interrupt,
  3111. .resume = genphy_resume,
  3112. .suspend = genphy_suspend,
  3113. .read_page = marvell_read_page,
  3114. .write_page = marvell_write_page,
  3115. .get_sset_count = marvell_get_sset_count,
  3116. .get_strings = marvell_get_strings,
  3117. .get_stats = marvell_get_stats,
  3118. .get_tunable = m88e1111_get_tunable,
  3119. .set_tunable = m88e1111_set_tunable,
  3120. },
  3121. {
  3122. .phy_id = MARVELL_PHY_ID_88E1118,
  3123. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3124. .name = "Marvell 88E1118",
  3125. /* PHY_GBIT_FEATURES */
  3126. .probe = marvell_probe,
  3127. .config_init = m88e1118_config_init,
  3128. .config_aneg = m88e1118_config_aneg,
  3129. .config_intr = marvell_config_intr,
  3130. .handle_interrupt = marvell_handle_interrupt,
  3131. .resume = genphy_resume,
  3132. .suspend = genphy_suspend,
  3133. .read_page = marvell_read_page,
  3134. .write_page = marvell_write_page,
  3135. .get_sset_count = marvell_get_sset_count,
  3136. .get_strings = marvell_get_strings,
  3137. .get_stats = marvell_get_stats,
  3138. },
  3139. {
  3140. .phy_id = MARVELL_PHY_ID_88E1121R,
  3141. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3142. .name = "Marvell 88E1121R",
  3143. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1121_hwmon_ops),
  3144. /* PHY_GBIT_FEATURES */
  3145. .probe = marvell_probe,
  3146. .config_init = marvell_1011gbe_config_init,
  3147. .config_aneg = m88e1121_config_aneg,
  3148. .read_status = marvell_read_status,
  3149. .config_intr = marvell_config_intr,
  3150. .handle_interrupt = marvell_handle_interrupt,
  3151. .resume = genphy_resume,
  3152. .suspend = genphy_suspend,
  3153. .read_page = marvell_read_page,
  3154. .write_page = marvell_write_page,
  3155. .get_sset_count = marvell_get_sset_count,
  3156. .get_strings = marvell_get_strings,
  3157. .get_stats = marvell_get_stats,
  3158. .get_tunable = m88e1011_get_tunable,
  3159. .set_tunable = m88e1011_set_tunable,
  3160. },
  3161. {
  3162. .phy_id = MARVELL_PHY_ID_88E1318S,
  3163. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3164. .name = "Marvell 88E1318S",
  3165. /* PHY_GBIT_FEATURES */
  3166. .probe = marvell_probe,
  3167. .config_init = m88e1318_config_init,
  3168. .config_aneg = m88e1318_config_aneg,
  3169. .read_status = marvell_read_status,
  3170. .config_intr = marvell_config_intr,
  3171. .handle_interrupt = marvell_handle_interrupt,
  3172. .get_wol = m88e1318_get_wol,
  3173. .set_wol = m88e1318_set_wol,
  3174. .resume = genphy_resume,
  3175. .suspend = genphy_suspend,
  3176. .read_page = marvell_read_page,
  3177. .write_page = marvell_write_page,
  3178. .get_sset_count = marvell_get_sset_count,
  3179. .get_strings = marvell_get_strings,
  3180. .get_stats = marvell_get_stats,
  3181. .led_brightness_set = m88e1318_led_brightness_set,
  3182. .led_blink_set = m88e1318_led_blink_set,
  3183. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3184. .led_hw_control_set = m88e1318_led_hw_control_set,
  3185. .led_hw_control_get = m88e1318_led_hw_control_get,
  3186. },
  3187. {
  3188. .phy_id = MARVELL_PHY_ID_88E1145,
  3189. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3190. .name = "Marvell 88E1145",
  3191. /* PHY_GBIT_FEATURES */
  3192. .flags = PHY_POLL_CABLE_TEST,
  3193. .probe = marvell_probe,
  3194. .config_init = m88e1145_config_init,
  3195. .config_aneg = m88e1101_config_aneg,
  3196. .config_intr = marvell_config_intr,
  3197. .handle_interrupt = marvell_handle_interrupt,
  3198. .resume = genphy_resume,
  3199. .suspend = genphy_suspend,
  3200. .read_page = marvell_read_page,
  3201. .write_page = marvell_write_page,
  3202. .get_sset_count = marvell_get_sset_count,
  3203. .get_strings = marvell_get_strings,
  3204. .get_stats = marvell_get_stats,
  3205. .get_tunable = m88e1111_get_tunable,
  3206. .set_tunable = m88e1111_set_tunable,
  3207. .cable_test_start = m88e1111_vct_cable_test_start,
  3208. .cable_test_get_status = m88e1111_vct_cable_test_get_status,
  3209. },
  3210. {
  3211. .phy_id = MARVELL_PHY_ID_88E1149R,
  3212. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3213. .name = "Marvell 88E1149R",
  3214. /* PHY_GBIT_FEATURES */
  3215. .probe = marvell_probe,
  3216. .config_init = m88e1149_config_init,
  3217. .config_aneg = m88e1118_config_aneg,
  3218. .config_intr = marvell_config_intr,
  3219. .handle_interrupt = marvell_handle_interrupt,
  3220. .resume = genphy_resume,
  3221. .suspend = genphy_suspend,
  3222. .read_page = marvell_read_page,
  3223. .write_page = marvell_write_page,
  3224. .get_sset_count = marvell_get_sset_count,
  3225. .get_strings = marvell_get_strings,
  3226. .get_stats = marvell_get_stats,
  3227. },
  3228. {
  3229. .phy_id = MARVELL_PHY_ID_88E1240,
  3230. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3231. .name = "Marvell 88E1240",
  3232. /* PHY_GBIT_FEATURES */
  3233. .probe = marvell_probe,
  3234. .config_init = m88e1112_config_init,
  3235. .config_aneg = marvell_config_aneg,
  3236. .config_intr = marvell_config_intr,
  3237. .handle_interrupt = marvell_handle_interrupt,
  3238. .resume = genphy_resume,
  3239. .suspend = genphy_suspend,
  3240. .read_page = marvell_read_page,
  3241. .write_page = marvell_write_page,
  3242. .get_sset_count = marvell_get_sset_count,
  3243. .get_strings = marvell_get_strings,
  3244. .get_stats = marvell_get_stats,
  3245. .get_tunable = m88e1011_get_tunable,
  3246. .set_tunable = m88e1011_set_tunable,
  3247. },
  3248. {
  3249. .phy_id = MARVELL_PHY_ID_88E1116R,
  3250. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3251. .name = "Marvell 88E1116R",
  3252. /* PHY_GBIT_FEATURES */
  3253. .probe = marvell_probe,
  3254. .config_init = m88e1116r_config_init,
  3255. .config_intr = marvell_config_intr,
  3256. .handle_interrupt = marvell_handle_interrupt,
  3257. .resume = genphy_resume,
  3258. .suspend = genphy_suspend,
  3259. .read_page = marvell_read_page,
  3260. .write_page = marvell_write_page,
  3261. .get_sset_count = marvell_get_sset_count,
  3262. .get_strings = marvell_get_strings,
  3263. .get_stats = marvell_get_stats,
  3264. .get_tunable = m88e1011_get_tunable,
  3265. .set_tunable = m88e1011_set_tunable,
  3266. },
  3267. {
  3268. .phy_id = MARVELL_PHY_ID_88E1510,
  3269. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3270. .name = "Marvell 88E1510",
  3271. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3272. .features = PHY_GBIT_FIBRE_FEATURES,
  3273. .flags = PHY_POLL_CABLE_TEST,
  3274. .probe = marvell_probe,
  3275. .config_init = m88e1510_config_init,
  3276. .config_aneg = m88e1510_config_aneg,
  3277. .read_status = marvell_read_status,
  3278. .config_intr = marvell_config_intr,
  3279. .handle_interrupt = marvell_handle_interrupt,
  3280. .get_wol = m88e1318_get_wol,
  3281. .set_wol = m88e1318_set_wol,
  3282. .resume = m88e1510_resume,
  3283. .suspend = marvell_suspend,
  3284. .read_page = marvell_read_page,
  3285. .write_page = marvell_write_page,
  3286. .get_sset_count = marvell_get_sset_count,
  3287. .get_strings = marvell_get_strings,
  3288. .get_stats = marvell_get_stats,
  3289. .set_loopback = m88e1510_loopback,
  3290. .get_tunable = m88e1011_get_tunable,
  3291. .set_tunable = m88e1011_set_tunable,
  3292. .cable_test_start = marvell_vct7_cable_test_start,
  3293. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3294. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3295. .led_brightness_set = m88e1318_led_brightness_set,
  3296. .led_blink_set = m88e1318_led_blink_set,
  3297. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3298. .led_hw_control_set = m88e1318_led_hw_control_set,
  3299. .led_hw_control_get = m88e1318_led_hw_control_get,
  3300. .attach_mii_port = m88e1510_attach_mii_port,
  3301. },
  3302. {
  3303. .phy_id = MARVELL_PHY_ID_88E1540,
  3304. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3305. .name = "Marvell 88E1540",
  3306. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3307. /* PHY_GBIT_FEATURES */
  3308. .flags = PHY_POLL_CABLE_TEST,
  3309. .probe = marvell_probe,
  3310. .config_init = marvell_1011gbe_config_init,
  3311. .config_aneg = m88e1510_config_aneg,
  3312. .read_status = marvell_read_status,
  3313. .config_intr = marvell_config_intr,
  3314. .handle_interrupt = marvell_handle_interrupt,
  3315. .resume = genphy_resume,
  3316. .suspend = genphy_suspend,
  3317. .read_page = marvell_read_page,
  3318. .write_page = marvell_write_page,
  3319. .get_sset_count = marvell_get_sset_count,
  3320. .get_strings = marvell_get_strings,
  3321. .get_stats = marvell_get_stats,
  3322. .get_tunable = m88e1540_get_tunable,
  3323. .set_tunable = m88e1540_set_tunable,
  3324. .cable_test_start = marvell_vct7_cable_test_start,
  3325. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3326. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3327. .led_brightness_set = m88e1318_led_brightness_set,
  3328. .led_blink_set = m88e1318_led_blink_set,
  3329. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3330. .led_hw_control_set = m88e1318_led_hw_control_set,
  3331. .led_hw_control_get = m88e1318_led_hw_control_get,
  3332. },
  3333. {
  3334. .phy_id = MARVELL_PHY_ID_88E1545,
  3335. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3336. .name = "Marvell 88E1545",
  3337. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3338. .probe = marvell_probe,
  3339. /* PHY_GBIT_FEATURES */
  3340. .flags = PHY_POLL_CABLE_TEST,
  3341. .config_init = marvell_1011gbe_config_init,
  3342. .config_aneg = m88e1510_config_aneg,
  3343. .read_status = marvell_read_status,
  3344. .config_intr = marvell_config_intr,
  3345. .handle_interrupt = marvell_handle_interrupt,
  3346. .resume = genphy_resume,
  3347. .suspend = genphy_suspend,
  3348. .read_page = marvell_read_page,
  3349. .write_page = marvell_write_page,
  3350. .get_sset_count = marvell_get_sset_count,
  3351. .get_strings = marvell_get_strings,
  3352. .get_stats = marvell_get_stats,
  3353. .get_tunable = m88e1540_get_tunable,
  3354. .set_tunable = m88e1540_set_tunable,
  3355. .cable_test_start = marvell_vct7_cable_test_start,
  3356. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3357. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3358. .led_brightness_set = m88e1318_led_brightness_set,
  3359. .led_blink_set = m88e1318_led_blink_set,
  3360. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3361. .led_hw_control_set = m88e1318_led_hw_control_set,
  3362. .led_hw_control_get = m88e1318_led_hw_control_get,
  3363. },
  3364. {
  3365. .phy_id = MARVELL_PHY_ID_88E3016,
  3366. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3367. .name = "Marvell 88E3016",
  3368. /* PHY_BASIC_FEATURES */
  3369. .probe = marvell_probe,
  3370. .config_init = m88e3016_config_init,
  3371. .aneg_done = marvell_aneg_done,
  3372. .read_status = marvell_read_status,
  3373. .config_intr = marvell_config_intr,
  3374. .handle_interrupt = marvell_handle_interrupt,
  3375. .resume = genphy_resume,
  3376. .suspend = genphy_suspend,
  3377. .read_page = marvell_read_page,
  3378. .write_page = marvell_write_page,
  3379. .get_sset_count = marvell_get_sset_count,
  3380. .get_strings = marvell_get_strings,
  3381. .get_stats = marvell_get_stats,
  3382. },
  3383. {
  3384. .phy_id = MARVELL_PHY_ID_88E6250_FAMILY,
  3385. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3386. .name = "Marvell 88E6250 Family",
  3387. /* PHY_BASIC_FEATURES */
  3388. .probe = marvell_probe,
  3389. .aneg_done = marvell_aneg_done,
  3390. .config_intr = marvell_config_intr,
  3391. .handle_interrupt = marvell_handle_interrupt,
  3392. .resume = genphy_resume,
  3393. .suspend = genphy_suspend,
  3394. .get_sset_count = marvell_get_sset_count_simple,
  3395. .get_strings = marvell_get_strings_simple,
  3396. .get_stats = marvell_get_stats_simple,
  3397. },
  3398. {
  3399. .phy_id = MARVELL_PHY_ID_88E6341_FAMILY,
  3400. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3401. .name = "Marvell 88E6341 Family",
  3402. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3403. /* PHY_GBIT_FEATURES */
  3404. .flags = PHY_POLL_CABLE_TEST,
  3405. .probe = marvell_probe,
  3406. .config_init = marvell_1011gbe_config_init,
  3407. .config_aneg = m88e6390_config_aneg,
  3408. .read_status = marvell_read_status,
  3409. .config_intr = marvell_config_intr,
  3410. .handle_interrupt = marvell_handle_interrupt,
  3411. .resume = genphy_resume,
  3412. .suspend = genphy_suspend,
  3413. .read_page = marvell_read_page,
  3414. .write_page = marvell_write_page,
  3415. .get_sset_count = marvell_get_sset_count,
  3416. .get_strings = marvell_get_strings,
  3417. .get_stats = marvell_get_stats,
  3418. .get_tunable = m88e1540_get_tunable,
  3419. .set_tunable = m88e1540_set_tunable,
  3420. .cable_test_start = marvell_vct7_cable_test_start,
  3421. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3422. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3423. },
  3424. {
  3425. .phy_id = MARVELL_PHY_ID_88E6390_FAMILY,
  3426. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3427. .name = "Marvell 88E6390 Family",
  3428. .driver_data = DEF_MARVELL_HWMON_OPS(m88e6390_hwmon_ops),
  3429. /* PHY_GBIT_FEATURES */
  3430. .flags = PHY_POLL_CABLE_TEST,
  3431. .probe = marvell_probe,
  3432. .config_init = marvell_1011gbe_config_init,
  3433. .config_aneg = m88e6390_config_aneg,
  3434. .read_status = marvell_read_status,
  3435. .config_intr = marvell_config_intr,
  3436. .handle_interrupt = marvell_handle_interrupt,
  3437. .resume = genphy_resume,
  3438. .suspend = genphy_suspend,
  3439. .read_page = marvell_read_page,
  3440. .write_page = marvell_write_page,
  3441. .get_sset_count = marvell_get_sset_count,
  3442. .get_strings = marvell_get_strings,
  3443. .get_stats = marvell_get_stats,
  3444. .get_tunable = m88e1540_get_tunable,
  3445. .set_tunable = m88e1540_set_tunable,
  3446. .cable_test_start = marvell_vct7_cable_test_start,
  3447. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3448. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3449. },
  3450. {
  3451. .phy_id = MARVELL_PHY_ID_88E6393_FAMILY,
  3452. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3453. .name = "Marvell 88E6393 Family",
  3454. .driver_data = DEF_MARVELL_HWMON_OPS(m88e6393_hwmon_ops),
  3455. /* PHY_GBIT_FEATURES */
  3456. .flags = PHY_POLL_CABLE_TEST,
  3457. .probe = marvell_probe,
  3458. .config_init = marvell_1011gbe_config_init,
  3459. .config_aneg = m88e1510_config_aneg,
  3460. .read_status = marvell_read_status,
  3461. .config_intr = marvell_config_intr,
  3462. .handle_interrupt = marvell_handle_interrupt,
  3463. .resume = genphy_resume,
  3464. .suspend = genphy_suspend,
  3465. .read_page = marvell_read_page,
  3466. .write_page = marvell_write_page,
  3467. .get_sset_count = marvell_get_sset_count,
  3468. .get_strings = marvell_get_strings,
  3469. .get_stats = marvell_get_stats,
  3470. .get_tunable = m88e1540_get_tunable,
  3471. .set_tunable = m88e1540_set_tunable,
  3472. .cable_test_start = marvell_vct7_cable_test_start,
  3473. .cable_test_tdr_start = marvell_vct5_cable_test_tdr_start,
  3474. .cable_test_get_status = marvell_vct7_cable_test_get_status,
  3475. },
  3476. {
  3477. .phy_id = MARVELL_PHY_ID_88E1340S,
  3478. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3479. .name = "Marvell 88E1340S",
  3480. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3481. .probe = marvell_probe,
  3482. /* PHY_GBIT_FEATURES */
  3483. .config_init = marvell_1011gbe_config_init,
  3484. .config_aneg = m88e1510_config_aneg,
  3485. .read_status = marvell_read_status,
  3486. .config_intr = marvell_config_intr,
  3487. .handle_interrupt = marvell_handle_interrupt,
  3488. .resume = genphy_resume,
  3489. .suspend = genphy_suspend,
  3490. .read_page = marvell_read_page,
  3491. .write_page = marvell_write_page,
  3492. .get_sset_count = marvell_get_sset_count,
  3493. .get_strings = marvell_get_strings,
  3494. .get_stats = marvell_get_stats,
  3495. .get_tunable = m88e1540_get_tunable,
  3496. .set_tunable = m88e1540_set_tunable,
  3497. },
  3498. {
  3499. .phy_id = MARVELL_PHY_ID_88E1548P,
  3500. .phy_id_mask = MARVELL_PHY_ID_MASK,
  3501. .name = "Marvell 88E1548P",
  3502. .driver_data = DEF_MARVELL_HWMON_OPS(m88e1510_hwmon_ops),
  3503. .probe = marvell_probe,
  3504. .features = PHY_GBIT_FIBRE_FEATURES,
  3505. .config_init = marvell_1011gbe_config_init,
  3506. .config_aneg = m88e1510_config_aneg,
  3507. .read_status = marvell_read_status,
  3508. .config_intr = marvell_config_intr,
  3509. .handle_interrupt = marvell_handle_interrupt,
  3510. .resume = genphy_resume,
  3511. .suspend = genphy_suspend,
  3512. .read_page = marvell_read_page,
  3513. .write_page = marvell_write_page,
  3514. .get_sset_count = marvell_get_sset_count,
  3515. .get_strings = marvell_get_strings,
  3516. .get_stats = marvell_get_stats,
  3517. .get_tunable = m88e1540_get_tunable,
  3518. .set_tunable = m88e1540_set_tunable,
  3519. .led_brightness_set = m88e1318_led_brightness_set,
  3520. .led_blink_set = m88e1318_led_blink_set,
  3521. .led_hw_is_supported = m88e1318_led_hw_is_supported,
  3522. .led_hw_control_set = m88e1318_led_hw_control_set,
  3523. .led_hw_control_get = m88e1318_led_hw_control_get,
  3524. },
  3525. };
  3526. module_phy_driver(marvell_drivers);
  3527. static const struct mdio_device_id __maybe_unused marvell_tbl[] = {
  3528. { MARVELL_PHY_ID_88E1101, MARVELL_PHY_ID_MASK },
  3529. { MARVELL_PHY_ID_88E3082, MARVELL_PHY_ID_MASK },
  3530. { MARVELL_PHY_ID_88E1112, MARVELL_PHY_ID_MASK },
  3531. { MARVELL_PHY_ID_88E1111, MARVELL_PHY_ID_MASK },
  3532. { MARVELL_PHY_ID_88E1111_FINISAR, MARVELL_PHY_ID_MASK },
  3533. { MARVELL_PHY_ID_88E1118, MARVELL_PHY_ID_MASK },
  3534. { MARVELL_PHY_ID_88E1121R, MARVELL_PHY_ID_MASK },
  3535. { MARVELL_PHY_ID_88E1145, MARVELL_PHY_ID_MASK },
  3536. { MARVELL_PHY_ID_88E1149R, MARVELL_PHY_ID_MASK },
  3537. { MARVELL_PHY_ID_88E1240, MARVELL_PHY_ID_MASK },
  3538. { MARVELL_PHY_ID_88E1318S, MARVELL_PHY_ID_MASK },
  3539. { MARVELL_PHY_ID_88E1116R, MARVELL_PHY_ID_MASK },
  3540. { MARVELL_PHY_ID_88E1510, MARVELL_PHY_ID_MASK },
  3541. { MARVELL_PHY_ID_88E1540, MARVELL_PHY_ID_MASK },
  3542. { MARVELL_PHY_ID_88E1545, MARVELL_PHY_ID_MASK },
  3543. { MARVELL_PHY_ID_88E3016, MARVELL_PHY_ID_MASK },
  3544. { MARVELL_PHY_ID_88E6250_FAMILY, MARVELL_PHY_ID_MASK },
  3545. { MARVELL_PHY_ID_88E6341_FAMILY, MARVELL_PHY_ID_MASK },
  3546. { MARVELL_PHY_ID_88E6390_FAMILY, MARVELL_PHY_ID_MASK },
  3547. { MARVELL_PHY_ID_88E6393_FAMILY, MARVELL_PHY_ID_MASK },
  3548. { MARVELL_PHY_ID_88E1340S, MARVELL_PHY_ID_MASK },
  3549. { MARVELL_PHY_ID_88E1548P, MARVELL_PHY_ID_MASK },
  3550. { }
  3551. };
  3552. MODULE_DEVICE_TABLE(mdio, marvell_tbl);