ca8210.c 82 KB

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  1. /*
  2. * http://www.cascoda.com/products/ca-821x/
  3. * Copyright (c) 2016, Cascoda, Ltd.
  4. * All rights reserved.
  5. *
  6. * This code is dual-licensed under both GPLv2 and 3-clause BSD. What follows is
  7. * the license notice for both respectively.
  8. *
  9. *******************************************************************************
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. *******************************************************************************
  22. *
  23. * Redistribution and use in source and binary forms, with or without
  24. * modification, are permitted provided that the following conditions are met:
  25. *
  26. * 1. Redistributions of source code must retain the above copyright notice,
  27. * this list of conditions and the following disclaimer.
  28. *
  29. * 2. Redistributions in binary form must reproduce the above copyright notice,
  30. * this list of conditions and the following disclaimer in the documentation
  31. * and/or other materials provided with the distribution.
  32. *
  33. * 3. Neither the name of the copyright holder nor the names of its contributors
  34. * may be used to endorse or promote products derived from this software without
  35. * specific prior written permission.
  36. *
  37. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  38. * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  39. * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  40. * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
  41. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  42. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  43. * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  44. * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  45. * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  46. * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  47. * POSSIBILITY OF SUCH DAMAGE.
  48. */
  49. #include <linux/cdev.h>
  50. #include <linux/clk-provider.h>
  51. #include <linux/debugfs.h>
  52. #include <linux/delay.h>
  53. #include <linux/gpio/consumer.h>
  54. #include <linux/ieee802154.h>
  55. #include <linux/io.h>
  56. #include <linux/kfifo.h>
  57. #include <linux/of.h>
  58. #include <linux/module.h>
  59. #include <linux/mutex.h>
  60. #include <linux/poll.h>
  61. #include <linux/skbuff.h>
  62. #include <linux/slab.h>
  63. #include <linux/spi/spi.h>
  64. #include <linux/spinlock.h>
  65. #include <linux/string.h>
  66. #include <linux/workqueue.h>
  67. #include <linux/interrupt.h>
  68. #include <net/ieee802154_netdev.h>
  69. #include <net/mac802154.h>
  70. #define DRIVER_NAME "ca8210"
  71. /* external clock frequencies */
  72. #define ONE_MHZ 1000000
  73. #define TWO_MHZ (2 * ONE_MHZ)
  74. #define FOUR_MHZ (4 * ONE_MHZ)
  75. #define EIGHT_MHZ (8 * ONE_MHZ)
  76. #define SIXTEEN_MHZ (16 * ONE_MHZ)
  77. /* spi constants */
  78. #define CA8210_SPI_BUF_SIZE 256
  79. #define CA8210_SYNC_TIMEOUT 1000 /* Timeout for synchronous commands [ms] */
  80. /* test interface constants */
  81. #define CA8210_TEST_INT_FILE_NAME "ca8210_test"
  82. #define CA8210_TEST_INT_FIFO_SIZE 256
  83. /* HWME attribute IDs */
  84. #define HWME_EDTHRESHOLD (0x04)
  85. #define HWME_EDVALUE (0x06)
  86. #define HWME_SYSCLKOUT (0x0F)
  87. #define HWME_LQILIMIT (0x11)
  88. /* TDME attribute IDs */
  89. #define TDME_CHANNEL (0x00)
  90. #define TDME_ATM_CONFIG (0x06)
  91. #define MAX_HWME_ATTRIBUTE_SIZE 16
  92. #define MAX_TDME_ATTRIBUTE_SIZE 2
  93. /* PHY/MAC PIB Attribute Enumerations */
  94. #define PHY_CURRENT_CHANNEL (0x00)
  95. #define PHY_TRANSMIT_POWER (0x02)
  96. #define PHY_CCA_MODE (0x03)
  97. #define MAC_ASSOCIATION_PERMIT (0x41)
  98. #define MAC_AUTO_REQUEST (0x42)
  99. #define MAC_BATT_LIFE_EXT (0x43)
  100. #define MAC_BATT_LIFE_EXT_PERIODS (0x44)
  101. #define MAC_BEACON_PAYLOAD (0x45)
  102. #define MAC_BEACON_PAYLOAD_LENGTH (0x46)
  103. #define MAC_BEACON_ORDER (0x47)
  104. #define MAC_GTS_PERMIT (0x4d)
  105. #define MAC_MAX_CSMA_BACKOFFS (0x4e)
  106. #define MAC_MIN_BE (0x4f)
  107. #define MAC_PAN_ID (0x50)
  108. #define MAC_PROMISCUOUS_MODE (0x51)
  109. #define MAC_RX_ON_WHEN_IDLE (0x52)
  110. #define MAC_SHORT_ADDRESS (0x53)
  111. #define MAC_SUPERFRAME_ORDER (0x54)
  112. #define MAC_ASSOCIATED_PAN_COORD (0x56)
  113. #define MAC_MAX_BE (0x57)
  114. #define MAC_MAX_FRAME_RETRIES (0x59)
  115. #define MAC_RESPONSE_WAIT_TIME (0x5A)
  116. #define MAC_SECURITY_ENABLED (0x5D)
  117. #define MAC_AUTO_REQUEST_SECURITY_LEVEL (0x78)
  118. #define MAC_AUTO_REQUEST_KEY_ID_MODE (0x79)
  119. #define NS_IEEE_ADDRESS (0xFF) /* Non-standard IEEE address */
  120. /* MAC Address Mode Definitions */
  121. #define MAC_MODE_NO_ADDR (0x00)
  122. #define MAC_MODE_SHORT_ADDR (0x02)
  123. #define MAC_MODE_LONG_ADDR (0x03)
  124. /* MAC constants */
  125. #define MAX_BEACON_OVERHEAD (75)
  126. #define MAX_BEACON_PAYLOAD_LENGTH (IEEE802154_MTU - MAX_BEACON_OVERHEAD)
  127. #define MAX_ATTRIBUTE_SIZE (122)
  128. #define MAX_DATA_SIZE (114)
  129. #define CA8210_VALID_CHANNELS (0x07FFF800)
  130. /* MAC workarounds for V1.1 and MPW silicon (V0.x) */
  131. #define CA8210_MAC_WORKAROUNDS (0)
  132. #define CA8210_MAC_MPW (0)
  133. /* memory manipulation macros */
  134. #define LS_BYTE(x) ((u8)((x) & 0xFF))
  135. #define MS_BYTE(x) ((u8)(((x) >> 8) & 0xFF))
  136. /* message ID codes in SPI commands */
  137. /* downstream */
  138. #define MCPS_DATA_REQUEST (0x00)
  139. #define MLME_ASSOCIATE_REQUEST (0x02)
  140. #define MLME_ASSOCIATE_RESPONSE (0x03)
  141. #define MLME_DISASSOCIATE_REQUEST (0x04)
  142. #define MLME_GET_REQUEST (0x05)
  143. #define MLME_ORPHAN_RESPONSE (0x06)
  144. #define MLME_RESET_REQUEST (0x07)
  145. #define MLME_RX_ENABLE_REQUEST (0x08)
  146. #define MLME_SCAN_REQUEST (0x09)
  147. #define MLME_SET_REQUEST (0x0A)
  148. #define MLME_START_REQUEST (0x0B)
  149. #define MLME_POLL_REQUEST (0x0D)
  150. #define HWME_SET_REQUEST (0x0E)
  151. #define HWME_GET_REQUEST (0x0F)
  152. #define TDME_SETSFR_REQUEST (0x11)
  153. #define TDME_GETSFR_REQUEST (0x12)
  154. #define TDME_SET_REQUEST (0x14)
  155. /* upstream */
  156. #define MCPS_DATA_INDICATION (0x00)
  157. #define MCPS_DATA_CONFIRM (0x01)
  158. #define MLME_RESET_CONFIRM (0x0A)
  159. #define MLME_SET_CONFIRM (0x0E)
  160. #define MLME_START_CONFIRM (0x0F)
  161. #define HWME_SET_CONFIRM (0x12)
  162. #define HWME_GET_CONFIRM (0x13)
  163. #define HWME_WAKEUP_INDICATION (0x15)
  164. #define TDME_SETSFR_CONFIRM (0x17)
  165. /* SPI command IDs */
  166. /* bit indicating a confirm or indication from slave to master */
  167. #define SPI_S2M (0x20)
  168. /* bit indicating a synchronous message */
  169. #define SPI_SYN (0x40)
  170. /* SPI command definitions */
  171. #define SPI_IDLE (0xFF)
  172. #define SPI_NACK (0xF0)
  173. #define SPI_MCPS_DATA_REQUEST (MCPS_DATA_REQUEST)
  174. #define SPI_MCPS_DATA_INDICATION (MCPS_DATA_INDICATION + SPI_S2M)
  175. #define SPI_MCPS_DATA_CONFIRM (MCPS_DATA_CONFIRM + SPI_S2M)
  176. #define SPI_MLME_ASSOCIATE_REQUEST (MLME_ASSOCIATE_REQUEST)
  177. #define SPI_MLME_RESET_REQUEST (MLME_RESET_REQUEST + SPI_SYN)
  178. #define SPI_MLME_SET_REQUEST (MLME_SET_REQUEST + SPI_SYN)
  179. #define SPI_MLME_START_REQUEST (MLME_START_REQUEST + SPI_SYN)
  180. #define SPI_MLME_RESET_CONFIRM (MLME_RESET_CONFIRM + SPI_S2M + SPI_SYN)
  181. #define SPI_MLME_SET_CONFIRM (MLME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  182. #define SPI_MLME_START_CONFIRM (MLME_START_CONFIRM + SPI_S2M + SPI_SYN)
  183. #define SPI_HWME_SET_REQUEST (HWME_SET_REQUEST + SPI_SYN)
  184. #define SPI_HWME_GET_REQUEST (HWME_GET_REQUEST + SPI_SYN)
  185. #define SPI_HWME_SET_CONFIRM (HWME_SET_CONFIRM + SPI_S2M + SPI_SYN)
  186. #define SPI_HWME_GET_CONFIRM (HWME_GET_CONFIRM + SPI_S2M + SPI_SYN)
  187. #define SPI_HWME_WAKEUP_INDICATION (HWME_WAKEUP_INDICATION + SPI_S2M)
  188. #define SPI_TDME_SETSFR_REQUEST (TDME_SETSFR_REQUEST + SPI_SYN)
  189. #define SPI_TDME_SET_REQUEST (TDME_SET_REQUEST + SPI_SYN)
  190. #define SPI_TDME_SETSFR_CONFIRM (TDME_SETSFR_CONFIRM + SPI_S2M + SPI_SYN)
  191. /* TDME SFR addresses */
  192. /* Page 0 */
  193. #define CA8210_SFR_PACFG (0xB1)
  194. #define CA8210_SFR_MACCON (0xD8)
  195. #define CA8210_SFR_PACFGIB (0xFE)
  196. /* Page 1 */
  197. #define CA8210_SFR_LOTXCAL (0xBF)
  198. #define CA8210_SFR_PTHRH (0xD1)
  199. #define CA8210_SFR_PRECFG (0xD3)
  200. #define CA8210_SFR_LNAGX40 (0xE1)
  201. #define CA8210_SFR_LNAGX41 (0xE2)
  202. #define CA8210_SFR_LNAGX42 (0xE3)
  203. #define CA8210_SFR_LNAGX43 (0xE4)
  204. #define CA8210_SFR_LNAGX44 (0xE5)
  205. #define CA8210_SFR_LNAGX45 (0xE6)
  206. #define CA8210_SFR_LNAGX46 (0xE7)
  207. #define CA8210_SFR_LNAGX47 (0xE9)
  208. #define PACFGIB_DEFAULT_CURRENT (0x3F)
  209. #define PTHRH_DEFAULT_THRESHOLD (0x5A)
  210. #define LNAGX40_DEFAULT_GAIN (0x29) /* 10dB */
  211. #define LNAGX41_DEFAULT_GAIN (0x54) /* 21dB */
  212. #define LNAGX42_DEFAULT_GAIN (0x6C) /* 27dB */
  213. #define LNAGX43_DEFAULT_GAIN (0x7A) /* 30dB */
  214. #define LNAGX44_DEFAULT_GAIN (0x84) /* 33dB */
  215. #define LNAGX45_DEFAULT_GAIN (0x8B) /* 34dB */
  216. #define LNAGX46_DEFAULT_GAIN (0x92) /* 36dB */
  217. #define LNAGX47_DEFAULT_GAIN (0x96) /* 37dB */
  218. #define CA8210_IOCTL_HARD_RESET (0x00)
  219. /* Structs/Enums */
  220. /**
  221. * struct cas_control - spi transfer structure
  222. * @msg: spi_message for each exchange
  223. * @transfer: spi_transfer for each exchange
  224. * @tx_buf: source array for transmission
  225. * @tx_in_buf: array storing bytes received during transmission
  226. * @priv: pointer to private data
  227. *
  228. * This structure stores all the necessary data passed around during a single
  229. * spi exchange.
  230. */
  231. struct cas_control {
  232. struct spi_message msg;
  233. struct spi_transfer transfer;
  234. u8 tx_buf[CA8210_SPI_BUF_SIZE];
  235. u8 tx_in_buf[CA8210_SPI_BUF_SIZE];
  236. struct ca8210_priv *priv;
  237. };
  238. /**
  239. * struct ca8210_test - ca8210 test interface structure
  240. * @ca8210_dfs_spi_int: pointer to the entry in the debug fs for this device
  241. * @up_fifo: fifo for upstream messages
  242. * @readq: read wait queue
  243. *
  244. * This structure stores all the data pertaining to the debug interface
  245. */
  246. struct ca8210_test {
  247. struct dentry *ca8210_dfs_spi_int;
  248. struct kfifo up_fifo;
  249. wait_queue_head_t readq;
  250. };
  251. /**
  252. * struct ca8210_priv - ca8210 private data structure
  253. * @spi: pointer to the ca8210 spi device object
  254. * @hw: pointer to the ca8210 ieee802154_hw object
  255. * @hw_registered: true if hw has been registered with ieee802154
  256. * @lock: spinlock protecting the private data area
  257. * @mlme_workqueue: workqueue for triggering MLME Reset
  258. * @irq_workqueue: workqueue for irq processing
  259. * @tx_skb: current socket buffer to transmit
  260. * @nextmsduhandle: msdu handle to pass to the 15.4 MAC layer for the
  261. * next transmission
  262. * @clk: external clock provided by the ca8210
  263. * @last_dsn: sequence number of last data packet received, for
  264. * resend detection
  265. * @test: test interface data section for this instance
  266. * @async_tx_pending: true if an asynchronous transmission was started and
  267. * is not complete
  268. * @sync_command_response: pointer to buffer to fill with sync response
  269. * @ca8210_is_awake: nonzero if ca8210 is initialised, ready for comms
  270. * @sync_down: counts number of downstream synchronous commands
  271. * @sync_up: counts number of upstream synchronous commands
  272. * @spi_transfer_complete: completion object for a single spi_transfer
  273. * @sync_exchange_complete: completion object for a complete synchronous API
  274. * exchange
  275. * @promiscuous: whether the ca8210 is in promiscuous mode or not
  276. * @retries: records how many times the current pending spi
  277. * transfer has been retried
  278. */
  279. struct ca8210_priv {
  280. struct spi_device *spi;
  281. struct ieee802154_hw *hw;
  282. bool hw_registered;
  283. spinlock_t lock;
  284. struct workqueue_struct *mlme_workqueue;
  285. struct workqueue_struct *irq_workqueue;
  286. struct sk_buff *tx_skb;
  287. u8 nextmsduhandle;
  288. struct clk *clk;
  289. int last_dsn;
  290. struct ca8210_test test;
  291. bool async_tx_pending;
  292. u8 *sync_command_response;
  293. struct completion ca8210_is_awake;
  294. int sync_down, sync_up;
  295. struct completion spi_transfer_complete, sync_exchange_complete;
  296. bool promiscuous;
  297. int retries;
  298. };
  299. /**
  300. * struct work_priv_container - link between a work object and the relevant
  301. * device's private data
  302. * @work: work object being executed
  303. * @priv: device's private data section
  304. *
  305. */
  306. struct work_priv_container {
  307. struct work_struct work;
  308. struct ca8210_priv *priv;
  309. };
  310. /**
  311. * struct ca8210_platform_data - ca8210 platform data structure
  312. * @extclockenable: true if the external clock is to be enabled
  313. * @extclockfreq: frequency of the external clock
  314. * @extclockgpio: ca8210 output gpio of the external clock
  315. * @reset_gpio: ca8210 reset GPIO descriptor
  316. * @irq_gpio: ca8210 interrupt GPIO descriptor
  317. * @irq_id: identifier for the ca8210 irq
  318. *
  319. */
  320. struct ca8210_platform_data {
  321. bool extclockenable;
  322. unsigned int extclockfreq;
  323. unsigned int extclockgpio;
  324. struct gpio_desc *reset_gpio;
  325. struct gpio_desc *irq_gpio;
  326. int irq_id;
  327. };
  328. /**
  329. * struct fulladdr - full MAC addressing information structure
  330. * @mode: address mode (none, short, extended)
  331. * @pan_id: 16-bit LE pan id
  332. * @address: LE address, variable length as specified by mode
  333. *
  334. */
  335. struct fulladdr {
  336. u8 mode;
  337. u8 pan_id[2];
  338. u8 address[8];
  339. };
  340. /**
  341. * union macaddr: generic MAC address container
  342. * @short_address: 16-bit short address
  343. * @ieee_address: 64-bit extended address as LE byte array
  344. *
  345. */
  346. union macaddr {
  347. u16 short_address;
  348. u8 ieee_address[8];
  349. };
  350. /**
  351. * struct secspec: security specification for SAP commands
  352. * @security_level: 0-7, controls level of authentication & encryption
  353. * @key_id_mode: 0-3, specifies how to obtain key
  354. * @key_source: extended key retrieval data
  355. * @key_index: single-byte key identifier
  356. *
  357. */
  358. struct secspec {
  359. u8 security_level;
  360. u8 key_id_mode;
  361. u8 key_source[8];
  362. u8 key_index;
  363. };
  364. /* downlink functions parameter set definitions */
  365. struct mcps_data_request_pset {
  366. u8 src_addr_mode;
  367. struct fulladdr dst;
  368. u8 msdu_length;
  369. u8 msdu_handle;
  370. u8 tx_options;
  371. u8 msdu[MAX_DATA_SIZE];
  372. };
  373. struct mlme_set_request_pset {
  374. u8 pib_attribute;
  375. u8 pib_attribute_index;
  376. u8 pib_attribute_length;
  377. u8 pib_attribute_value[MAX_ATTRIBUTE_SIZE];
  378. };
  379. struct hwme_set_request_pset {
  380. u8 hw_attribute;
  381. u8 hw_attribute_length;
  382. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  383. };
  384. struct hwme_get_request_pset {
  385. u8 hw_attribute;
  386. };
  387. struct tdme_setsfr_request_pset {
  388. u8 sfr_page;
  389. u8 sfr_address;
  390. u8 sfr_value;
  391. };
  392. /* uplink functions parameter set definitions */
  393. struct hwme_set_confirm_pset {
  394. u8 status;
  395. u8 hw_attribute;
  396. };
  397. struct hwme_get_confirm_pset {
  398. u8 status;
  399. u8 hw_attribute;
  400. u8 hw_attribute_length;
  401. u8 hw_attribute_value[MAX_HWME_ATTRIBUTE_SIZE];
  402. };
  403. struct tdme_setsfr_confirm_pset {
  404. u8 status;
  405. u8 sfr_page;
  406. u8 sfr_address;
  407. };
  408. struct mac_message {
  409. u8 command_id;
  410. u8 length;
  411. union {
  412. struct mcps_data_request_pset data_req;
  413. struct mlme_set_request_pset set_req;
  414. struct hwme_set_request_pset hwme_set_req;
  415. struct hwme_get_request_pset hwme_get_req;
  416. struct tdme_setsfr_request_pset tdme_set_sfr_req;
  417. struct hwme_set_confirm_pset hwme_set_cnf;
  418. struct hwme_get_confirm_pset hwme_get_cnf;
  419. struct tdme_setsfr_confirm_pset tdme_set_sfr_cnf;
  420. u8 u8param;
  421. u8 status;
  422. u8 payload[148];
  423. } pdata;
  424. };
  425. union pa_cfg_sfr {
  426. struct {
  427. u8 bias_current_trim : 3;
  428. u8 /* reserved */ : 1;
  429. u8 buffer_capacitor_trim : 3;
  430. u8 boost : 1;
  431. };
  432. u8 paib;
  433. };
  434. struct preamble_cfg_sfr {
  435. u8 timeout_symbols : 3;
  436. u8 acquisition_symbols : 3;
  437. u8 search_symbols : 2;
  438. };
  439. static int (*cascoda_api_upstream)(
  440. const u8 *buf,
  441. size_t len,
  442. void *device_ref
  443. );
  444. /**
  445. * link_to_linux_err() - Translates an 802.15.4 return code into the closest
  446. * linux error
  447. * @link_status: 802.15.4 status code
  448. *
  449. * Return: 0 or Linux error code
  450. */
  451. static int link_to_linux_err(int link_status)
  452. {
  453. if (link_status < 0) {
  454. /* status is already a Linux code */
  455. return link_status;
  456. }
  457. switch (link_status) {
  458. case IEEE802154_SUCCESS:
  459. case IEEE802154_REALIGNMENT:
  460. return 0;
  461. case IEEE802154_IMPROPER_KEY_TYPE:
  462. return -EKEYREJECTED;
  463. case IEEE802154_IMPROPER_SECURITY_LEVEL:
  464. case IEEE802154_UNSUPPORTED_LEGACY:
  465. case IEEE802154_DENIED:
  466. return -EACCES;
  467. case IEEE802154_BEACON_LOST:
  468. case IEEE802154_NO_ACK:
  469. case IEEE802154_NO_BEACON:
  470. return -ENETUNREACH;
  471. case IEEE802154_CHANNEL_ACCESS_FAILURE:
  472. case IEEE802154_TX_ACTIVE:
  473. case IEEE802154_SCAN_IN_PROGRESS:
  474. return -EBUSY;
  475. case IEEE802154_DISABLE_TRX_FAILURE:
  476. case IEEE802154_OUT_OF_CAP:
  477. return -EAGAIN;
  478. case IEEE802154_FRAME_TOO_LONG:
  479. return -EMSGSIZE;
  480. case IEEE802154_INVALID_GTS:
  481. case IEEE802154_PAST_TIME:
  482. return -EBADSLT;
  483. case IEEE802154_INVALID_HANDLE:
  484. return -EBADMSG;
  485. case IEEE802154_INVALID_PARAMETER:
  486. case IEEE802154_UNSUPPORTED_ATTRIBUTE:
  487. case IEEE802154_ON_TIME_TOO_LONG:
  488. case IEEE802154_INVALID_INDEX:
  489. return -EINVAL;
  490. case IEEE802154_NO_DATA:
  491. return -ENODATA;
  492. case IEEE802154_NO_SHORT_ADDRESS:
  493. return -EFAULT;
  494. case IEEE802154_PAN_ID_CONFLICT:
  495. return -EADDRINUSE;
  496. case IEEE802154_TRANSACTION_EXPIRED:
  497. return -ETIME;
  498. case IEEE802154_TRANSACTION_OVERFLOW:
  499. return -ENOBUFS;
  500. case IEEE802154_UNAVAILABLE_KEY:
  501. return -ENOKEY;
  502. case IEEE802154_INVALID_ADDRESS:
  503. return -ENXIO;
  504. case IEEE802154_TRACKING_OFF:
  505. case IEEE802154_SUPERFRAME_OVERLAP:
  506. return -EREMOTEIO;
  507. case IEEE802154_LIMIT_REACHED:
  508. return -EDQUOT;
  509. case IEEE802154_READ_ONLY:
  510. return -EROFS;
  511. default:
  512. return -EPROTO;
  513. }
  514. }
  515. /**
  516. * ca8210_test_int_driver_write() - Writes a message to the test interface to be
  517. * read by the userspace
  518. * @buf: Buffer containing upstream message
  519. * @len: length of message to write
  520. * @spi: SPI device of message originator
  521. *
  522. * Return: 0 or linux error code
  523. */
  524. static int ca8210_test_int_driver_write(
  525. const u8 *buf,
  526. size_t len,
  527. void *spi
  528. )
  529. {
  530. struct ca8210_priv *priv = spi_get_drvdata(spi);
  531. struct ca8210_test *test = &priv->test;
  532. char *fifo_buffer;
  533. int i;
  534. dev_dbg(
  535. &priv->spi->dev,
  536. "test_interface: Buffering upstream message:\n"
  537. );
  538. for (i = 0; i < len; i++)
  539. dev_dbg(&priv->spi->dev, "%#03x\n", buf[i]);
  540. fifo_buffer = kmemdup(buf, len, GFP_KERNEL);
  541. if (!fifo_buffer)
  542. return -ENOMEM;
  543. kfifo_in(&test->up_fifo, &fifo_buffer, 4);
  544. wake_up_interruptible(&priv->test.readq);
  545. return 0;
  546. }
  547. /* SPI Operation */
  548. static int ca8210_net_rx(
  549. struct ieee802154_hw *hw,
  550. u8 *command,
  551. size_t len
  552. );
  553. static u8 mlme_reset_request_sync(
  554. u8 set_default_pib,
  555. void *device_ref
  556. );
  557. static int ca8210_spi_transfer(
  558. struct spi_device *spi,
  559. const u8 *buf,
  560. size_t len
  561. );
  562. /**
  563. * ca8210_reset_send() - Hard resets the ca8210 for a given time
  564. * @spi: Pointer to target ca8210 spi device
  565. * @ms: Milliseconds to hold the reset line low for
  566. */
  567. static void ca8210_reset_send(struct spi_device *spi, unsigned int ms)
  568. {
  569. struct device *dev = &spi->dev;
  570. struct ca8210_platform_data *pdata = dev_get_platdata(dev);
  571. struct ca8210_priv *priv = spi_get_drvdata(spi);
  572. long status;
  573. gpiod_set_value(pdata->reset_gpio, 1);
  574. reinit_completion(&priv->ca8210_is_awake);
  575. msleep(ms);
  576. gpiod_set_value(pdata->reset_gpio, 0);
  577. priv->promiscuous = false;
  578. /* Wait until wakeup indication seen */
  579. status = wait_for_completion_interruptible_timeout(
  580. &priv->ca8210_is_awake,
  581. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  582. );
  583. if (status == 0) {
  584. dev_crit(
  585. &spi->dev,
  586. "Fatal: No wakeup from ca8210 after reset!\n"
  587. );
  588. }
  589. dev_dbg(&spi->dev, "Reset the device\n");
  590. }
  591. /**
  592. * ca8210_mlme_reset_worker() - Resets the MLME, Called when the MAC OVERFLOW
  593. * condition happens.
  594. * @work: Pointer to work being executed
  595. */
  596. static void ca8210_mlme_reset_worker(struct work_struct *work)
  597. {
  598. struct work_priv_container *wpc = container_of(
  599. work,
  600. struct work_priv_container,
  601. work
  602. );
  603. struct ca8210_priv *priv = wpc->priv;
  604. mlme_reset_request_sync(0, priv->spi);
  605. kfree(wpc);
  606. }
  607. /**
  608. * ca8210_rx_done() - Calls various message dispatches responding to a received
  609. * command
  610. * @cas_ctl: Pointer to the cas_control object for the relevant spi transfer
  611. *
  612. * Presents a received SAP command from the ca8210 to the Cascoda EVBME, test
  613. * interface and network driver.
  614. */
  615. static void ca8210_rx_done(struct cas_control *cas_ctl)
  616. {
  617. u8 *buf;
  618. unsigned int len;
  619. struct work_priv_container *mlme_reset_wpc;
  620. struct ca8210_priv *priv = cas_ctl->priv;
  621. buf = cas_ctl->tx_in_buf;
  622. len = buf[1] + 2;
  623. if (len > CA8210_SPI_BUF_SIZE) {
  624. dev_crit(
  625. &priv->spi->dev,
  626. "Received packet len (%u) erroneously long\n",
  627. len
  628. );
  629. goto finish;
  630. }
  631. if (buf[0] & SPI_SYN) {
  632. if (priv->sync_command_response) {
  633. memcpy(priv->sync_command_response, buf, len);
  634. complete(&priv->sync_exchange_complete);
  635. } else {
  636. if (cascoda_api_upstream)
  637. cascoda_api_upstream(buf, len, priv->spi);
  638. priv->sync_up++;
  639. }
  640. } else {
  641. if (cascoda_api_upstream)
  642. cascoda_api_upstream(buf, len, priv->spi);
  643. }
  644. ca8210_net_rx(priv->hw, buf, len);
  645. if (buf[0] == SPI_MCPS_DATA_CONFIRM) {
  646. if (buf[3] == IEEE802154_TRANSACTION_OVERFLOW) {
  647. dev_info(
  648. &priv->spi->dev,
  649. "Waiting for transaction overflow to stabilise...\n");
  650. msleep(2000);
  651. dev_info(
  652. &priv->spi->dev,
  653. "Resetting MAC...\n");
  654. mlme_reset_wpc = kmalloc_obj(*mlme_reset_wpc);
  655. if (!mlme_reset_wpc)
  656. goto finish;
  657. INIT_WORK(
  658. &mlme_reset_wpc->work,
  659. ca8210_mlme_reset_worker
  660. );
  661. mlme_reset_wpc->priv = priv;
  662. queue_work(priv->mlme_workqueue, &mlme_reset_wpc->work);
  663. }
  664. } else if (buf[0] == SPI_HWME_WAKEUP_INDICATION) {
  665. dev_notice(
  666. &priv->spi->dev,
  667. "Wakeup indication received, reason:\n"
  668. );
  669. switch (buf[2]) {
  670. case 0:
  671. dev_notice(
  672. &priv->spi->dev,
  673. "Transceiver woken up from Power Up / System Reset\n"
  674. );
  675. break;
  676. case 1:
  677. dev_notice(
  678. &priv->spi->dev,
  679. "Watchdog Timer Time-Out\n"
  680. );
  681. break;
  682. case 2:
  683. dev_notice(
  684. &priv->spi->dev,
  685. "Transceiver woken up from Power-Off by Sleep Timer Time-Out\n");
  686. break;
  687. case 3:
  688. dev_notice(
  689. &priv->spi->dev,
  690. "Transceiver woken up from Power-Off by GPIO Activity\n"
  691. );
  692. break;
  693. case 4:
  694. dev_notice(
  695. &priv->spi->dev,
  696. "Transceiver woken up from Standby by Sleep Timer Time-Out\n"
  697. );
  698. break;
  699. case 5:
  700. dev_notice(
  701. &priv->spi->dev,
  702. "Transceiver woken up from Standby by GPIO Activity\n"
  703. );
  704. break;
  705. case 6:
  706. dev_notice(
  707. &priv->spi->dev,
  708. "Sleep-Timer Time-Out in Active Mode\n"
  709. );
  710. break;
  711. default:
  712. dev_warn(&priv->spi->dev, "Wakeup reason unknown\n");
  713. break;
  714. }
  715. complete(&priv->ca8210_is_awake);
  716. }
  717. finish:;
  718. }
  719. static void ca8210_remove(struct spi_device *spi_device);
  720. /**
  721. * ca8210_spi_transfer_complete() - Called when a single spi transfer has
  722. * completed
  723. * @context: Pointer to the cas_control object for the finished transfer
  724. */
  725. static void ca8210_spi_transfer_complete(void *context)
  726. {
  727. struct cas_control *cas_ctl = context;
  728. struct ca8210_priv *priv = cas_ctl->priv;
  729. bool duplex_rx = false;
  730. int i;
  731. u8 retry_buffer[CA8210_SPI_BUF_SIZE];
  732. if (
  733. cas_ctl->tx_in_buf[0] == SPI_NACK ||
  734. (cas_ctl->tx_in_buf[0] == SPI_IDLE &&
  735. cas_ctl->tx_in_buf[1] == SPI_NACK)
  736. ) {
  737. /* ca8210 is busy */
  738. dev_info(&priv->spi->dev, "ca8210 was busy during attempted write\n");
  739. if (cas_ctl->tx_buf[0] == SPI_IDLE) {
  740. dev_warn(
  741. &priv->spi->dev,
  742. "IRQ servicing NACKd, dropping transfer\n"
  743. );
  744. kfree(cas_ctl);
  745. return;
  746. }
  747. if (priv->retries > 3) {
  748. dev_err(&priv->spi->dev, "too many retries!\n");
  749. kfree(cas_ctl);
  750. ca8210_remove(priv->spi);
  751. return;
  752. }
  753. memcpy(retry_buffer, cas_ctl->tx_buf, CA8210_SPI_BUF_SIZE);
  754. kfree(cas_ctl);
  755. ca8210_spi_transfer(
  756. priv->spi,
  757. retry_buffer,
  758. CA8210_SPI_BUF_SIZE
  759. );
  760. priv->retries++;
  761. dev_info(&priv->spi->dev, "retried spi write\n");
  762. return;
  763. } else if (
  764. cas_ctl->tx_in_buf[0] != SPI_IDLE &&
  765. cas_ctl->tx_in_buf[0] != SPI_NACK
  766. ) {
  767. duplex_rx = true;
  768. }
  769. if (duplex_rx) {
  770. dev_dbg(&priv->spi->dev, "READ CMD DURING TX\n");
  771. for (i = 0; i < cas_ctl->tx_in_buf[1] + 2; i++)
  772. dev_dbg(
  773. &priv->spi->dev,
  774. "%#03x\n",
  775. cas_ctl->tx_in_buf[i]
  776. );
  777. ca8210_rx_done(cas_ctl);
  778. }
  779. complete(&priv->spi_transfer_complete);
  780. kfree(cas_ctl);
  781. priv->retries = 0;
  782. }
  783. /**
  784. * ca8210_spi_transfer() - Initiate duplex spi transfer with ca8210
  785. * @spi: Pointer to spi device for transfer
  786. * @buf: Octet array to send
  787. * @len: length of the buffer being sent
  788. *
  789. * Return: 0 or linux error code
  790. */
  791. static int ca8210_spi_transfer(
  792. struct spi_device *spi,
  793. const u8 *buf,
  794. size_t len
  795. )
  796. {
  797. int i, status = 0;
  798. struct ca8210_priv *priv;
  799. struct cas_control *cas_ctl;
  800. if (!spi) {
  801. pr_crit("NULL spi device passed to %s\n", __func__);
  802. return -ENODEV;
  803. }
  804. priv = spi_get_drvdata(spi);
  805. reinit_completion(&priv->spi_transfer_complete);
  806. dev_dbg(&spi->dev, "%s called\n", __func__);
  807. cas_ctl = kzalloc_obj(*cas_ctl, GFP_ATOMIC);
  808. if (!cas_ctl)
  809. return -ENOMEM;
  810. cas_ctl->priv = priv;
  811. memset(cas_ctl->tx_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  812. memset(cas_ctl->tx_in_buf, SPI_IDLE, CA8210_SPI_BUF_SIZE);
  813. memcpy(cas_ctl->tx_buf, buf, len);
  814. for (i = 0; i < len; i++)
  815. dev_dbg(&spi->dev, "%#03x\n", cas_ctl->tx_buf[i]);
  816. spi_message_init(&cas_ctl->msg);
  817. cas_ctl->transfer.tx_nbits = 1; /* 1 MOSI line */
  818. cas_ctl->transfer.rx_nbits = 1; /* 1 MISO line */
  819. cas_ctl->transfer.speed_hz = 0; /* Use device setting */
  820. cas_ctl->transfer.bits_per_word = 0; /* Use device setting */
  821. cas_ctl->transfer.tx_buf = cas_ctl->tx_buf;
  822. cas_ctl->transfer.rx_buf = cas_ctl->tx_in_buf;
  823. cas_ctl->transfer.delay.value = 0;
  824. cas_ctl->transfer.delay.unit = SPI_DELAY_UNIT_USECS;
  825. cas_ctl->transfer.cs_change = 0;
  826. cas_ctl->transfer.len = sizeof(struct mac_message);
  827. cas_ctl->msg.complete = ca8210_spi_transfer_complete;
  828. cas_ctl->msg.context = cas_ctl;
  829. spi_message_add_tail(
  830. &cas_ctl->transfer,
  831. &cas_ctl->msg
  832. );
  833. status = spi_async(spi, &cas_ctl->msg);
  834. if (status < 0) {
  835. dev_crit(
  836. &spi->dev,
  837. "status %d from spi_sync in write\n",
  838. status
  839. );
  840. }
  841. return status;
  842. }
  843. /**
  844. * ca8210_spi_exchange() - Exchange API/SAP commands with the radio
  845. * @buf: Octet array of command being sent downstream
  846. * @len: length of buf
  847. * @response: buffer for storing synchronous response
  848. * @device_ref: spi_device pointer for ca8210
  849. *
  850. * Effectively calls ca8210_spi_transfer to write buf[] to the spi, then for
  851. * synchronous commands waits for the corresponding response to be read from
  852. * the spi before returning. The response is written to the response parameter.
  853. *
  854. * Return: 0 or linux error code
  855. */
  856. static int ca8210_spi_exchange(
  857. const u8 *buf,
  858. size_t len,
  859. u8 *response,
  860. void *device_ref
  861. )
  862. {
  863. int status = 0;
  864. struct spi_device *spi = device_ref;
  865. struct ca8210_priv *priv = spi->dev.driver_data;
  866. long wait_remaining;
  867. if ((buf[0] & SPI_SYN) && response) { /* if sync wait for confirm */
  868. reinit_completion(&priv->sync_exchange_complete);
  869. priv->sync_command_response = response;
  870. }
  871. do {
  872. reinit_completion(&priv->spi_transfer_complete);
  873. status = ca8210_spi_transfer(priv->spi, buf, len);
  874. if (status) {
  875. dev_warn(
  876. &spi->dev,
  877. "spi write failed, returned %d\n",
  878. status
  879. );
  880. if (status == -EBUSY)
  881. continue;
  882. if (((buf[0] & SPI_SYN) && response))
  883. complete(&priv->sync_exchange_complete);
  884. goto cleanup;
  885. }
  886. wait_remaining = wait_for_completion_interruptible_timeout(
  887. &priv->spi_transfer_complete,
  888. msecs_to_jiffies(1000)
  889. );
  890. if (wait_remaining == -ERESTARTSYS) {
  891. status = -ERESTARTSYS;
  892. } else if (wait_remaining == 0) {
  893. dev_err(
  894. &spi->dev,
  895. "SPI downstream transfer timed out!\n"
  896. );
  897. status = -ETIME;
  898. goto cleanup;
  899. }
  900. } while (status < 0);
  901. if (!((buf[0] & SPI_SYN) && response))
  902. goto cleanup;
  903. wait_remaining = wait_for_completion_interruptible_timeout(
  904. &priv->sync_exchange_complete,
  905. msecs_to_jiffies(CA8210_SYNC_TIMEOUT)
  906. );
  907. if (wait_remaining == -ERESTARTSYS) {
  908. status = -ERESTARTSYS;
  909. } else if (wait_remaining == 0) {
  910. dev_err(
  911. &spi->dev,
  912. "Synchronous confirm timeout\n"
  913. );
  914. status = -ETIME;
  915. }
  916. cleanup:
  917. priv->sync_command_response = NULL;
  918. return status;
  919. }
  920. /**
  921. * ca8210_interrupt_handler() - Called when an irq is received from the ca8210
  922. * @irq: Id of the irq being handled
  923. * @dev_id: Pointer passed by the system, pointing to the ca8210's private data
  924. *
  925. * This function is called when the irq line from the ca8210 is asserted,
  926. * signifying that the ca8210 has a message to send upstream to us. Starts the
  927. * asynchronous spi read.
  928. *
  929. * Return: irq return code
  930. */
  931. static irqreturn_t ca8210_interrupt_handler(int irq, void *dev_id)
  932. {
  933. struct ca8210_priv *priv = dev_id;
  934. int status;
  935. dev_dbg(&priv->spi->dev, "irq: Interrupt occurred\n");
  936. do {
  937. status = ca8210_spi_transfer(priv->spi, NULL, 0);
  938. if (status && (status != -EBUSY)) {
  939. dev_warn(
  940. &priv->spi->dev,
  941. "spi read failed, returned %d\n",
  942. status
  943. );
  944. }
  945. } while (status == -EBUSY);
  946. return IRQ_HANDLED;
  947. }
  948. static int (*cascoda_api_downstream)(
  949. const u8 *buf,
  950. size_t len,
  951. u8 *response,
  952. void *device_ref
  953. ) = ca8210_spi_exchange;
  954. /* Cascoda API / 15.4 SAP Primitives */
  955. /**
  956. * tdme_setsfr_request_sync() - TDME_SETSFR_request/confirm according to API
  957. * @sfr_page: SFR Page
  958. * @sfr_address: SFR Address
  959. * @sfr_value: SFR Value
  960. * @device_ref: Nondescript pointer to target device
  961. *
  962. * Return: 802.15.4 status code of TDME-SETSFR.confirm
  963. */
  964. static u8 tdme_setsfr_request_sync(
  965. u8 sfr_page,
  966. u8 sfr_address,
  967. u8 sfr_value,
  968. void *device_ref
  969. )
  970. {
  971. int ret;
  972. struct mac_message command, response;
  973. struct spi_device *spi = device_ref;
  974. command.command_id = SPI_TDME_SETSFR_REQUEST;
  975. command.length = 3;
  976. command.pdata.tdme_set_sfr_req.sfr_page = sfr_page;
  977. command.pdata.tdme_set_sfr_req.sfr_address = sfr_address;
  978. command.pdata.tdme_set_sfr_req.sfr_value = sfr_value;
  979. response.command_id = SPI_IDLE;
  980. ret = cascoda_api_downstream(
  981. &command.command_id,
  982. command.length + 2,
  983. &response.command_id,
  984. device_ref
  985. );
  986. if (ret) {
  987. dev_crit(&spi->dev, "cascoda_api_downstream returned %d", ret);
  988. return IEEE802154_SYSTEM_ERROR;
  989. }
  990. if (response.command_id != SPI_TDME_SETSFR_CONFIRM) {
  991. dev_crit(
  992. &spi->dev,
  993. "sync response to SPI_TDME_SETSFR_REQUEST was not SPI_TDME_SETSFR_CONFIRM, it was %d\n",
  994. response.command_id
  995. );
  996. return IEEE802154_SYSTEM_ERROR;
  997. }
  998. return response.pdata.tdme_set_sfr_cnf.status;
  999. }
  1000. /**
  1001. * tdme_chipinit() - TDME Chip Register Default Initialisation Macro
  1002. * @device_ref: Nondescript pointer to target device
  1003. *
  1004. * Return: 802.15.4 status code of API calls
  1005. */
  1006. static u8 tdme_chipinit(void *device_ref)
  1007. {
  1008. u8 status = IEEE802154_SUCCESS;
  1009. u8 sfr_address;
  1010. struct spi_device *spi = device_ref;
  1011. struct preamble_cfg_sfr pre_cfg_value = {
  1012. .timeout_symbols = 3,
  1013. .acquisition_symbols = 3,
  1014. .search_symbols = 1,
  1015. };
  1016. /* LNA Gain Settings */
  1017. status = tdme_setsfr_request_sync(
  1018. 1, (sfr_address = CA8210_SFR_LNAGX40),
  1019. LNAGX40_DEFAULT_GAIN, device_ref);
  1020. if (status)
  1021. goto finish;
  1022. status = tdme_setsfr_request_sync(
  1023. 1, (sfr_address = CA8210_SFR_LNAGX41),
  1024. LNAGX41_DEFAULT_GAIN, device_ref);
  1025. if (status)
  1026. goto finish;
  1027. status = tdme_setsfr_request_sync(
  1028. 1, (sfr_address = CA8210_SFR_LNAGX42),
  1029. LNAGX42_DEFAULT_GAIN, device_ref);
  1030. if (status)
  1031. goto finish;
  1032. status = tdme_setsfr_request_sync(
  1033. 1, (sfr_address = CA8210_SFR_LNAGX43),
  1034. LNAGX43_DEFAULT_GAIN, device_ref);
  1035. if (status)
  1036. goto finish;
  1037. status = tdme_setsfr_request_sync(
  1038. 1, (sfr_address = CA8210_SFR_LNAGX44),
  1039. LNAGX44_DEFAULT_GAIN, device_ref);
  1040. if (status)
  1041. goto finish;
  1042. status = tdme_setsfr_request_sync(
  1043. 1, (sfr_address = CA8210_SFR_LNAGX45),
  1044. LNAGX45_DEFAULT_GAIN, device_ref);
  1045. if (status)
  1046. goto finish;
  1047. status = tdme_setsfr_request_sync(
  1048. 1, (sfr_address = CA8210_SFR_LNAGX46),
  1049. LNAGX46_DEFAULT_GAIN, device_ref);
  1050. if (status)
  1051. goto finish;
  1052. status = tdme_setsfr_request_sync(
  1053. 1, (sfr_address = CA8210_SFR_LNAGX47),
  1054. LNAGX47_DEFAULT_GAIN, device_ref);
  1055. if (status)
  1056. goto finish;
  1057. /* Preamble Timing Config */
  1058. status = tdme_setsfr_request_sync(
  1059. 1, (sfr_address = CA8210_SFR_PRECFG),
  1060. *((u8 *)&pre_cfg_value), device_ref);
  1061. if (status)
  1062. goto finish;
  1063. /* Preamble Threshold High */
  1064. status = tdme_setsfr_request_sync(
  1065. 1, (sfr_address = CA8210_SFR_PTHRH),
  1066. PTHRH_DEFAULT_THRESHOLD, device_ref);
  1067. if (status)
  1068. goto finish;
  1069. /* Tx Output Power 8 dBm */
  1070. status = tdme_setsfr_request_sync(
  1071. 0, (sfr_address = CA8210_SFR_PACFGIB),
  1072. PACFGIB_DEFAULT_CURRENT, device_ref);
  1073. if (status)
  1074. goto finish;
  1075. finish:
  1076. if (status != IEEE802154_SUCCESS) {
  1077. dev_err(
  1078. &spi->dev,
  1079. "failed to set sfr at %#03x, status = %#03x\n",
  1080. sfr_address,
  1081. status
  1082. );
  1083. }
  1084. return status;
  1085. }
  1086. /**
  1087. * tdme_channelinit() - TDME Channel Register Default Initialisation Macro (Tx)
  1088. * @channel: 802.15.4 channel to initialise chip for
  1089. * @device_ref: Nondescript pointer to target device
  1090. *
  1091. * Return: 802.15.4 status code of API calls
  1092. */
  1093. static u8 tdme_channelinit(u8 channel, void *device_ref)
  1094. {
  1095. /* Transceiver front-end local oscillator tx two-point calibration
  1096. * value. Tuned for the hardware.
  1097. */
  1098. u8 txcalval;
  1099. if (channel >= 25)
  1100. txcalval = 0xA7;
  1101. else if (channel >= 23)
  1102. txcalval = 0xA8;
  1103. else if (channel >= 22)
  1104. txcalval = 0xA9;
  1105. else if (channel >= 20)
  1106. txcalval = 0xAA;
  1107. else if (channel >= 17)
  1108. txcalval = 0xAB;
  1109. else if (channel >= 16)
  1110. txcalval = 0xAC;
  1111. else if (channel >= 14)
  1112. txcalval = 0xAD;
  1113. else if (channel >= 12)
  1114. txcalval = 0xAE;
  1115. else
  1116. txcalval = 0xAF;
  1117. return tdme_setsfr_request_sync(
  1118. 1,
  1119. CA8210_SFR_LOTXCAL,
  1120. txcalval,
  1121. device_ref
  1122. ); /* LO Tx Cal */
  1123. }
  1124. /**
  1125. * tdme_checkpibattribute() - Checks Attribute Values that are not checked in
  1126. * MAC
  1127. * @pib_attribute: Attribute Number
  1128. * @pib_attribute_length: Attribute length
  1129. * @pib_attribute_value: Pointer to Attribute Value
  1130. *
  1131. * Return: 802.15.4 status code of checks
  1132. */
  1133. static u8 tdme_checkpibattribute(
  1134. u8 pib_attribute,
  1135. u8 pib_attribute_length,
  1136. const void *pib_attribute_value
  1137. )
  1138. {
  1139. u8 status = IEEE802154_SUCCESS;
  1140. u8 value;
  1141. value = *((u8 *)pib_attribute_value);
  1142. switch (pib_attribute) {
  1143. /* PHY */
  1144. case PHY_TRANSMIT_POWER:
  1145. if (value > 0x3F)
  1146. status = IEEE802154_INVALID_PARAMETER;
  1147. break;
  1148. case PHY_CCA_MODE:
  1149. if (value > 0x03)
  1150. status = IEEE802154_INVALID_PARAMETER;
  1151. break;
  1152. /* MAC */
  1153. case MAC_BATT_LIFE_EXT_PERIODS:
  1154. if (value < 6 || value > 41)
  1155. status = IEEE802154_INVALID_PARAMETER;
  1156. break;
  1157. case MAC_BEACON_PAYLOAD:
  1158. if (pib_attribute_length > MAX_BEACON_PAYLOAD_LENGTH)
  1159. status = IEEE802154_INVALID_PARAMETER;
  1160. break;
  1161. case MAC_BEACON_PAYLOAD_LENGTH:
  1162. if (value > MAX_BEACON_PAYLOAD_LENGTH)
  1163. status = IEEE802154_INVALID_PARAMETER;
  1164. break;
  1165. case MAC_BEACON_ORDER:
  1166. if (value > 15)
  1167. status = IEEE802154_INVALID_PARAMETER;
  1168. break;
  1169. case MAC_MAX_BE:
  1170. if (value < 3 || value > 8)
  1171. status = IEEE802154_INVALID_PARAMETER;
  1172. break;
  1173. case MAC_MAX_CSMA_BACKOFFS:
  1174. if (value > 5)
  1175. status = IEEE802154_INVALID_PARAMETER;
  1176. break;
  1177. case MAC_MAX_FRAME_RETRIES:
  1178. if (value > 7)
  1179. status = IEEE802154_INVALID_PARAMETER;
  1180. break;
  1181. case MAC_MIN_BE:
  1182. if (value > 8)
  1183. status = IEEE802154_INVALID_PARAMETER;
  1184. break;
  1185. case MAC_RESPONSE_WAIT_TIME:
  1186. if (value < 2 || value > 64)
  1187. status = IEEE802154_INVALID_PARAMETER;
  1188. break;
  1189. case MAC_SUPERFRAME_ORDER:
  1190. if (value > 15)
  1191. status = IEEE802154_INVALID_PARAMETER;
  1192. break;
  1193. /* boolean */
  1194. case MAC_ASSOCIATED_PAN_COORD:
  1195. case MAC_ASSOCIATION_PERMIT:
  1196. case MAC_AUTO_REQUEST:
  1197. case MAC_BATT_LIFE_EXT:
  1198. case MAC_GTS_PERMIT:
  1199. case MAC_PROMISCUOUS_MODE:
  1200. case MAC_RX_ON_WHEN_IDLE:
  1201. case MAC_SECURITY_ENABLED:
  1202. if (value > 1)
  1203. status = IEEE802154_INVALID_PARAMETER;
  1204. break;
  1205. /* MAC SEC */
  1206. case MAC_AUTO_REQUEST_SECURITY_LEVEL:
  1207. if (value > 7)
  1208. status = IEEE802154_INVALID_PARAMETER;
  1209. break;
  1210. case MAC_AUTO_REQUEST_KEY_ID_MODE:
  1211. if (value > 3)
  1212. status = IEEE802154_INVALID_PARAMETER;
  1213. break;
  1214. default:
  1215. break;
  1216. }
  1217. return status;
  1218. }
  1219. /**
  1220. * tdme_settxpower() - Sets the tx power for MLME_SET phyTransmitPower
  1221. * @txp: Transmit Power
  1222. * @device_ref: Nondescript pointer to target device
  1223. *
  1224. * Normalised to 802.15.4 Definition (6-bit, signed):
  1225. * Bit 7-6: not used
  1226. * Bit 5-0: tx power (-32 - +31 dB)
  1227. *
  1228. * Return: 802.15.4 status code of api calls
  1229. */
  1230. static u8 tdme_settxpower(u8 txp, void *device_ref)
  1231. {
  1232. u8 status;
  1233. s8 txp_val;
  1234. u8 txp_ext;
  1235. union pa_cfg_sfr pa_cfg_val;
  1236. /* extend from 6 to 8 bit */
  1237. txp_ext = 0x3F & txp;
  1238. if (txp_ext & 0x20)
  1239. txp_ext += 0xC0;
  1240. txp_val = (s8)txp_ext;
  1241. if (CA8210_MAC_MPW) {
  1242. if (txp_val > 0) {
  1243. /* 8 dBm: ptrim = 5, itrim = +3 => +4 dBm */
  1244. pa_cfg_val.bias_current_trim = 3;
  1245. pa_cfg_val.buffer_capacitor_trim = 5;
  1246. pa_cfg_val.boost = 1;
  1247. } else {
  1248. /* 0 dBm: ptrim = 7, itrim = +3 => -6 dBm */
  1249. pa_cfg_val.bias_current_trim = 3;
  1250. pa_cfg_val.buffer_capacitor_trim = 7;
  1251. pa_cfg_val.boost = 0;
  1252. }
  1253. /* write PACFG */
  1254. status = tdme_setsfr_request_sync(
  1255. 0,
  1256. CA8210_SFR_PACFG,
  1257. pa_cfg_val.paib,
  1258. device_ref
  1259. );
  1260. } else {
  1261. /* Look-Up Table for Setting Current and Frequency Trim values
  1262. * for desired Output Power
  1263. */
  1264. if (txp_val > 8) {
  1265. pa_cfg_val.paib = 0x3F;
  1266. } else if (txp_val == 8) {
  1267. pa_cfg_val.paib = 0x32;
  1268. } else if (txp_val == 7) {
  1269. pa_cfg_val.paib = 0x22;
  1270. } else if (txp_val == 6) {
  1271. pa_cfg_val.paib = 0x18;
  1272. } else if (txp_val == 5) {
  1273. pa_cfg_val.paib = 0x10;
  1274. } else if (txp_val == 4) {
  1275. pa_cfg_val.paib = 0x0C;
  1276. } else if (txp_val == 3) {
  1277. pa_cfg_val.paib = 0x08;
  1278. } else if (txp_val == 2) {
  1279. pa_cfg_val.paib = 0x05;
  1280. } else if (txp_val == 1) {
  1281. pa_cfg_val.paib = 0x03;
  1282. } else if (txp_val == 0) {
  1283. pa_cfg_val.paib = 0x01;
  1284. } else { /* < 0 */
  1285. pa_cfg_val.paib = 0x00;
  1286. }
  1287. /* write PACFGIB */
  1288. status = tdme_setsfr_request_sync(
  1289. 0,
  1290. CA8210_SFR_PACFGIB,
  1291. pa_cfg_val.paib,
  1292. device_ref
  1293. );
  1294. }
  1295. return status;
  1296. }
  1297. /**
  1298. * mcps_data_request() - mcps_data_request (Send Data) according to API Spec
  1299. * @src_addr_mode: Source Addressing Mode
  1300. * @dst_address_mode: Destination Addressing Mode
  1301. * @dst_pan_id: Destination PAN ID
  1302. * @dst_addr: Pointer to Destination Address
  1303. * @msdu_length: length of Data
  1304. * @msdu: Pointer to Data
  1305. * @msdu_handle: Handle of Data
  1306. * @tx_options: Tx Options Bit Field
  1307. * @security: Pointer to Security Structure or NULL
  1308. * @device_ref: Nondescript pointer to target device
  1309. *
  1310. * Return: 802.15.4 status code of action
  1311. */
  1312. static u8 mcps_data_request(
  1313. u8 src_addr_mode,
  1314. u8 dst_address_mode,
  1315. u16 dst_pan_id,
  1316. union macaddr *dst_addr,
  1317. u8 msdu_length,
  1318. u8 *msdu,
  1319. u8 msdu_handle,
  1320. u8 tx_options,
  1321. struct secspec *security,
  1322. void *device_ref
  1323. )
  1324. {
  1325. struct secspec *psec;
  1326. struct mac_message command;
  1327. command.command_id = SPI_MCPS_DATA_REQUEST;
  1328. command.pdata.data_req.src_addr_mode = src_addr_mode;
  1329. command.pdata.data_req.dst.mode = dst_address_mode;
  1330. if (dst_address_mode != MAC_MODE_NO_ADDR) {
  1331. put_unaligned_le16(dst_pan_id, command.pdata.data_req.dst.pan_id);
  1332. if (dst_address_mode == MAC_MODE_SHORT_ADDR) {
  1333. command.pdata.data_req.dst.address[0] = LS_BYTE(
  1334. dst_addr->short_address
  1335. );
  1336. command.pdata.data_req.dst.address[1] = MS_BYTE(
  1337. dst_addr->short_address
  1338. );
  1339. } else { /* MAC_MODE_LONG_ADDR*/
  1340. memcpy(
  1341. command.pdata.data_req.dst.address,
  1342. dst_addr->ieee_address,
  1343. 8
  1344. );
  1345. }
  1346. }
  1347. command.pdata.data_req.msdu_length = msdu_length;
  1348. command.pdata.data_req.msdu_handle = msdu_handle;
  1349. command.pdata.data_req.tx_options = tx_options;
  1350. memcpy(command.pdata.data_req.msdu, msdu, msdu_length);
  1351. psec = (struct secspec *)(command.pdata.data_req.msdu + msdu_length);
  1352. command.length = sizeof(struct mcps_data_request_pset) -
  1353. MAX_DATA_SIZE + msdu_length;
  1354. if (!security || security->security_level == 0) {
  1355. psec->security_level = 0;
  1356. command.length += 1;
  1357. } else {
  1358. *psec = *security;
  1359. command.length += sizeof(struct secspec);
  1360. }
  1361. if (ca8210_spi_transfer(device_ref, &command.command_id,
  1362. command.length + 2))
  1363. return IEEE802154_SYSTEM_ERROR;
  1364. return IEEE802154_SUCCESS;
  1365. }
  1366. /**
  1367. * mlme_reset_request_sync() - MLME_RESET_request/confirm according to API Spec
  1368. * @set_default_pib: Set defaults in PIB
  1369. * @device_ref: Nondescript pointer to target device
  1370. *
  1371. * Return: 802.15.4 status code of MLME-RESET.confirm
  1372. */
  1373. static u8 mlme_reset_request_sync(
  1374. u8 set_default_pib,
  1375. void *device_ref
  1376. )
  1377. {
  1378. u8 status;
  1379. struct mac_message command, response;
  1380. struct spi_device *spi = device_ref;
  1381. command.command_id = SPI_MLME_RESET_REQUEST;
  1382. command.length = 1;
  1383. command.pdata.u8param = set_default_pib;
  1384. if (cascoda_api_downstream(
  1385. &command.command_id,
  1386. command.length + 2,
  1387. &response.command_id,
  1388. device_ref)) {
  1389. dev_err(&spi->dev, "cascoda_api_downstream failed\n");
  1390. return IEEE802154_SYSTEM_ERROR;
  1391. }
  1392. if (response.command_id != SPI_MLME_RESET_CONFIRM)
  1393. return IEEE802154_SYSTEM_ERROR;
  1394. status = response.pdata.status;
  1395. /* reset COORD Bit for Channel Filtering as Coordinator */
  1396. if (CA8210_MAC_WORKAROUNDS && set_default_pib && !status) {
  1397. status = tdme_setsfr_request_sync(
  1398. 0,
  1399. CA8210_SFR_MACCON,
  1400. 0,
  1401. device_ref
  1402. );
  1403. }
  1404. return status;
  1405. }
  1406. /**
  1407. * mlme_set_request_sync() - MLME_SET_request/confirm according to API Spec
  1408. * @pib_attribute: Attribute Number
  1409. * @pib_attribute_index: Index within Attribute if an Array
  1410. * @pib_attribute_length: Attribute length
  1411. * @pib_attribute_value: Pointer to Attribute Value
  1412. * @device_ref: Nondescript pointer to target device
  1413. *
  1414. * Return: 802.15.4 status code of MLME-SET.confirm
  1415. */
  1416. static u8 mlme_set_request_sync(
  1417. u8 pib_attribute,
  1418. u8 pib_attribute_index,
  1419. u8 pib_attribute_length,
  1420. const void *pib_attribute_value,
  1421. void *device_ref
  1422. )
  1423. {
  1424. u8 status;
  1425. struct mac_message command, response;
  1426. /* pre-check the validity of pib_attribute values that are not checked
  1427. * in MAC
  1428. */
  1429. if (tdme_checkpibattribute(
  1430. pib_attribute, pib_attribute_length, pib_attribute_value)) {
  1431. return IEEE802154_INVALID_PARAMETER;
  1432. }
  1433. if (pib_attribute == PHY_CURRENT_CHANNEL) {
  1434. status = tdme_channelinit(
  1435. *((u8 *)pib_attribute_value),
  1436. device_ref
  1437. );
  1438. if (status)
  1439. return status;
  1440. }
  1441. if (pib_attribute == PHY_TRANSMIT_POWER) {
  1442. return tdme_settxpower(
  1443. *((u8 *)pib_attribute_value),
  1444. device_ref
  1445. );
  1446. }
  1447. command.command_id = SPI_MLME_SET_REQUEST;
  1448. command.length = sizeof(struct mlme_set_request_pset) -
  1449. MAX_ATTRIBUTE_SIZE + pib_attribute_length;
  1450. command.pdata.set_req.pib_attribute = pib_attribute;
  1451. command.pdata.set_req.pib_attribute_index = pib_attribute_index;
  1452. command.pdata.set_req.pib_attribute_length = pib_attribute_length;
  1453. memcpy(
  1454. command.pdata.set_req.pib_attribute_value,
  1455. pib_attribute_value,
  1456. pib_attribute_length
  1457. );
  1458. if (cascoda_api_downstream(
  1459. &command.command_id,
  1460. command.length + 2,
  1461. &response.command_id,
  1462. device_ref)) {
  1463. return IEEE802154_SYSTEM_ERROR;
  1464. }
  1465. if (response.command_id != SPI_MLME_SET_CONFIRM)
  1466. return IEEE802154_SYSTEM_ERROR;
  1467. return response.pdata.status;
  1468. }
  1469. /**
  1470. * hwme_set_request_sync() - HWME_SET_request/confirm according to API Spec
  1471. * @hw_attribute: Attribute Number
  1472. * @hw_attribute_length: Attribute length
  1473. * @hw_attribute_value: Pointer to Attribute Value
  1474. * @device_ref: Nondescript pointer to target device
  1475. *
  1476. * Return: 802.15.4 status code of HWME-SET.confirm
  1477. */
  1478. static u8 hwme_set_request_sync(
  1479. u8 hw_attribute,
  1480. u8 hw_attribute_length,
  1481. u8 *hw_attribute_value,
  1482. void *device_ref
  1483. )
  1484. {
  1485. struct mac_message command, response;
  1486. command.command_id = SPI_HWME_SET_REQUEST;
  1487. command.length = 2 + hw_attribute_length;
  1488. command.pdata.hwme_set_req.hw_attribute = hw_attribute;
  1489. command.pdata.hwme_set_req.hw_attribute_length = hw_attribute_length;
  1490. memcpy(
  1491. command.pdata.hwme_set_req.hw_attribute_value,
  1492. hw_attribute_value,
  1493. hw_attribute_length
  1494. );
  1495. if (cascoda_api_downstream(
  1496. &command.command_id,
  1497. command.length + 2,
  1498. &response.command_id,
  1499. device_ref)) {
  1500. return IEEE802154_SYSTEM_ERROR;
  1501. }
  1502. if (response.command_id != SPI_HWME_SET_CONFIRM)
  1503. return IEEE802154_SYSTEM_ERROR;
  1504. return response.pdata.hwme_set_cnf.status;
  1505. }
  1506. /**
  1507. * hwme_get_request_sync() - HWME_GET_request/confirm according to API Spec
  1508. * @hw_attribute: Attribute Number
  1509. * @hw_attribute_length: Attribute length
  1510. * @hw_attribute_value: Pointer to Attribute Value
  1511. * @device_ref: Nondescript pointer to target device
  1512. *
  1513. * Return: 802.15.4 status code of HWME-GET.confirm
  1514. */
  1515. static u8 hwme_get_request_sync(
  1516. u8 hw_attribute,
  1517. u8 *hw_attribute_length,
  1518. u8 *hw_attribute_value,
  1519. void *device_ref
  1520. )
  1521. {
  1522. struct mac_message command, response;
  1523. command.command_id = SPI_HWME_GET_REQUEST;
  1524. command.length = 1;
  1525. command.pdata.hwme_get_req.hw_attribute = hw_attribute;
  1526. if (cascoda_api_downstream(
  1527. &command.command_id,
  1528. command.length + 2,
  1529. &response.command_id,
  1530. device_ref)) {
  1531. return IEEE802154_SYSTEM_ERROR;
  1532. }
  1533. if (response.command_id != SPI_HWME_GET_CONFIRM)
  1534. return IEEE802154_SYSTEM_ERROR;
  1535. if (response.pdata.hwme_get_cnf.status == IEEE802154_SUCCESS) {
  1536. *hw_attribute_length =
  1537. response.pdata.hwme_get_cnf.hw_attribute_length;
  1538. memcpy(
  1539. hw_attribute_value,
  1540. response.pdata.hwme_get_cnf.hw_attribute_value,
  1541. *hw_attribute_length
  1542. );
  1543. }
  1544. return response.pdata.hwme_get_cnf.status;
  1545. }
  1546. /* Network driver operation */
  1547. /**
  1548. * ca8210_async_xmit_complete() - Called to announce that an asynchronous
  1549. * transmission has finished
  1550. * @hw: ieee802154_hw of ca8210 that has finished exchange
  1551. * @msduhandle: Identifier of transmission that has completed
  1552. * @status: Returned 802.15.4 status code of the transmission
  1553. *
  1554. * Return: 0 or linux error code
  1555. */
  1556. static int ca8210_async_xmit_complete(
  1557. struct ieee802154_hw *hw,
  1558. u8 msduhandle,
  1559. u8 status)
  1560. {
  1561. struct ca8210_priv *priv = hw->priv;
  1562. if (priv->nextmsduhandle != msduhandle) {
  1563. dev_err(
  1564. &priv->spi->dev,
  1565. "Unexpected msdu_handle on data confirm, Expected %d, got %d\n",
  1566. priv->nextmsduhandle,
  1567. msduhandle
  1568. );
  1569. return -EIO;
  1570. }
  1571. priv->async_tx_pending = false;
  1572. priv->nextmsduhandle++;
  1573. if (status) {
  1574. dev_err(
  1575. &priv->spi->dev,
  1576. "Link transmission unsuccessful, status = %d\n",
  1577. status
  1578. );
  1579. if (status != IEEE802154_TRANSACTION_OVERFLOW) {
  1580. ieee802154_xmit_error(priv->hw, priv->tx_skb, status);
  1581. return 0;
  1582. }
  1583. }
  1584. ieee802154_xmit_complete(priv->hw, priv->tx_skb, true);
  1585. return 0;
  1586. }
  1587. /**
  1588. * ca8210_skb_rx() - Contructs a properly framed socket buffer from a received
  1589. * MCPS_DATA_indication
  1590. * @hw: ieee802154_hw that MCPS_DATA_indication was received by
  1591. * @len: length of MCPS_DATA_indication
  1592. * @data_ind: Octet array of MCPS_DATA_indication
  1593. *
  1594. * Called by the spi driver whenever a SAP command is received, this function
  1595. * will ascertain whether the command is of interest to the network driver and
  1596. * take necessary action.
  1597. *
  1598. * Return: 0 or linux error code
  1599. */
  1600. static int ca8210_skb_rx(
  1601. struct ieee802154_hw *hw,
  1602. size_t len,
  1603. u8 *data_ind
  1604. )
  1605. {
  1606. struct ieee802154_hdr hdr;
  1607. int msdulen;
  1608. int hlen;
  1609. u8 mpdulinkquality = data_ind[23];
  1610. struct sk_buff *skb;
  1611. struct ca8210_priv *priv = hw->priv;
  1612. /* Allocate mtu size buffer for every rx packet */
  1613. skb = dev_alloc_skb(IEEE802154_MTU + sizeof(hdr));
  1614. if (!skb)
  1615. return -ENOMEM;
  1616. skb_reserve(skb, sizeof(hdr));
  1617. msdulen = data_ind[22]; /* msdu_length */
  1618. if (msdulen > IEEE802154_MTU) {
  1619. dev_err(
  1620. &priv->spi->dev,
  1621. "received erroneously large msdu length!\n"
  1622. );
  1623. kfree_skb(skb);
  1624. return -EMSGSIZE;
  1625. }
  1626. dev_dbg(&priv->spi->dev, "skb buffer length = %d\n", msdulen);
  1627. if (priv->promiscuous)
  1628. goto copy_payload;
  1629. /* Populate hdr */
  1630. hdr.sec.level = data_ind[29 + msdulen];
  1631. dev_dbg(&priv->spi->dev, "security level: %#03x\n", hdr.sec.level);
  1632. if (hdr.sec.level > 0) {
  1633. hdr.sec.key_id_mode = data_ind[30 + msdulen];
  1634. memcpy(&hdr.sec.extended_src, &data_ind[31 + msdulen], 8);
  1635. hdr.sec.key_id = data_ind[39 + msdulen];
  1636. }
  1637. hdr.source.mode = data_ind[0];
  1638. dev_dbg(&priv->spi->dev, "srcAddrMode: %#03x\n", hdr.source.mode);
  1639. hdr.source.pan_id = cpu_to_le16(get_unaligned_le16(&data_ind[1]));
  1640. dev_dbg(&priv->spi->dev, "srcPanId: %#06x\n", hdr.source.pan_id);
  1641. memcpy(&hdr.source.extended_addr, &data_ind[3], 8);
  1642. hdr.dest.mode = data_ind[11];
  1643. dev_dbg(&priv->spi->dev, "dstAddrMode: %#03x\n", hdr.dest.mode);
  1644. hdr.dest.pan_id = cpu_to_le16(get_unaligned_le16(&data_ind[12]));
  1645. dev_dbg(&priv->spi->dev, "dstPanId: %#06x\n", hdr.dest.pan_id);
  1646. memcpy(&hdr.dest.extended_addr, &data_ind[14], 8);
  1647. /* Fill in FC implicitly */
  1648. hdr.fc.type = 1; /* Data frame */
  1649. if (hdr.sec.level)
  1650. hdr.fc.security_enabled = 1;
  1651. else
  1652. hdr.fc.security_enabled = 0;
  1653. if (data_ind[1] != data_ind[12] || data_ind[2] != data_ind[13])
  1654. hdr.fc.intra_pan = 1;
  1655. else
  1656. hdr.fc.intra_pan = 0;
  1657. hdr.fc.dest_addr_mode = hdr.dest.mode;
  1658. hdr.fc.source_addr_mode = hdr.source.mode;
  1659. /* Add hdr to front of buffer */
  1660. hlen = ieee802154_hdr_push(skb, &hdr);
  1661. if (hlen < 0) {
  1662. dev_crit(&priv->spi->dev, "failed to push mac hdr onto skb!\n");
  1663. kfree_skb(skb);
  1664. return hlen;
  1665. }
  1666. skb_reset_mac_header(skb);
  1667. skb->mac_len = hlen;
  1668. copy_payload:
  1669. /* Add <msdulen> bytes of space to the back of the buffer */
  1670. /* Copy msdu to skb */
  1671. skb_put_data(skb, &data_ind[29], msdulen);
  1672. ieee802154_rx_irqsafe(hw, skb, mpdulinkquality);
  1673. return 0;
  1674. }
  1675. /**
  1676. * ca8210_net_rx() - Acts upon received SAP commands relevant to the network
  1677. * driver
  1678. * @hw: ieee802154_hw that command was received by
  1679. * @command: Octet array of received command
  1680. * @len: length of the received command
  1681. *
  1682. * Called by the spi driver whenever a SAP command is received, this function
  1683. * will ascertain whether the command is of interest to the network driver and
  1684. * take necessary action.
  1685. *
  1686. * Return: 0 or linux error code
  1687. */
  1688. static int ca8210_net_rx(struct ieee802154_hw *hw, u8 *command, size_t len)
  1689. {
  1690. struct ca8210_priv *priv = hw->priv;
  1691. unsigned long flags;
  1692. u8 status;
  1693. dev_dbg(&priv->spi->dev, "%s: CmdID = %d\n", __func__, command[0]);
  1694. if (command[0] == SPI_MCPS_DATA_INDICATION) {
  1695. /* Received data */
  1696. spin_lock_irqsave(&priv->lock, flags);
  1697. if (command[26] == priv->last_dsn) {
  1698. dev_dbg(
  1699. &priv->spi->dev,
  1700. "DSN %d resend received, ignoring...\n",
  1701. command[26]
  1702. );
  1703. spin_unlock_irqrestore(&priv->lock, flags);
  1704. return 0;
  1705. }
  1706. priv->last_dsn = command[26];
  1707. spin_unlock_irqrestore(&priv->lock, flags);
  1708. return ca8210_skb_rx(hw, len - 2, command + 2);
  1709. } else if (command[0] == SPI_MCPS_DATA_CONFIRM) {
  1710. status = command[3];
  1711. if (priv->async_tx_pending) {
  1712. return ca8210_async_xmit_complete(
  1713. hw,
  1714. command[2],
  1715. status
  1716. );
  1717. }
  1718. }
  1719. return 0;
  1720. }
  1721. /**
  1722. * ca8210_skb_tx() - Transmits a given socket buffer using the ca8210
  1723. * @skb: Socket buffer to transmit
  1724. * @msduhandle: Data identifier to pass to the 802.15.4 MAC
  1725. * @priv: Pointer to private data section of target ca8210
  1726. *
  1727. * Return: 0 or linux error code
  1728. */
  1729. static int ca8210_skb_tx(
  1730. struct sk_buff *skb,
  1731. u8 msduhandle,
  1732. struct ca8210_priv *priv
  1733. )
  1734. {
  1735. struct ieee802154_hdr header = { };
  1736. struct secspec secspec;
  1737. int mac_len, status;
  1738. dev_dbg(&priv->spi->dev, "%s called\n", __func__);
  1739. /* Get addressing info from skb - ieee802154 layer creates a full
  1740. * packet
  1741. */
  1742. mac_len = ieee802154_hdr_peek_addrs(skb, &header);
  1743. if (mac_len < 0)
  1744. return mac_len;
  1745. secspec.security_level = header.sec.level;
  1746. secspec.key_id_mode = header.sec.key_id_mode;
  1747. if (secspec.key_id_mode == 2)
  1748. memcpy(secspec.key_source, &header.sec.short_src, 4);
  1749. else if (secspec.key_id_mode == 3)
  1750. memcpy(secspec.key_source, &header.sec.extended_src, 8);
  1751. secspec.key_index = header.sec.key_id;
  1752. /* Pass to Cascoda API */
  1753. status = mcps_data_request(
  1754. header.source.mode,
  1755. header.dest.mode,
  1756. le16_to_cpu(header.dest.pan_id),
  1757. (union macaddr *)&header.dest.extended_addr,
  1758. skb->len - mac_len,
  1759. &skb->data[mac_len],
  1760. msduhandle,
  1761. header.fc.ack_request,
  1762. &secspec,
  1763. priv->spi
  1764. );
  1765. return link_to_linux_err(status);
  1766. }
  1767. /**
  1768. * ca8210_start() - Starts the network driver
  1769. * @hw: ieee802154_hw of ca8210 being started
  1770. *
  1771. * Return: 0 or linux error code
  1772. */
  1773. static int ca8210_start(struct ieee802154_hw *hw)
  1774. {
  1775. int status;
  1776. u8 rx_on_when_idle;
  1777. u8 lqi_threshold = 0;
  1778. struct ca8210_priv *priv = hw->priv;
  1779. priv->last_dsn = -1;
  1780. /* Turn receiver on when idle for now just to test rx */
  1781. rx_on_when_idle = 1;
  1782. status = mlme_set_request_sync(
  1783. MAC_RX_ON_WHEN_IDLE,
  1784. 0,
  1785. 1,
  1786. &rx_on_when_idle,
  1787. priv->spi
  1788. );
  1789. if (status) {
  1790. dev_crit(
  1791. &priv->spi->dev,
  1792. "Setting rx_on_when_idle failed, status = %d\n",
  1793. status
  1794. );
  1795. return link_to_linux_err(status);
  1796. }
  1797. status = hwme_set_request_sync(
  1798. HWME_LQILIMIT,
  1799. 1,
  1800. &lqi_threshold,
  1801. priv->spi
  1802. );
  1803. if (status) {
  1804. dev_crit(
  1805. &priv->spi->dev,
  1806. "Setting lqilimit failed, status = %d\n",
  1807. status
  1808. );
  1809. return link_to_linux_err(status);
  1810. }
  1811. return 0;
  1812. }
  1813. /**
  1814. * ca8210_stop() - Stops the network driver
  1815. * @hw: ieee802154_hw of ca8210 being stopped
  1816. *
  1817. * Return: 0 or linux error code
  1818. */
  1819. static void ca8210_stop(struct ieee802154_hw *hw)
  1820. {
  1821. }
  1822. /**
  1823. * ca8210_xmit_async() - Asynchronously transmits a given socket buffer using
  1824. * the ca8210
  1825. * @hw: ieee802154_hw of ca8210 to transmit from
  1826. * @skb: Socket buffer to transmit
  1827. *
  1828. * Return: 0 or linux error code
  1829. */
  1830. static int ca8210_xmit_async(struct ieee802154_hw *hw, struct sk_buff *skb)
  1831. {
  1832. struct ca8210_priv *priv = hw->priv;
  1833. int status;
  1834. dev_dbg(&priv->spi->dev, "calling %s\n", __func__);
  1835. priv->tx_skb = skb;
  1836. priv->async_tx_pending = true;
  1837. status = ca8210_skb_tx(skb, priv->nextmsduhandle, priv);
  1838. return status;
  1839. }
  1840. /**
  1841. * ca8210_get_ed() - Returns the measured energy on the current channel at this
  1842. * instant in time
  1843. * @hw: ieee802154_hw of target ca8210
  1844. * @level: Measured Energy Detect level
  1845. *
  1846. * Return: 0 or linux error code
  1847. */
  1848. static int ca8210_get_ed(struct ieee802154_hw *hw, u8 *level)
  1849. {
  1850. u8 lenvar;
  1851. struct ca8210_priv *priv = hw->priv;
  1852. return link_to_linux_err(
  1853. hwme_get_request_sync(HWME_EDVALUE, &lenvar, level, priv->spi)
  1854. );
  1855. }
  1856. /**
  1857. * ca8210_set_channel() - Sets the current operating 802.15.4 channel of the
  1858. * ca8210
  1859. * @hw: ieee802154_hw of target ca8210
  1860. * @page: Channel page to set
  1861. * @channel: Channel number to set
  1862. *
  1863. * Return: 0 or linux error code
  1864. */
  1865. static int ca8210_set_channel(
  1866. struct ieee802154_hw *hw,
  1867. u8 page,
  1868. u8 channel
  1869. )
  1870. {
  1871. u8 status;
  1872. struct ca8210_priv *priv = hw->priv;
  1873. status = mlme_set_request_sync(
  1874. PHY_CURRENT_CHANNEL,
  1875. 0,
  1876. 1,
  1877. &channel,
  1878. priv->spi
  1879. );
  1880. if (status) {
  1881. dev_err(
  1882. &priv->spi->dev,
  1883. "error setting channel, MLME-SET.confirm status = %d\n",
  1884. status
  1885. );
  1886. }
  1887. return link_to_linux_err(status);
  1888. }
  1889. /**
  1890. * ca8210_set_hw_addr_filt() - Sets the address filtering parameters of the
  1891. * ca8210
  1892. * @hw: ieee802154_hw of target ca8210
  1893. * @filt: Filtering parameters
  1894. * @changed: Bitmap representing which parameters to change
  1895. *
  1896. * Effectively just sets the actual addressing information identifying this node
  1897. * as all filtering is performed by the ca8210 as detailed in the IEEE 802.15.4
  1898. * 2006 specification.
  1899. *
  1900. * Return: 0 or linux error code
  1901. */
  1902. static int ca8210_set_hw_addr_filt(
  1903. struct ieee802154_hw *hw,
  1904. struct ieee802154_hw_addr_filt *filt,
  1905. unsigned long changed
  1906. )
  1907. {
  1908. u8 status = 0;
  1909. struct ca8210_priv *priv = hw->priv;
  1910. if (changed & IEEE802154_AFILT_PANID_CHANGED) {
  1911. status = mlme_set_request_sync(
  1912. MAC_PAN_ID,
  1913. 0,
  1914. 2,
  1915. &filt->pan_id, priv->spi
  1916. );
  1917. if (status) {
  1918. dev_err(
  1919. &priv->spi->dev,
  1920. "error setting pan id, MLME-SET.confirm status = %d",
  1921. status
  1922. );
  1923. return link_to_linux_err(status);
  1924. }
  1925. }
  1926. if (changed & IEEE802154_AFILT_SADDR_CHANGED) {
  1927. status = mlme_set_request_sync(
  1928. MAC_SHORT_ADDRESS,
  1929. 0,
  1930. 2,
  1931. &filt->short_addr, priv->spi
  1932. );
  1933. if (status) {
  1934. dev_err(
  1935. &priv->spi->dev,
  1936. "error setting short address, MLME-SET.confirm status = %d",
  1937. status
  1938. );
  1939. return link_to_linux_err(status);
  1940. }
  1941. }
  1942. if (changed & IEEE802154_AFILT_IEEEADDR_CHANGED) {
  1943. status = mlme_set_request_sync(
  1944. NS_IEEE_ADDRESS,
  1945. 0,
  1946. 8,
  1947. &filt->ieee_addr,
  1948. priv->spi
  1949. );
  1950. if (status) {
  1951. dev_err(
  1952. &priv->spi->dev,
  1953. "error setting ieee address, MLME-SET.confirm status = %d",
  1954. status
  1955. );
  1956. return link_to_linux_err(status);
  1957. }
  1958. }
  1959. /* TODO: Should use MLME_START to set coord bit? */
  1960. return 0;
  1961. }
  1962. /**
  1963. * ca8210_set_tx_power() - Sets the transmit power of the ca8210
  1964. * @hw: ieee802154_hw of target ca8210
  1965. * @mbm: Transmit power in mBm (dBm*100)
  1966. *
  1967. * Return: 0 or linux error code
  1968. */
  1969. static int ca8210_set_tx_power(struct ieee802154_hw *hw, s32 mbm)
  1970. {
  1971. struct ca8210_priv *priv = hw->priv;
  1972. mbm /= 100;
  1973. return link_to_linux_err(
  1974. mlme_set_request_sync(PHY_TRANSMIT_POWER, 0, 1, &mbm, priv->spi)
  1975. );
  1976. }
  1977. /**
  1978. * ca8210_set_cca_mode() - Sets the clear channel assessment mode of the ca8210
  1979. * @hw: ieee802154_hw of target ca8210
  1980. * @cca: CCA mode to set
  1981. *
  1982. * Return: 0 or linux error code
  1983. */
  1984. static int ca8210_set_cca_mode(
  1985. struct ieee802154_hw *hw,
  1986. const struct wpan_phy_cca *cca
  1987. )
  1988. {
  1989. u8 status;
  1990. u8 cca_mode;
  1991. struct ca8210_priv *priv = hw->priv;
  1992. cca_mode = cca->mode & 3;
  1993. if (cca_mode == 3 && cca->opt == NL802154_CCA_OPT_ENERGY_CARRIER_OR) {
  1994. /* cca_mode 0 == CS OR ED, 3 == CS AND ED */
  1995. cca_mode = 0;
  1996. }
  1997. status = mlme_set_request_sync(
  1998. PHY_CCA_MODE,
  1999. 0,
  2000. 1,
  2001. &cca_mode,
  2002. priv->spi
  2003. );
  2004. if (status) {
  2005. dev_err(
  2006. &priv->spi->dev,
  2007. "error setting cca mode, MLME-SET.confirm status = %d",
  2008. status
  2009. );
  2010. }
  2011. return link_to_linux_err(status);
  2012. }
  2013. /**
  2014. * ca8210_set_cca_ed_level() - Sets the CCA ED level of the ca8210
  2015. * @hw: ieee802154_hw of target ca8210
  2016. * @level: ED level to set (in mbm)
  2017. *
  2018. * Sets the minimum threshold of measured energy above which the ca8210 will
  2019. * back off and retry a transmission.
  2020. *
  2021. * Return: 0 or linux error code
  2022. */
  2023. static int ca8210_set_cca_ed_level(struct ieee802154_hw *hw, s32 level)
  2024. {
  2025. u8 status;
  2026. u8 ed_threshold = (level / 100) * 2 + 256;
  2027. struct ca8210_priv *priv = hw->priv;
  2028. status = hwme_set_request_sync(
  2029. HWME_EDTHRESHOLD,
  2030. 1,
  2031. &ed_threshold,
  2032. priv->spi
  2033. );
  2034. if (status) {
  2035. dev_err(
  2036. &priv->spi->dev,
  2037. "error setting ed threshold, HWME-SET.confirm status = %d",
  2038. status
  2039. );
  2040. }
  2041. return link_to_linux_err(status);
  2042. }
  2043. /**
  2044. * ca8210_set_csma_params() - Sets the CSMA parameters of the ca8210
  2045. * @hw: ieee802154_hw of target ca8210
  2046. * @min_be: Minimum backoff exponent when backing off a transmission
  2047. * @max_be: Maximum backoff exponent when backing off a transmission
  2048. * @retries: Number of times to retry after backing off
  2049. *
  2050. * Return: 0 or linux error code
  2051. */
  2052. static int ca8210_set_csma_params(
  2053. struct ieee802154_hw *hw,
  2054. u8 min_be,
  2055. u8 max_be,
  2056. u8 retries
  2057. )
  2058. {
  2059. u8 status;
  2060. struct ca8210_priv *priv = hw->priv;
  2061. status = mlme_set_request_sync(MAC_MIN_BE, 0, 1, &min_be, priv->spi);
  2062. if (status) {
  2063. dev_err(
  2064. &priv->spi->dev,
  2065. "error setting min be, MLME-SET.confirm status = %d",
  2066. status
  2067. );
  2068. return link_to_linux_err(status);
  2069. }
  2070. status = mlme_set_request_sync(MAC_MAX_BE, 0, 1, &max_be, priv->spi);
  2071. if (status) {
  2072. dev_err(
  2073. &priv->spi->dev,
  2074. "error setting max be, MLME-SET.confirm status = %d",
  2075. status
  2076. );
  2077. return link_to_linux_err(status);
  2078. }
  2079. status = mlme_set_request_sync(
  2080. MAC_MAX_CSMA_BACKOFFS,
  2081. 0,
  2082. 1,
  2083. &retries,
  2084. priv->spi
  2085. );
  2086. if (status) {
  2087. dev_err(
  2088. &priv->spi->dev,
  2089. "error setting max csma backoffs, MLME-SET.confirm status = %d",
  2090. status
  2091. );
  2092. }
  2093. return link_to_linux_err(status);
  2094. }
  2095. /**
  2096. * ca8210_set_frame_retries() - Sets the maximum frame retries of the ca8210
  2097. * @hw: ieee802154_hw of target ca8210
  2098. * @retries: Number of retries
  2099. *
  2100. * Sets the number of times to retry a transmission if no acknowledgment was
  2101. * received from the other end when one was requested.
  2102. *
  2103. * Return: 0 or linux error code
  2104. */
  2105. static int ca8210_set_frame_retries(struct ieee802154_hw *hw, s8 retries)
  2106. {
  2107. u8 status;
  2108. struct ca8210_priv *priv = hw->priv;
  2109. status = mlme_set_request_sync(
  2110. MAC_MAX_FRAME_RETRIES,
  2111. 0,
  2112. 1,
  2113. &retries,
  2114. priv->spi
  2115. );
  2116. if (status) {
  2117. dev_err(
  2118. &priv->spi->dev,
  2119. "error setting frame retries, MLME-SET.confirm status = %d",
  2120. status
  2121. );
  2122. }
  2123. return link_to_linux_err(status);
  2124. }
  2125. static int ca8210_set_promiscuous_mode(struct ieee802154_hw *hw, const bool on)
  2126. {
  2127. u8 status;
  2128. struct ca8210_priv *priv = hw->priv;
  2129. status = mlme_set_request_sync(
  2130. MAC_PROMISCUOUS_MODE,
  2131. 0,
  2132. 1,
  2133. (const void *)&on,
  2134. priv->spi
  2135. );
  2136. if (status) {
  2137. dev_err(
  2138. &priv->spi->dev,
  2139. "error setting promiscuous mode, MLME-SET.confirm status = %d",
  2140. status
  2141. );
  2142. } else {
  2143. priv->promiscuous = on;
  2144. }
  2145. return link_to_linux_err(status);
  2146. }
  2147. static const struct ieee802154_ops ca8210_phy_ops = {
  2148. .start = ca8210_start,
  2149. .stop = ca8210_stop,
  2150. .xmit_async = ca8210_xmit_async,
  2151. .ed = ca8210_get_ed,
  2152. .set_channel = ca8210_set_channel,
  2153. .set_hw_addr_filt = ca8210_set_hw_addr_filt,
  2154. .set_txpower = ca8210_set_tx_power,
  2155. .set_cca_mode = ca8210_set_cca_mode,
  2156. .set_cca_ed_level = ca8210_set_cca_ed_level,
  2157. .set_csma_params = ca8210_set_csma_params,
  2158. .set_frame_retries = ca8210_set_frame_retries,
  2159. .set_promiscuous_mode = ca8210_set_promiscuous_mode
  2160. };
  2161. /* Test/EVBME Interface */
  2162. /**
  2163. * ca8210_test_int_open() - Opens the test interface to the userspace
  2164. * @inodp: inode representation of file interface
  2165. * @filp: file interface
  2166. *
  2167. * Return: 0 or linux error code
  2168. */
  2169. static int ca8210_test_int_open(struct inode *inodp, struct file *filp)
  2170. {
  2171. struct ca8210_priv *priv = inodp->i_private;
  2172. filp->private_data = priv;
  2173. return 0;
  2174. }
  2175. /**
  2176. * ca8210_test_check_upstream() - Checks a command received from the upstream
  2177. * testing interface for required action
  2178. * @buf: Buffer containing command to check
  2179. * @device_ref: Nondescript pointer to target device
  2180. *
  2181. * Return: 0 or linux error code
  2182. */
  2183. static int ca8210_test_check_upstream(u8 *buf, void *device_ref)
  2184. {
  2185. int ret;
  2186. u8 response[CA8210_SPI_BUF_SIZE];
  2187. if (buf[0] == SPI_MLME_SET_REQUEST) {
  2188. ret = tdme_checkpibattribute(buf[2], buf[4], buf + 5);
  2189. if (ret) {
  2190. response[0] = SPI_MLME_SET_CONFIRM;
  2191. response[1] = 3;
  2192. response[2] = IEEE802154_INVALID_PARAMETER;
  2193. response[3] = buf[2];
  2194. response[4] = buf[3];
  2195. if (cascoda_api_upstream)
  2196. cascoda_api_upstream(response, 5, device_ref);
  2197. return ret;
  2198. }
  2199. }
  2200. if (buf[0] == SPI_MLME_ASSOCIATE_REQUEST) {
  2201. return tdme_channelinit(buf[2], device_ref);
  2202. } else if (buf[0] == SPI_MLME_START_REQUEST) {
  2203. return tdme_channelinit(buf[4], device_ref);
  2204. } else if (
  2205. (buf[0] == SPI_MLME_SET_REQUEST) &&
  2206. (buf[2] == PHY_CURRENT_CHANNEL)
  2207. ) {
  2208. return tdme_channelinit(buf[5], device_ref);
  2209. } else if (
  2210. (buf[0] == SPI_TDME_SET_REQUEST) &&
  2211. (buf[2] == TDME_CHANNEL)
  2212. ) {
  2213. return tdme_channelinit(buf[4], device_ref);
  2214. } else if (
  2215. (CA8210_MAC_WORKAROUNDS) &&
  2216. (buf[0] == SPI_MLME_RESET_REQUEST) &&
  2217. (buf[2] == 1)
  2218. ) {
  2219. /* reset COORD Bit for Channel Filtering as Coordinator */
  2220. return tdme_setsfr_request_sync(
  2221. 0,
  2222. CA8210_SFR_MACCON,
  2223. 0,
  2224. device_ref
  2225. );
  2226. }
  2227. return 0;
  2228. } /* End of EVBMECheckSerialCommand() */
  2229. /**
  2230. * ca8210_test_int_user_write() - Called by a process in userspace to send a
  2231. * message to the ca8210 drivers
  2232. * @filp: file interface
  2233. * @in_buf: Buffer containing message to write
  2234. * @len: length of message
  2235. * @off: file offset
  2236. *
  2237. * Return: 0 or linux error code
  2238. */
  2239. static ssize_t ca8210_test_int_user_write(
  2240. struct file *filp,
  2241. const char __user *in_buf,
  2242. size_t len,
  2243. loff_t *off
  2244. )
  2245. {
  2246. int ret;
  2247. struct ca8210_priv *priv = filp->private_data;
  2248. u8 command[CA8210_SPI_BUF_SIZE];
  2249. memset(command, SPI_IDLE, 6);
  2250. if (len > CA8210_SPI_BUF_SIZE || len < 2) {
  2251. dev_warn(
  2252. &priv->spi->dev,
  2253. "userspace requested erroneous write length (%zu)\n",
  2254. len
  2255. );
  2256. return -EBADE;
  2257. }
  2258. ret = copy_from_user(command, in_buf, len);
  2259. if (ret) {
  2260. dev_err(
  2261. &priv->spi->dev,
  2262. "%d bytes could not be copied from userspace\n",
  2263. ret
  2264. );
  2265. return -EIO;
  2266. }
  2267. if (len != command[1] + 2) {
  2268. dev_err(
  2269. &priv->spi->dev,
  2270. "write len does not match packet length field\n"
  2271. );
  2272. return -EBADE;
  2273. }
  2274. ret = ca8210_test_check_upstream(command, priv->spi);
  2275. if (ret == 0) {
  2276. ret = ca8210_spi_exchange(
  2277. command,
  2278. command[1] + 2,
  2279. NULL,
  2280. priv->spi
  2281. );
  2282. if (ret < 0) {
  2283. /* effectively 0 bytes were written successfully */
  2284. dev_err(
  2285. &priv->spi->dev,
  2286. "spi exchange failed\n"
  2287. );
  2288. return ret;
  2289. }
  2290. if (command[0] & SPI_SYN)
  2291. priv->sync_down++;
  2292. }
  2293. return len;
  2294. }
  2295. /**
  2296. * ca8210_test_int_user_read() - Called by a process in userspace to read a
  2297. * message from the ca8210 drivers
  2298. * @filp: file interface
  2299. * @buf: Buffer to write message to
  2300. * @len: length of message to read (ignored)
  2301. * @offp: file offset
  2302. *
  2303. * If the O_NONBLOCK flag was set when opening the file then this function will
  2304. * not block, i.e. it will return if the fifo is empty. Otherwise the function
  2305. * will block, i.e. wait until new data arrives.
  2306. *
  2307. * Return: number of bytes read
  2308. */
  2309. static ssize_t ca8210_test_int_user_read(
  2310. struct file *filp,
  2311. char __user *buf,
  2312. size_t len,
  2313. loff_t *offp
  2314. )
  2315. {
  2316. int i, cmdlen;
  2317. struct ca8210_priv *priv = filp->private_data;
  2318. unsigned char *fifo_buffer;
  2319. unsigned long bytes_not_copied;
  2320. if (filp->f_flags & O_NONBLOCK) {
  2321. /* Non-blocking mode */
  2322. if (kfifo_is_empty(&priv->test.up_fifo))
  2323. return 0;
  2324. } else {
  2325. /* Blocking mode */
  2326. wait_event_interruptible(
  2327. priv->test.readq,
  2328. !kfifo_is_empty(&priv->test.up_fifo)
  2329. );
  2330. }
  2331. if (kfifo_out(&priv->test.up_fifo, &fifo_buffer, 4) != 4) {
  2332. dev_err(
  2333. &priv->spi->dev,
  2334. "test_interface: Wrong number of elements popped from upstream fifo\n"
  2335. );
  2336. return 0;
  2337. }
  2338. cmdlen = fifo_buffer[1];
  2339. bytes_not_copied = cmdlen + 2;
  2340. bytes_not_copied = copy_to_user(buf, fifo_buffer, bytes_not_copied);
  2341. if (bytes_not_copied > 0) {
  2342. dev_err(
  2343. &priv->spi->dev,
  2344. "%lu bytes could not be copied to user space!\n",
  2345. bytes_not_copied
  2346. );
  2347. }
  2348. dev_dbg(&priv->spi->dev, "test_interface: Cmd len = %d\n", cmdlen);
  2349. dev_dbg(&priv->spi->dev, "test_interface: Read\n");
  2350. for (i = 0; i < cmdlen + 2; i++)
  2351. dev_dbg(&priv->spi->dev, "%#03x\n", fifo_buffer[i]);
  2352. kfree(fifo_buffer);
  2353. return cmdlen + 2;
  2354. }
  2355. /**
  2356. * ca8210_test_int_ioctl() - Called by a process in userspace to enact an
  2357. * arbitrary action
  2358. * @filp: file interface
  2359. * @ioctl_num: which action to enact
  2360. * @ioctl_param: arbitrary parameter for the action
  2361. *
  2362. * Return: status
  2363. */
  2364. static long ca8210_test_int_ioctl(
  2365. struct file *filp,
  2366. unsigned int ioctl_num,
  2367. unsigned long ioctl_param
  2368. )
  2369. {
  2370. struct ca8210_priv *priv = filp->private_data;
  2371. switch (ioctl_num) {
  2372. case CA8210_IOCTL_HARD_RESET:
  2373. ca8210_reset_send(priv->spi, ioctl_param);
  2374. break;
  2375. default:
  2376. break;
  2377. }
  2378. return 0;
  2379. }
  2380. /**
  2381. * ca8210_test_int_poll() - Called by a process in userspace to determine which
  2382. * actions are currently possible for the file
  2383. * @filp: file interface
  2384. * @ptable: poll table
  2385. *
  2386. * Return: set of poll return flags
  2387. */
  2388. static __poll_t ca8210_test_int_poll(
  2389. struct file *filp,
  2390. struct poll_table_struct *ptable
  2391. )
  2392. {
  2393. __poll_t return_flags = 0;
  2394. struct ca8210_priv *priv = filp->private_data;
  2395. poll_wait(filp, &priv->test.readq, ptable);
  2396. if (!kfifo_is_empty(&priv->test.up_fifo))
  2397. return_flags |= (EPOLLIN | EPOLLRDNORM);
  2398. if (wait_event_interruptible(
  2399. priv->test.readq,
  2400. !kfifo_is_empty(&priv->test.up_fifo))) {
  2401. return EPOLLERR;
  2402. }
  2403. return return_flags;
  2404. }
  2405. static const struct file_operations test_int_fops = {
  2406. .read = ca8210_test_int_user_read,
  2407. .write = ca8210_test_int_user_write,
  2408. .open = ca8210_test_int_open,
  2409. .release = NULL,
  2410. .unlocked_ioctl = ca8210_test_int_ioctl,
  2411. .poll = ca8210_test_int_poll
  2412. };
  2413. /* Init/Deinit */
  2414. /**
  2415. * ca8210_get_platform_data() - Populate a ca8210_platform_data object
  2416. * @spi_device: Pointer to ca8210 spi device object to get data for
  2417. * @pdata: Pointer to ca8210_platform_data object to populate
  2418. *
  2419. * Return: 0 or linux error code
  2420. */
  2421. static int ca8210_get_platform_data(
  2422. struct spi_device *spi_device,
  2423. struct ca8210_platform_data *pdata
  2424. )
  2425. {
  2426. int ret = 0;
  2427. if (!spi_device->dev.of_node)
  2428. return -EINVAL;
  2429. pdata->extclockenable = of_property_read_bool(
  2430. spi_device->dev.of_node,
  2431. "extclock-enable"
  2432. );
  2433. if (pdata->extclockenable) {
  2434. ret = of_property_read_u32(
  2435. spi_device->dev.of_node,
  2436. "extclock-freq",
  2437. &pdata->extclockfreq
  2438. );
  2439. if (ret < 0)
  2440. return ret;
  2441. ret = of_property_read_u32(
  2442. spi_device->dev.of_node,
  2443. "extclock-gpio",
  2444. &pdata->extclockgpio
  2445. );
  2446. }
  2447. return ret;
  2448. }
  2449. /**
  2450. * ca8210_config_extern_clk() - Configure the external clock provided by the
  2451. * ca8210
  2452. * @pdata: Pointer to ca8210_platform_data containing clock parameters
  2453. * @spi: Pointer to target ca8210 spi device
  2454. * @on: True to turn the clock on, false to turn off
  2455. *
  2456. * The external clock is configured with a frequency and output pin taken from
  2457. * the platform data.
  2458. *
  2459. * Return: 0 or linux error code
  2460. */
  2461. static int ca8210_config_extern_clk(
  2462. struct ca8210_platform_data *pdata,
  2463. struct spi_device *spi,
  2464. bool on
  2465. )
  2466. {
  2467. u8 clkparam[2];
  2468. if (on) {
  2469. dev_info(&spi->dev, "Switching external clock on\n");
  2470. switch (pdata->extclockfreq) {
  2471. case SIXTEEN_MHZ:
  2472. clkparam[0] = 1;
  2473. break;
  2474. case EIGHT_MHZ:
  2475. clkparam[0] = 2;
  2476. break;
  2477. case FOUR_MHZ:
  2478. clkparam[0] = 3;
  2479. break;
  2480. case TWO_MHZ:
  2481. clkparam[0] = 4;
  2482. break;
  2483. case ONE_MHZ:
  2484. clkparam[0] = 5;
  2485. break;
  2486. default:
  2487. dev_crit(&spi->dev, "Invalid extclock-freq\n");
  2488. return -EINVAL;
  2489. }
  2490. clkparam[1] = pdata->extclockgpio;
  2491. } else {
  2492. dev_info(&spi->dev, "Switching external clock off\n");
  2493. clkparam[0] = 0; /* off */
  2494. clkparam[1] = 0;
  2495. }
  2496. return link_to_linux_err(
  2497. hwme_set_request_sync(HWME_SYSCLKOUT, 2, clkparam, spi)
  2498. );
  2499. }
  2500. /**
  2501. * ca8210_register_ext_clock() - Register ca8210's external clock with kernel
  2502. * @spi: Pointer to target ca8210 spi device
  2503. *
  2504. * Return: 0 or linux error code
  2505. */
  2506. static int ca8210_register_ext_clock(struct spi_device *spi)
  2507. {
  2508. struct device *dev = &spi->dev;
  2509. struct ca8210_platform_data *pdata = dev_get_platdata(dev);
  2510. struct device_node *np = spi->dev.of_node;
  2511. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2512. if (!np)
  2513. return -EFAULT;
  2514. priv->clk = clk_register_fixed_rate(
  2515. &spi->dev,
  2516. np->name,
  2517. NULL,
  2518. 0,
  2519. pdata->extclockfreq
  2520. );
  2521. if (IS_ERR(priv->clk)) {
  2522. dev_crit(&spi->dev, "Failed to register external clk\n");
  2523. return PTR_ERR(priv->clk);
  2524. }
  2525. return of_clk_add_provider(np, of_clk_src_simple_get, priv->clk);
  2526. }
  2527. /**
  2528. * ca8210_unregister_ext_clock() - Unregister ca8210's external clock with
  2529. * kernel
  2530. * @spi: Pointer to target ca8210 spi device
  2531. */
  2532. static void ca8210_unregister_ext_clock(struct spi_device *spi)
  2533. {
  2534. struct ca8210_priv *priv = spi_get_drvdata(spi);
  2535. if (IS_ERR_OR_NULL(priv->clk))
  2536. return;
  2537. of_clk_del_provider(spi->dev.of_node);
  2538. clk_unregister(priv->clk);
  2539. dev_info(&spi->dev, "External clock unregistered\n");
  2540. }
  2541. /**
  2542. * ca8210_reset_init() - Initialise the reset input to the ca8210
  2543. * @spi: Pointer to target ca8210 spi device
  2544. *
  2545. * Return: 0 or linux error code
  2546. */
  2547. static int ca8210_reset_init(struct spi_device *spi)
  2548. {
  2549. struct device *dev = &spi->dev;
  2550. struct ca8210_platform_data *pdata = dev_get_platdata(dev);
  2551. pdata->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
  2552. if (IS_ERR(pdata->reset_gpio)) {
  2553. dev_crit(dev, "Reset GPIO did not set to output mode\n");
  2554. return PTR_ERR(pdata->reset_gpio);
  2555. }
  2556. return 0;
  2557. }
  2558. /**
  2559. * ca8210_interrupt_init() - Initialise the irq output from the ca8210
  2560. * @spi: Pointer to target ca8210 spi device
  2561. *
  2562. * Return: 0 or linux error code
  2563. */
  2564. static int ca8210_interrupt_init(struct spi_device *spi)
  2565. {
  2566. struct device *dev = &spi->dev;
  2567. struct ca8210_platform_data *pdata = dev_get_platdata(dev);
  2568. int ret;
  2569. pdata->irq_gpio = devm_gpiod_get(dev, "irq", GPIOD_IN);
  2570. if (IS_ERR(pdata->irq_gpio)) {
  2571. dev_crit(dev, "Could not retrieve IRQ GPIO\n");
  2572. return PTR_ERR(pdata->irq_gpio);
  2573. }
  2574. pdata->irq_id = gpiod_to_irq(pdata->irq_gpio);
  2575. if (pdata->irq_id < 0) {
  2576. dev_crit(dev, "Could not get irq for IRQ GPIO\n");
  2577. return pdata->irq_id;
  2578. }
  2579. ret = request_irq(
  2580. pdata->irq_id,
  2581. ca8210_interrupt_handler,
  2582. IRQF_TRIGGER_FALLING,
  2583. "ca8210-irq",
  2584. spi_get_drvdata(spi)
  2585. );
  2586. if (ret)
  2587. dev_crit(&spi->dev, "request_irq %d failed\n", pdata->irq_id);
  2588. return ret;
  2589. }
  2590. /**
  2591. * ca8210_dev_com_init() - Initialise the spi communication component
  2592. * @priv: Pointer to private data structure
  2593. *
  2594. * Return: 0 or linux error code
  2595. */
  2596. static int ca8210_dev_com_init(struct ca8210_priv *priv)
  2597. {
  2598. priv->mlme_workqueue = alloc_ordered_workqueue("MLME work queue", 0);
  2599. if (!priv->mlme_workqueue) {
  2600. dev_crit(&priv->spi->dev, "alloc of mlme_workqueue failed!\n");
  2601. return -ENOMEM;
  2602. }
  2603. priv->irq_workqueue = alloc_ordered_workqueue("ca8210 irq worker", 0);
  2604. if (!priv->irq_workqueue) {
  2605. dev_crit(&priv->spi->dev, "alloc of irq_workqueue failed!\n");
  2606. destroy_workqueue(priv->mlme_workqueue);
  2607. return -ENOMEM;
  2608. }
  2609. return 0;
  2610. }
  2611. /**
  2612. * ca8210_dev_com_clear() - Deinitialise the spi communication component
  2613. * @priv: Pointer to private data structure
  2614. */
  2615. static void ca8210_dev_com_clear(struct ca8210_priv *priv)
  2616. {
  2617. destroy_workqueue(priv->mlme_workqueue);
  2618. destroy_workqueue(priv->irq_workqueue);
  2619. }
  2620. #define CA8210_MAX_TX_POWERS (9)
  2621. static const s32 ca8210_tx_powers[CA8210_MAX_TX_POWERS] = {
  2622. 800, 700, 600, 500, 400, 300, 200, 100, 0
  2623. };
  2624. #define CA8210_MAX_ED_LEVELS (21)
  2625. static const s32 ca8210_ed_levels[CA8210_MAX_ED_LEVELS] = {
  2626. -10300, -10250, -10200, -10150, -10100, -10050, -10000, -9950, -9900,
  2627. -9850, -9800, -9750, -9700, -9650, -9600, -9550, -9500, -9450, -9400,
  2628. -9350, -9300
  2629. };
  2630. /**
  2631. * ca8210_hw_setup() - Populate the ieee802154_hw phy attributes with the
  2632. * ca8210's defaults
  2633. * @ca8210_hw: Pointer to ieee802154_hw to populate
  2634. */
  2635. static void ca8210_hw_setup(struct ieee802154_hw *ca8210_hw)
  2636. {
  2637. /* Support channels 11-26 */
  2638. ca8210_hw->phy->supported.channels[0] = CA8210_VALID_CHANNELS;
  2639. ca8210_hw->phy->supported.tx_powers_size = CA8210_MAX_TX_POWERS;
  2640. ca8210_hw->phy->supported.tx_powers = ca8210_tx_powers;
  2641. ca8210_hw->phy->supported.cca_ed_levels_size = CA8210_MAX_ED_LEVELS;
  2642. ca8210_hw->phy->supported.cca_ed_levels = ca8210_ed_levels;
  2643. ca8210_hw->phy->current_channel = 18;
  2644. ca8210_hw->phy->current_page = 0;
  2645. ca8210_hw->phy->transmit_power = 800;
  2646. ca8210_hw->phy->cca.mode = NL802154_CCA_ENERGY_CARRIER;
  2647. ca8210_hw->phy->cca.opt = NL802154_CCA_OPT_ENERGY_CARRIER_AND;
  2648. ca8210_hw->phy->cca_ed_level = -9800;
  2649. ca8210_hw->phy->symbol_duration = 16;
  2650. ca8210_hw->phy->lifs_period = 40 * ca8210_hw->phy->symbol_duration;
  2651. ca8210_hw->phy->sifs_period = 12 * ca8210_hw->phy->symbol_duration;
  2652. ca8210_hw->flags =
  2653. IEEE802154_HW_AFILT |
  2654. IEEE802154_HW_OMIT_CKSUM |
  2655. IEEE802154_HW_FRAME_RETRIES |
  2656. IEEE802154_HW_PROMISCUOUS |
  2657. IEEE802154_HW_CSMA_PARAMS;
  2658. ca8210_hw->phy->flags =
  2659. WPAN_PHY_FLAG_TXPOWER |
  2660. WPAN_PHY_FLAG_CCA_ED_LEVEL |
  2661. WPAN_PHY_FLAG_CCA_MODE |
  2662. WPAN_PHY_FLAG_DATAGRAMS_ONLY;
  2663. }
  2664. /**
  2665. * ca8210_test_interface_init() - Initialise the test file interface
  2666. * @priv: Pointer to private data structure
  2667. *
  2668. * Provided as an alternative to the standard linux network interface, the test
  2669. * interface exposes a file in the filesystem (ca8210_test) that allows
  2670. * 802.15.4 SAP Commands and Cascoda EVBME commands to be sent directly to
  2671. * the stack.
  2672. *
  2673. * Return: 0 or linux error code
  2674. */
  2675. static int ca8210_test_interface_init(struct ca8210_priv *priv)
  2676. {
  2677. struct ca8210_test *test = &priv->test;
  2678. char node_name[32];
  2679. snprintf(
  2680. node_name,
  2681. sizeof(node_name),
  2682. "ca8210@%d_%d",
  2683. priv->spi->controller->bus_num,
  2684. spi_get_chipselect(priv->spi, 0)
  2685. );
  2686. test->ca8210_dfs_spi_int = debugfs_create_file(
  2687. node_name,
  2688. 0600, /* S_IRUSR | S_IWUSR */
  2689. NULL,
  2690. priv,
  2691. &test_int_fops
  2692. );
  2693. debugfs_create_symlink("ca8210", NULL, node_name);
  2694. init_waitqueue_head(&test->readq);
  2695. return kfifo_alloc(
  2696. &test->up_fifo,
  2697. CA8210_TEST_INT_FIFO_SIZE,
  2698. GFP_KERNEL
  2699. );
  2700. }
  2701. /**
  2702. * ca8210_test_interface_clear() - Deinitialise the test file interface
  2703. * @priv: Pointer to private data structure
  2704. */
  2705. static void ca8210_test_interface_clear(struct ca8210_priv *priv)
  2706. {
  2707. struct ca8210_test *test = &priv->test;
  2708. debugfs_remove(test->ca8210_dfs_spi_int);
  2709. kfifo_free(&test->up_fifo);
  2710. dev_info(&priv->spi->dev, "Test interface removed\n");
  2711. }
  2712. /**
  2713. * ca8210_remove() - Shut down a ca8210 upon being disconnected
  2714. * @spi_device: Pointer to spi device data structure
  2715. *
  2716. * Return: 0 or linux error code
  2717. */
  2718. static void ca8210_remove(struct spi_device *spi_device)
  2719. {
  2720. struct ca8210_priv *priv;
  2721. struct ca8210_platform_data *pdata;
  2722. dev_info(&spi_device->dev, "Removing ca8210\n");
  2723. pdata = spi_device->dev.platform_data;
  2724. if (pdata) {
  2725. if (pdata->extclockenable) {
  2726. ca8210_unregister_ext_clock(spi_device);
  2727. ca8210_config_extern_clk(pdata, spi_device, 0);
  2728. }
  2729. free_irq(pdata->irq_id, spi_device->dev.driver_data);
  2730. kfree(pdata);
  2731. spi_device->dev.platform_data = NULL;
  2732. }
  2733. /* get spi_device private data */
  2734. priv = spi_get_drvdata(spi_device);
  2735. if (priv) {
  2736. dev_info(
  2737. &spi_device->dev,
  2738. "sync_down = %d, sync_up = %d\n",
  2739. priv->sync_down,
  2740. priv->sync_up
  2741. );
  2742. ca8210_dev_com_clear(spi_device->dev.driver_data);
  2743. if (priv->hw) {
  2744. if (priv->hw_registered)
  2745. ieee802154_unregister_hw(priv->hw);
  2746. ieee802154_free_hw(priv->hw);
  2747. priv->hw = NULL;
  2748. dev_info(
  2749. &spi_device->dev,
  2750. "Unregistered & freed ieee802154_hw.\n"
  2751. );
  2752. }
  2753. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS))
  2754. ca8210_test_interface_clear(priv);
  2755. }
  2756. }
  2757. /**
  2758. * ca8210_probe() - Set up a connected ca8210 upon being detected by the system
  2759. * @spi_device: Pointer to spi device data structure
  2760. *
  2761. * Return: 0 or linux error code
  2762. */
  2763. static int ca8210_probe(struct spi_device *spi_device)
  2764. {
  2765. struct ca8210_priv *priv;
  2766. struct ieee802154_hw *hw;
  2767. struct ca8210_platform_data *pdata;
  2768. int ret;
  2769. dev_info(&spi_device->dev, "Inserting ca8210\n");
  2770. /* allocate ieee802154_hw and private data */
  2771. hw = ieee802154_alloc_hw(sizeof(struct ca8210_priv), &ca8210_phy_ops);
  2772. if (!hw) {
  2773. dev_crit(&spi_device->dev, "ieee802154_alloc_hw failed\n");
  2774. ret = -ENOMEM;
  2775. goto error;
  2776. }
  2777. priv = hw->priv;
  2778. priv->hw = hw;
  2779. priv->spi = spi_device;
  2780. hw->parent = &spi_device->dev;
  2781. spin_lock_init(&priv->lock);
  2782. priv->async_tx_pending = false;
  2783. priv->hw_registered = false;
  2784. priv->sync_up = 0;
  2785. priv->sync_down = 0;
  2786. priv->promiscuous = false;
  2787. priv->retries = 0;
  2788. init_completion(&priv->ca8210_is_awake);
  2789. init_completion(&priv->spi_transfer_complete);
  2790. init_completion(&priv->sync_exchange_complete);
  2791. spi_set_drvdata(priv->spi, priv);
  2792. if (IS_ENABLED(CONFIG_IEEE802154_CA8210_DEBUGFS)) {
  2793. cascoda_api_upstream = ca8210_test_int_driver_write;
  2794. ret = ca8210_test_interface_init(priv);
  2795. if (ret) {
  2796. dev_crit(&spi_device->dev, "ca8210_test_interface_init failed\n");
  2797. goto error;
  2798. }
  2799. } else {
  2800. cascoda_api_upstream = NULL;
  2801. }
  2802. ca8210_hw_setup(hw);
  2803. ieee802154_random_extended_addr(&hw->phy->perm_extended_addr);
  2804. pdata = kmalloc_obj(*pdata);
  2805. if (!pdata) {
  2806. ret = -ENOMEM;
  2807. goto error;
  2808. }
  2809. priv->spi->dev.platform_data = pdata;
  2810. ret = ca8210_get_platform_data(priv->spi, pdata);
  2811. if (ret) {
  2812. dev_crit(&spi_device->dev, "ca8210_get_platform_data failed\n");
  2813. goto error;
  2814. }
  2815. ret = ca8210_dev_com_init(priv);
  2816. if (ret) {
  2817. dev_crit(&spi_device->dev, "ca8210_dev_com_init failed\n");
  2818. goto error;
  2819. }
  2820. ret = ca8210_reset_init(priv->spi);
  2821. if (ret) {
  2822. dev_crit(&spi_device->dev, "ca8210_reset_init failed\n");
  2823. goto error;
  2824. }
  2825. ret = ca8210_interrupt_init(priv->spi);
  2826. if (ret) {
  2827. dev_crit(&spi_device->dev, "ca8210_interrupt_init failed\n");
  2828. goto error;
  2829. }
  2830. msleep(100);
  2831. ca8210_reset_send(priv->spi, 1);
  2832. ret = tdme_chipinit(priv->spi);
  2833. if (ret) {
  2834. dev_crit(&spi_device->dev, "tdme_chipinit failed\n");
  2835. goto error;
  2836. }
  2837. if (pdata->extclockenable) {
  2838. ret = ca8210_config_extern_clk(pdata, priv->spi, 1);
  2839. if (ret) {
  2840. dev_crit(
  2841. &spi_device->dev,
  2842. "ca8210_config_extern_clk failed\n"
  2843. );
  2844. goto error;
  2845. }
  2846. ret = ca8210_register_ext_clock(priv->spi);
  2847. if (ret) {
  2848. dev_crit(
  2849. &spi_device->dev,
  2850. "ca8210_register_ext_clock failed\n"
  2851. );
  2852. goto error;
  2853. }
  2854. }
  2855. ret = ieee802154_register_hw(hw);
  2856. if (ret) {
  2857. dev_crit(&spi_device->dev, "ieee802154_register_hw failed\n");
  2858. goto error;
  2859. }
  2860. priv->hw_registered = true;
  2861. return 0;
  2862. error:
  2863. msleep(100); /* wait for pending spi transfers to complete */
  2864. ca8210_remove(spi_device);
  2865. return link_to_linux_err(ret);
  2866. }
  2867. static const struct of_device_id ca8210_of_ids[] = {
  2868. {.compatible = "cascoda,ca8210", },
  2869. {},
  2870. };
  2871. MODULE_DEVICE_TABLE(of, ca8210_of_ids);
  2872. static struct spi_driver ca8210_spi_driver = {
  2873. .driver = {
  2874. .name = DRIVER_NAME,
  2875. .of_match_table = ca8210_of_ids,
  2876. },
  2877. .probe = ca8210_probe,
  2878. .remove = ca8210_remove
  2879. };
  2880. module_spi_driver(ca8210_spi_driver);
  2881. MODULE_AUTHOR("Harry Morris <h.morris@cascoda.com>");
  2882. MODULE_DESCRIPTION("CA-8210 SoftMAC driver");
  2883. MODULE_LICENSE("Dual BSD/GPL");
  2884. MODULE_VERSION("1.0");