mcdi.c 68 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /****************************************************************************
  3. * Driver for Solarflare network controllers and boards
  4. * Copyright 2008-2013 Solarflare Communications Inc.
  5. */
  6. #include <linux/delay.h>
  7. #include <linux/moduleparam.h>
  8. #include <linux/atomic.h>
  9. #include "net_driver.h"
  10. #include "nic.h"
  11. #include "io.h"
  12. #include "mcdi_pcol.h"
  13. /**************************************************************************
  14. *
  15. * Management-Controller-to-Driver Interface
  16. *
  17. **************************************************************************
  18. */
  19. #define MCDI_RPC_TIMEOUT (10 * HZ)
  20. /* A reboot/assertion causes the MCDI status word to be set after the
  21. * command word is set or a REBOOT event is sent. If we notice a reboot
  22. * via these mechanisms then wait 250ms for the status word to be set.
  23. */
  24. #define MCDI_STATUS_DELAY_US 100
  25. #define MCDI_STATUS_DELAY_COUNT 2500
  26. #define MCDI_STATUS_SLEEP_MS \
  27. (MCDI_STATUS_DELAY_US * MCDI_STATUS_DELAY_COUNT / 1000)
  28. #define SEQ_MASK \
  29. EFX_MASK32(EFX_WIDTH(MCDI_HEADER_SEQ))
  30. struct efx_mcdi_async_param {
  31. struct list_head list;
  32. unsigned int cmd;
  33. size_t inlen;
  34. size_t outlen;
  35. bool quiet;
  36. efx_mcdi_async_completer *complete;
  37. unsigned long cookie;
  38. /* followed by request/response buffer */
  39. };
  40. static void efx_mcdi_timeout_async(struct timer_list *t);
  41. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  42. bool *was_attached_out);
  43. static bool efx_mcdi_poll_once(struct efx_nic *efx);
  44. static void efx_mcdi_abandon(struct efx_nic *efx);
  45. #ifdef CONFIG_SFC_MCDI_LOGGING
  46. static bool mcdi_logging_default;
  47. module_param(mcdi_logging_default, bool, 0644);
  48. MODULE_PARM_DESC(mcdi_logging_default,
  49. "Enable MCDI logging on newly-probed functions");
  50. #endif
  51. int efx_mcdi_init(struct efx_nic *efx)
  52. {
  53. struct efx_mcdi_iface *mcdi;
  54. bool already_attached;
  55. int rc = -ENOMEM;
  56. efx->mcdi = kzalloc_obj(*efx->mcdi);
  57. if (!efx->mcdi)
  58. goto fail;
  59. mcdi = efx_mcdi(efx);
  60. mcdi->efx = efx;
  61. #ifdef CONFIG_SFC_MCDI_LOGGING
  62. /* consuming code assumes buffer is page-sized */
  63. mcdi->logging_buffer = (char *)__get_free_page(GFP_KERNEL);
  64. if (!mcdi->logging_buffer)
  65. goto fail1;
  66. mcdi->logging_enabled = mcdi_logging_default;
  67. #endif
  68. init_waitqueue_head(&mcdi->wq);
  69. init_waitqueue_head(&mcdi->proxy_rx_wq);
  70. spin_lock_init(&mcdi->iface_lock);
  71. mcdi->state = MCDI_STATE_QUIESCENT;
  72. mcdi->mode = MCDI_MODE_POLL;
  73. spin_lock_init(&mcdi->async_lock);
  74. INIT_LIST_HEAD(&mcdi->async_list);
  75. timer_setup(&mcdi->async_timer, efx_mcdi_timeout_async, 0);
  76. (void) efx_mcdi_poll_reboot(efx);
  77. mcdi->new_epoch = true;
  78. /* Recover from a failed assertion before probing */
  79. rc = efx_mcdi_handle_assertion(efx);
  80. if (rc)
  81. goto fail2;
  82. /* Let the MC (and BMC, if this is a LOM) know that the driver
  83. * is loaded. We should do this before we reset the NIC.
  84. */
  85. rc = efx_mcdi_drv_attach(efx, true, &already_attached);
  86. if (rc) {
  87. pci_err(efx->pci_dev, "Unable to register driver with MCPU\n");
  88. goto fail2;
  89. }
  90. if (already_attached)
  91. /* Not a fatal error */
  92. pci_err(efx->pci_dev, "Host already registered with MCPU\n");
  93. if (efx->mcdi->fn_flags &
  94. (1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY))
  95. efx->primary = efx;
  96. return 0;
  97. fail2:
  98. #ifdef CONFIG_SFC_MCDI_LOGGING
  99. free_page((unsigned long)mcdi->logging_buffer);
  100. fail1:
  101. #endif
  102. kfree(efx->mcdi);
  103. efx->mcdi = NULL;
  104. fail:
  105. return rc;
  106. }
  107. void efx_mcdi_detach(struct efx_nic *efx)
  108. {
  109. if (!efx->mcdi)
  110. return;
  111. BUG_ON(efx->mcdi->iface.state != MCDI_STATE_QUIESCENT);
  112. /* Relinquish the device (back to the BMC, if this is a LOM) */
  113. efx_mcdi_drv_attach(efx, false, NULL);
  114. }
  115. void efx_mcdi_fini(struct efx_nic *efx)
  116. {
  117. if (!efx->mcdi)
  118. return;
  119. #ifdef CONFIG_SFC_MCDI_LOGGING
  120. free_page((unsigned long)efx->mcdi->iface.logging_buffer);
  121. #endif
  122. kfree(efx->mcdi);
  123. }
  124. static void efx_mcdi_send_request(struct efx_nic *efx, unsigned cmd,
  125. const efx_dword_t *inbuf, size_t inlen)
  126. {
  127. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  128. #ifdef CONFIG_SFC_MCDI_LOGGING
  129. char *buf = mcdi->logging_buffer; /* page-sized */
  130. #endif
  131. efx_dword_t hdr[2];
  132. size_t hdr_len;
  133. u32 xflags, seqno;
  134. BUG_ON(mcdi->state == MCDI_STATE_QUIESCENT);
  135. /* Serialise with efx_mcdi_ev_cpl() and efx_mcdi_ev_death() */
  136. spin_lock_bh(&mcdi->iface_lock);
  137. ++mcdi->seqno;
  138. seqno = mcdi->seqno & SEQ_MASK;
  139. spin_unlock_bh(&mcdi->iface_lock);
  140. xflags = 0;
  141. if (mcdi->mode == MCDI_MODE_EVENTS)
  142. xflags |= MCDI_HEADER_XFLAGS_EVREQ;
  143. if (efx->type->mcdi_max_ver == 1) {
  144. /* MCDI v1 */
  145. EFX_POPULATE_DWORD_7(hdr[0],
  146. MCDI_HEADER_RESPONSE, 0,
  147. MCDI_HEADER_RESYNC, 1,
  148. MCDI_HEADER_CODE, cmd,
  149. MCDI_HEADER_DATALEN, inlen,
  150. MCDI_HEADER_SEQ, seqno,
  151. MCDI_HEADER_XFLAGS, xflags,
  152. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  153. hdr_len = 4;
  154. } else {
  155. /* MCDI v2 */
  156. BUG_ON(inlen > MCDI_CTL_SDU_LEN_MAX_V2);
  157. EFX_POPULATE_DWORD_7(hdr[0],
  158. MCDI_HEADER_RESPONSE, 0,
  159. MCDI_HEADER_RESYNC, 1,
  160. MCDI_HEADER_CODE, MC_CMD_V2_EXTN,
  161. MCDI_HEADER_DATALEN, 0,
  162. MCDI_HEADER_SEQ, seqno,
  163. MCDI_HEADER_XFLAGS, xflags,
  164. MCDI_HEADER_NOT_EPOCH, !mcdi->new_epoch);
  165. EFX_POPULATE_DWORD_2(hdr[1],
  166. MC_CMD_V2_EXTN_IN_EXTENDED_CMD, cmd,
  167. MC_CMD_V2_EXTN_IN_ACTUAL_LEN, inlen);
  168. hdr_len = 8;
  169. }
  170. #ifdef CONFIG_SFC_MCDI_LOGGING
  171. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  172. int bytes = 0;
  173. int i;
  174. /* Lengths should always be a whole number of dwords, so scream
  175. * if they're not.
  176. */
  177. WARN_ON_ONCE(hdr_len % 4);
  178. WARN_ON_ONCE(inlen % 4);
  179. /* We own the logging buffer, as only one MCDI can be in
  180. * progress on a NIC at any one time. So no need for locking.
  181. */
  182. for (i = 0; i < hdr_len / 4 && bytes < PAGE_SIZE; i++)
  183. bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
  184. " %08x",
  185. le32_to_cpu(hdr[i].u32[0]));
  186. for (i = 0; i < inlen / 4 && bytes < PAGE_SIZE; i++)
  187. bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
  188. " %08x",
  189. le32_to_cpu(inbuf[i].u32[0]));
  190. netif_info(efx, hw, efx->net_dev, "MCDI RPC REQ:%s\n", buf);
  191. }
  192. #endif
  193. efx->type->mcdi_request(efx, hdr, hdr_len, inbuf, inlen);
  194. mcdi->new_epoch = false;
  195. }
  196. static int efx_mcdi_errno(unsigned int mcdi_err)
  197. {
  198. switch (mcdi_err) {
  199. case 0:
  200. return 0;
  201. #define TRANSLATE_ERROR(name) \
  202. case MC_CMD_ERR_ ## name: \
  203. return -name;
  204. TRANSLATE_ERROR(EPERM);
  205. TRANSLATE_ERROR(ENOENT);
  206. TRANSLATE_ERROR(EINTR);
  207. TRANSLATE_ERROR(EAGAIN);
  208. TRANSLATE_ERROR(EACCES);
  209. TRANSLATE_ERROR(EBUSY);
  210. TRANSLATE_ERROR(EINVAL);
  211. TRANSLATE_ERROR(EDEADLK);
  212. TRANSLATE_ERROR(ENOSYS);
  213. TRANSLATE_ERROR(ETIME);
  214. TRANSLATE_ERROR(EALREADY);
  215. TRANSLATE_ERROR(ENOSPC);
  216. #undef TRANSLATE_ERROR
  217. case MC_CMD_ERR_ENOTSUP:
  218. return -EOPNOTSUPP;
  219. case MC_CMD_ERR_ALLOC_FAIL:
  220. return -ENOBUFS;
  221. case MC_CMD_ERR_MAC_EXIST:
  222. return -EADDRINUSE;
  223. default:
  224. return -EPROTO;
  225. }
  226. }
  227. static void efx_mcdi_read_response_header(struct efx_nic *efx)
  228. {
  229. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  230. unsigned int respseq, respcmd, error;
  231. #ifdef CONFIG_SFC_MCDI_LOGGING
  232. char *buf = mcdi->logging_buffer; /* page-sized */
  233. #endif
  234. efx_dword_t hdr;
  235. efx->type->mcdi_read_response(efx, &hdr, 0, 4);
  236. respseq = EFX_DWORD_FIELD(hdr, MCDI_HEADER_SEQ);
  237. respcmd = EFX_DWORD_FIELD(hdr, MCDI_HEADER_CODE);
  238. error = EFX_DWORD_FIELD(hdr, MCDI_HEADER_ERROR);
  239. if (respcmd != MC_CMD_V2_EXTN) {
  240. mcdi->resp_hdr_len = 4;
  241. mcdi->resp_data_len = EFX_DWORD_FIELD(hdr, MCDI_HEADER_DATALEN);
  242. } else {
  243. efx->type->mcdi_read_response(efx, &hdr, 4, 4);
  244. mcdi->resp_hdr_len = 8;
  245. mcdi->resp_data_len =
  246. EFX_DWORD_FIELD(hdr, MC_CMD_V2_EXTN_IN_ACTUAL_LEN);
  247. }
  248. #ifdef CONFIG_SFC_MCDI_LOGGING
  249. if (mcdi->logging_enabled && !WARN_ON_ONCE(!buf)) {
  250. size_t hdr_len, data_len;
  251. int bytes = 0;
  252. int i;
  253. WARN_ON_ONCE(mcdi->resp_hdr_len % 4);
  254. hdr_len = mcdi->resp_hdr_len / 4;
  255. /* MCDI_DECLARE_BUF ensures that underlying buffer is padded
  256. * to dword size, and the MCDI buffer is always dword size
  257. */
  258. data_len = DIV_ROUND_UP(mcdi->resp_data_len, 4);
  259. /* We own the logging buffer, as only one MCDI can be in
  260. * progress on a NIC at any one time. So no need for locking.
  261. */
  262. for (i = 0; i < hdr_len && bytes < PAGE_SIZE; i++) {
  263. efx->type->mcdi_read_response(efx, &hdr, (i * 4), 4);
  264. bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
  265. " %08x", le32_to_cpu(hdr.u32[0]));
  266. }
  267. for (i = 0; i < data_len && bytes < PAGE_SIZE; i++) {
  268. efx->type->mcdi_read_response(efx, &hdr,
  269. mcdi->resp_hdr_len + (i * 4), 4);
  270. bytes += scnprintf(buf + bytes, PAGE_SIZE - bytes,
  271. " %08x", le32_to_cpu(hdr.u32[0]));
  272. }
  273. netif_info(efx, hw, efx->net_dev, "MCDI RPC RESP:%s\n", buf);
  274. }
  275. #endif
  276. mcdi->resprc_raw = 0;
  277. if (error && mcdi->resp_data_len == 0) {
  278. netif_err(efx, hw, efx->net_dev, "MC rebooted\n");
  279. mcdi->resprc = -EIO;
  280. } else if ((respseq ^ mcdi->seqno) & SEQ_MASK) {
  281. netif_err(efx, hw, efx->net_dev,
  282. "MC response mismatch tx seq 0x%x rx seq 0x%x\n",
  283. respseq, mcdi->seqno);
  284. mcdi->resprc = -EIO;
  285. } else if (error) {
  286. efx->type->mcdi_read_response(efx, &hdr, mcdi->resp_hdr_len, 4);
  287. mcdi->resprc_raw = EFX_DWORD_FIELD(hdr, EFX_DWORD_0);
  288. mcdi->resprc = efx_mcdi_errno(mcdi->resprc_raw);
  289. } else {
  290. mcdi->resprc = 0;
  291. }
  292. }
  293. static bool efx_mcdi_poll_once(struct efx_nic *efx)
  294. {
  295. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  296. rmb();
  297. if (!efx->type->mcdi_poll_response(efx))
  298. return false;
  299. spin_lock_bh(&mcdi->iface_lock);
  300. efx_mcdi_read_response_header(efx);
  301. spin_unlock_bh(&mcdi->iface_lock);
  302. return true;
  303. }
  304. static int efx_mcdi_poll(struct efx_nic *efx)
  305. {
  306. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  307. unsigned long time, finish;
  308. unsigned int spins;
  309. int rc;
  310. /* Check for a reboot atomically with respect to efx_mcdi_copyout() */
  311. rc = efx_mcdi_poll_reboot(efx);
  312. if (rc) {
  313. spin_lock_bh(&mcdi->iface_lock);
  314. mcdi->resprc = rc;
  315. mcdi->resp_hdr_len = 0;
  316. mcdi->resp_data_len = 0;
  317. spin_unlock_bh(&mcdi->iface_lock);
  318. return 0;
  319. }
  320. /* Poll for completion. Poll quickly (once a us) for the 1st jiffy,
  321. * because generally mcdi responses are fast. After that, back off
  322. * and poll once a jiffy (approximately)
  323. */
  324. spins = USER_TICK_USEC;
  325. finish = jiffies + MCDI_RPC_TIMEOUT;
  326. while (1) {
  327. if (spins != 0) {
  328. --spins;
  329. udelay(1);
  330. } else {
  331. schedule_timeout_uninterruptible(1);
  332. }
  333. time = jiffies;
  334. if (efx_mcdi_poll_once(efx))
  335. break;
  336. if (time_after(time, finish))
  337. return -ETIMEDOUT;
  338. }
  339. /* Return rc=0 like wait_event_timeout() */
  340. return 0;
  341. }
  342. /* Test and clear MC-rebooted flag for this port/function; reset
  343. * software state as necessary.
  344. */
  345. int efx_mcdi_poll_reboot(struct efx_nic *efx)
  346. {
  347. if (!efx->mcdi)
  348. return 0;
  349. return efx->type->mcdi_poll_reboot(efx);
  350. }
  351. static bool efx_mcdi_acquire_async(struct efx_mcdi_iface *mcdi)
  352. {
  353. return cmpxchg(&mcdi->state,
  354. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_ASYNC) ==
  355. MCDI_STATE_QUIESCENT;
  356. }
  357. static void efx_mcdi_acquire_sync(struct efx_mcdi_iface *mcdi)
  358. {
  359. /* Wait until the interface becomes QUIESCENT and we win the race
  360. * to mark it RUNNING_SYNC.
  361. */
  362. wait_event(mcdi->wq,
  363. cmpxchg(&mcdi->state,
  364. MCDI_STATE_QUIESCENT, MCDI_STATE_RUNNING_SYNC) ==
  365. MCDI_STATE_QUIESCENT);
  366. }
  367. static int efx_mcdi_await_completion(struct efx_nic *efx)
  368. {
  369. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  370. if (wait_event_timeout(mcdi->wq, mcdi->state == MCDI_STATE_COMPLETED,
  371. MCDI_RPC_TIMEOUT) == 0)
  372. return -ETIMEDOUT;
  373. /* Check if efx_mcdi_set_mode() switched us back to polled completions.
  374. * In which case, poll for completions directly. If efx_mcdi_ev_cpl()
  375. * completed the request first, then we'll just end up completing the
  376. * request again, which is safe.
  377. *
  378. * We need an smp_rmb() to synchronise with efx_mcdi_mode_poll(), which
  379. * wait_event_timeout() implicitly provides.
  380. */
  381. if (mcdi->mode == MCDI_MODE_POLL)
  382. return efx_mcdi_poll(efx);
  383. return 0;
  384. }
  385. /* If the interface is RUNNING_SYNC, switch to COMPLETED and wake the
  386. * requester. Return whether this was done. Does not take any locks.
  387. */
  388. static bool efx_mcdi_complete_sync(struct efx_mcdi_iface *mcdi)
  389. {
  390. if (cmpxchg(&mcdi->state,
  391. MCDI_STATE_RUNNING_SYNC, MCDI_STATE_COMPLETED) ==
  392. MCDI_STATE_RUNNING_SYNC) {
  393. wake_up(&mcdi->wq);
  394. return true;
  395. }
  396. return false;
  397. }
  398. static void efx_mcdi_release(struct efx_mcdi_iface *mcdi)
  399. {
  400. if (mcdi->mode == MCDI_MODE_EVENTS) {
  401. struct efx_mcdi_async_param *async;
  402. struct efx_nic *efx = mcdi->efx;
  403. /* Process the asynchronous request queue */
  404. spin_lock_bh(&mcdi->async_lock);
  405. async = list_first_entry_or_null(
  406. &mcdi->async_list, struct efx_mcdi_async_param, list);
  407. if (async) {
  408. mcdi->state = MCDI_STATE_RUNNING_ASYNC;
  409. efx_mcdi_send_request(efx, async->cmd,
  410. (const efx_dword_t *)(async + 1),
  411. async->inlen);
  412. mod_timer(&mcdi->async_timer,
  413. jiffies + MCDI_RPC_TIMEOUT);
  414. }
  415. spin_unlock_bh(&mcdi->async_lock);
  416. if (async)
  417. return;
  418. }
  419. mcdi->state = MCDI_STATE_QUIESCENT;
  420. wake_up(&mcdi->wq);
  421. }
  422. /* If the interface is RUNNING_ASYNC, switch to COMPLETED, call the
  423. * asynchronous completion function, and release the interface.
  424. * Return whether this was done. Must be called in bh-disabled
  425. * context. Will take iface_lock and async_lock.
  426. */
  427. static bool efx_mcdi_complete_async(struct efx_mcdi_iface *mcdi, bool timeout)
  428. {
  429. struct efx_nic *efx = mcdi->efx;
  430. struct efx_mcdi_async_param *async;
  431. size_t hdr_len, data_len, err_len;
  432. efx_dword_t *outbuf;
  433. MCDI_DECLARE_BUF_ERR(errbuf);
  434. int rc;
  435. if (cmpxchg(&mcdi->state,
  436. MCDI_STATE_RUNNING_ASYNC, MCDI_STATE_COMPLETED) !=
  437. MCDI_STATE_RUNNING_ASYNC)
  438. return false;
  439. spin_lock(&mcdi->iface_lock);
  440. if (timeout) {
  441. /* Ensure that if the completion event arrives later,
  442. * the seqno check in efx_mcdi_ev_cpl() will fail
  443. */
  444. ++mcdi->seqno;
  445. ++mcdi->credits;
  446. rc = -ETIMEDOUT;
  447. hdr_len = 0;
  448. data_len = 0;
  449. } else {
  450. rc = mcdi->resprc;
  451. hdr_len = mcdi->resp_hdr_len;
  452. data_len = mcdi->resp_data_len;
  453. }
  454. spin_unlock(&mcdi->iface_lock);
  455. /* Stop the timer. In case the timer function is running, we
  456. * must wait for it to return so that there is no possibility
  457. * of it aborting the next request.
  458. */
  459. if (!timeout)
  460. timer_delete_sync(&mcdi->async_timer);
  461. spin_lock(&mcdi->async_lock);
  462. async = list_first_entry(&mcdi->async_list,
  463. struct efx_mcdi_async_param, list);
  464. list_del(&async->list);
  465. spin_unlock(&mcdi->async_lock);
  466. outbuf = (efx_dword_t *)(async + 1);
  467. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  468. min(async->outlen, data_len));
  469. if (!timeout && rc && !async->quiet) {
  470. err_len = min(sizeof(errbuf), data_len);
  471. efx->type->mcdi_read_response(efx, errbuf, hdr_len,
  472. sizeof(errbuf));
  473. efx_mcdi_display_error(efx, async->cmd, async->inlen, errbuf,
  474. err_len, rc);
  475. }
  476. if (async->complete)
  477. async->complete(efx, async->cookie, rc, outbuf,
  478. min(async->outlen, data_len));
  479. kfree(async);
  480. efx_mcdi_release(mcdi);
  481. return true;
  482. }
  483. static void efx_mcdi_ev_cpl(struct efx_nic *efx, unsigned int seqno,
  484. unsigned int datalen, unsigned int mcdi_err)
  485. {
  486. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  487. bool wake = false;
  488. spin_lock(&mcdi->iface_lock);
  489. if ((seqno ^ mcdi->seqno) & SEQ_MASK) {
  490. if (mcdi->credits)
  491. /* The request has been cancelled */
  492. --mcdi->credits;
  493. else
  494. netif_err(efx, hw, efx->net_dev,
  495. "MC response mismatch tx seq 0x%x rx "
  496. "seq 0x%x\n", seqno, mcdi->seqno);
  497. } else {
  498. if (efx->type->mcdi_max_ver >= 2) {
  499. /* MCDI v2 responses don't fit in an event */
  500. efx_mcdi_read_response_header(efx);
  501. } else {
  502. mcdi->resprc = efx_mcdi_errno(mcdi_err);
  503. mcdi->resp_hdr_len = 4;
  504. mcdi->resp_data_len = datalen;
  505. }
  506. wake = true;
  507. }
  508. spin_unlock(&mcdi->iface_lock);
  509. if (wake) {
  510. if (!efx_mcdi_complete_async(mcdi, false))
  511. (void) efx_mcdi_complete_sync(mcdi);
  512. /* If the interface isn't RUNNING_ASYNC or
  513. * RUNNING_SYNC then we've received a duplicate
  514. * completion after we've already transitioned back to
  515. * QUIESCENT. [A subsequent invocation would increment
  516. * seqno, so would have failed the seqno check].
  517. */
  518. }
  519. }
  520. static void efx_mcdi_timeout_async(struct timer_list *t)
  521. {
  522. struct efx_mcdi_iface *mcdi = timer_container_of(mcdi, t, async_timer);
  523. efx_mcdi_complete_async(mcdi, true);
  524. }
  525. static int
  526. efx_mcdi_check_supported(struct efx_nic *efx, unsigned int cmd, size_t inlen)
  527. {
  528. if (efx->type->mcdi_max_ver < 0 ||
  529. (efx->type->mcdi_max_ver < 2 &&
  530. cmd > MC_CMD_CMD_SPACE_ESCAPE_7))
  531. return -EINVAL;
  532. if (inlen > MCDI_CTL_SDU_LEN_MAX_V2 ||
  533. (efx->type->mcdi_max_ver < 2 &&
  534. inlen > MCDI_CTL_SDU_LEN_MAX_V1))
  535. return -EMSGSIZE;
  536. return 0;
  537. }
  538. static bool efx_mcdi_get_proxy_handle(struct efx_nic *efx,
  539. size_t hdr_len, size_t data_len,
  540. u32 *proxy_handle)
  541. {
  542. MCDI_DECLARE_BUF_ERR(testbuf);
  543. const size_t buflen = sizeof(testbuf);
  544. if (!proxy_handle || data_len < buflen)
  545. return false;
  546. efx->type->mcdi_read_response(efx, testbuf, hdr_len, buflen);
  547. if (MCDI_DWORD(testbuf, ERR_CODE) == MC_CMD_ERR_PROXY_PENDING) {
  548. *proxy_handle = MCDI_DWORD(testbuf, ERR_PROXY_PENDING_HANDLE);
  549. return true;
  550. }
  551. return false;
  552. }
  553. static int _efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned int cmd,
  554. size_t inlen,
  555. efx_dword_t *outbuf, size_t outlen,
  556. size_t *outlen_actual, bool quiet,
  557. u32 *proxy_handle, int *raw_rc)
  558. {
  559. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  560. MCDI_DECLARE_BUF_ERR(errbuf);
  561. int rc;
  562. if (mcdi->mode == MCDI_MODE_POLL)
  563. rc = efx_mcdi_poll(efx);
  564. else
  565. rc = efx_mcdi_await_completion(efx);
  566. if (rc != 0) {
  567. netif_err(efx, hw, efx->net_dev,
  568. "MC command 0x%x inlen %d mode %d timed out\n",
  569. cmd, (int)inlen, mcdi->mode);
  570. if (mcdi->mode == MCDI_MODE_EVENTS && efx_mcdi_poll_once(efx)) {
  571. netif_err(efx, hw, efx->net_dev,
  572. "MCDI request was completed without an event\n");
  573. rc = 0;
  574. }
  575. efx_mcdi_abandon(efx);
  576. /* Close the race with efx_mcdi_ev_cpl() executing just too late
  577. * and completing a request we've just cancelled, by ensuring
  578. * that the seqno check therein fails.
  579. */
  580. spin_lock_bh(&mcdi->iface_lock);
  581. ++mcdi->seqno;
  582. ++mcdi->credits;
  583. spin_unlock_bh(&mcdi->iface_lock);
  584. }
  585. if (proxy_handle)
  586. *proxy_handle = 0;
  587. if (rc != 0) {
  588. if (outlen_actual)
  589. *outlen_actual = 0;
  590. } else {
  591. size_t hdr_len, data_len, err_len;
  592. /* At the very least we need a memory barrier here to ensure
  593. * we pick up changes from efx_mcdi_ev_cpl(). Protect against
  594. * a spurious efx_mcdi_ev_cpl() running concurrently by
  595. * acquiring the iface_lock. */
  596. spin_lock_bh(&mcdi->iface_lock);
  597. rc = mcdi->resprc;
  598. if (raw_rc)
  599. *raw_rc = mcdi->resprc_raw;
  600. hdr_len = mcdi->resp_hdr_len;
  601. data_len = mcdi->resp_data_len;
  602. err_len = min(sizeof(errbuf), data_len);
  603. spin_unlock_bh(&mcdi->iface_lock);
  604. BUG_ON(rc > 0);
  605. efx->type->mcdi_read_response(efx, outbuf, hdr_len,
  606. min(outlen, data_len));
  607. if (outlen_actual)
  608. *outlen_actual = data_len;
  609. efx->type->mcdi_read_response(efx, errbuf, hdr_len, err_len);
  610. if (cmd == MC_CMD_REBOOT && rc == -EIO) {
  611. /* Don't reset if MC_CMD_REBOOT returns EIO */
  612. } else if (rc == -EIO || rc == -EINTR) {
  613. netif_err(efx, hw, efx->net_dev, "MC reboot detected\n");
  614. netif_dbg(efx, hw, efx->net_dev, "MC rebooted during command %d rc %d\n",
  615. cmd, -rc);
  616. if (efx->type->mcdi_reboot_detected)
  617. efx->type->mcdi_reboot_detected(efx);
  618. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  619. } else if (proxy_handle && (rc == -EPROTO) &&
  620. efx_mcdi_get_proxy_handle(efx, hdr_len, data_len,
  621. proxy_handle)) {
  622. mcdi->proxy_rx_status = 0;
  623. mcdi->proxy_rx_handle = 0;
  624. mcdi->state = MCDI_STATE_PROXY_WAIT;
  625. } else if (rc && !quiet) {
  626. efx_mcdi_display_error(efx, cmd, inlen, errbuf, err_len,
  627. rc);
  628. }
  629. if (rc == -EIO || rc == -EINTR) {
  630. msleep(MCDI_STATUS_SLEEP_MS);
  631. efx_mcdi_poll_reboot(efx);
  632. mcdi->new_epoch = true;
  633. }
  634. }
  635. if (!proxy_handle || !*proxy_handle)
  636. efx_mcdi_release(mcdi);
  637. return rc;
  638. }
  639. static void efx_mcdi_proxy_abort(struct efx_mcdi_iface *mcdi)
  640. {
  641. if (mcdi->state == MCDI_STATE_PROXY_WAIT) {
  642. /* Interrupt the proxy wait. */
  643. mcdi->proxy_rx_status = -EINTR;
  644. wake_up(&mcdi->proxy_rx_wq);
  645. }
  646. }
  647. static void efx_mcdi_ev_proxy_response(struct efx_nic *efx,
  648. u32 handle, int status)
  649. {
  650. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  651. WARN_ON(mcdi->state != MCDI_STATE_PROXY_WAIT);
  652. mcdi->proxy_rx_status = efx_mcdi_errno(status);
  653. /* Ensure the status is written before we update the handle, since the
  654. * latter is used to check if we've finished.
  655. */
  656. wmb();
  657. mcdi->proxy_rx_handle = handle;
  658. wake_up(&mcdi->proxy_rx_wq);
  659. }
  660. static int efx_mcdi_proxy_wait(struct efx_nic *efx, u32 handle, bool quiet)
  661. {
  662. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  663. int rc;
  664. /* Wait for a proxy event, or timeout. */
  665. rc = wait_event_timeout(mcdi->proxy_rx_wq,
  666. mcdi->proxy_rx_handle != 0 ||
  667. mcdi->proxy_rx_status == -EINTR,
  668. MCDI_RPC_TIMEOUT);
  669. if (rc <= 0) {
  670. netif_dbg(efx, hw, efx->net_dev,
  671. "MCDI proxy timeout %d\n", handle);
  672. return -ETIMEDOUT;
  673. } else if (mcdi->proxy_rx_handle != handle) {
  674. netif_warn(efx, hw, efx->net_dev,
  675. "MCDI proxy unexpected handle %d (expected %d)\n",
  676. mcdi->proxy_rx_handle, handle);
  677. return -EINVAL;
  678. }
  679. return mcdi->proxy_rx_status;
  680. }
  681. static int _efx_mcdi_rpc(struct efx_nic *efx, unsigned int cmd,
  682. const efx_dword_t *inbuf, size_t inlen,
  683. efx_dword_t *outbuf, size_t outlen,
  684. size_t *outlen_actual, bool quiet, int *raw_rc)
  685. {
  686. u32 proxy_handle = 0; /* Zero is an invalid proxy handle. */
  687. int rc;
  688. if (inbuf && inlen && (inbuf == outbuf)) {
  689. /* The input buffer can't be aliased with the output. */
  690. WARN_ON(1);
  691. return -EINVAL;
  692. }
  693. rc = efx_mcdi_rpc_start(efx, cmd, inbuf, inlen);
  694. if (rc)
  695. return rc;
  696. rc = _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  697. outlen_actual, quiet, &proxy_handle, raw_rc);
  698. if (proxy_handle) {
  699. /* Handle proxy authorisation. This allows approval of MCDI
  700. * operations to be delegated to the admin function, allowing
  701. * fine control over (eg) multicast subscriptions.
  702. */
  703. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  704. netif_dbg(efx, hw, efx->net_dev,
  705. "MCDI waiting for proxy auth %d\n",
  706. proxy_handle);
  707. rc = efx_mcdi_proxy_wait(efx, proxy_handle, quiet);
  708. if (rc == 0) {
  709. netif_dbg(efx, hw, efx->net_dev,
  710. "MCDI proxy retry %d\n", proxy_handle);
  711. /* We now retry the original request. */
  712. mcdi->state = MCDI_STATE_RUNNING_SYNC;
  713. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  714. rc = _efx_mcdi_rpc_finish(efx, cmd, inlen,
  715. outbuf, outlen, outlen_actual,
  716. quiet, NULL, raw_rc);
  717. } else {
  718. netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
  719. "MC command 0x%x failed after proxy auth rc=%d\n",
  720. cmd, rc);
  721. if (rc == -EINTR || rc == -EIO)
  722. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  723. efx_mcdi_release(mcdi);
  724. }
  725. }
  726. return rc;
  727. }
  728. static int _efx_mcdi_rpc_evb_retry(struct efx_nic *efx, unsigned cmd,
  729. const efx_dword_t *inbuf, size_t inlen,
  730. efx_dword_t *outbuf, size_t outlen,
  731. size_t *outlen_actual, bool quiet)
  732. {
  733. int raw_rc = 0;
  734. int rc;
  735. rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
  736. outbuf, outlen, outlen_actual, true, &raw_rc);
  737. if ((rc == -EPROTO) && (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
  738. efx->type->is_vf) {
  739. /* If the EVB port isn't available within a VF this may
  740. * mean the PF is still bringing the switch up. We should
  741. * retry our request shortly.
  742. */
  743. unsigned long abort_time = jiffies + MCDI_RPC_TIMEOUT;
  744. unsigned int delay_us = 10000;
  745. netif_dbg(efx, hw, efx->net_dev,
  746. "%s: NO_EVB_PORT; will retry request\n",
  747. __func__);
  748. do {
  749. usleep_range(delay_us, delay_us + 10000);
  750. rc = _efx_mcdi_rpc(efx, cmd, inbuf, inlen,
  751. outbuf, outlen, outlen_actual,
  752. true, &raw_rc);
  753. if (delay_us < 100000)
  754. delay_us <<= 1;
  755. } while ((rc == -EPROTO) &&
  756. (raw_rc == MC_CMD_ERR_NO_EVB_PORT) &&
  757. time_before(jiffies, abort_time));
  758. }
  759. if (rc && !quiet && !(cmd == MC_CMD_REBOOT && rc == -EIO))
  760. efx_mcdi_display_error(efx, cmd, inlen,
  761. outbuf, outlen, rc);
  762. return rc;
  763. }
  764. /**
  765. * efx_mcdi_rpc - Issue an MCDI command and wait for completion
  766. * @efx: NIC through which to issue the command
  767. * @cmd: Command type number
  768. * @inbuf: Command parameters
  769. * @inlen: Length of command parameters, in bytes. Must be a multiple
  770. * of 4 and no greater than %MCDI_CTL_SDU_LEN_MAX_V1.
  771. * @outbuf: Response buffer. May be %NULL if @outlen is 0.
  772. * @outlen: Length of response buffer, in bytes. If the actual
  773. * response is longer than @outlen & ~3, it will be truncated
  774. * to that length.
  775. * @outlen_actual: Pointer through which to return the actual response
  776. * length. May be %NULL if this is not needed.
  777. *
  778. * This function may sleep and therefore must be called in an appropriate
  779. * context.
  780. *
  781. * Return: A negative error code, or zero if successful. The error
  782. * code may come from the MCDI response or may indicate a failure
  783. * to communicate with the MC. In the former case, the response
  784. * will still be copied to @outbuf and *@outlen_actual will be
  785. * set accordingly. In the latter case, *@outlen_actual will be
  786. * set to zero.
  787. */
  788. int efx_mcdi_rpc(struct efx_nic *efx, unsigned cmd,
  789. const efx_dword_t *inbuf, size_t inlen,
  790. efx_dword_t *outbuf, size_t outlen,
  791. size_t *outlen_actual)
  792. {
  793. return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
  794. outlen_actual, false);
  795. }
  796. /* Normally, on receiving an error code in the MCDI response,
  797. * efx_mcdi_rpc will log an error message containing (among other
  798. * things) the raw error code, by means of efx_mcdi_display_error.
  799. * This _quiet version suppresses that; if the caller wishes to log
  800. * the error conditionally on the return code, it should call this
  801. * function and is then responsible for calling efx_mcdi_display_error
  802. * as needed.
  803. */
  804. int efx_mcdi_rpc_quiet(struct efx_nic *efx, unsigned cmd,
  805. const efx_dword_t *inbuf, size_t inlen,
  806. efx_dword_t *outbuf, size_t outlen,
  807. size_t *outlen_actual)
  808. {
  809. return _efx_mcdi_rpc_evb_retry(efx, cmd, inbuf, inlen, outbuf, outlen,
  810. outlen_actual, true);
  811. }
  812. int efx_mcdi_rpc_start(struct efx_nic *efx, unsigned cmd,
  813. const efx_dword_t *inbuf, size_t inlen)
  814. {
  815. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  816. int rc;
  817. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  818. if (rc)
  819. return rc;
  820. if (efx->mc_bist_for_other_fn)
  821. return -ENETDOWN;
  822. if (mcdi->mode == MCDI_MODE_FAIL)
  823. return -ENETDOWN;
  824. efx_mcdi_acquire_sync(mcdi);
  825. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  826. return 0;
  827. }
  828. static int _efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  829. const efx_dword_t *inbuf, size_t inlen,
  830. size_t outlen,
  831. efx_mcdi_async_completer *complete,
  832. unsigned long cookie, bool quiet)
  833. {
  834. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  835. struct efx_mcdi_async_param *async;
  836. int rc;
  837. rc = efx_mcdi_check_supported(efx, cmd, inlen);
  838. if (rc)
  839. return rc;
  840. if (efx->mc_bist_for_other_fn)
  841. return -ENETDOWN;
  842. async = kmalloc(sizeof(*async) + ALIGN(max(inlen, outlen), 4),
  843. GFP_ATOMIC);
  844. if (!async)
  845. return -ENOMEM;
  846. async->cmd = cmd;
  847. async->inlen = inlen;
  848. async->outlen = outlen;
  849. async->quiet = quiet;
  850. async->complete = complete;
  851. async->cookie = cookie;
  852. memcpy(async + 1, inbuf, inlen);
  853. spin_lock_bh(&mcdi->async_lock);
  854. if (mcdi->mode == MCDI_MODE_EVENTS) {
  855. list_add_tail(&async->list, &mcdi->async_list);
  856. /* If this is at the front of the queue, try to start it
  857. * immediately
  858. */
  859. if (mcdi->async_list.next == &async->list &&
  860. efx_mcdi_acquire_async(mcdi)) {
  861. efx_mcdi_send_request(efx, cmd, inbuf, inlen);
  862. mod_timer(&mcdi->async_timer,
  863. jiffies + MCDI_RPC_TIMEOUT);
  864. }
  865. } else {
  866. kfree(async);
  867. rc = -ENETDOWN;
  868. }
  869. spin_unlock_bh(&mcdi->async_lock);
  870. return rc;
  871. }
  872. /**
  873. * efx_mcdi_rpc_async - Schedule an MCDI command to run asynchronously
  874. * @efx: NIC through which to issue the command
  875. * @cmd: Command type number
  876. * @inbuf: Command parameters
  877. * @inlen: Length of command parameters, in bytes
  878. * @outlen: Length to allocate for response buffer, in bytes
  879. * @complete: Function to be called on completion or cancellation.
  880. * @cookie: Arbitrary value to be passed to @complete.
  881. *
  882. * This function does not sleep and therefore may be called in atomic
  883. * context. It will fail if event queues are disabled or if MCDI
  884. * event completions have been disabled due to an error.
  885. *
  886. * If it succeeds, the @complete function will be called exactly once
  887. * in atomic context, when one of the following occurs:
  888. * (a) the completion event is received (in NAPI context)
  889. * (b) event queues are disabled (in the process that disables them)
  890. * (c) the request times-out (in timer context)
  891. */
  892. int
  893. efx_mcdi_rpc_async(struct efx_nic *efx, unsigned int cmd,
  894. const efx_dword_t *inbuf, size_t inlen, size_t outlen,
  895. efx_mcdi_async_completer *complete, unsigned long cookie)
  896. {
  897. return _efx_mcdi_rpc_async(efx, cmd, inbuf, inlen, outlen, complete,
  898. cookie, false);
  899. }
  900. int efx_mcdi_rpc_finish(struct efx_nic *efx, unsigned cmd, size_t inlen,
  901. efx_dword_t *outbuf, size_t outlen,
  902. size_t *outlen_actual)
  903. {
  904. return _efx_mcdi_rpc_finish(efx, cmd, inlen, outbuf, outlen,
  905. outlen_actual, false, NULL, NULL);
  906. }
  907. void efx_mcdi_display_error(struct efx_nic *efx, unsigned cmd,
  908. size_t inlen, efx_dword_t *outbuf,
  909. size_t outlen, int rc)
  910. {
  911. int code = 0, err_arg = 0;
  912. if (outlen >= MC_CMD_ERR_CODE_OFST + 4)
  913. code = MCDI_DWORD(outbuf, ERR_CODE);
  914. if (outlen >= MC_CMD_ERR_ARG_OFST + 4)
  915. err_arg = MCDI_DWORD(outbuf, ERR_ARG);
  916. netif_cond_dbg(efx, hw, efx->net_dev, rc == -EPERM, err,
  917. "MC command 0x%x inlen %zu failed rc=%d (raw=%d) arg=%d\n",
  918. cmd, inlen, rc, code, err_arg);
  919. }
  920. /* Switch to polled MCDI completions. This can be called in various
  921. * error conditions with various locks held, so it must be lockless.
  922. * Caller is responsible for flushing asynchronous requests later.
  923. */
  924. void efx_mcdi_mode_poll(struct efx_nic *efx)
  925. {
  926. struct efx_mcdi_iface *mcdi;
  927. if (!efx->mcdi)
  928. return;
  929. mcdi = efx_mcdi(efx);
  930. /* If already in polling mode, nothing to do.
  931. * If in fail-fast state, don't switch to polled completion.
  932. * FLR recovery will do that later.
  933. */
  934. if (mcdi->mode == MCDI_MODE_POLL || mcdi->mode == MCDI_MODE_FAIL)
  935. return;
  936. /* We can switch from event completion to polled completion, because
  937. * mcdi requests are always completed in shared memory. We do this by
  938. * switching the mode to POLL'd then completing the request.
  939. * efx_mcdi_await_completion() will then call efx_mcdi_poll().
  940. *
  941. * We need an smp_wmb() to synchronise with efx_mcdi_await_completion(),
  942. * which efx_mcdi_complete_sync() provides for us.
  943. */
  944. mcdi->mode = MCDI_MODE_POLL;
  945. efx_mcdi_complete_sync(mcdi);
  946. }
  947. /* Flush any running or queued asynchronous requests, after event processing
  948. * is stopped
  949. */
  950. void efx_mcdi_flush_async(struct efx_nic *efx)
  951. {
  952. struct efx_mcdi_async_param *async, *next;
  953. struct efx_mcdi_iface *mcdi;
  954. if (!efx->mcdi)
  955. return;
  956. mcdi = efx_mcdi(efx);
  957. /* We must be in poll or fail mode so no more requests can be queued */
  958. BUG_ON(mcdi->mode == MCDI_MODE_EVENTS);
  959. timer_delete_sync(&mcdi->async_timer);
  960. /* If a request is still running, make sure we give the MC
  961. * time to complete it so that the response won't overwrite our
  962. * next request.
  963. */
  964. if (mcdi->state == MCDI_STATE_RUNNING_ASYNC) {
  965. efx_mcdi_poll(efx);
  966. mcdi->state = MCDI_STATE_QUIESCENT;
  967. }
  968. /* Nothing else will access the async list now, so it is safe
  969. * to walk it without holding async_lock. If we hold it while
  970. * calling a completer then lockdep may warn that we have
  971. * acquired locks in the wrong order.
  972. */
  973. list_for_each_entry_safe(async, next, &mcdi->async_list, list) {
  974. if (async->complete)
  975. async->complete(efx, async->cookie, -ENETDOWN, NULL, 0);
  976. list_del(&async->list);
  977. kfree(async);
  978. }
  979. }
  980. void efx_mcdi_mode_event(struct efx_nic *efx)
  981. {
  982. struct efx_mcdi_iface *mcdi;
  983. if (!efx->mcdi)
  984. return;
  985. mcdi = efx_mcdi(efx);
  986. /* If already in event completion mode, nothing to do.
  987. * If in fail-fast state, don't switch to event completion. FLR
  988. * recovery will do that later.
  989. */
  990. if (mcdi->mode == MCDI_MODE_EVENTS || mcdi->mode == MCDI_MODE_FAIL)
  991. return;
  992. /* We can't switch from polled to event completion in the middle of a
  993. * request, because the completion method is specified in the request.
  994. * So acquire the interface to serialise the requestors. We don't need
  995. * to acquire the iface_lock to change the mode here, but we do need a
  996. * write memory barrier ensure that efx_mcdi_rpc() sees it, which
  997. * efx_mcdi_acquire() provides.
  998. */
  999. efx_mcdi_acquire_sync(mcdi);
  1000. mcdi->mode = MCDI_MODE_EVENTS;
  1001. efx_mcdi_release(mcdi);
  1002. }
  1003. static void efx_mcdi_ev_death(struct efx_nic *efx, int rc)
  1004. {
  1005. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1006. /* If there is an outstanding MCDI request, it has been terminated
  1007. * either by a BADASSERT or REBOOT event. If the mcdi interface is
  1008. * in polled mode, then do nothing because the MC reboot handler will
  1009. * set the header correctly. However, if the mcdi interface is waiting
  1010. * for a CMDDONE event it won't receive it [and since all MCDI events
  1011. * are sent to the same queue, we can't be racing with
  1012. * efx_mcdi_ev_cpl()]
  1013. *
  1014. * If there is an outstanding asynchronous request, we can't
  1015. * complete it now (efx_mcdi_complete() would deadlock). The
  1016. * reset process will take care of this.
  1017. *
  1018. * There's a race here with efx_mcdi_send_request(), because
  1019. * we might receive a REBOOT event *before* the request has
  1020. * been copied out. In polled mode (during startup) this is
  1021. * irrelevant, because efx_mcdi_complete_sync() is ignored. In
  1022. * event mode, this condition is just an edge-case of
  1023. * receiving a REBOOT event after posting the MCDI
  1024. * request. Did the mc reboot before or after the copyout? The
  1025. * best we can do always is just return failure.
  1026. *
  1027. * If there is an outstanding proxy response expected it is not going
  1028. * to arrive. We should thus abort it.
  1029. */
  1030. spin_lock(&mcdi->iface_lock);
  1031. efx_mcdi_proxy_abort(mcdi);
  1032. if (efx_mcdi_complete_sync(mcdi)) {
  1033. if (mcdi->mode == MCDI_MODE_EVENTS) {
  1034. mcdi->resprc = rc;
  1035. mcdi->resp_hdr_len = 0;
  1036. mcdi->resp_data_len = 0;
  1037. ++mcdi->credits;
  1038. }
  1039. } else {
  1040. int count;
  1041. /* Consume the status word since efx_mcdi_rpc_finish() won't */
  1042. for (count = 0; count < MCDI_STATUS_DELAY_COUNT; ++count) {
  1043. rc = efx_mcdi_poll_reboot(efx);
  1044. if (rc)
  1045. break;
  1046. udelay(MCDI_STATUS_DELAY_US);
  1047. }
  1048. /* On EF10, a CODE_MC_REBOOT event can be received without the
  1049. * reboot detection in efx_mcdi_poll_reboot() being triggered.
  1050. * If zero was returned from the final call to
  1051. * efx_mcdi_poll_reboot(), the MC reboot wasn't noticed but the
  1052. * MC has definitely rebooted so prepare for the reset.
  1053. */
  1054. if (!rc && efx->type->mcdi_reboot_detected)
  1055. efx->type->mcdi_reboot_detected(efx);
  1056. mcdi->new_epoch = true;
  1057. /* Nobody was waiting for an MCDI request, so trigger a reset */
  1058. efx_schedule_reset(efx, RESET_TYPE_MC_FAILURE);
  1059. }
  1060. spin_unlock(&mcdi->iface_lock);
  1061. }
  1062. /* The MC is going down in to BIST mode. set the BIST flag to block
  1063. * new MCDI, cancel any outstanding MCDI and schedule a BIST-type reset
  1064. * (which doesn't actually execute a reset, it waits for the controlling
  1065. * function to reset it).
  1066. */
  1067. static void efx_mcdi_ev_bist(struct efx_nic *efx)
  1068. {
  1069. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1070. spin_lock(&mcdi->iface_lock);
  1071. efx->mc_bist_for_other_fn = true;
  1072. efx_mcdi_proxy_abort(mcdi);
  1073. if (efx_mcdi_complete_sync(mcdi)) {
  1074. if (mcdi->mode == MCDI_MODE_EVENTS) {
  1075. mcdi->resprc = -EIO;
  1076. mcdi->resp_hdr_len = 0;
  1077. mcdi->resp_data_len = 0;
  1078. ++mcdi->credits;
  1079. }
  1080. }
  1081. mcdi->new_epoch = true;
  1082. efx_schedule_reset(efx, RESET_TYPE_MC_BIST);
  1083. spin_unlock(&mcdi->iface_lock);
  1084. }
  1085. /* MCDI timeouts seen, so make all MCDI calls fail-fast and issue an FLR to try
  1086. * to recover.
  1087. */
  1088. static void efx_mcdi_abandon(struct efx_nic *efx)
  1089. {
  1090. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1091. if (xchg(&mcdi->mode, MCDI_MODE_FAIL) == MCDI_MODE_FAIL)
  1092. return; /* it had already been done */
  1093. netif_dbg(efx, hw, efx->net_dev, "MCDI is timing out; trying to recover\n");
  1094. efx_schedule_reset(efx, RESET_TYPE_MCDI_TIMEOUT);
  1095. }
  1096. static void efx_handle_drain_event(struct efx_nic *efx)
  1097. {
  1098. if (atomic_dec_and_test(&efx->active_queues))
  1099. wake_up(&efx->flush_wq);
  1100. WARN_ON(atomic_read(&efx->active_queues) < 0);
  1101. }
  1102. /* Called from efx_farch_ev_process and efx_ef10_ev_process for MCDI events */
  1103. void efx_mcdi_process_event(struct efx_channel *channel,
  1104. efx_qword_t *event)
  1105. {
  1106. struct efx_nic *efx = channel->efx;
  1107. int code = EFX_QWORD_FIELD(*event, MCDI_EVENT_CODE);
  1108. u32 data = EFX_QWORD_FIELD(*event, MCDI_EVENT_DATA);
  1109. switch (code) {
  1110. case MCDI_EVENT_CODE_BADSSERT:
  1111. netif_err(efx, hw, efx->net_dev,
  1112. "MC watchdog or assertion failure at 0x%x\n", data);
  1113. efx_mcdi_ev_death(efx, -EINTR);
  1114. break;
  1115. case MCDI_EVENT_CODE_PMNOTICE:
  1116. netif_info(efx, wol, efx->net_dev, "MCDI PM event.\n");
  1117. break;
  1118. case MCDI_EVENT_CODE_CMDDONE:
  1119. efx_mcdi_ev_cpl(efx,
  1120. MCDI_EVENT_FIELD(*event, CMDDONE_SEQ),
  1121. MCDI_EVENT_FIELD(*event, CMDDONE_DATALEN),
  1122. MCDI_EVENT_FIELD(*event, CMDDONE_ERRNO));
  1123. break;
  1124. case MCDI_EVENT_CODE_LINKCHANGE:
  1125. efx_mcdi_process_link_change(efx, event);
  1126. break;
  1127. case MCDI_EVENT_CODE_SENSOREVT:
  1128. efx_sensor_event(efx, event);
  1129. break;
  1130. case MCDI_EVENT_CODE_SCHEDERR:
  1131. netif_dbg(efx, hw, efx->net_dev,
  1132. "MC Scheduler alert (0x%x)\n", data);
  1133. break;
  1134. case MCDI_EVENT_CODE_REBOOT:
  1135. case MCDI_EVENT_CODE_MC_REBOOT:
  1136. netif_info(efx, hw, efx->net_dev, "MC Reboot\n");
  1137. efx_mcdi_ev_death(efx, -EIO);
  1138. break;
  1139. case MCDI_EVENT_CODE_MC_BIST:
  1140. netif_info(efx, hw, efx->net_dev, "MC entered BIST mode\n");
  1141. efx_mcdi_ev_bist(efx);
  1142. break;
  1143. case MCDI_EVENT_CODE_MAC_STATS_DMA:
  1144. /* MAC stats are gather lazily. We can ignore this. */
  1145. break;
  1146. case MCDI_EVENT_CODE_PTP_FAULT:
  1147. case MCDI_EVENT_CODE_PTP_PPS:
  1148. efx_ptp_event(efx, event);
  1149. break;
  1150. case MCDI_EVENT_CODE_PTP_TIME:
  1151. efx_time_sync_event(channel, event);
  1152. break;
  1153. case MCDI_EVENT_CODE_TX_FLUSH:
  1154. case MCDI_EVENT_CODE_RX_FLUSH:
  1155. /* Two flush events will be sent: one to the same event
  1156. * queue as completions, and one to event queue 0.
  1157. * In the latter case the {RX,TX}_FLUSH_TO_DRIVER
  1158. * flag will be set, and we should ignore the event
  1159. * because we want to wait for all completions.
  1160. */
  1161. BUILD_BUG_ON(MCDI_EVENT_TX_FLUSH_TO_DRIVER_LBN !=
  1162. MCDI_EVENT_RX_FLUSH_TO_DRIVER_LBN);
  1163. if (!MCDI_EVENT_FIELD(*event, TX_FLUSH_TO_DRIVER))
  1164. efx_handle_drain_event(efx);
  1165. break;
  1166. case MCDI_EVENT_CODE_TX_ERR:
  1167. case MCDI_EVENT_CODE_RX_ERR:
  1168. netif_err(efx, hw, efx->net_dev,
  1169. "%s DMA error (event: "EFX_QWORD_FMT")\n",
  1170. code == MCDI_EVENT_CODE_TX_ERR ? "TX" : "RX",
  1171. EFX_QWORD_VAL(*event));
  1172. efx_schedule_reset(efx, RESET_TYPE_DMA_ERROR);
  1173. break;
  1174. case MCDI_EVENT_CODE_PROXY_RESPONSE:
  1175. efx_mcdi_ev_proxy_response(efx,
  1176. MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_HANDLE),
  1177. MCDI_EVENT_FIELD(*event, PROXY_RESPONSE_RC));
  1178. break;
  1179. default:
  1180. netif_err(efx, hw, efx->net_dev,
  1181. "Unknown MCDI event " EFX_QWORD_FMT "\n",
  1182. EFX_QWORD_VAL(*event));
  1183. }
  1184. }
  1185. /**************************************************************************
  1186. *
  1187. * Specific request functions
  1188. *
  1189. **************************************************************************
  1190. */
  1191. void efx_mcdi_print_fwver(struct efx_nic *efx, char *buf, size_t len)
  1192. {
  1193. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_VERSION_OUT_LEN);
  1194. size_t outlength;
  1195. const __le16 *ver_words;
  1196. size_t offset;
  1197. int rc;
  1198. BUILD_BUG_ON(MC_CMD_GET_VERSION_IN_LEN != 0);
  1199. rc = efx_mcdi_rpc(efx, MC_CMD_GET_VERSION, NULL, 0,
  1200. outbuf, sizeof(outbuf), &outlength);
  1201. if (rc)
  1202. goto fail;
  1203. if (outlength < MC_CMD_GET_VERSION_OUT_LEN) {
  1204. rc = -EIO;
  1205. goto fail;
  1206. }
  1207. ver_words = (__le16 *)MCDI_PTR(outbuf, GET_VERSION_OUT_VERSION);
  1208. offset = scnprintf(buf, len, "%u.%u.%u.%u",
  1209. le16_to_cpu(ver_words[0]),
  1210. le16_to_cpu(ver_words[1]),
  1211. le16_to_cpu(ver_words[2]),
  1212. le16_to_cpu(ver_words[3]));
  1213. if (efx->type->print_additional_fwver)
  1214. offset += efx->type->print_additional_fwver(efx, buf + offset,
  1215. len - offset);
  1216. /* It's theoretically possible for the string to exceed 31
  1217. * characters, though in practice the first three version
  1218. * components are short enough that this doesn't happen.
  1219. */
  1220. if (WARN_ON(offset >= len))
  1221. buf[0] = 0;
  1222. return;
  1223. fail:
  1224. pci_err(efx->pci_dev, "%s: failed rc=%d\n", __func__, rc);
  1225. buf[0] = 0;
  1226. }
  1227. static int efx_mcdi_drv_attach(struct efx_nic *efx, bool driver_operating,
  1228. bool *was_attached)
  1229. {
  1230. MCDI_DECLARE_BUF(inbuf, MC_CMD_DRV_ATTACH_IN_LEN);
  1231. MCDI_DECLARE_BUF(outbuf, MC_CMD_DRV_ATTACH_EXT_OUT_LEN);
  1232. size_t outlen;
  1233. int rc;
  1234. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_NEW_STATE,
  1235. driver_operating ? 1 : 0);
  1236. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_UPDATE, 1);
  1237. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID, MC_CMD_FW_LOW_LATENCY);
  1238. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf, sizeof(inbuf),
  1239. outbuf, sizeof(outbuf), &outlen);
  1240. /* If we're not the primary PF, trying to ATTACH with a FIRMWARE_ID
  1241. * specified will fail with EPERM, and we have to tell the MC we don't
  1242. * care what firmware we get.
  1243. */
  1244. if (rc == -EPERM) {
  1245. pci_dbg(efx->pci_dev,
  1246. "%s with fw-variant setting failed EPERM, trying without it\n",
  1247. __func__);
  1248. MCDI_SET_DWORD(inbuf, DRV_ATTACH_IN_FIRMWARE_ID,
  1249. MC_CMD_FW_DONT_CARE);
  1250. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_DRV_ATTACH, inbuf,
  1251. sizeof(inbuf), outbuf, sizeof(outbuf),
  1252. &outlen);
  1253. }
  1254. if (rc) {
  1255. efx_mcdi_display_error(efx, MC_CMD_DRV_ATTACH, sizeof(inbuf),
  1256. outbuf, outlen, rc);
  1257. goto fail;
  1258. }
  1259. if (outlen < MC_CMD_DRV_ATTACH_OUT_LEN) {
  1260. rc = -EIO;
  1261. goto fail;
  1262. }
  1263. if (driver_operating) {
  1264. if (outlen >= MC_CMD_DRV_ATTACH_EXT_OUT_LEN) {
  1265. efx->mcdi->fn_flags =
  1266. MCDI_DWORD(outbuf,
  1267. DRV_ATTACH_EXT_OUT_FUNC_FLAGS);
  1268. } else {
  1269. /* Synthesise flags for Siena */
  1270. efx->mcdi->fn_flags =
  1271. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_LINKCTRL |
  1272. 1 << MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_TRUSTED |
  1273. (efx_port_num(efx) == 0) <<
  1274. MC_CMD_DRV_ATTACH_EXT_OUT_FLAG_PRIMARY;
  1275. }
  1276. }
  1277. /* We currently assume we have control of the external link
  1278. * and are completely trusted by firmware. Abort probing
  1279. * if that's not true for this function.
  1280. */
  1281. if (was_attached != NULL)
  1282. *was_attached = MCDI_DWORD(outbuf, DRV_ATTACH_OUT_OLD_STATE);
  1283. return 0;
  1284. fail:
  1285. pci_err(efx->pci_dev, "%s: failed rc=%d\n", __func__, rc);
  1286. return rc;
  1287. }
  1288. int efx_mcdi_get_board_cfg(struct efx_nic *efx, u8 *mac_address,
  1289. u16 *fw_subtype_list, u32 *capabilities)
  1290. {
  1291. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
  1292. size_t outlen, i;
  1293. int port_num = efx_port_num(efx);
  1294. int rc;
  1295. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_IN_LEN != 0);
  1296. /* we need __aligned(2) for ether_addr_copy */
  1297. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0_OFST & 1);
  1298. BUILD_BUG_ON(MC_CMD_GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1_OFST & 1);
  1299. rc = efx_mcdi_rpc(efx, MC_CMD_GET_BOARD_CFG, NULL, 0,
  1300. outbuf, sizeof(outbuf), &outlen);
  1301. if (rc)
  1302. goto fail;
  1303. if (outlen < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
  1304. rc = -EIO;
  1305. goto fail;
  1306. }
  1307. if (mac_address)
  1308. ether_addr_copy(mac_address,
  1309. port_num ?
  1310. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT1) :
  1311. MCDI_PTR(outbuf, GET_BOARD_CFG_OUT_MAC_ADDR_BASE_PORT0));
  1312. if (fw_subtype_list) {
  1313. for (i = 0;
  1314. i < MCDI_VAR_ARRAY_LEN(outlen,
  1315. GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
  1316. i++)
  1317. fw_subtype_list[i] = MCDI_ARRAY_WORD(
  1318. outbuf, GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST, i);
  1319. for (; i < MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_MAXNUM; i++)
  1320. fw_subtype_list[i] = 0;
  1321. }
  1322. if (capabilities) {
  1323. if (port_num)
  1324. *capabilities = MCDI_DWORD(outbuf,
  1325. GET_BOARD_CFG_OUT_CAPABILITIES_PORT1);
  1326. else
  1327. *capabilities = MCDI_DWORD(outbuf,
  1328. GET_BOARD_CFG_OUT_CAPABILITIES_PORT0);
  1329. }
  1330. return 0;
  1331. fail:
  1332. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d len=%d\n",
  1333. __func__, rc, (int)outlen);
  1334. return rc;
  1335. }
  1336. int efx_mcdi_log_ctrl(struct efx_nic *efx, bool evq, bool uart, u32 dest_evq)
  1337. {
  1338. MCDI_DECLARE_BUF(inbuf, MC_CMD_LOG_CTRL_IN_LEN);
  1339. u32 dest = 0;
  1340. int rc;
  1341. if (uart)
  1342. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_UART;
  1343. if (evq)
  1344. dest |= MC_CMD_LOG_CTRL_IN_LOG_DEST_EVQ;
  1345. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST, dest);
  1346. MCDI_SET_DWORD(inbuf, LOG_CTRL_IN_LOG_DEST_EVQ, dest_evq);
  1347. BUILD_BUG_ON(MC_CMD_LOG_CTRL_OUT_LEN != 0);
  1348. rc = efx_mcdi_rpc(efx, MC_CMD_LOG_CTRL, inbuf, sizeof(inbuf),
  1349. NULL, 0, NULL);
  1350. return rc;
  1351. }
  1352. int efx_mcdi_nvram_types(struct efx_nic *efx, u32 *nvram_types_out)
  1353. {
  1354. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TYPES_OUT_LEN);
  1355. size_t outlen;
  1356. int rc;
  1357. BUILD_BUG_ON(MC_CMD_NVRAM_TYPES_IN_LEN != 0);
  1358. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TYPES, NULL, 0,
  1359. outbuf, sizeof(outbuf), &outlen);
  1360. if (rc)
  1361. goto fail;
  1362. if (outlen < MC_CMD_NVRAM_TYPES_OUT_LEN) {
  1363. rc = -EIO;
  1364. goto fail;
  1365. }
  1366. *nvram_types_out = MCDI_DWORD(outbuf, NVRAM_TYPES_OUT_TYPES);
  1367. return 0;
  1368. fail:
  1369. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n",
  1370. __func__, rc);
  1371. return rc;
  1372. }
  1373. /* This function finds types using the new NVRAM_PARTITIONS mcdi. */
  1374. static int efx_new_mcdi_nvram_types(struct efx_nic *efx, u32 *number,
  1375. u32 *nvram_types)
  1376. {
  1377. efx_dword_t *outbuf = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2,
  1378. GFP_KERNEL);
  1379. size_t outlen;
  1380. int rc;
  1381. if (!outbuf)
  1382. return -ENOMEM;
  1383. BUILD_BUG_ON(MC_CMD_NVRAM_PARTITIONS_IN_LEN != 0);
  1384. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_PARTITIONS, NULL, 0,
  1385. outbuf, MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2, &outlen);
  1386. if (rc)
  1387. goto fail;
  1388. *number = MCDI_DWORD(outbuf, NVRAM_PARTITIONS_OUT_NUM_PARTITIONS);
  1389. memcpy(nvram_types, MCDI_PTR(outbuf, NVRAM_PARTITIONS_OUT_TYPE_ID),
  1390. *number * sizeof(u32));
  1391. fail:
  1392. kfree(outbuf);
  1393. return rc;
  1394. }
  1395. #define EFX_MCDI_NVRAM_DEFAULT_WRITE_LEN 128
  1396. int efx_mcdi_nvram_info(struct efx_nic *efx, unsigned int type,
  1397. size_t *size_out, size_t *erase_size_out,
  1398. size_t *write_size_out, bool *protected_out)
  1399. {
  1400. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_INFO_IN_LEN);
  1401. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_INFO_V2_OUT_LEN);
  1402. size_t write_size = 0;
  1403. size_t outlen;
  1404. int rc;
  1405. MCDI_SET_DWORD(inbuf, NVRAM_INFO_IN_TYPE, type);
  1406. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_INFO, inbuf, sizeof(inbuf),
  1407. outbuf, sizeof(outbuf), &outlen);
  1408. if (rc)
  1409. goto fail;
  1410. if (outlen < MC_CMD_NVRAM_INFO_OUT_LEN) {
  1411. rc = -EIO;
  1412. goto fail;
  1413. }
  1414. if (outlen >= MC_CMD_NVRAM_INFO_V2_OUT_LEN)
  1415. write_size = MCDI_DWORD(outbuf, NVRAM_INFO_V2_OUT_WRITESIZE);
  1416. else
  1417. write_size = EFX_MCDI_NVRAM_DEFAULT_WRITE_LEN;
  1418. *write_size_out = write_size;
  1419. *size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_SIZE);
  1420. *erase_size_out = MCDI_DWORD(outbuf, NVRAM_INFO_OUT_ERASESIZE);
  1421. *protected_out = !!(MCDI_DWORD(outbuf, NVRAM_INFO_OUT_FLAGS) &
  1422. (1 << MC_CMD_NVRAM_INFO_OUT_PROTECTED_LBN));
  1423. return 0;
  1424. fail:
  1425. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1426. return rc;
  1427. }
  1428. static int efx_mcdi_nvram_test(struct efx_nic *efx, unsigned int type)
  1429. {
  1430. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_TEST_IN_LEN);
  1431. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_TEST_OUT_LEN);
  1432. int rc;
  1433. MCDI_SET_DWORD(inbuf, NVRAM_TEST_IN_TYPE, type);
  1434. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_TEST, inbuf, sizeof(inbuf),
  1435. outbuf, sizeof(outbuf), NULL);
  1436. if (rc)
  1437. return rc;
  1438. switch (MCDI_DWORD(outbuf, NVRAM_TEST_OUT_RESULT)) {
  1439. case MC_CMD_NVRAM_TEST_PASS:
  1440. case MC_CMD_NVRAM_TEST_NOTSUPP:
  1441. return 0;
  1442. default:
  1443. return -EIO;
  1444. }
  1445. }
  1446. /* This function tests nvram partitions using the new mcdi partition lookup scheme */
  1447. int efx_new_mcdi_nvram_test_all(struct efx_nic *efx)
  1448. {
  1449. u32 *nvram_types = kzalloc(MC_CMD_NVRAM_PARTITIONS_OUT_LENMAX_MCDI2,
  1450. GFP_KERNEL);
  1451. unsigned int number;
  1452. int rc, i;
  1453. if (!nvram_types)
  1454. return -ENOMEM;
  1455. rc = efx_new_mcdi_nvram_types(efx, &number, nvram_types);
  1456. if (rc)
  1457. goto fail;
  1458. /* Require at least one check */
  1459. rc = -EAGAIN;
  1460. for (i = 0; i < number; i++) {
  1461. if (nvram_types[i] == NVRAM_PARTITION_TYPE_PARTITION_MAP ||
  1462. nvram_types[i] == NVRAM_PARTITION_TYPE_DYNAMIC_CONFIG)
  1463. continue;
  1464. rc = efx_mcdi_nvram_test(efx, nvram_types[i]);
  1465. if (rc)
  1466. goto fail;
  1467. }
  1468. fail:
  1469. kfree(nvram_types);
  1470. return rc;
  1471. }
  1472. int efx_mcdi_nvram_test_all(struct efx_nic *efx)
  1473. {
  1474. u32 nvram_types;
  1475. unsigned int type;
  1476. int rc;
  1477. rc = efx_mcdi_nvram_types(efx, &nvram_types);
  1478. if (rc)
  1479. goto fail1;
  1480. type = 0;
  1481. while (nvram_types != 0) {
  1482. if (nvram_types & 1) {
  1483. rc = efx_mcdi_nvram_test(efx, type);
  1484. if (rc)
  1485. goto fail2;
  1486. }
  1487. type++;
  1488. nvram_types >>= 1;
  1489. }
  1490. return 0;
  1491. fail2:
  1492. netif_err(efx, hw, efx->net_dev, "%s: failed type=%u\n",
  1493. __func__, type);
  1494. fail1:
  1495. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1496. return rc;
  1497. }
  1498. /* Returns 1 if an assertion was read, 0 if no assertion had fired,
  1499. * negative on error.
  1500. */
  1501. static int efx_mcdi_read_assertion(struct efx_nic *efx)
  1502. {
  1503. MCDI_DECLARE_BUF(inbuf, MC_CMD_GET_ASSERTS_IN_LEN);
  1504. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_ASSERTS_OUT_LEN);
  1505. unsigned int flags, index;
  1506. const char *reason;
  1507. size_t outlen;
  1508. int retry;
  1509. int rc;
  1510. /* Attempt to read any stored assertion state before we reboot
  1511. * the mcfw out of the assertion handler. Retry twice, once
  1512. * because a boot-time assertion might cause this command to fail
  1513. * with EINTR. And once again because GET_ASSERTS can race with
  1514. * MC_CMD_REBOOT running on the other port. */
  1515. retry = 2;
  1516. do {
  1517. MCDI_SET_DWORD(inbuf, GET_ASSERTS_IN_CLEAR, 1);
  1518. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_ASSERTS,
  1519. inbuf, MC_CMD_GET_ASSERTS_IN_LEN,
  1520. outbuf, sizeof(outbuf), &outlen);
  1521. if (rc == -EPERM)
  1522. return 0;
  1523. } while ((rc == -EINTR || rc == -EIO) && retry-- > 0);
  1524. if (rc) {
  1525. efx_mcdi_display_error(efx, MC_CMD_GET_ASSERTS,
  1526. MC_CMD_GET_ASSERTS_IN_LEN, outbuf,
  1527. outlen, rc);
  1528. return rc;
  1529. }
  1530. if (outlen < MC_CMD_GET_ASSERTS_OUT_LEN)
  1531. return -EIO;
  1532. /* Print out any recorded assertion state */
  1533. flags = MCDI_DWORD(outbuf, GET_ASSERTS_OUT_GLOBAL_FLAGS);
  1534. if (flags == MC_CMD_GET_ASSERTS_FLAGS_NO_FAILS)
  1535. return 0;
  1536. reason = (flags == MC_CMD_GET_ASSERTS_FLAGS_SYS_FAIL)
  1537. ? "system-level assertion"
  1538. : (flags == MC_CMD_GET_ASSERTS_FLAGS_THR_FAIL)
  1539. ? "thread-level assertion"
  1540. : (flags == MC_CMD_GET_ASSERTS_FLAGS_WDOG_FIRED)
  1541. ? "watchdog reset"
  1542. : "unknown assertion";
  1543. netif_err(efx, hw, efx->net_dev,
  1544. "MCPU %s at PC = 0x%.8x in thread 0x%.8x\n", reason,
  1545. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_SAVED_PC_OFFS),
  1546. MCDI_DWORD(outbuf, GET_ASSERTS_OUT_THREAD_OFFS));
  1547. /* Print out the registers */
  1548. for (index = 0;
  1549. index < MC_CMD_GET_ASSERTS_OUT_GP_REGS_OFFS_NUM;
  1550. index++)
  1551. netif_err(efx, hw, efx->net_dev, "R%.2d (?): 0x%.8x\n",
  1552. 1 + index,
  1553. MCDI_ARRAY_DWORD(outbuf, GET_ASSERTS_OUT_GP_REGS_OFFS,
  1554. index));
  1555. return 1;
  1556. }
  1557. static int efx_mcdi_exit_assertion(struct efx_nic *efx)
  1558. {
  1559. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1560. int rc;
  1561. /* If the MC is running debug firmware, it might now be
  1562. * waiting for a debugger to attach, but we just want it to
  1563. * reboot. We set a flag that makes the command a no-op if it
  1564. * has already done so.
  1565. * The MCDI will thus return either 0 or -EIO.
  1566. */
  1567. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1568. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS,
  1569. MC_CMD_REBOOT_FLAGS_AFTER_ASSERTION);
  1570. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_REBOOT, inbuf, MC_CMD_REBOOT_IN_LEN,
  1571. NULL, 0, NULL);
  1572. if (rc == -EIO)
  1573. rc = 0;
  1574. if (rc)
  1575. efx_mcdi_display_error(efx, MC_CMD_REBOOT, MC_CMD_REBOOT_IN_LEN,
  1576. NULL, 0, rc);
  1577. return rc;
  1578. }
  1579. int efx_mcdi_handle_assertion(struct efx_nic *efx)
  1580. {
  1581. int rc;
  1582. rc = efx_mcdi_read_assertion(efx);
  1583. if (rc <= 0)
  1584. return rc;
  1585. return efx_mcdi_exit_assertion(efx);
  1586. }
  1587. int efx_mcdi_set_id_led(struct efx_nic *efx, enum efx_led_mode mode)
  1588. {
  1589. MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_ID_LED_IN_LEN);
  1590. BUILD_BUG_ON(EFX_LED_OFF != MC_CMD_LED_OFF);
  1591. BUILD_BUG_ON(EFX_LED_ON != MC_CMD_LED_ON);
  1592. BUILD_BUG_ON(EFX_LED_DEFAULT != MC_CMD_LED_DEFAULT);
  1593. BUILD_BUG_ON(MC_CMD_SET_ID_LED_OUT_LEN != 0);
  1594. MCDI_SET_DWORD(inbuf, SET_ID_LED_IN_STATE, mode);
  1595. return efx_mcdi_rpc(efx, MC_CMD_SET_ID_LED, inbuf, sizeof(inbuf), NULL, 0, NULL);
  1596. }
  1597. static int efx_mcdi_reset_func(struct efx_nic *efx)
  1598. {
  1599. MCDI_DECLARE_BUF(inbuf, MC_CMD_ENTITY_RESET_IN_LEN);
  1600. int rc;
  1601. BUILD_BUG_ON(MC_CMD_ENTITY_RESET_OUT_LEN != 0);
  1602. MCDI_POPULATE_DWORD_1(inbuf, ENTITY_RESET_IN_FLAG,
  1603. ENTITY_RESET_IN_FUNCTION_RESOURCE_RESET, 1);
  1604. rc = efx_mcdi_rpc(efx, MC_CMD_ENTITY_RESET, inbuf, sizeof(inbuf),
  1605. NULL, 0, NULL);
  1606. return rc;
  1607. }
  1608. static int efx_mcdi_reset_mc(struct efx_nic *efx)
  1609. {
  1610. MCDI_DECLARE_BUF(inbuf, MC_CMD_REBOOT_IN_LEN);
  1611. int rc;
  1612. BUILD_BUG_ON(MC_CMD_REBOOT_OUT_LEN != 0);
  1613. MCDI_SET_DWORD(inbuf, REBOOT_IN_FLAGS, 0);
  1614. rc = efx_mcdi_rpc(efx, MC_CMD_REBOOT, inbuf, sizeof(inbuf),
  1615. NULL, 0, NULL);
  1616. /* White is black, and up is down */
  1617. if (rc == -EIO)
  1618. return 0;
  1619. if (rc == 0)
  1620. rc = -EIO;
  1621. return rc;
  1622. }
  1623. enum reset_type efx_mcdi_map_reset_reason(enum reset_type reason)
  1624. {
  1625. return RESET_TYPE_RECOVER_OR_ALL;
  1626. }
  1627. int efx_mcdi_reset(struct efx_nic *efx, enum reset_type method)
  1628. {
  1629. int rc;
  1630. /* If MCDI is down, we can't handle_assertion */
  1631. if (method == RESET_TYPE_MCDI_TIMEOUT) {
  1632. rc = pci_reset_function(efx->pci_dev);
  1633. if (rc)
  1634. return rc;
  1635. /* Re-enable polled MCDI completion */
  1636. if (efx->mcdi) {
  1637. struct efx_mcdi_iface *mcdi = efx_mcdi(efx);
  1638. mcdi->mode = MCDI_MODE_POLL;
  1639. }
  1640. return 0;
  1641. }
  1642. /* Recover from a failed assertion pre-reset */
  1643. rc = efx_mcdi_handle_assertion(efx);
  1644. if (rc)
  1645. return rc;
  1646. if (method == RESET_TYPE_DATAPATH)
  1647. return 0;
  1648. else if (method == RESET_TYPE_WORLD)
  1649. return efx_mcdi_reset_mc(efx);
  1650. else
  1651. return efx_mcdi_reset_func(efx);
  1652. }
  1653. static int efx_mcdi_wol_filter_set(struct efx_nic *efx, u32 type,
  1654. const u8 *mac, int *id_out)
  1655. {
  1656. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_SET_IN_LEN);
  1657. MCDI_DECLARE_BUF(outbuf, MC_CMD_WOL_FILTER_SET_OUT_LEN);
  1658. size_t outlen;
  1659. int rc;
  1660. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_WOL_TYPE, type);
  1661. MCDI_SET_DWORD(inbuf, WOL_FILTER_SET_IN_FILTER_MODE,
  1662. MC_CMD_FILTER_MODE_SIMPLE);
  1663. ether_addr_copy(MCDI_PTR(inbuf, WOL_FILTER_SET_IN_MAGIC_MAC), mac);
  1664. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_SET, inbuf, sizeof(inbuf),
  1665. outbuf, sizeof(outbuf), &outlen);
  1666. if (rc)
  1667. goto fail;
  1668. if (outlen < MC_CMD_WOL_FILTER_SET_OUT_LEN) {
  1669. rc = -EIO;
  1670. goto fail;
  1671. }
  1672. *id_out = (int)MCDI_DWORD(outbuf, WOL_FILTER_SET_OUT_FILTER_ID);
  1673. return 0;
  1674. fail:
  1675. *id_out = -1;
  1676. netif_err(efx, hw, efx->net_dev, "%s: failed rc=%d\n", __func__, rc);
  1677. return rc;
  1678. }
  1679. int
  1680. efx_mcdi_wol_filter_set_magic(struct efx_nic *efx, const u8 *mac, int *id_out)
  1681. {
  1682. return efx_mcdi_wol_filter_set(efx, MC_CMD_WOL_TYPE_MAGIC, mac, id_out);
  1683. }
  1684. int efx_mcdi_wol_filter_remove(struct efx_nic *efx, int id)
  1685. {
  1686. MCDI_DECLARE_BUF(inbuf, MC_CMD_WOL_FILTER_REMOVE_IN_LEN);
  1687. int rc;
  1688. MCDI_SET_DWORD(inbuf, WOL_FILTER_REMOVE_IN_FILTER_ID, (u32)id);
  1689. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_REMOVE, inbuf, sizeof(inbuf),
  1690. NULL, 0, NULL);
  1691. return rc;
  1692. }
  1693. int efx_mcdi_wol_filter_reset(struct efx_nic *efx)
  1694. {
  1695. int rc;
  1696. rc = efx_mcdi_rpc(efx, MC_CMD_WOL_FILTER_RESET, NULL, 0, NULL, 0, NULL);
  1697. return rc;
  1698. }
  1699. int efx_mcdi_set_workaround(struct efx_nic *efx, u32 type, bool enabled,
  1700. unsigned int *flags)
  1701. {
  1702. MCDI_DECLARE_BUF(inbuf, MC_CMD_WORKAROUND_IN_LEN);
  1703. MCDI_DECLARE_BUF(outbuf, MC_CMD_WORKAROUND_EXT_OUT_LEN);
  1704. size_t outlen;
  1705. int rc;
  1706. BUILD_BUG_ON(MC_CMD_WORKAROUND_OUT_LEN != 0);
  1707. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_TYPE, type);
  1708. MCDI_SET_DWORD(inbuf, WORKAROUND_IN_ENABLED, enabled);
  1709. rc = efx_mcdi_rpc(efx, MC_CMD_WORKAROUND, inbuf, sizeof(inbuf),
  1710. outbuf, sizeof(outbuf), &outlen);
  1711. if (rc)
  1712. return rc;
  1713. if (!flags)
  1714. return 0;
  1715. if (outlen >= MC_CMD_WORKAROUND_EXT_OUT_LEN)
  1716. *flags = MCDI_DWORD(outbuf, WORKAROUND_EXT_OUT_FLAGS);
  1717. else
  1718. *flags = 0;
  1719. return 0;
  1720. }
  1721. int efx_mcdi_get_workarounds(struct efx_nic *efx, unsigned int *impl_out,
  1722. unsigned int *enabled_out)
  1723. {
  1724. MCDI_DECLARE_BUF(outbuf, MC_CMD_GET_WORKAROUNDS_OUT_LEN);
  1725. size_t outlen;
  1726. int rc;
  1727. rc = efx_mcdi_rpc(efx, MC_CMD_GET_WORKAROUNDS, NULL, 0,
  1728. outbuf, sizeof(outbuf), &outlen);
  1729. if (rc)
  1730. goto fail;
  1731. if (outlen < MC_CMD_GET_WORKAROUNDS_OUT_LEN) {
  1732. rc = -EIO;
  1733. goto fail;
  1734. }
  1735. if (impl_out)
  1736. *impl_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_IMPLEMENTED);
  1737. if (enabled_out)
  1738. *enabled_out = MCDI_DWORD(outbuf, GET_WORKAROUNDS_OUT_ENABLED);
  1739. return 0;
  1740. fail:
  1741. /* Older firmware lacks GET_WORKAROUNDS and this isn't especially
  1742. * terrifying. The call site will have to deal with it though.
  1743. */
  1744. netif_cond_dbg(efx, hw, efx->net_dev, rc == -ENOSYS, err,
  1745. "%s: failed rc=%d\n", __func__, rc);
  1746. return rc;
  1747. }
  1748. /* Failure to read a privilege mask is never fatal, because we can always
  1749. * carry on as though we didn't have the privilege we were interested in.
  1750. * So use efx_mcdi_rpc_quiet().
  1751. */
  1752. int efx_mcdi_get_privilege_mask(struct efx_nic *efx, u32 *mask)
  1753. {
  1754. MCDI_DECLARE_BUF(fi_outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN);
  1755. MCDI_DECLARE_BUF(pm_inbuf, MC_CMD_PRIVILEGE_MASK_IN_LEN);
  1756. MCDI_DECLARE_BUF(pm_outbuf, MC_CMD_PRIVILEGE_MASK_OUT_LEN);
  1757. size_t outlen;
  1758. u16 pf, vf;
  1759. int rc;
  1760. if (!efx || !mask)
  1761. return -EINVAL;
  1762. /* Get our function number */
  1763. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_GET_FUNCTION_INFO, NULL, 0,
  1764. fi_outbuf, MC_CMD_GET_FUNCTION_INFO_OUT_LEN,
  1765. &outlen);
  1766. if (rc != 0)
  1767. return rc;
  1768. if (outlen < MC_CMD_GET_FUNCTION_INFO_OUT_LEN)
  1769. return -EIO;
  1770. pf = MCDI_DWORD(fi_outbuf, GET_FUNCTION_INFO_OUT_PF);
  1771. vf = MCDI_DWORD(fi_outbuf, GET_FUNCTION_INFO_OUT_VF);
  1772. MCDI_POPULATE_DWORD_2(pm_inbuf, PRIVILEGE_MASK_IN_FUNCTION,
  1773. PRIVILEGE_MASK_IN_FUNCTION_PF, pf,
  1774. PRIVILEGE_MASK_IN_FUNCTION_VF, vf);
  1775. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_PRIVILEGE_MASK,
  1776. pm_inbuf, sizeof(pm_inbuf),
  1777. pm_outbuf, sizeof(pm_outbuf), &outlen);
  1778. if (rc != 0)
  1779. return rc;
  1780. if (outlen < MC_CMD_PRIVILEGE_MASK_OUT_LEN)
  1781. return -EIO;
  1782. *mask = MCDI_DWORD(pm_outbuf, PRIVILEGE_MASK_OUT_OLD_MASK);
  1783. return 0;
  1784. }
  1785. int efx_mcdi_nvram_metadata(struct efx_nic *efx, unsigned int type,
  1786. u32 *subtype, u16 version[4], char *desc,
  1787. size_t descsize)
  1788. {
  1789. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_METADATA_IN_LEN);
  1790. efx_dword_t *outbuf;
  1791. size_t outlen;
  1792. u32 flags;
  1793. int rc;
  1794. outbuf = kzalloc(MC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2, GFP_KERNEL);
  1795. if (!outbuf)
  1796. return -ENOMEM;
  1797. MCDI_SET_DWORD(inbuf, NVRAM_METADATA_IN_TYPE, type);
  1798. rc = efx_mcdi_rpc_quiet(efx, MC_CMD_NVRAM_METADATA, inbuf,
  1799. sizeof(inbuf), outbuf,
  1800. MC_CMD_NVRAM_METADATA_OUT_LENMAX_MCDI2,
  1801. &outlen);
  1802. if (rc)
  1803. goto out_free;
  1804. if (outlen < MC_CMD_NVRAM_METADATA_OUT_LENMIN) {
  1805. rc = -EIO;
  1806. goto out_free;
  1807. }
  1808. flags = MCDI_DWORD(outbuf, NVRAM_METADATA_OUT_FLAGS);
  1809. if (desc && descsize > 0) {
  1810. if (flags & BIT(MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_VALID_LBN)) {
  1811. if (descsize <=
  1812. MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(outlen)) {
  1813. rc = -E2BIG;
  1814. goto out_free;
  1815. }
  1816. strscpy(desc,
  1817. MCDI_PTR(outbuf, NVRAM_METADATA_OUT_DESCRIPTION),
  1818. MC_CMD_NVRAM_METADATA_OUT_DESCRIPTION_NUM(outlen));
  1819. } else {
  1820. desc[0] = '\0';
  1821. }
  1822. }
  1823. if (subtype) {
  1824. if (flags & BIT(MC_CMD_NVRAM_METADATA_OUT_SUBTYPE_VALID_LBN))
  1825. *subtype = MCDI_DWORD(outbuf, NVRAM_METADATA_OUT_SUBTYPE);
  1826. else
  1827. *subtype = 0;
  1828. }
  1829. if (version) {
  1830. if (flags & BIT(MC_CMD_NVRAM_METADATA_OUT_VERSION_VALID_LBN)) {
  1831. version[0] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_W);
  1832. version[1] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_X);
  1833. version[2] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_Y);
  1834. version[3] = MCDI_WORD(outbuf, NVRAM_METADATA_OUT_VERSION_Z);
  1835. } else {
  1836. version[0] = 0;
  1837. version[1] = 0;
  1838. version[2] = 0;
  1839. version[3] = 0;
  1840. }
  1841. }
  1842. out_free:
  1843. kfree(outbuf);
  1844. return rc;
  1845. }
  1846. #define EFX_MCDI_NVRAM_LEN_MAX 128
  1847. int efx_mcdi_nvram_update_start(struct efx_nic *efx, unsigned int type)
  1848. {
  1849. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_START_V2_IN_LEN);
  1850. int rc;
  1851. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_START_IN_TYPE, type);
  1852. MCDI_POPULATE_DWORD_1(inbuf, NVRAM_UPDATE_START_V2_IN_FLAGS,
  1853. NVRAM_UPDATE_START_V2_IN_FLAG_REPORT_VERIFY_RESULT,
  1854. 1);
  1855. BUILD_BUG_ON(MC_CMD_NVRAM_UPDATE_START_OUT_LEN != 0);
  1856. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_START, inbuf, sizeof(inbuf),
  1857. NULL, 0, NULL);
  1858. return rc;
  1859. }
  1860. #ifdef CONFIG_SFC_MTD
  1861. static int efx_mcdi_nvram_read(struct efx_nic *efx, unsigned int type,
  1862. loff_t offset, u8 *buffer, size_t length)
  1863. {
  1864. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_READ_IN_V2_LEN);
  1865. MCDI_DECLARE_BUF(outbuf,
  1866. MC_CMD_NVRAM_READ_OUT_LEN(EFX_MCDI_NVRAM_LEN_MAX));
  1867. size_t outlen;
  1868. int rc;
  1869. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_TYPE, type);
  1870. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_OFFSET, offset);
  1871. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_LENGTH, length);
  1872. MCDI_SET_DWORD(inbuf, NVRAM_READ_IN_V2_MODE,
  1873. MC_CMD_NVRAM_READ_IN_V2_DEFAULT);
  1874. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_READ, inbuf, sizeof(inbuf),
  1875. outbuf, sizeof(outbuf), &outlen);
  1876. if (rc)
  1877. return rc;
  1878. memcpy(buffer, MCDI_PTR(outbuf, NVRAM_READ_OUT_READ_BUFFER), length);
  1879. return 0;
  1880. }
  1881. #endif /* CONFIG_SFC_MTD */
  1882. int efx_mcdi_nvram_write(struct efx_nic *efx, unsigned int type,
  1883. loff_t offset, const u8 *buffer, size_t length)
  1884. {
  1885. efx_dword_t *inbuf;
  1886. size_t inlen;
  1887. int rc;
  1888. inlen = ALIGN(MC_CMD_NVRAM_WRITE_IN_LEN(length), 4);
  1889. inbuf = kzalloc(inlen, GFP_KERNEL);
  1890. if (!inbuf)
  1891. return -ENOMEM;
  1892. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_TYPE, type);
  1893. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_OFFSET, offset);
  1894. MCDI_SET_DWORD(inbuf, NVRAM_WRITE_IN_LENGTH, length);
  1895. memcpy(MCDI_PTR(inbuf, NVRAM_WRITE_IN_WRITE_BUFFER), buffer, length);
  1896. BUILD_BUG_ON(MC_CMD_NVRAM_WRITE_OUT_LEN != 0);
  1897. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_WRITE, inbuf, inlen, NULL, 0, NULL);
  1898. kfree(inbuf);
  1899. return rc;
  1900. }
  1901. int efx_mcdi_nvram_erase(struct efx_nic *efx, unsigned int type, loff_t offset,
  1902. size_t length)
  1903. {
  1904. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_ERASE_IN_LEN);
  1905. int rc;
  1906. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_TYPE, type);
  1907. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_OFFSET, offset);
  1908. MCDI_SET_DWORD(inbuf, NVRAM_ERASE_IN_LENGTH, length);
  1909. BUILD_BUG_ON(MC_CMD_NVRAM_ERASE_OUT_LEN != 0);
  1910. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_ERASE, inbuf, sizeof(inbuf),
  1911. NULL, 0, NULL);
  1912. return rc;
  1913. }
  1914. int efx_mcdi_nvram_update_finish(struct efx_nic *efx, unsigned int type,
  1915. enum efx_update_finish_mode mode)
  1916. {
  1917. MCDI_DECLARE_BUF(inbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_IN_LEN);
  1918. MCDI_DECLARE_BUF(outbuf, MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN);
  1919. size_t outlen;
  1920. int rc, rc2;
  1921. MCDI_SET_DWORD(inbuf, NVRAM_UPDATE_FINISH_IN_TYPE, type);
  1922. /* Old firmware doesn't support background update finish and abort
  1923. * operations. Fallback to waiting if the requested mode is not
  1924. * supported.
  1925. */
  1926. if (!efx_has_cap(efx, NVRAM_UPDATE_POLL_VERIFY_RESULT) ||
  1927. (!efx_has_cap(efx, NVRAM_UPDATE_ABORT_SUPPORTED) &&
  1928. mode == EFX_UPDATE_FINISH_ABORT))
  1929. mode = EFX_UPDATE_FINISH_WAIT;
  1930. MCDI_POPULATE_DWORD_4(inbuf, NVRAM_UPDATE_FINISH_V2_IN_FLAGS,
  1931. NVRAM_UPDATE_FINISH_V2_IN_FLAG_REPORT_VERIFY_RESULT,
  1932. (mode != EFX_UPDATE_FINISH_ABORT),
  1933. NVRAM_UPDATE_FINISH_V2_IN_FLAG_RUN_IN_BACKGROUND,
  1934. (mode == EFX_UPDATE_FINISH_BACKGROUND),
  1935. NVRAM_UPDATE_FINISH_V2_IN_FLAG_POLL_VERIFY_RESULT,
  1936. (mode == EFX_UPDATE_FINISH_POLL),
  1937. NVRAM_UPDATE_FINISH_V2_IN_FLAG_ABORT,
  1938. (mode == EFX_UPDATE_FINISH_ABORT));
  1939. rc = efx_mcdi_rpc(efx, MC_CMD_NVRAM_UPDATE_FINISH, inbuf, sizeof(inbuf),
  1940. outbuf, sizeof(outbuf), &outlen);
  1941. if (!rc && outlen >= MC_CMD_NVRAM_UPDATE_FINISH_V2_OUT_LEN) {
  1942. rc2 = MCDI_DWORD(outbuf, NVRAM_UPDATE_FINISH_V2_OUT_RESULT_CODE);
  1943. if (rc2 != MC_CMD_NVRAM_VERIFY_RC_SUCCESS &&
  1944. rc2 != MC_CMD_NVRAM_VERIFY_RC_PENDING)
  1945. netif_err(efx, drv, efx->net_dev,
  1946. "NVRAM update failed verification with code 0x%x\n",
  1947. rc2);
  1948. switch (rc2) {
  1949. case MC_CMD_NVRAM_VERIFY_RC_SUCCESS:
  1950. break;
  1951. case MC_CMD_NVRAM_VERIFY_RC_PENDING:
  1952. rc = -EAGAIN;
  1953. break;
  1954. case MC_CMD_NVRAM_VERIFY_RC_CMS_CHECK_FAILED:
  1955. case MC_CMD_NVRAM_VERIFY_RC_MESSAGE_DIGEST_CHECK_FAILED:
  1956. case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHECK_FAILED:
  1957. case MC_CMD_NVRAM_VERIFY_RC_TRUSTED_APPROVERS_CHECK_FAILED:
  1958. case MC_CMD_NVRAM_VERIFY_RC_SIGNATURE_CHAIN_CHECK_FAILED:
  1959. rc = -EIO;
  1960. break;
  1961. case MC_CMD_NVRAM_VERIFY_RC_INVALID_CMS_FORMAT:
  1962. case MC_CMD_NVRAM_VERIFY_RC_BAD_MESSAGE_DIGEST:
  1963. rc = -EINVAL;
  1964. break;
  1965. case MC_CMD_NVRAM_VERIFY_RC_NO_VALID_SIGNATURES:
  1966. case MC_CMD_NVRAM_VERIFY_RC_NO_TRUSTED_APPROVERS:
  1967. case MC_CMD_NVRAM_VERIFY_RC_NO_SIGNATURE_MATCH:
  1968. case MC_CMD_NVRAM_VERIFY_RC_REJECT_TEST_SIGNED:
  1969. case MC_CMD_NVRAM_VERIFY_RC_SECURITY_LEVEL_DOWNGRADE:
  1970. rc = -EPERM;
  1971. break;
  1972. default:
  1973. netif_err(efx, drv, efx->net_dev,
  1974. "Unknown response to NVRAM_UPDATE_FINISH\n");
  1975. rc = -EIO;
  1976. }
  1977. }
  1978. return rc;
  1979. }
  1980. #define EFX_MCDI_NVRAM_UPDATE_FINISH_INITIAL_POLL_DELAY_MS 5
  1981. #define EFX_MCDI_NVRAM_UPDATE_FINISH_MAX_POLL_DELAY_MS 5000
  1982. #define EFX_MCDI_NVRAM_UPDATE_FINISH_RETRIES 185
  1983. int efx_mcdi_nvram_update_finish_polled(struct efx_nic *efx, unsigned int type)
  1984. {
  1985. unsigned int delay = EFX_MCDI_NVRAM_UPDATE_FINISH_INITIAL_POLL_DELAY_MS;
  1986. unsigned int retry = 0;
  1987. int rc;
  1988. /* NVRAM updates can take a long time (e.g. up to 1 minute for bundle
  1989. * images). Polling for NVRAM update completion ensures that other MCDI
  1990. * commands can be issued before the background NVRAM update completes.
  1991. *
  1992. * The initial call either completes the update synchronously, or
  1993. * returns -EAGAIN to indicate processing is continuing. In the latter
  1994. * case, we poll for at least 900 seconds, at increasing intervals
  1995. * (5ms, 50ms, 500ms, 5s).
  1996. */
  1997. rc = efx_mcdi_nvram_update_finish(efx, type, EFX_UPDATE_FINISH_BACKGROUND);
  1998. while (rc == -EAGAIN) {
  1999. if (retry > EFX_MCDI_NVRAM_UPDATE_FINISH_RETRIES)
  2000. return -ETIMEDOUT;
  2001. retry++;
  2002. msleep(delay);
  2003. if (delay < EFX_MCDI_NVRAM_UPDATE_FINISH_MAX_POLL_DELAY_MS)
  2004. delay *= 10;
  2005. rc = efx_mcdi_nvram_update_finish(efx, type, EFX_UPDATE_FINISH_POLL);
  2006. }
  2007. return rc;
  2008. }
  2009. #ifdef CONFIG_SFC_MTD
  2010. int efx_mcdi_mtd_read(struct mtd_info *mtd, loff_t start,
  2011. size_t len, size_t *retlen, u8 *buffer)
  2012. {
  2013. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  2014. struct efx_nic *efx = mtd->priv;
  2015. loff_t offset = start;
  2016. loff_t end = min_t(loff_t, start + len, mtd->size);
  2017. size_t chunk;
  2018. int rc = 0;
  2019. while (offset < end) {
  2020. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  2021. rc = efx_mcdi_nvram_read(efx, part->nvram_type, offset,
  2022. buffer, chunk);
  2023. if (rc)
  2024. goto out;
  2025. offset += chunk;
  2026. buffer += chunk;
  2027. }
  2028. out:
  2029. *retlen = offset - start;
  2030. return rc;
  2031. }
  2032. int efx_mcdi_mtd_erase(struct mtd_info *mtd, loff_t start, size_t len)
  2033. {
  2034. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  2035. struct efx_nic *efx = mtd->priv;
  2036. loff_t offset = start & ~((loff_t)(mtd->erasesize - 1));
  2037. loff_t end = min_t(loff_t, start + len, mtd->size);
  2038. size_t chunk = part->common.mtd.erasesize;
  2039. int rc = 0;
  2040. if (!part->updating) {
  2041. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  2042. if (rc)
  2043. goto out;
  2044. part->updating = true;
  2045. }
  2046. /* The MCDI interface can in fact do multiple erase blocks at once;
  2047. * but erasing may be slow, so we make multiple calls here to avoid
  2048. * tripping the MCDI RPC timeout. */
  2049. while (offset < end) {
  2050. rc = efx_mcdi_nvram_erase(efx, part->nvram_type, offset,
  2051. chunk);
  2052. if (rc)
  2053. goto out;
  2054. offset += chunk;
  2055. }
  2056. out:
  2057. return rc;
  2058. }
  2059. int efx_mcdi_mtd_write(struct mtd_info *mtd, loff_t start,
  2060. size_t len, size_t *retlen, const u8 *buffer)
  2061. {
  2062. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  2063. struct efx_nic *efx = mtd->priv;
  2064. loff_t offset = start;
  2065. loff_t end = min_t(loff_t, start + len, mtd->size);
  2066. size_t chunk;
  2067. int rc = 0;
  2068. if (!part->updating) {
  2069. rc = efx_mcdi_nvram_update_start(efx, part->nvram_type);
  2070. if (rc)
  2071. goto out;
  2072. part->updating = true;
  2073. }
  2074. while (offset < end) {
  2075. chunk = min_t(size_t, end - offset, EFX_MCDI_NVRAM_LEN_MAX);
  2076. rc = efx_mcdi_nvram_write(efx, part->nvram_type, offset,
  2077. buffer, chunk);
  2078. if (rc)
  2079. goto out;
  2080. offset += chunk;
  2081. buffer += chunk;
  2082. }
  2083. out:
  2084. *retlen = offset - start;
  2085. return rc;
  2086. }
  2087. int efx_mcdi_mtd_sync(struct mtd_info *mtd)
  2088. {
  2089. struct efx_mcdi_mtd_partition *part = to_efx_mcdi_mtd_partition(mtd);
  2090. struct efx_nic *efx = mtd->priv;
  2091. int rc = 0;
  2092. if (part->updating) {
  2093. part->updating = false;
  2094. rc = efx_mcdi_nvram_update_finish(efx, part->nvram_type,
  2095. EFX_UPDATE_FINISH_WAIT);
  2096. }
  2097. return rc;
  2098. }
  2099. void efx_mcdi_mtd_rename(struct efx_mtd_partition *part)
  2100. {
  2101. struct efx_mcdi_mtd_partition *mcdi_part =
  2102. container_of(part, struct efx_mcdi_mtd_partition, common);
  2103. struct efx_nic *efx = part->mtd.priv;
  2104. snprintf(part->name, sizeof(part->name), "%s %s:%02x",
  2105. efx->name, part->type_name, mcdi_part->fw_subtype);
  2106. }
  2107. #endif /* CONFIG_SFC_MTD */