mtk_wed_mcu.c 9.2 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (C) 2022 MediaTek Inc.
  3. *
  4. * Author: Lorenzo Bianconi <lorenzo@kernel.org>
  5. * Sujuan Chen <sujuan.chen@mediatek.com>
  6. */
  7. #include <linux/firmware.h>
  8. #include <linux/of_address.h>
  9. #include <linux/of_reserved_mem.h>
  10. #include <linux/mfd/syscon.h>
  11. #include <linux/soc/mediatek/mtk_wed.h>
  12. #include <linux/unaligned.h>
  13. #include "mtk_wed_regs.h"
  14. #include "mtk_wed_wo.h"
  15. #include "mtk_wed.h"
  16. static struct mtk_wed_wo_memory_region mem_region[] = {
  17. [MTK_WED_WO_REGION_EMI] = {
  18. .name = "wo-emi",
  19. },
  20. [MTK_WED_WO_REGION_ILM] = {
  21. .name = "wo-ilm",
  22. },
  23. [MTK_WED_WO_REGION_DATA] = {
  24. .name = "wo-data",
  25. .shared = true,
  26. },
  27. [MTK_WED_WO_REGION_BOOT] = {
  28. .name = "wo-boot",
  29. },
  30. };
  31. static u32 wo_r32(u32 reg)
  32. {
  33. return readl(mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
  34. }
  35. static void wo_w32(u32 reg, u32 val)
  36. {
  37. writel(val, mem_region[MTK_WED_WO_REGION_BOOT].addr + reg);
  38. }
  39. static struct sk_buff *
  40. mtk_wed_mcu_msg_alloc(const void *data, int data_len)
  41. {
  42. int length = sizeof(struct mtk_wed_mcu_hdr) + data_len;
  43. struct sk_buff *skb;
  44. skb = alloc_skb(length, GFP_KERNEL);
  45. if (!skb)
  46. return NULL;
  47. memset(skb->head, 0, length);
  48. skb_reserve(skb, sizeof(struct mtk_wed_mcu_hdr));
  49. if (data && data_len)
  50. skb_put_data(skb, data, data_len);
  51. return skb;
  52. }
  53. static struct sk_buff *
  54. mtk_wed_mcu_get_response(struct mtk_wed_wo *wo, unsigned long expires)
  55. {
  56. if (!time_is_after_jiffies(expires))
  57. return NULL;
  58. wait_event_timeout(wo->mcu.wait, !skb_queue_empty(&wo->mcu.res_q),
  59. expires - jiffies);
  60. return skb_dequeue(&wo->mcu.res_q);
  61. }
  62. void mtk_wed_mcu_rx_event(struct mtk_wed_wo *wo, struct sk_buff *skb)
  63. {
  64. skb_queue_tail(&wo->mcu.res_q, skb);
  65. wake_up(&wo->mcu.wait);
  66. }
  67. static void
  68. mtk_wed_update_rx_stats(struct mtk_wed_device *wed, struct sk_buff *skb)
  69. {
  70. u32 count = get_unaligned_le32(skb->data);
  71. struct mtk_wed_wo_rx_stats *stats;
  72. int i;
  73. if (!wed->wlan.update_wo_rx_stats)
  74. return;
  75. if (count * sizeof(*stats) > skb->len - sizeof(u32))
  76. return;
  77. stats = (struct mtk_wed_wo_rx_stats *)(skb->data + sizeof(u32));
  78. for (i = 0 ; i < count ; i++)
  79. wed->wlan.update_wo_rx_stats(wed, &stats[i]);
  80. }
  81. void mtk_wed_mcu_rx_unsolicited_event(struct mtk_wed_wo *wo,
  82. struct sk_buff *skb)
  83. {
  84. struct mtk_wed_mcu_hdr *hdr = (struct mtk_wed_mcu_hdr *)skb->data;
  85. skb_pull(skb, sizeof(*hdr));
  86. switch (hdr->cmd) {
  87. case MTK_WED_WO_EVT_LOG_DUMP:
  88. dev_notice(wo->hw->dev, "%s\n", skb->data);
  89. break;
  90. case MTK_WED_WO_EVT_PROFILING: {
  91. struct mtk_wed_wo_log_info *info = (void *)skb->data;
  92. u32 count = skb->len / sizeof(*info);
  93. int i;
  94. for (i = 0 ; i < count ; i++)
  95. dev_notice(wo->hw->dev,
  96. "SN:%u latency: total=%u, rro:%u, mod:%u\n",
  97. le32_to_cpu(info[i].sn),
  98. le32_to_cpu(info[i].total),
  99. le32_to_cpu(info[i].rro),
  100. le32_to_cpu(info[i].mod));
  101. break;
  102. }
  103. case MTK_WED_WO_EVT_RXCNT_INFO:
  104. mtk_wed_update_rx_stats(wo->hw->wed_dev, skb);
  105. break;
  106. default:
  107. break;
  108. }
  109. dev_kfree_skb(skb);
  110. }
  111. static int
  112. mtk_wed_mcu_skb_send_msg(struct mtk_wed_wo *wo, struct sk_buff *skb,
  113. int id, int cmd, u16 *wait_seq, bool wait_resp)
  114. {
  115. struct mtk_wed_mcu_hdr *hdr;
  116. /* TODO: make it dynamic based on cmd */
  117. wo->mcu.timeout = 20 * HZ;
  118. hdr = (struct mtk_wed_mcu_hdr *)skb_push(skb, sizeof(*hdr));
  119. hdr->cmd = cmd;
  120. hdr->length = cpu_to_le16(skb->len);
  121. if (wait_resp && wait_seq) {
  122. u16 seq = ++wo->mcu.seq;
  123. if (!seq)
  124. seq = ++wo->mcu.seq;
  125. *wait_seq = seq;
  126. hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_NEED_RSP);
  127. hdr->seq = cpu_to_le16(seq);
  128. }
  129. if (id == MTK_WED_MODULE_ID_WO)
  130. hdr->flag |= cpu_to_le16(MTK_WED_WARP_CMD_FLAG_FROM_TO_WO);
  131. return mtk_wed_wo_queue_tx_skb(wo, &wo->q_tx, skb);
  132. }
  133. static int
  134. mtk_wed_mcu_parse_response(struct mtk_wed_wo *wo, struct sk_buff *skb,
  135. int cmd, int seq)
  136. {
  137. struct mtk_wed_mcu_hdr *hdr;
  138. if (!skb) {
  139. dev_err(wo->hw->dev, "Message %08x (seq %d) timeout\n",
  140. cmd, seq);
  141. return -ETIMEDOUT;
  142. }
  143. hdr = (struct mtk_wed_mcu_hdr *)skb->data;
  144. if (le16_to_cpu(hdr->seq) != seq)
  145. return -EAGAIN;
  146. skb_pull(skb, sizeof(*hdr));
  147. switch (cmd) {
  148. case MTK_WED_WO_CMD_RXCNT_INFO:
  149. mtk_wed_update_rx_stats(wo->hw->wed_dev, skb);
  150. break;
  151. default:
  152. break;
  153. }
  154. return 0;
  155. }
  156. int mtk_wed_mcu_send_msg(struct mtk_wed_wo *wo, int id, int cmd,
  157. const void *data, int len, bool wait_resp)
  158. {
  159. unsigned long expires;
  160. struct sk_buff *skb;
  161. u16 seq;
  162. int ret;
  163. skb = mtk_wed_mcu_msg_alloc(data, len);
  164. if (!skb)
  165. return -ENOMEM;
  166. mutex_lock(&wo->mcu.mutex);
  167. ret = mtk_wed_mcu_skb_send_msg(wo, skb, id, cmd, &seq, wait_resp);
  168. if (ret || !wait_resp)
  169. goto unlock;
  170. expires = jiffies + wo->mcu.timeout;
  171. do {
  172. skb = mtk_wed_mcu_get_response(wo, expires);
  173. ret = mtk_wed_mcu_parse_response(wo, skb, cmd, seq);
  174. dev_kfree_skb(skb);
  175. } while (ret == -EAGAIN);
  176. unlock:
  177. mutex_unlock(&wo->mcu.mutex);
  178. return ret;
  179. }
  180. int mtk_wed_mcu_msg_update(struct mtk_wed_device *dev, int id, void *data,
  181. int len)
  182. {
  183. struct mtk_wed_wo *wo = dev->hw->wed_wo;
  184. if (!mtk_wed_get_rx_capa(dev))
  185. return 0;
  186. if (WARN_ON(!wo))
  187. return -ENODEV;
  188. return mtk_wed_mcu_send_msg(wo, MTK_WED_MODULE_ID_WO, id, data, len,
  189. true);
  190. }
  191. static int
  192. mtk_wed_get_memory_region(struct mtk_wed_hw *hw, const char *name,
  193. struct mtk_wed_wo_memory_region *region)
  194. {
  195. struct resource res;
  196. int ret;
  197. ret = of_reserved_mem_region_to_resource_byname(hw->node, name, &res);
  198. if (ret)
  199. return 0;
  200. region->phy_addr = res.start;
  201. region->size = resource_size(&res);
  202. region->addr = devm_ioremap_resource(hw->dev, &res);
  203. if (IS_ERR(region->addr))
  204. return PTR_ERR(region->addr);
  205. return 0;
  206. }
  207. static int
  208. mtk_wed_mcu_run_firmware(struct mtk_wed_wo *wo, const struct firmware *fw)
  209. {
  210. const u8 *first_region_ptr, *region_ptr, *trailer_ptr, *ptr = fw->data;
  211. const struct mtk_wed_fw_trailer *trailer;
  212. const struct mtk_wed_fw_region *fw_region;
  213. trailer_ptr = fw->data + fw->size - sizeof(*trailer);
  214. trailer = (const struct mtk_wed_fw_trailer *)trailer_ptr;
  215. region_ptr = trailer_ptr - trailer->num_region * sizeof(*fw_region);
  216. first_region_ptr = region_ptr;
  217. while (region_ptr < trailer_ptr) {
  218. u32 length;
  219. int i;
  220. fw_region = (const struct mtk_wed_fw_region *)region_ptr;
  221. length = le32_to_cpu(fw_region->len);
  222. if (first_region_ptr < ptr + length)
  223. goto next;
  224. for (i = 0; i < ARRAY_SIZE(mem_region); i++) {
  225. struct mtk_wed_wo_memory_region *region;
  226. region = &mem_region[i];
  227. if (region->phy_addr != le32_to_cpu(fw_region->addr))
  228. continue;
  229. if (region->size < length)
  230. continue;
  231. if (region->shared && region->consumed)
  232. break;
  233. if (!region->shared || !region->consumed) {
  234. memcpy_toio(region->addr, ptr, length);
  235. region->consumed = true;
  236. break;
  237. }
  238. }
  239. if (i == ARRAY_SIZE(mem_region))
  240. return -EINVAL;
  241. next:
  242. region_ptr += sizeof(*fw_region);
  243. ptr += length;
  244. }
  245. return 0;
  246. }
  247. static int
  248. mtk_wed_mcu_load_firmware(struct mtk_wed_wo *wo)
  249. {
  250. const struct mtk_wed_fw_trailer *trailer;
  251. const struct firmware *fw;
  252. const char *fw_name;
  253. u32 val, boot_cr;
  254. int ret, i;
  255. /* load firmware region metadata */
  256. for (i = 0; i < ARRAY_SIZE(mem_region); i++) {
  257. ret = mtk_wed_get_memory_region(wo->hw, mem_region[i].name, &mem_region[i]);
  258. if (ret)
  259. return ret;
  260. }
  261. /* set dummy cr */
  262. wed_w32(wo->hw->wed_dev, MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL,
  263. wo->hw->index + 1);
  264. /* load firmware */
  265. switch (wo->hw->version) {
  266. case 2:
  267. if (of_device_is_compatible(wo->hw->node,
  268. "mediatek,mt7981-wed"))
  269. fw_name = MT7981_FIRMWARE_WO;
  270. else
  271. fw_name = wo->hw->index ? MT7986_FIRMWARE_WO1
  272. : MT7986_FIRMWARE_WO0;
  273. break;
  274. case 3:
  275. fw_name = wo->hw->index ? MT7988_FIRMWARE_WO1
  276. : MT7988_FIRMWARE_WO0;
  277. break;
  278. default:
  279. return -EINVAL;
  280. }
  281. ret = request_firmware(&fw, fw_name, wo->hw->dev);
  282. if (ret)
  283. return ret;
  284. trailer = (void *)(fw->data + fw->size -
  285. sizeof(struct mtk_wed_fw_trailer));
  286. dev_info(wo->hw->dev,
  287. "MTK WED WO Firmware Version: %.10s, Build Time: %.15s\n",
  288. trailer->fw_ver, trailer->build_date);
  289. dev_info(wo->hw->dev, "MTK WED WO Chip ID %02x Region %d\n",
  290. trailer->chip_id, trailer->num_region);
  291. ret = mtk_wed_mcu_run_firmware(wo, fw);
  292. if (ret)
  293. goto out;
  294. /* set the start address */
  295. if (!mtk_wed_is_v3_or_greater(wo->hw) && wo->hw->index)
  296. boot_cr = MTK_WO_MCU_CFG_LS_WA_BOOT_ADDR_ADDR;
  297. else
  298. boot_cr = MTK_WO_MCU_CFG_LS_WM_BOOT_ADDR_ADDR;
  299. wo_w32(boot_cr, mem_region[MTK_WED_WO_REGION_EMI].phy_addr >> 16);
  300. /* wo firmware reset */
  301. wo_w32(MTK_WO_MCU_CFG_LS_WF_MCCR_CLR_ADDR, 0xc00);
  302. val = wo_r32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR) |
  303. MTK_WO_MCU_CFG_LS_WF_WM_WA_WM_CPU_RSTB_MASK;
  304. wo_w32(MTK_WO_MCU_CFG_LS_WF_MCU_CFG_WM_WA_ADDR, val);
  305. out:
  306. release_firmware(fw);
  307. return ret;
  308. }
  309. static u32
  310. mtk_wed_mcu_read_fw_dl(struct mtk_wed_wo *wo)
  311. {
  312. return wed_r32(wo->hw->wed_dev,
  313. MTK_WED_SCR0 + 4 * MTK_WED_DUMMY_CR_FWDL);
  314. }
  315. int mtk_wed_mcu_init(struct mtk_wed_wo *wo)
  316. {
  317. u32 val;
  318. int ret;
  319. skb_queue_head_init(&wo->mcu.res_q);
  320. init_waitqueue_head(&wo->mcu.wait);
  321. mutex_init(&wo->mcu.mutex);
  322. ret = mtk_wed_mcu_load_firmware(wo);
  323. if (ret)
  324. return ret;
  325. return readx_poll_timeout(mtk_wed_mcu_read_fw_dl, wo, val, !val,
  326. 100, MTK_FW_DL_TIMEOUT);
  327. }
  328. MODULE_FIRMWARE(MT7981_FIRMWARE_WO);
  329. MODULE_FIRMWARE(MT7986_FIRMWARE_WO0);
  330. MODULE_FIRMWARE(MT7986_FIRMWARE_WO1);
  331. MODULE_FIRMWARE(MT7988_FIRMWARE_WO0);
  332. MODULE_FIRMWARE(MT7988_FIRMWARE_WO1);