ixgbevf_main.c 133 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /* Copyright(c) 1999 - 2024 Intel Corporation. */
  3. /******************************************************************************
  4. Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  5. ******************************************************************************/
  6. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  7. #include <linux/types.h>
  8. #include <linux/bitops.h>
  9. #include <linux/module.h>
  10. #include <linux/pci.h>
  11. #include <linux/netdevice.h>
  12. #include <linux/vmalloc.h>
  13. #include <linux/string.h>
  14. #include <linux/in.h>
  15. #include <linux/ip.h>
  16. #include <linux/tcp.h>
  17. #include <linux/sctp.h>
  18. #include <linux/ipv6.h>
  19. #include <linux/slab.h>
  20. #include <net/checksum.h>
  21. #include <net/ip6_checksum.h>
  22. #include <linux/ethtool.h>
  23. #include <linux/if.h>
  24. #include <linux/if_vlan.h>
  25. #include <linux/prefetch.h>
  26. #include <net/mpls.h>
  27. #include <linux/bpf.h>
  28. #include <linux/bpf_trace.h>
  29. #include <linux/atomic.h>
  30. #include <net/xfrm.h>
  31. #include "ixgbevf.h"
  32. const char ixgbevf_driver_name[] = "ixgbevf";
  33. static const char ixgbevf_driver_string[] =
  34. "Intel(R) 10 Gigabit PCI Express Virtual Function Network Driver";
  35. static char ixgbevf_copyright[] =
  36. "Copyright (c) 2009 - 2024 Intel Corporation.";
  37. static const struct ixgbevf_info *ixgbevf_info_tbl[] = {
  38. [board_82599_vf] = &ixgbevf_82599_vf_info,
  39. [board_82599_vf_hv] = &ixgbevf_82599_vf_hv_info,
  40. [board_X540_vf] = &ixgbevf_X540_vf_info,
  41. [board_X540_vf_hv] = &ixgbevf_X540_vf_hv_info,
  42. [board_X550_vf] = &ixgbevf_X550_vf_info,
  43. [board_X550_vf_hv] = &ixgbevf_X550_vf_hv_info,
  44. [board_X550EM_x_vf] = &ixgbevf_X550EM_x_vf_info,
  45. [board_X550EM_x_vf_hv] = &ixgbevf_X550EM_x_vf_hv_info,
  46. [board_x550em_a_vf] = &ixgbevf_x550em_a_vf_info,
  47. [board_e610_vf] = &ixgbevf_e610_vf_info,
  48. [board_e610_vf_hv] = &ixgbevf_e610_vf_hv_info,
  49. };
  50. /* ixgbevf_pci_tbl - PCI Device ID Table
  51. *
  52. * Wildcard entries (PCI_ANY_ID) should come last
  53. * Last entry must be all 0s
  54. *
  55. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  56. * Class, Class Mask, private data (not used) }
  57. */
  58. static const struct pci_device_id ixgbevf_pci_tbl[] = {
  59. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF), board_82599_vf },
  60. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_VF_HV), board_82599_vf_hv },
  61. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF), board_X540_vf },
  62. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540_VF_HV), board_X540_vf_hv },
  63. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF), board_X550_vf },
  64. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550_VF_HV), board_X550_vf_hv },
  65. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF), board_X550EM_x_vf },
  66. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_X_VF_HV), board_X550EM_x_vf_hv},
  67. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X550EM_A_VF), board_x550em_a_vf },
  68. {PCI_VDEVICE_SUB(INTEL, IXGBE_DEV_ID_E610_VF, PCI_ANY_ID,
  69. IXGBE_SUBDEV_ID_E610_VF_HV), board_e610_vf_hv},
  70. {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_E610_VF), board_e610_vf},
  71. /* required last entry */
  72. {0, }
  73. };
  74. MODULE_DEVICE_TABLE(pci, ixgbevf_pci_tbl);
  75. MODULE_DESCRIPTION("Intel(R) 10 Gigabit Virtual Function Network Driver");
  76. MODULE_LICENSE("GPL v2");
  77. #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
  78. static int debug = -1;
  79. module_param(debug, int, 0);
  80. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  81. static struct workqueue_struct *ixgbevf_wq;
  82. static void ixgbevf_service_event_schedule(struct ixgbevf_adapter *adapter)
  83. {
  84. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  85. !test_bit(__IXGBEVF_REMOVING, &adapter->state) &&
  86. !test_and_set_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state))
  87. queue_work(ixgbevf_wq, &adapter->service_task);
  88. }
  89. static void ixgbevf_service_event_complete(struct ixgbevf_adapter *adapter)
  90. {
  91. BUG_ON(!test_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state));
  92. /* flush memory to make sure state is correct before next watchdog */
  93. smp_mb__before_atomic();
  94. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  95. }
  96. /* forward decls */
  97. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter);
  98. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector);
  99. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter);
  100. static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer);
  101. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  102. struct ixgbevf_rx_buffer *old_buff);
  103. static void ixgbevf_remove_adapter(struct ixgbe_hw *hw)
  104. {
  105. struct ixgbevf_adapter *adapter = hw->back;
  106. if (!hw->hw_addr)
  107. return;
  108. hw->hw_addr = NULL;
  109. dev_err(&adapter->pdev->dev, "Adapter removed\n");
  110. if (test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  111. ixgbevf_service_event_schedule(adapter);
  112. }
  113. static void ixgbevf_check_remove(struct ixgbe_hw *hw, u32 reg)
  114. {
  115. u32 value;
  116. /* The following check not only optimizes a bit by not
  117. * performing a read on the status register when the
  118. * register just read was a status register read that
  119. * returned IXGBE_FAILED_READ_REG. It also blocks any
  120. * potential recursion.
  121. */
  122. if (reg == IXGBE_VFSTATUS) {
  123. ixgbevf_remove_adapter(hw);
  124. return;
  125. }
  126. value = ixgbevf_read_reg(hw, IXGBE_VFSTATUS);
  127. if (value == IXGBE_FAILED_READ_REG)
  128. ixgbevf_remove_adapter(hw);
  129. }
  130. u32 ixgbevf_read_reg(struct ixgbe_hw *hw, u32 reg)
  131. {
  132. u8 __iomem *reg_addr = READ_ONCE(hw->hw_addr);
  133. u32 value;
  134. if (IXGBE_REMOVED(reg_addr))
  135. return IXGBE_FAILED_READ_REG;
  136. value = readl(reg_addr + reg);
  137. if (unlikely(value == IXGBE_FAILED_READ_REG))
  138. ixgbevf_check_remove(hw, reg);
  139. return value;
  140. }
  141. /**
  142. * ixgbevf_set_ivar - set IVAR registers - maps interrupt causes to vectors
  143. * @adapter: pointer to adapter struct
  144. * @direction: 0 for Rx, 1 for Tx, -1 for other causes
  145. * @queue: queue to map the corresponding interrupt to
  146. * @msix_vector: the vector to map to the corresponding queue
  147. **/
  148. static void ixgbevf_set_ivar(struct ixgbevf_adapter *adapter, s8 direction,
  149. u8 queue, u8 msix_vector)
  150. {
  151. u32 ivar, index;
  152. struct ixgbe_hw *hw = &adapter->hw;
  153. if (direction == -1) {
  154. /* other causes */
  155. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  156. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR_MISC);
  157. ivar &= ~0xFF;
  158. ivar |= msix_vector;
  159. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR_MISC, ivar);
  160. } else {
  161. /* Tx or Rx causes */
  162. msix_vector |= IXGBE_IVAR_ALLOC_VAL;
  163. index = ((16 * (queue & 1)) + (8 * direction));
  164. ivar = IXGBE_READ_REG(hw, IXGBE_VTIVAR(queue >> 1));
  165. ivar &= ~(0xFF << index);
  166. ivar |= (msix_vector << index);
  167. IXGBE_WRITE_REG(hw, IXGBE_VTIVAR(queue >> 1), ivar);
  168. }
  169. }
  170. static u64 ixgbevf_get_tx_completed(struct ixgbevf_ring *ring)
  171. {
  172. return ring->stats.packets;
  173. }
  174. static u32 ixgbevf_get_tx_pending(struct ixgbevf_ring *ring)
  175. {
  176. struct ixgbevf_adapter *adapter = netdev_priv(ring->netdev);
  177. struct ixgbe_hw *hw = &adapter->hw;
  178. u32 head = IXGBE_READ_REG(hw, IXGBE_VFTDH(ring->reg_idx));
  179. u32 tail = IXGBE_READ_REG(hw, IXGBE_VFTDT(ring->reg_idx));
  180. if (head != tail)
  181. return (head < tail) ?
  182. tail - head : (tail + ring->count - head);
  183. return 0;
  184. }
  185. static inline bool ixgbevf_check_tx_hang(struct ixgbevf_ring *tx_ring)
  186. {
  187. u32 tx_done = ixgbevf_get_tx_completed(tx_ring);
  188. u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
  189. u32 tx_pending = ixgbevf_get_tx_pending(tx_ring);
  190. clear_check_for_tx_hang(tx_ring);
  191. /* Check for a hung queue, but be thorough. This verifies
  192. * that a transmit has been completed since the previous
  193. * check AND there is at least one packet pending. The
  194. * ARMED bit is set to indicate a potential hang.
  195. */
  196. if ((tx_done_old == tx_done) && tx_pending) {
  197. /* make sure it is true for two checks in a row */
  198. return test_and_set_bit(__IXGBEVF_HANG_CHECK_ARMED,
  199. &tx_ring->state);
  200. }
  201. /* reset the countdown */
  202. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &tx_ring->state);
  203. /* update completed stats and continue */
  204. tx_ring->tx_stats.tx_done_old = tx_done;
  205. return false;
  206. }
  207. static void ixgbevf_tx_timeout_reset(struct ixgbevf_adapter *adapter)
  208. {
  209. /* Do the reset outside of interrupt context */
  210. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  211. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  212. ixgbevf_service_event_schedule(adapter);
  213. }
  214. }
  215. /**
  216. * ixgbevf_tx_timeout - Respond to a Tx Hang
  217. * @netdev: network interface device structure
  218. * @txqueue: transmit queue hanging (unused)
  219. **/
  220. static void ixgbevf_tx_timeout(struct net_device *netdev, unsigned int __always_unused txqueue)
  221. {
  222. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  223. ixgbevf_tx_timeout_reset(adapter);
  224. }
  225. /**
  226. * ixgbevf_clean_tx_irq - Reclaim resources after transmit completes
  227. * @q_vector: board private structure
  228. * @tx_ring: tx ring to clean
  229. * @napi_budget: Used to determine if we are in netpoll
  230. **/
  231. static bool ixgbevf_clean_tx_irq(struct ixgbevf_q_vector *q_vector,
  232. struct ixgbevf_ring *tx_ring, int napi_budget)
  233. {
  234. struct ixgbevf_adapter *adapter = q_vector->adapter;
  235. struct ixgbevf_tx_buffer *tx_buffer;
  236. union ixgbe_adv_tx_desc *tx_desc;
  237. unsigned int total_bytes = 0, total_packets = 0, total_ipsec = 0;
  238. unsigned int budget = tx_ring->count / 2;
  239. unsigned int i = tx_ring->next_to_clean;
  240. if (test_bit(__IXGBEVF_DOWN, &adapter->state))
  241. return true;
  242. tx_buffer = &tx_ring->tx_buffer_info[i];
  243. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  244. i -= tx_ring->count;
  245. do {
  246. union ixgbe_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
  247. /* if next_to_watch is not set then there is no work pending */
  248. if (!eop_desc)
  249. break;
  250. /* prevent any other reads prior to eop_desc */
  251. smp_rmb();
  252. /* if DD is not set pending work has not been completed */
  253. if (!(eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)))
  254. break;
  255. /* clear next_to_watch to prevent false hangs */
  256. tx_buffer->next_to_watch = NULL;
  257. /* update the statistics for this packet */
  258. total_bytes += tx_buffer->bytecount;
  259. total_packets += tx_buffer->gso_segs;
  260. if (tx_buffer->tx_flags & IXGBE_TX_FLAGS_IPSEC)
  261. total_ipsec++;
  262. /* free the skb */
  263. if (ring_is_xdp(tx_ring))
  264. page_frag_free(tx_buffer->data);
  265. else
  266. napi_consume_skb(tx_buffer->skb, napi_budget);
  267. /* unmap skb header data */
  268. dma_unmap_single(tx_ring->dev,
  269. dma_unmap_addr(tx_buffer, dma),
  270. dma_unmap_len(tx_buffer, len),
  271. DMA_TO_DEVICE);
  272. /* clear tx_buffer data */
  273. dma_unmap_len_set(tx_buffer, len, 0);
  274. /* unmap remaining buffers */
  275. while (tx_desc != eop_desc) {
  276. tx_buffer++;
  277. tx_desc++;
  278. i++;
  279. if (unlikely(!i)) {
  280. i -= tx_ring->count;
  281. tx_buffer = tx_ring->tx_buffer_info;
  282. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  283. }
  284. /* unmap any remaining paged data */
  285. if (dma_unmap_len(tx_buffer, len)) {
  286. dma_unmap_page(tx_ring->dev,
  287. dma_unmap_addr(tx_buffer, dma),
  288. dma_unmap_len(tx_buffer, len),
  289. DMA_TO_DEVICE);
  290. dma_unmap_len_set(tx_buffer, len, 0);
  291. }
  292. }
  293. /* move us one more past the eop_desc for start of next pkt */
  294. tx_buffer++;
  295. tx_desc++;
  296. i++;
  297. if (unlikely(!i)) {
  298. i -= tx_ring->count;
  299. tx_buffer = tx_ring->tx_buffer_info;
  300. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  301. }
  302. /* issue prefetch for next Tx descriptor */
  303. prefetch(tx_desc);
  304. /* update budget accounting */
  305. budget--;
  306. } while (likely(budget));
  307. i += tx_ring->count;
  308. tx_ring->next_to_clean = i;
  309. u64_stats_update_begin(&tx_ring->syncp);
  310. tx_ring->stats.bytes += total_bytes;
  311. tx_ring->stats.packets += total_packets;
  312. u64_stats_update_end(&tx_ring->syncp);
  313. q_vector->tx.total_bytes += total_bytes;
  314. q_vector->tx.total_packets += total_packets;
  315. adapter->tx_ipsec += total_ipsec;
  316. if (check_for_tx_hang(tx_ring) && ixgbevf_check_tx_hang(tx_ring)) {
  317. struct ixgbe_hw *hw = &adapter->hw;
  318. union ixgbe_adv_tx_desc *eop_desc;
  319. eop_desc = tx_ring->tx_buffer_info[i].next_to_watch;
  320. pr_err("Detected Tx Unit Hang%s\n"
  321. " Tx Queue <%d>\n"
  322. " TDH, TDT <%x>, <%x>\n"
  323. " next_to_use <%x>\n"
  324. " next_to_clean <%x>\n"
  325. "tx_buffer_info[next_to_clean]\n"
  326. " next_to_watch <%p>\n"
  327. " eop_desc->wb.status <%x>\n"
  328. " time_stamp <%lx>\n"
  329. " jiffies <%lx>\n",
  330. ring_is_xdp(tx_ring) ? " XDP" : "",
  331. tx_ring->queue_index,
  332. IXGBE_READ_REG(hw, IXGBE_VFTDH(tx_ring->reg_idx)),
  333. IXGBE_READ_REG(hw, IXGBE_VFTDT(tx_ring->reg_idx)),
  334. tx_ring->next_to_use, i,
  335. eop_desc, (eop_desc ? eop_desc->wb.status : 0),
  336. tx_ring->tx_buffer_info[i].time_stamp, jiffies);
  337. if (!ring_is_xdp(tx_ring))
  338. netif_stop_subqueue(tx_ring->netdev,
  339. tx_ring->queue_index);
  340. /* schedule immediate reset if we believe we hung */
  341. ixgbevf_tx_timeout_reset(adapter);
  342. return true;
  343. }
  344. if (ring_is_xdp(tx_ring))
  345. return !!budget;
  346. #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
  347. if (unlikely(total_packets && netif_carrier_ok(tx_ring->netdev) &&
  348. (ixgbevf_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD))) {
  349. /* Make sure that anybody stopping the queue after this
  350. * sees the new next_to_clean.
  351. */
  352. smp_mb();
  353. if (__netif_subqueue_stopped(tx_ring->netdev,
  354. tx_ring->queue_index) &&
  355. !test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  356. netif_wake_subqueue(tx_ring->netdev,
  357. tx_ring->queue_index);
  358. ++tx_ring->tx_stats.restart_queue;
  359. }
  360. }
  361. return !!budget;
  362. }
  363. /**
  364. * ixgbevf_rx_skb - Helper function to determine proper Rx method
  365. * @q_vector: structure containing interrupt and ring information
  366. * @skb: packet to send up
  367. **/
  368. static void ixgbevf_rx_skb(struct ixgbevf_q_vector *q_vector,
  369. struct sk_buff *skb)
  370. {
  371. napi_gro_receive(&q_vector->napi, skb);
  372. }
  373. #define IXGBE_RSS_L4_TYPES_MASK \
  374. ((1ul << IXGBE_RXDADV_RSSTYPE_IPV4_TCP) | \
  375. (1ul << IXGBE_RXDADV_RSSTYPE_IPV4_UDP) | \
  376. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_TCP) | \
  377. (1ul << IXGBE_RXDADV_RSSTYPE_IPV6_UDP))
  378. static inline void ixgbevf_rx_hash(struct ixgbevf_ring *ring,
  379. union ixgbe_adv_rx_desc *rx_desc,
  380. struct sk_buff *skb)
  381. {
  382. u16 rss_type;
  383. if (!(ring->netdev->features & NETIF_F_RXHASH))
  384. return;
  385. rss_type = le16_to_cpu(rx_desc->wb.lower.lo_dword.hs_rss.pkt_info) &
  386. IXGBE_RXDADV_RSSTYPE_MASK;
  387. if (!rss_type)
  388. return;
  389. skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
  390. (IXGBE_RSS_L4_TYPES_MASK & (1ul << rss_type)) ?
  391. PKT_HASH_TYPE_L4 : PKT_HASH_TYPE_L3);
  392. }
  393. /**
  394. * ixgbevf_rx_checksum - indicate in skb if hw indicated a good cksum
  395. * @ring: structure containig ring specific data
  396. * @rx_desc: current Rx descriptor being processed
  397. * @skb: skb currently being received and modified
  398. **/
  399. static inline void ixgbevf_rx_checksum(struct ixgbevf_ring *ring,
  400. union ixgbe_adv_rx_desc *rx_desc,
  401. struct sk_buff *skb)
  402. {
  403. skb_checksum_none_assert(skb);
  404. /* Rx csum disabled */
  405. if (!(ring->netdev->features & NETIF_F_RXCSUM))
  406. return;
  407. /* if IP and error */
  408. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_IPCS) &&
  409. ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_IPE)) {
  410. ring->rx_stats.csum_err++;
  411. return;
  412. }
  413. if (!ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_L4CS))
  414. return;
  415. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_ERR_TCPE)) {
  416. ring->rx_stats.csum_err++;
  417. return;
  418. }
  419. /* It must be a TCP or UDP packet with a valid checksum */
  420. skb->ip_summed = CHECKSUM_UNNECESSARY;
  421. }
  422. /**
  423. * ixgbevf_process_skb_fields - Populate skb header fields from Rx descriptor
  424. * @rx_ring: rx descriptor ring packet is being transacted on
  425. * @rx_desc: pointer to the EOP Rx descriptor
  426. * @skb: pointer to current skb being populated
  427. *
  428. * This function checks the ring, descriptor, and packet information in
  429. * order to populate the checksum, VLAN, protocol, and other fields within
  430. * the skb.
  431. **/
  432. static void ixgbevf_process_skb_fields(struct ixgbevf_ring *rx_ring,
  433. union ixgbe_adv_rx_desc *rx_desc,
  434. struct sk_buff *skb)
  435. {
  436. ixgbevf_rx_hash(rx_ring, rx_desc, skb);
  437. ixgbevf_rx_checksum(rx_ring, rx_desc, skb);
  438. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_VP)) {
  439. u16 vid = le16_to_cpu(rx_desc->wb.upper.vlan);
  440. unsigned long *active_vlans = netdev_priv(rx_ring->netdev);
  441. if (test_bit(vid & VLAN_VID_MASK, active_vlans))
  442. __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
  443. }
  444. if (ixgbevf_test_staterr(rx_desc, IXGBE_RXDADV_STAT_SECP))
  445. ixgbevf_ipsec_rx(rx_ring, rx_desc, skb);
  446. skb->protocol = eth_type_trans(skb, rx_ring->netdev);
  447. }
  448. static
  449. struct ixgbevf_rx_buffer *ixgbevf_get_rx_buffer(struct ixgbevf_ring *rx_ring,
  450. const unsigned int size)
  451. {
  452. struct ixgbevf_rx_buffer *rx_buffer;
  453. rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
  454. prefetchw(rx_buffer->page);
  455. /* we are reusing so sync this buffer for CPU use */
  456. dma_sync_single_range_for_cpu(rx_ring->dev,
  457. rx_buffer->dma,
  458. rx_buffer->page_offset,
  459. size,
  460. DMA_FROM_DEVICE);
  461. rx_buffer->pagecnt_bias--;
  462. return rx_buffer;
  463. }
  464. static void ixgbevf_put_rx_buffer(struct ixgbevf_ring *rx_ring,
  465. struct ixgbevf_rx_buffer *rx_buffer,
  466. struct sk_buff *skb)
  467. {
  468. if (ixgbevf_can_reuse_rx_page(rx_buffer)) {
  469. /* hand second half of page back to the ring */
  470. ixgbevf_reuse_rx_page(rx_ring, rx_buffer);
  471. } else {
  472. if (IS_ERR(skb))
  473. /* We are not reusing the buffer so unmap it and free
  474. * any references we are holding to it
  475. */
  476. dma_unmap_page_attrs(rx_ring->dev, rx_buffer->dma,
  477. ixgbevf_rx_pg_size(rx_ring),
  478. DMA_FROM_DEVICE,
  479. IXGBEVF_RX_DMA_ATTR);
  480. __page_frag_cache_drain(rx_buffer->page,
  481. rx_buffer->pagecnt_bias);
  482. }
  483. /* clear contents of rx_buffer */
  484. rx_buffer->page = NULL;
  485. }
  486. /**
  487. * ixgbevf_is_non_eop - process handling of non-EOP buffers
  488. * @rx_ring: Rx ring being processed
  489. * @rx_desc: Rx descriptor for current buffer
  490. *
  491. * This function updates next to clean. If the buffer is an EOP buffer
  492. * this function exits returning false, otherwise it will place the
  493. * sk_buff in the next buffer to be chained and return true indicating
  494. * that this is in fact a non-EOP buffer.
  495. **/
  496. static bool ixgbevf_is_non_eop(struct ixgbevf_ring *rx_ring,
  497. union ixgbe_adv_rx_desc *rx_desc)
  498. {
  499. u32 ntc = rx_ring->next_to_clean + 1;
  500. /* fetch, update, and store next to clean */
  501. ntc = (ntc < rx_ring->count) ? ntc : 0;
  502. rx_ring->next_to_clean = ntc;
  503. prefetch(IXGBEVF_RX_DESC(rx_ring, ntc));
  504. if (likely(ixgbevf_test_staterr(rx_desc, IXGBE_RXD_STAT_EOP)))
  505. return false;
  506. return true;
  507. }
  508. static inline unsigned int ixgbevf_rx_offset(struct ixgbevf_ring *rx_ring)
  509. {
  510. return ring_uses_build_skb(rx_ring) ? IXGBEVF_SKB_PAD : 0;
  511. }
  512. static bool ixgbevf_alloc_mapped_page(struct ixgbevf_ring *rx_ring,
  513. struct ixgbevf_rx_buffer *bi)
  514. {
  515. struct page *page = bi->page;
  516. dma_addr_t dma;
  517. /* since we are recycling buffers we should seldom need to alloc */
  518. if (likely(page))
  519. return true;
  520. /* alloc new page for storage */
  521. page = dev_alloc_pages(ixgbevf_rx_pg_order(rx_ring));
  522. if (unlikely(!page)) {
  523. rx_ring->rx_stats.alloc_rx_page_failed++;
  524. return false;
  525. }
  526. /* map page for use */
  527. dma = dma_map_page_attrs(rx_ring->dev, page, 0,
  528. ixgbevf_rx_pg_size(rx_ring),
  529. DMA_FROM_DEVICE, IXGBEVF_RX_DMA_ATTR);
  530. /* if mapping failed free memory back to system since
  531. * there isn't much point in holding memory we can't use
  532. */
  533. if (dma_mapping_error(rx_ring->dev, dma)) {
  534. __free_pages(page, ixgbevf_rx_pg_order(rx_ring));
  535. rx_ring->rx_stats.alloc_rx_page_failed++;
  536. return false;
  537. }
  538. bi->dma = dma;
  539. bi->page = page;
  540. bi->page_offset = ixgbevf_rx_offset(rx_ring);
  541. bi->pagecnt_bias = 1;
  542. rx_ring->rx_stats.alloc_rx_page++;
  543. return true;
  544. }
  545. /**
  546. * ixgbevf_alloc_rx_buffers - Replace used receive buffers; packet split
  547. * @rx_ring: rx descriptor ring (for a specific queue) to setup buffers on
  548. * @cleaned_count: number of buffers to replace
  549. **/
  550. static void ixgbevf_alloc_rx_buffers(struct ixgbevf_ring *rx_ring,
  551. u16 cleaned_count)
  552. {
  553. union ixgbe_adv_rx_desc *rx_desc;
  554. struct ixgbevf_rx_buffer *bi;
  555. unsigned int i = rx_ring->next_to_use;
  556. /* nothing to do or no valid netdev defined */
  557. if (!cleaned_count || !rx_ring->netdev)
  558. return;
  559. rx_desc = IXGBEVF_RX_DESC(rx_ring, i);
  560. bi = &rx_ring->rx_buffer_info[i];
  561. i -= rx_ring->count;
  562. do {
  563. if (!ixgbevf_alloc_mapped_page(rx_ring, bi))
  564. break;
  565. /* sync the buffer for use by the device */
  566. dma_sync_single_range_for_device(rx_ring->dev, bi->dma,
  567. bi->page_offset,
  568. ixgbevf_rx_bufsz(rx_ring),
  569. DMA_FROM_DEVICE);
  570. /* Refresh the desc even if pkt_addr didn't change
  571. * because each write-back erases this info.
  572. */
  573. rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
  574. rx_desc++;
  575. bi++;
  576. i++;
  577. if (unlikely(!i)) {
  578. rx_desc = IXGBEVF_RX_DESC(rx_ring, 0);
  579. bi = rx_ring->rx_buffer_info;
  580. i -= rx_ring->count;
  581. }
  582. /* clear the length for the next_to_use descriptor */
  583. rx_desc->wb.upper.length = 0;
  584. cleaned_count--;
  585. } while (cleaned_count);
  586. i += rx_ring->count;
  587. if (rx_ring->next_to_use != i) {
  588. /* record the next descriptor to use */
  589. rx_ring->next_to_use = i;
  590. /* update next to alloc since we have filled the ring */
  591. rx_ring->next_to_alloc = i;
  592. /* Force memory writes to complete before letting h/w
  593. * know there are new descriptors to fetch. (Only
  594. * applicable for weak-ordered memory model archs,
  595. * such as IA-64).
  596. */
  597. wmb();
  598. ixgbevf_write_tail(rx_ring, i);
  599. }
  600. }
  601. /**
  602. * ixgbevf_cleanup_headers - Correct corrupted or empty headers
  603. * @rx_ring: rx descriptor ring packet is being transacted on
  604. * @rx_desc: pointer to the EOP Rx descriptor
  605. * @skb: pointer to current skb being fixed
  606. *
  607. * Check for corrupted packet headers caused by senders on the local L2
  608. * embedded NIC switch not setting up their Tx Descriptors right. These
  609. * should be very rare.
  610. *
  611. * Also address the case where we are pulling data in on pages only
  612. * and as such no data is present in the skb header.
  613. *
  614. * In addition if skb is not at least 60 bytes we need to pad it so that
  615. * it is large enough to qualify as a valid Ethernet frame.
  616. *
  617. * Returns true if an error was encountered and skb was freed.
  618. **/
  619. static bool ixgbevf_cleanup_headers(struct ixgbevf_ring *rx_ring,
  620. union ixgbe_adv_rx_desc *rx_desc,
  621. struct sk_buff *skb)
  622. {
  623. /* verify that the packet does not have any known errors */
  624. if (unlikely(ixgbevf_test_staterr(rx_desc,
  625. IXGBE_RXDADV_ERR_FRAME_ERR_MASK))) {
  626. struct net_device *netdev = rx_ring->netdev;
  627. if (!(netdev->features & NETIF_F_RXALL)) {
  628. dev_kfree_skb_any(skb);
  629. return true;
  630. }
  631. }
  632. /* if eth_skb_pad returns an error the skb was freed */
  633. if (eth_skb_pad(skb))
  634. return true;
  635. return false;
  636. }
  637. /**
  638. * ixgbevf_reuse_rx_page - page flip buffer and store it back on the ring
  639. * @rx_ring: rx descriptor ring to store buffers on
  640. * @old_buff: donor buffer to have page reused
  641. *
  642. * Synchronizes page for reuse by the adapter
  643. **/
  644. static void ixgbevf_reuse_rx_page(struct ixgbevf_ring *rx_ring,
  645. struct ixgbevf_rx_buffer *old_buff)
  646. {
  647. struct ixgbevf_rx_buffer *new_buff;
  648. u16 nta = rx_ring->next_to_alloc;
  649. new_buff = &rx_ring->rx_buffer_info[nta];
  650. /* update, and store next to alloc */
  651. nta++;
  652. rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
  653. /* transfer page from old buffer to new buffer */
  654. new_buff->page = old_buff->page;
  655. new_buff->dma = old_buff->dma;
  656. new_buff->page_offset = old_buff->page_offset;
  657. new_buff->pagecnt_bias = old_buff->pagecnt_bias;
  658. }
  659. static bool ixgbevf_can_reuse_rx_page(struct ixgbevf_rx_buffer *rx_buffer)
  660. {
  661. unsigned int pagecnt_bias = rx_buffer->pagecnt_bias;
  662. struct page *page = rx_buffer->page;
  663. /* avoid re-using remote and pfmemalloc pages */
  664. if (!dev_page_is_reusable(page))
  665. return false;
  666. #if (PAGE_SIZE < 8192)
  667. /* if we are only owner of page we can reuse it */
  668. if (unlikely((page_ref_count(page) - pagecnt_bias) > 1))
  669. return false;
  670. #else
  671. #define IXGBEVF_LAST_OFFSET \
  672. (SKB_WITH_OVERHEAD(PAGE_SIZE) - IXGBEVF_RXBUFFER_2048)
  673. if (rx_buffer->page_offset > IXGBEVF_LAST_OFFSET)
  674. return false;
  675. #endif
  676. /* If we have drained the page fragment pool we need to update
  677. * the pagecnt_bias and page count so that we fully restock the
  678. * number of references the driver holds.
  679. */
  680. if (unlikely(!pagecnt_bias)) {
  681. page_ref_add(page, USHRT_MAX);
  682. rx_buffer->pagecnt_bias = USHRT_MAX;
  683. }
  684. return true;
  685. }
  686. /**
  687. * ixgbevf_add_rx_frag - Add contents of Rx buffer to sk_buff
  688. * @rx_ring: rx descriptor ring to transact packets on
  689. * @rx_buffer: buffer containing page to add
  690. * @skb: sk_buff to place the data into
  691. * @size: size of buffer to be added
  692. *
  693. * This function will add the data contained in rx_buffer->page to the skb.
  694. **/
  695. static void ixgbevf_add_rx_frag(struct ixgbevf_ring *rx_ring,
  696. struct ixgbevf_rx_buffer *rx_buffer,
  697. struct sk_buff *skb,
  698. unsigned int size)
  699. {
  700. #if (PAGE_SIZE < 8192)
  701. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  702. #else
  703. unsigned int truesize = ring_uses_build_skb(rx_ring) ?
  704. SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) :
  705. SKB_DATA_ALIGN(size);
  706. #endif
  707. skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, rx_buffer->page,
  708. rx_buffer->page_offset, size, truesize);
  709. #if (PAGE_SIZE < 8192)
  710. rx_buffer->page_offset ^= truesize;
  711. #else
  712. rx_buffer->page_offset += truesize;
  713. #endif
  714. }
  715. static
  716. struct sk_buff *ixgbevf_construct_skb(struct ixgbevf_ring *rx_ring,
  717. struct ixgbevf_rx_buffer *rx_buffer,
  718. struct xdp_buff *xdp,
  719. union ixgbe_adv_rx_desc *rx_desc)
  720. {
  721. unsigned int size = xdp->data_end - xdp->data;
  722. #if (PAGE_SIZE < 8192)
  723. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  724. #else
  725. unsigned int truesize = SKB_DATA_ALIGN(xdp->data_end -
  726. xdp->data_hard_start);
  727. #endif
  728. unsigned int headlen;
  729. struct sk_buff *skb;
  730. /* prefetch first cache line of first page */
  731. net_prefetch(xdp->data);
  732. /* Note, we get here by enabling legacy-rx via:
  733. *
  734. * ethtool --set-priv-flags <dev> legacy-rx on
  735. *
  736. * In this mode, we currently get 0 extra XDP headroom as
  737. * opposed to having legacy-rx off, where we process XDP
  738. * packets going to stack via ixgbevf_build_skb().
  739. *
  740. * For ixgbevf_construct_skb() mode it means that the
  741. * xdp->data_meta will always point to xdp->data, since
  742. * the helper cannot expand the head. Should this ever
  743. * changed in future for legacy-rx mode on, then lets also
  744. * add xdp->data_meta handling here.
  745. */
  746. /* allocate a skb to store the frags */
  747. skb = napi_alloc_skb(&rx_ring->q_vector->napi, IXGBEVF_RX_HDR_SIZE);
  748. if (unlikely(!skb))
  749. return NULL;
  750. /* Determine available headroom for copy */
  751. headlen = size;
  752. if (headlen > IXGBEVF_RX_HDR_SIZE)
  753. headlen = eth_get_headlen(skb->dev, xdp->data,
  754. IXGBEVF_RX_HDR_SIZE);
  755. /* align pull length to size of long to optimize memcpy performance */
  756. memcpy(__skb_put(skb, headlen), xdp->data,
  757. ALIGN(headlen, sizeof(long)));
  758. /* update all of the pointers */
  759. size -= headlen;
  760. if (size) {
  761. skb_add_rx_frag(skb, 0, rx_buffer->page,
  762. (xdp->data + headlen) -
  763. page_address(rx_buffer->page),
  764. size, truesize);
  765. #if (PAGE_SIZE < 8192)
  766. rx_buffer->page_offset ^= truesize;
  767. #else
  768. rx_buffer->page_offset += truesize;
  769. #endif
  770. } else {
  771. rx_buffer->pagecnt_bias++;
  772. }
  773. return skb;
  774. }
  775. static inline void ixgbevf_irq_enable_queues(struct ixgbevf_adapter *adapter,
  776. u32 qmask)
  777. {
  778. struct ixgbe_hw *hw = &adapter->hw;
  779. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, qmask);
  780. }
  781. static struct sk_buff *ixgbevf_build_skb(struct ixgbevf_ring *rx_ring,
  782. struct ixgbevf_rx_buffer *rx_buffer,
  783. struct xdp_buff *xdp,
  784. union ixgbe_adv_rx_desc *rx_desc)
  785. {
  786. unsigned int metasize = xdp->data - xdp->data_meta;
  787. #if (PAGE_SIZE < 8192)
  788. unsigned int truesize = ixgbevf_rx_pg_size(rx_ring) / 2;
  789. #else
  790. unsigned int truesize = SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) +
  791. SKB_DATA_ALIGN(xdp->data_end -
  792. xdp->data_hard_start);
  793. #endif
  794. struct sk_buff *skb;
  795. /* Prefetch first cache line of first page. If xdp->data_meta
  796. * is unused, this points to xdp->data, otherwise, we likely
  797. * have a consumer accessing first few bytes of meta data,
  798. * and then actual data.
  799. */
  800. net_prefetch(xdp->data_meta);
  801. /* build an skb around the page buffer */
  802. skb = napi_build_skb(xdp->data_hard_start, truesize);
  803. if (unlikely(!skb))
  804. return NULL;
  805. /* update pointers within the skb to store the data */
  806. skb_reserve(skb, xdp->data - xdp->data_hard_start);
  807. __skb_put(skb, xdp->data_end - xdp->data);
  808. if (metasize)
  809. skb_metadata_set(skb, metasize);
  810. /* update buffer offset */
  811. #if (PAGE_SIZE < 8192)
  812. rx_buffer->page_offset ^= truesize;
  813. #else
  814. rx_buffer->page_offset += truesize;
  815. #endif
  816. return skb;
  817. }
  818. #define IXGBEVF_XDP_PASS 0
  819. #define IXGBEVF_XDP_CONSUMED 1
  820. #define IXGBEVF_XDP_TX 2
  821. static int ixgbevf_xmit_xdp_ring(struct ixgbevf_ring *ring,
  822. struct xdp_buff *xdp)
  823. {
  824. struct ixgbevf_tx_buffer *tx_buffer;
  825. union ixgbe_adv_tx_desc *tx_desc;
  826. u32 len, cmd_type;
  827. dma_addr_t dma;
  828. u16 i;
  829. len = xdp->data_end - xdp->data;
  830. if (unlikely(!ixgbevf_desc_unused(ring)))
  831. return IXGBEVF_XDP_CONSUMED;
  832. dma = dma_map_single(ring->dev, xdp->data, len, DMA_TO_DEVICE);
  833. if (dma_mapping_error(ring->dev, dma))
  834. return IXGBEVF_XDP_CONSUMED;
  835. /* record the location of the first descriptor for this packet */
  836. i = ring->next_to_use;
  837. tx_buffer = &ring->tx_buffer_info[i];
  838. dma_unmap_len_set(tx_buffer, len, len);
  839. dma_unmap_addr_set(tx_buffer, dma, dma);
  840. tx_buffer->data = xdp->data;
  841. tx_buffer->bytecount = len;
  842. tx_buffer->gso_segs = 1;
  843. tx_buffer->protocol = 0;
  844. /* Populate minimal context descriptor that will provide for the
  845. * fact that we are expected to process Ethernet frames.
  846. */
  847. if (!test_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state)) {
  848. struct ixgbe_adv_tx_context_desc *context_desc;
  849. set_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
  850. context_desc = IXGBEVF_TX_CTXTDESC(ring, 0);
  851. context_desc->vlan_macip_lens =
  852. cpu_to_le32(ETH_HLEN << IXGBE_ADVTXD_MACLEN_SHIFT);
  853. context_desc->fceof_saidx = 0;
  854. context_desc->type_tucmd_mlhl =
  855. cpu_to_le32(IXGBE_TXD_CMD_DEXT |
  856. IXGBE_ADVTXD_DTYP_CTXT);
  857. context_desc->mss_l4len_idx = 0;
  858. i = 1;
  859. }
  860. /* put descriptor type bits */
  861. cmd_type = IXGBE_ADVTXD_DTYP_DATA |
  862. IXGBE_ADVTXD_DCMD_DEXT |
  863. IXGBE_ADVTXD_DCMD_IFCS;
  864. cmd_type |= len | IXGBE_TXD_CMD;
  865. tx_desc = IXGBEVF_TX_DESC(ring, i);
  866. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  867. tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
  868. tx_desc->read.olinfo_status =
  869. cpu_to_le32((len << IXGBE_ADVTXD_PAYLEN_SHIFT) |
  870. IXGBE_ADVTXD_CC);
  871. /* Avoid any potential race with cleanup */
  872. smp_wmb();
  873. /* set next_to_watch value indicating a packet is present */
  874. i++;
  875. if (i == ring->count)
  876. i = 0;
  877. tx_buffer->next_to_watch = tx_desc;
  878. ring->next_to_use = i;
  879. return IXGBEVF_XDP_TX;
  880. }
  881. static int ixgbevf_run_xdp(struct ixgbevf_adapter *adapter,
  882. struct ixgbevf_ring *rx_ring,
  883. struct xdp_buff *xdp)
  884. {
  885. int result = IXGBEVF_XDP_PASS;
  886. struct ixgbevf_ring *xdp_ring;
  887. struct bpf_prog *xdp_prog;
  888. u32 act;
  889. xdp_prog = READ_ONCE(rx_ring->xdp_prog);
  890. if (!xdp_prog)
  891. goto xdp_out;
  892. act = bpf_prog_run_xdp(xdp_prog, xdp);
  893. switch (act) {
  894. case XDP_PASS:
  895. break;
  896. case XDP_TX:
  897. xdp_ring = adapter->xdp_ring[rx_ring->queue_index];
  898. result = ixgbevf_xmit_xdp_ring(xdp_ring, xdp);
  899. if (result == IXGBEVF_XDP_CONSUMED)
  900. goto out_failure;
  901. break;
  902. default:
  903. bpf_warn_invalid_xdp_action(rx_ring->netdev, xdp_prog, act);
  904. fallthrough;
  905. case XDP_ABORTED:
  906. out_failure:
  907. trace_xdp_exception(rx_ring->netdev, xdp_prog, act);
  908. fallthrough; /* handle aborts by dropping packet */
  909. case XDP_DROP:
  910. result = IXGBEVF_XDP_CONSUMED;
  911. break;
  912. }
  913. xdp_out:
  914. return result;
  915. }
  916. static unsigned int ixgbevf_rx_frame_truesize(struct ixgbevf_ring *rx_ring,
  917. unsigned int size)
  918. {
  919. unsigned int truesize;
  920. #if (PAGE_SIZE < 8192)
  921. truesize = ixgbevf_rx_pg_size(rx_ring) / 2; /* Must be power-of-2 */
  922. #else
  923. truesize = ring_uses_build_skb(rx_ring) ?
  924. SKB_DATA_ALIGN(IXGBEVF_SKB_PAD + size) +
  925. SKB_DATA_ALIGN(sizeof(struct skb_shared_info)) :
  926. SKB_DATA_ALIGN(size);
  927. #endif
  928. return truesize;
  929. }
  930. static void ixgbevf_rx_buffer_flip(struct ixgbevf_ring *rx_ring,
  931. struct ixgbevf_rx_buffer *rx_buffer,
  932. unsigned int size)
  933. {
  934. unsigned int truesize = ixgbevf_rx_frame_truesize(rx_ring, size);
  935. #if (PAGE_SIZE < 8192)
  936. rx_buffer->page_offset ^= truesize;
  937. #else
  938. rx_buffer->page_offset += truesize;
  939. #endif
  940. }
  941. static int ixgbevf_clean_rx_irq(struct ixgbevf_q_vector *q_vector,
  942. struct ixgbevf_ring *rx_ring,
  943. int budget)
  944. {
  945. unsigned int total_rx_bytes = 0, total_rx_packets = 0, frame_sz = 0;
  946. struct ixgbevf_adapter *adapter = q_vector->adapter;
  947. u16 cleaned_count = ixgbevf_desc_unused(rx_ring);
  948. struct sk_buff *skb = rx_ring->skb;
  949. bool xdp_xmit = false;
  950. struct xdp_buff xdp;
  951. int xdp_res = 0;
  952. /* Frame size depend on rx_ring setup when PAGE_SIZE=4K */
  953. #if (PAGE_SIZE < 8192)
  954. frame_sz = ixgbevf_rx_frame_truesize(rx_ring, 0);
  955. #endif
  956. xdp_init_buff(&xdp, frame_sz, &rx_ring->xdp_rxq);
  957. while (likely(total_rx_packets < budget)) {
  958. struct ixgbevf_rx_buffer *rx_buffer;
  959. union ixgbe_adv_rx_desc *rx_desc;
  960. unsigned int size;
  961. /* return some buffers to hardware, one at a time is too slow */
  962. if (cleaned_count >= IXGBEVF_RX_BUFFER_WRITE) {
  963. ixgbevf_alloc_rx_buffers(rx_ring, cleaned_count);
  964. cleaned_count = 0;
  965. }
  966. rx_desc = IXGBEVF_RX_DESC(rx_ring, rx_ring->next_to_clean);
  967. size = le16_to_cpu(rx_desc->wb.upper.length);
  968. if (!size)
  969. break;
  970. /* This memory barrier is needed to keep us from reading
  971. * any other fields out of the rx_desc until we know the
  972. * RXD_STAT_DD bit is set
  973. */
  974. rmb();
  975. rx_buffer = ixgbevf_get_rx_buffer(rx_ring, size);
  976. /* retrieve a buffer from the ring */
  977. if (!skb) {
  978. unsigned int offset = ixgbevf_rx_offset(rx_ring);
  979. unsigned char *hard_start;
  980. hard_start = page_address(rx_buffer->page) +
  981. rx_buffer->page_offset - offset;
  982. xdp_prepare_buff(&xdp, hard_start, offset, size, true);
  983. #if (PAGE_SIZE > 4096)
  984. /* At larger PAGE_SIZE, frame_sz depend on len size */
  985. xdp.frame_sz = ixgbevf_rx_frame_truesize(rx_ring, size);
  986. #endif
  987. xdp_res = ixgbevf_run_xdp(adapter, rx_ring, &xdp);
  988. }
  989. if (xdp_res) {
  990. if (xdp_res == IXGBEVF_XDP_TX) {
  991. xdp_xmit = true;
  992. ixgbevf_rx_buffer_flip(rx_ring, rx_buffer,
  993. size);
  994. } else {
  995. rx_buffer->pagecnt_bias++;
  996. }
  997. total_rx_packets++;
  998. total_rx_bytes += size;
  999. } else if (skb) {
  1000. ixgbevf_add_rx_frag(rx_ring, rx_buffer, skb, size);
  1001. } else if (ring_uses_build_skb(rx_ring)) {
  1002. skb = ixgbevf_build_skb(rx_ring, rx_buffer,
  1003. &xdp, rx_desc);
  1004. } else {
  1005. skb = ixgbevf_construct_skb(rx_ring, rx_buffer,
  1006. &xdp, rx_desc);
  1007. }
  1008. /* exit if we failed to retrieve a buffer */
  1009. if (!xdp_res && !skb) {
  1010. rx_ring->rx_stats.alloc_rx_buff_failed++;
  1011. rx_buffer->pagecnt_bias++;
  1012. break;
  1013. }
  1014. ixgbevf_put_rx_buffer(rx_ring, rx_buffer, skb);
  1015. cleaned_count++;
  1016. /* fetch next buffer in frame if non-eop */
  1017. if (ixgbevf_is_non_eop(rx_ring, rx_desc))
  1018. continue;
  1019. /* verify the packet layout is correct */
  1020. if (xdp_res || ixgbevf_cleanup_headers(rx_ring, rx_desc, skb)) {
  1021. skb = NULL;
  1022. continue;
  1023. }
  1024. /* probably a little skewed due to removing CRC */
  1025. total_rx_bytes += skb->len;
  1026. /* Workaround hardware that can't do proper VEPA multicast
  1027. * source pruning.
  1028. */
  1029. if ((skb->pkt_type == PACKET_BROADCAST ||
  1030. skb->pkt_type == PACKET_MULTICAST) &&
  1031. ether_addr_equal(rx_ring->netdev->dev_addr,
  1032. eth_hdr(skb)->h_source)) {
  1033. dev_kfree_skb_irq(skb);
  1034. continue;
  1035. }
  1036. /* populate checksum, VLAN, and protocol */
  1037. ixgbevf_process_skb_fields(rx_ring, rx_desc, skb);
  1038. ixgbevf_rx_skb(q_vector, skb);
  1039. /* reset skb pointer */
  1040. skb = NULL;
  1041. /* update budget accounting */
  1042. total_rx_packets++;
  1043. }
  1044. /* place incomplete frames back on ring for completion */
  1045. rx_ring->skb = skb;
  1046. if (xdp_xmit) {
  1047. struct ixgbevf_ring *xdp_ring =
  1048. adapter->xdp_ring[rx_ring->queue_index];
  1049. /* Force memory writes to complete before letting h/w
  1050. * know there are new descriptors to fetch.
  1051. */
  1052. wmb();
  1053. ixgbevf_write_tail(xdp_ring, xdp_ring->next_to_use);
  1054. }
  1055. u64_stats_update_begin(&rx_ring->syncp);
  1056. rx_ring->stats.packets += total_rx_packets;
  1057. rx_ring->stats.bytes += total_rx_bytes;
  1058. u64_stats_update_end(&rx_ring->syncp);
  1059. q_vector->rx.total_packets += total_rx_packets;
  1060. q_vector->rx.total_bytes += total_rx_bytes;
  1061. return total_rx_packets;
  1062. }
  1063. /**
  1064. * ixgbevf_poll - NAPI polling calback
  1065. * @napi: napi struct with our devices info in it
  1066. * @budget: amount of work driver is allowed to do this pass, in packets
  1067. *
  1068. * This function will clean more than one or more rings associated with a
  1069. * q_vector.
  1070. **/
  1071. static int ixgbevf_poll(struct napi_struct *napi, int budget)
  1072. {
  1073. struct ixgbevf_q_vector *q_vector =
  1074. container_of(napi, struct ixgbevf_q_vector, napi);
  1075. struct ixgbevf_adapter *adapter = q_vector->adapter;
  1076. struct ixgbevf_ring *ring;
  1077. int per_ring_budget, work_done = 0;
  1078. bool clean_complete = true;
  1079. ixgbevf_for_each_ring(ring, q_vector->tx) {
  1080. if (!ixgbevf_clean_tx_irq(q_vector, ring, budget))
  1081. clean_complete = false;
  1082. }
  1083. if (budget <= 0)
  1084. return budget;
  1085. /* attempt to distribute budget to each queue fairly, but don't allow
  1086. * the budget to go below 1 because we'll exit polling
  1087. */
  1088. if (q_vector->rx.count > 1)
  1089. per_ring_budget = max(budget/q_vector->rx.count, 1);
  1090. else
  1091. per_ring_budget = budget;
  1092. ixgbevf_for_each_ring(ring, q_vector->rx) {
  1093. int cleaned = ixgbevf_clean_rx_irq(q_vector, ring,
  1094. per_ring_budget);
  1095. work_done += cleaned;
  1096. if (cleaned >= per_ring_budget)
  1097. clean_complete = false;
  1098. }
  1099. /* If all work not completed, return budget and keep polling */
  1100. if (!clean_complete)
  1101. return budget;
  1102. /* Exit the polling mode, but don't re-enable interrupts if stack might
  1103. * poll us due to busy-polling
  1104. */
  1105. if (likely(napi_complete_done(napi, work_done))) {
  1106. if (adapter->rx_itr_setting == 1)
  1107. ixgbevf_set_itr(q_vector);
  1108. if (!test_bit(__IXGBEVF_DOWN, &adapter->state) &&
  1109. !test_bit(__IXGBEVF_REMOVING, &adapter->state))
  1110. ixgbevf_irq_enable_queues(adapter,
  1111. BIT(q_vector->v_idx));
  1112. }
  1113. return min(work_done, budget - 1);
  1114. }
  1115. /**
  1116. * ixgbevf_write_eitr - write VTEITR register in hardware specific way
  1117. * @q_vector: structure containing interrupt and ring information
  1118. **/
  1119. void ixgbevf_write_eitr(struct ixgbevf_q_vector *q_vector)
  1120. {
  1121. struct ixgbevf_adapter *adapter = q_vector->adapter;
  1122. struct ixgbe_hw *hw = &adapter->hw;
  1123. int v_idx = q_vector->v_idx;
  1124. u32 itr_reg = q_vector->itr & IXGBE_MAX_EITR;
  1125. /* set the WDIS bit to not clear the timer bits and cause an
  1126. * immediate assertion of the interrupt
  1127. */
  1128. itr_reg |= IXGBE_EITR_CNT_WDIS;
  1129. IXGBE_WRITE_REG(hw, IXGBE_VTEITR(v_idx), itr_reg);
  1130. }
  1131. /**
  1132. * ixgbevf_configure_msix - Configure MSI-X hardware
  1133. * @adapter: board private structure
  1134. *
  1135. * ixgbevf_configure_msix sets up the hardware to properly generate MSI-X
  1136. * interrupts.
  1137. **/
  1138. static void ixgbevf_configure_msix(struct ixgbevf_adapter *adapter)
  1139. {
  1140. struct ixgbevf_q_vector *q_vector;
  1141. int q_vectors, v_idx;
  1142. q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1143. adapter->eims_enable_mask = 0;
  1144. /* Populate the IVAR table and set the ITR values to the
  1145. * corresponding register.
  1146. */
  1147. for (v_idx = 0; v_idx < q_vectors; v_idx++) {
  1148. struct ixgbevf_ring *ring;
  1149. q_vector = adapter->q_vector[v_idx];
  1150. ixgbevf_for_each_ring(ring, q_vector->rx)
  1151. ixgbevf_set_ivar(adapter, 0, ring->reg_idx, v_idx);
  1152. ixgbevf_for_each_ring(ring, q_vector->tx)
  1153. ixgbevf_set_ivar(adapter, 1, ring->reg_idx, v_idx);
  1154. if (q_vector->tx.ring && !q_vector->rx.ring) {
  1155. /* Tx only vector */
  1156. if (adapter->tx_itr_setting == 1)
  1157. q_vector->itr = IXGBE_12K_ITR;
  1158. else
  1159. q_vector->itr = adapter->tx_itr_setting;
  1160. } else {
  1161. /* Rx or Rx/Tx vector */
  1162. if (adapter->rx_itr_setting == 1)
  1163. q_vector->itr = IXGBE_20K_ITR;
  1164. else
  1165. q_vector->itr = adapter->rx_itr_setting;
  1166. }
  1167. /* add q_vector eims value to global eims_enable_mask */
  1168. adapter->eims_enable_mask |= BIT(v_idx);
  1169. ixgbevf_write_eitr(q_vector);
  1170. }
  1171. ixgbevf_set_ivar(adapter, -1, 1, v_idx);
  1172. /* setup eims_other and add value to global eims_enable_mask */
  1173. adapter->eims_other = BIT(v_idx);
  1174. adapter->eims_enable_mask |= adapter->eims_other;
  1175. }
  1176. enum latency_range {
  1177. lowest_latency = 0,
  1178. low_latency = 1,
  1179. bulk_latency = 2,
  1180. latency_invalid = 255
  1181. };
  1182. /**
  1183. * ixgbevf_update_itr - update the dynamic ITR value based on statistics
  1184. * @q_vector: structure containing interrupt and ring information
  1185. * @ring_container: structure containing ring performance data
  1186. *
  1187. * Stores a new ITR value based on packets and byte
  1188. * counts during the last interrupt. The advantage of per interrupt
  1189. * computation is faster updates and more accurate ITR for the current
  1190. * traffic pattern. Constants in this function were computed
  1191. * based on theoretical maximum wire speed and thresholds were set based
  1192. * on testing data as well as attempting to minimize response time
  1193. * while increasing bulk throughput.
  1194. **/
  1195. static void ixgbevf_update_itr(struct ixgbevf_q_vector *q_vector,
  1196. struct ixgbevf_ring_container *ring_container)
  1197. {
  1198. int bytes = ring_container->total_bytes;
  1199. int packets = ring_container->total_packets;
  1200. u32 timepassed_us;
  1201. u64 bytes_perint;
  1202. u8 itr_setting = ring_container->itr;
  1203. if (packets == 0)
  1204. return;
  1205. /* simple throttle rate management
  1206. * 0-20MB/s lowest (100000 ints/s)
  1207. * 20-100MB/s low (20000 ints/s)
  1208. * 100-1249MB/s bulk (12000 ints/s)
  1209. */
  1210. /* what was last interrupt timeslice? */
  1211. timepassed_us = q_vector->itr >> 2;
  1212. if (timepassed_us == 0)
  1213. return;
  1214. bytes_perint = bytes / timepassed_us; /* bytes/usec */
  1215. switch (itr_setting) {
  1216. case lowest_latency:
  1217. if (bytes_perint > 10)
  1218. itr_setting = low_latency;
  1219. break;
  1220. case low_latency:
  1221. if (bytes_perint > 20)
  1222. itr_setting = bulk_latency;
  1223. else if (bytes_perint <= 10)
  1224. itr_setting = lowest_latency;
  1225. break;
  1226. case bulk_latency:
  1227. if (bytes_perint <= 20)
  1228. itr_setting = low_latency;
  1229. break;
  1230. }
  1231. /* clear work counters since we have the values we need */
  1232. ring_container->total_bytes = 0;
  1233. ring_container->total_packets = 0;
  1234. /* write updated itr to ring container */
  1235. ring_container->itr = itr_setting;
  1236. }
  1237. static void ixgbevf_set_itr(struct ixgbevf_q_vector *q_vector)
  1238. {
  1239. u32 new_itr = q_vector->itr;
  1240. u8 current_itr;
  1241. ixgbevf_update_itr(q_vector, &q_vector->tx);
  1242. ixgbevf_update_itr(q_vector, &q_vector->rx);
  1243. current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
  1244. switch (current_itr) {
  1245. /* counts and packets in update_itr are dependent on these numbers */
  1246. case lowest_latency:
  1247. new_itr = IXGBE_100K_ITR;
  1248. break;
  1249. case low_latency:
  1250. new_itr = IXGBE_20K_ITR;
  1251. break;
  1252. case bulk_latency:
  1253. new_itr = IXGBE_12K_ITR;
  1254. break;
  1255. default:
  1256. break;
  1257. }
  1258. if (new_itr != q_vector->itr) {
  1259. /* do an exponential smoothing */
  1260. new_itr = (10 * new_itr * q_vector->itr) /
  1261. ((9 * new_itr) + q_vector->itr);
  1262. /* save the algorithm value here */
  1263. q_vector->itr = new_itr;
  1264. ixgbevf_write_eitr(q_vector);
  1265. }
  1266. }
  1267. static irqreturn_t ixgbevf_msix_other(int irq, void *data)
  1268. {
  1269. struct ixgbevf_adapter *adapter = data;
  1270. struct ixgbe_hw *hw = &adapter->hw;
  1271. hw->mac.get_link_status = 1;
  1272. ixgbevf_service_event_schedule(adapter);
  1273. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_other);
  1274. return IRQ_HANDLED;
  1275. }
  1276. /**
  1277. * ixgbevf_msix_clean_rings - single unshared vector rx clean (all queues)
  1278. * @irq: unused
  1279. * @data: pointer to our q_vector struct for this interrupt vector
  1280. **/
  1281. static irqreturn_t ixgbevf_msix_clean_rings(int irq, void *data)
  1282. {
  1283. struct ixgbevf_q_vector *q_vector = data;
  1284. /* EIAM disabled interrupts (on this vector) for us */
  1285. if (q_vector->rx.ring || q_vector->tx.ring)
  1286. napi_schedule_irqoff(&q_vector->napi);
  1287. return IRQ_HANDLED;
  1288. }
  1289. /**
  1290. * ixgbevf_request_msix_irqs - Initialize MSI-X interrupts
  1291. * @adapter: board private structure
  1292. *
  1293. * ixgbevf_request_msix_irqs allocates MSI-X vectors and requests
  1294. * interrupts from the kernel.
  1295. **/
  1296. static int ixgbevf_request_msix_irqs(struct ixgbevf_adapter *adapter)
  1297. {
  1298. struct net_device *netdev = adapter->netdev;
  1299. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1300. unsigned int ri = 0, ti = 0;
  1301. int vector, err;
  1302. for (vector = 0; vector < q_vectors; vector++) {
  1303. struct ixgbevf_q_vector *q_vector = adapter->q_vector[vector];
  1304. struct msix_entry *entry = &adapter->msix_entries[vector];
  1305. if (q_vector->tx.ring && q_vector->rx.ring) {
  1306. snprintf(q_vector->name, sizeof(q_vector->name),
  1307. "%s-TxRx-%u", netdev->name, ri++);
  1308. ti++;
  1309. } else if (q_vector->rx.ring) {
  1310. snprintf(q_vector->name, sizeof(q_vector->name),
  1311. "%s-rx-%u", netdev->name, ri++);
  1312. } else if (q_vector->tx.ring) {
  1313. snprintf(q_vector->name, sizeof(q_vector->name),
  1314. "%s-tx-%u", netdev->name, ti++);
  1315. } else {
  1316. /* skip this unused q_vector */
  1317. continue;
  1318. }
  1319. err = request_irq(entry->vector, &ixgbevf_msix_clean_rings, 0,
  1320. q_vector->name, q_vector);
  1321. if (err) {
  1322. hw_dbg(&adapter->hw,
  1323. "request_irq failed for MSIX interrupt Error: %d\n",
  1324. err);
  1325. goto free_queue_irqs;
  1326. }
  1327. }
  1328. err = request_irq(adapter->msix_entries[vector].vector,
  1329. &ixgbevf_msix_other, 0, netdev->name, adapter);
  1330. if (err) {
  1331. hw_dbg(&adapter->hw, "request_irq for msix_other failed: %d\n",
  1332. err);
  1333. goto free_queue_irqs;
  1334. }
  1335. return 0;
  1336. free_queue_irqs:
  1337. while (vector) {
  1338. vector--;
  1339. free_irq(adapter->msix_entries[vector].vector,
  1340. adapter->q_vector[vector]);
  1341. }
  1342. /* This failure is non-recoverable - it indicates the system is
  1343. * out of MSIX vector resources and the VF driver cannot run
  1344. * without them. Set the number of msix vectors to zero
  1345. * indicating that not enough can be allocated. The error
  1346. * will be returned to the user indicating device open failed.
  1347. * Any further attempts to force the driver to open will also
  1348. * fail. The only way to recover is to unload the driver and
  1349. * reload it again. If the system has recovered some MSIX
  1350. * vectors then it may succeed.
  1351. */
  1352. adapter->num_msix_vectors = 0;
  1353. return err;
  1354. }
  1355. /**
  1356. * ixgbevf_request_irq - initialize interrupts
  1357. * @adapter: board private structure
  1358. *
  1359. * Attempts to configure interrupts using the best available
  1360. * capabilities of the hardware and kernel.
  1361. **/
  1362. static int ixgbevf_request_irq(struct ixgbevf_adapter *adapter)
  1363. {
  1364. int err = ixgbevf_request_msix_irqs(adapter);
  1365. if (err)
  1366. hw_dbg(&adapter->hw, "request_irq failed, Error %d\n", err);
  1367. return err;
  1368. }
  1369. static void ixgbevf_free_irq(struct ixgbevf_adapter *adapter)
  1370. {
  1371. int i, q_vectors;
  1372. if (!adapter->msix_entries)
  1373. return;
  1374. q_vectors = adapter->num_msix_vectors;
  1375. i = q_vectors - 1;
  1376. free_irq(adapter->msix_entries[i].vector, adapter);
  1377. i--;
  1378. for (; i >= 0; i--) {
  1379. /* free only the irqs that were actually requested */
  1380. if (!adapter->q_vector[i]->rx.ring &&
  1381. !adapter->q_vector[i]->tx.ring)
  1382. continue;
  1383. free_irq(adapter->msix_entries[i].vector,
  1384. adapter->q_vector[i]);
  1385. }
  1386. }
  1387. /**
  1388. * ixgbevf_irq_disable - Mask off interrupt generation on the NIC
  1389. * @adapter: board private structure
  1390. **/
  1391. static inline void ixgbevf_irq_disable(struct ixgbevf_adapter *adapter)
  1392. {
  1393. struct ixgbe_hw *hw = &adapter->hw;
  1394. int i;
  1395. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, 0);
  1396. IXGBE_WRITE_REG(hw, IXGBE_VTEIMC, ~0);
  1397. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, 0);
  1398. IXGBE_WRITE_FLUSH(hw);
  1399. for (i = 0; i < adapter->num_msix_vectors; i++)
  1400. synchronize_irq(adapter->msix_entries[i].vector);
  1401. }
  1402. /**
  1403. * ixgbevf_irq_enable - Enable default interrupt generation settings
  1404. * @adapter: board private structure
  1405. **/
  1406. static inline void ixgbevf_irq_enable(struct ixgbevf_adapter *adapter)
  1407. {
  1408. struct ixgbe_hw *hw = &adapter->hw;
  1409. IXGBE_WRITE_REG(hw, IXGBE_VTEIAM, adapter->eims_enable_mask);
  1410. IXGBE_WRITE_REG(hw, IXGBE_VTEIAC, adapter->eims_enable_mask);
  1411. IXGBE_WRITE_REG(hw, IXGBE_VTEIMS, adapter->eims_enable_mask);
  1412. }
  1413. /**
  1414. * ixgbevf_configure_tx_ring - Configure 82599 VF Tx ring after Reset
  1415. * @adapter: board private structure
  1416. * @ring: structure containing ring specific data
  1417. *
  1418. * Configure the Tx descriptor ring after a reset.
  1419. **/
  1420. static void ixgbevf_configure_tx_ring(struct ixgbevf_adapter *adapter,
  1421. struct ixgbevf_ring *ring)
  1422. {
  1423. struct ixgbe_hw *hw = &adapter->hw;
  1424. u64 tdba = ring->dma;
  1425. int wait_loop = 10;
  1426. u32 txdctl = IXGBE_TXDCTL_ENABLE;
  1427. u8 reg_idx = ring->reg_idx;
  1428. /* disable queue to avoid issues while updating state */
  1429. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
  1430. IXGBE_WRITE_FLUSH(hw);
  1431. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
  1432. IXGBE_WRITE_REG(hw, IXGBE_VFTDBAH(reg_idx), tdba >> 32);
  1433. IXGBE_WRITE_REG(hw, IXGBE_VFTDLEN(reg_idx),
  1434. ring->count * sizeof(union ixgbe_adv_tx_desc));
  1435. /* disable head writeback */
  1436. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(reg_idx), 0);
  1437. IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(reg_idx), 0);
  1438. /* enable relaxed ordering */
  1439. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(reg_idx),
  1440. (IXGBE_DCA_TXCTRL_DESC_RRO_EN |
  1441. IXGBE_DCA_TXCTRL_DATA_RRO_EN));
  1442. /* reset head and tail pointers */
  1443. IXGBE_WRITE_REG(hw, IXGBE_VFTDH(reg_idx), 0);
  1444. IXGBE_WRITE_REG(hw, IXGBE_VFTDT(reg_idx), 0);
  1445. ring->tail = adapter->io_addr + IXGBE_VFTDT(reg_idx);
  1446. /* reset ntu and ntc to place SW in sync with hardwdare */
  1447. ring->next_to_clean = 0;
  1448. ring->next_to_use = 0;
  1449. /* In order to avoid issues WTHRESH + PTHRESH should always be equal
  1450. * to or less than the number of on chip descriptors, which is
  1451. * currently 40.
  1452. */
  1453. txdctl |= (8 << 16); /* WTHRESH = 8 */
  1454. /* Setting PTHRESH to 32 both improves performance */
  1455. txdctl |= (1u << 8) | /* HTHRESH = 1 */
  1456. 32; /* PTHRESH = 32 */
  1457. /* reinitialize tx_buffer_info */
  1458. memset(ring->tx_buffer_info, 0,
  1459. sizeof(struct ixgbevf_tx_buffer) * ring->count);
  1460. clear_bit(__IXGBEVF_HANG_CHECK_ARMED, &ring->state);
  1461. clear_bit(__IXGBEVF_TX_XDP_RING_PRIMED, &ring->state);
  1462. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx), txdctl);
  1463. /* poll to verify queue is enabled */
  1464. do {
  1465. usleep_range(1000, 2000);
  1466. txdctl = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(reg_idx));
  1467. } while (--wait_loop && !(txdctl & IXGBE_TXDCTL_ENABLE));
  1468. if (!wait_loop)
  1469. hw_dbg(hw, "Could not enable Tx Queue %d\n", reg_idx);
  1470. }
  1471. /**
  1472. * ixgbevf_configure_tx - Configure 82599 VF Transmit Unit after Reset
  1473. * @adapter: board private structure
  1474. *
  1475. * Configure the Tx unit of the MAC after a reset.
  1476. **/
  1477. static void ixgbevf_configure_tx(struct ixgbevf_adapter *adapter)
  1478. {
  1479. u32 i;
  1480. /* Setup the HW Tx Head and Tail descriptor pointers */
  1481. for (i = 0; i < adapter->num_tx_queues; i++)
  1482. ixgbevf_configure_tx_ring(adapter, adapter->tx_ring[i]);
  1483. for (i = 0; i < adapter->num_xdp_queues; i++)
  1484. ixgbevf_configure_tx_ring(adapter, adapter->xdp_ring[i]);
  1485. }
  1486. #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
  1487. static void ixgbevf_configure_srrctl(struct ixgbevf_adapter *adapter,
  1488. struct ixgbevf_ring *ring, int index)
  1489. {
  1490. struct ixgbe_hw *hw = &adapter->hw;
  1491. u32 srrctl;
  1492. srrctl = IXGBE_SRRCTL_DROP_EN;
  1493. srrctl |= IXGBEVF_RX_HDR_SIZE << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
  1494. if (ring_uses_large_buffer(ring))
  1495. srrctl |= IXGBEVF_RXBUFFER_3072 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1496. else
  1497. srrctl |= IXGBEVF_RXBUFFER_2048 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
  1498. srrctl |= IXGBE_SRRCTL_DESCTYPE_ADV_ONEBUF;
  1499. IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(index), srrctl);
  1500. }
  1501. static void ixgbevf_setup_psrtype(struct ixgbevf_adapter *adapter)
  1502. {
  1503. struct ixgbe_hw *hw = &adapter->hw;
  1504. /* PSRTYPE must be initialized in 82599 */
  1505. u32 psrtype = IXGBE_PSRTYPE_TCPHDR | IXGBE_PSRTYPE_UDPHDR |
  1506. IXGBE_PSRTYPE_IPV4HDR | IXGBE_PSRTYPE_IPV6HDR |
  1507. IXGBE_PSRTYPE_L2HDR;
  1508. if (adapter->num_rx_queues > 1)
  1509. psrtype |= BIT(29);
  1510. IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, psrtype);
  1511. }
  1512. #define IXGBEVF_MAX_RX_DESC_POLL 10
  1513. static void ixgbevf_disable_rx_queue(struct ixgbevf_adapter *adapter,
  1514. struct ixgbevf_ring *ring)
  1515. {
  1516. struct ixgbe_hw *hw = &adapter->hw;
  1517. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1518. u32 rxdctl;
  1519. u8 reg_idx = ring->reg_idx;
  1520. if (IXGBE_REMOVED(hw->hw_addr))
  1521. return;
  1522. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1523. rxdctl &= ~IXGBE_RXDCTL_ENABLE;
  1524. /* write value back with RXDCTL.ENABLE bit cleared */
  1525. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1526. /* the hardware may take up to 100us to really disable the Rx queue */
  1527. do {
  1528. udelay(10);
  1529. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1530. } while (--wait_loop && (rxdctl & IXGBE_RXDCTL_ENABLE));
  1531. if (!wait_loop)
  1532. pr_err("RXDCTL.ENABLE queue %d not cleared while polling\n",
  1533. reg_idx);
  1534. }
  1535. static void ixgbevf_rx_desc_queue_enable(struct ixgbevf_adapter *adapter,
  1536. struct ixgbevf_ring *ring)
  1537. {
  1538. struct ixgbe_hw *hw = &adapter->hw;
  1539. int wait_loop = IXGBEVF_MAX_RX_DESC_POLL;
  1540. u32 rxdctl;
  1541. u8 reg_idx = ring->reg_idx;
  1542. if (IXGBE_REMOVED(hw->hw_addr))
  1543. return;
  1544. do {
  1545. usleep_range(1000, 2000);
  1546. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1547. } while (--wait_loop && !(rxdctl & IXGBE_RXDCTL_ENABLE));
  1548. if (!wait_loop)
  1549. pr_err("RXDCTL.ENABLE queue %d not set while polling\n",
  1550. reg_idx);
  1551. }
  1552. /**
  1553. * ixgbevf_init_rss_key - Initialize adapter RSS key
  1554. * @adapter: device handle
  1555. *
  1556. * Allocates and initializes the RSS key if it is not allocated.
  1557. **/
  1558. static inline int ixgbevf_init_rss_key(struct ixgbevf_adapter *adapter)
  1559. {
  1560. u32 *rss_key;
  1561. if (!adapter->rss_key) {
  1562. rss_key = kzalloc(IXGBEVF_RSS_HASH_KEY_SIZE, GFP_KERNEL);
  1563. if (unlikely(!rss_key))
  1564. return -ENOMEM;
  1565. netdev_rss_key_fill(rss_key, IXGBEVF_RSS_HASH_KEY_SIZE);
  1566. adapter->rss_key = rss_key;
  1567. }
  1568. return 0;
  1569. }
  1570. static void ixgbevf_setup_vfmrqc(struct ixgbevf_adapter *adapter)
  1571. {
  1572. struct ixgbe_hw *hw = &adapter->hw;
  1573. u32 vfmrqc = 0, vfreta = 0;
  1574. u16 rss_i = adapter->num_rx_queues;
  1575. u8 i, j;
  1576. /* Fill out hash function seeds */
  1577. for (i = 0; i < IXGBEVF_VFRSSRK_REGS; i++)
  1578. IXGBE_WRITE_REG(hw, IXGBE_VFRSSRK(i), *(adapter->rss_key + i));
  1579. for (i = 0, j = 0; i < IXGBEVF_X550_VFRETA_SIZE; i++, j++) {
  1580. if (j == rss_i)
  1581. j = 0;
  1582. adapter->rss_indir_tbl[i] = j;
  1583. vfreta |= j << (i & 0x3) * 8;
  1584. if ((i & 3) == 3) {
  1585. IXGBE_WRITE_REG(hw, IXGBE_VFRETA(i >> 2), vfreta);
  1586. vfreta = 0;
  1587. }
  1588. }
  1589. /* Perform hash on these packet types */
  1590. vfmrqc |= IXGBE_VFMRQC_RSS_FIELD_IPV4 |
  1591. IXGBE_VFMRQC_RSS_FIELD_IPV4_TCP |
  1592. IXGBE_VFMRQC_RSS_FIELD_IPV6 |
  1593. IXGBE_VFMRQC_RSS_FIELD_IPV6_TCP;
  1594. vfmrqc |= IXGBE_VFMRQC_RSSEN;
  1595. IXGBE_WRITE_REG(hw, IXGBE_VFMRQC, vfmrqc);
  1596. }
  1597. static void ixgbevf_configure_rx_ring(struct ixgbevf_adapter *adapter,
  1598. struct ixgbevf_ring *ring)
  1599. {
  1600. struct ixgbe_hw *hw = &adapter->hw;
  1601. union ixgbe_adv_rx_desc *rx_desc;
  1602. u64 rdba = ring->dma;
  1603. u32 rxdctl;
  1604. u8 reg_idx = ring->reg_idx;
  1605. /* disable queue to avoid issues while updating state */
  1606. rxdctl = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(reg_idx));
  1607. ixgbevf_disable_rx_queue(adapter, ring);
  1608. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
  1609. IXGBE_WRITE_REG(hw, IXGBE_VFRDBAH(reg_idx), rdba >> 32);
  1610. IXGBE_WRITE_REG(hw, IXGBE_VFRDLEN(reg_idx),
  1611. ring->count * sizeof(union ixgbe_adv_rx_desc));
  1612. #ifndef CONFIG_SPARC
  1613. /* enable relaxed ordering */
  1614. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1615. IXGBE_DCA_RXCTRL_DESC_RRO_EN);
  1616. #else
  1617. IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(reg_idx),
  1618. IXGBE_DCA_RXCTRL_DESC_RRO_EN |
  1619. IXGBE_DCA_RXCTRL_DATA_WRO_EN);
  1620. #endif
  1621. /* reset head and tail pointers */
  1622. IXGBE_WRITE_REG(hw, IXGBE_VFRDH(reg_idx), 0);
  1623. IXGBE_WRITE_REG(hw, IXGBE_VFRDT(reg_idx), 0);
  1624. ring->tail = adapter->io_addr + IXGBE_VFRDT(reg_idx);
  1625. /* initialize rx_buffer_info */
  1626. memset(ring->rx_buffer_info, 0,
  1627. sizeof(struct ixgbevf_rx_buffer) * ring->count);
  1628. /* initialize Rx descriptor 0 */
  1629. rx_desc = IXGBEVF_RX_DESC(ring, 0);
  1630. rx_desc->wb.upper.length = 0;
  1631. /* reset ntu and ntc to place SW in sync with hardwdare */
  1632. ring->next_to_clean = 0;
  1633. ring->next_to_use = 0;
  1634. ring->next_to_alloc = 0;
  1635. ixgbevf_configure_srrctl(adapter, ring, reg_idx);
  1636. /* RXDCTL.RLPML does not work on 82599 */
  1637. if (adapter->hw.mac.type != ixgbe_mac_82599_vf) {
  1638. rxdctl &= ~(IXGBE_RXDCTL_RLPMLMASK |
  1639. IXGBE_RXDCTL_RLPML_EN);
  1640. #if (PAGE_SIZE < 8192)
  1641. /* Limit the maximum frame size so we don't overrun the skb */
  1642. if (ring_uses_build_skb(ring) &&
  1643. !ring_uses_large_buffer(ring))
  1644. rxdctl |= IXGBEVF_MAX_FRAME_BUILD_SKB |
  1645. IXGBE_RXDCTL_RLPML_EN;
  1646. #endif
  1647. }
  1648. rxdctl |= IXGBE_RXDCTL_ENABLE | IXGBE_RXDCTL_VME;
  1649. IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(reg_idx), rxdctl);
  1650. ixgbevf_rx_desc_queue_enable(adapter, ring);
  1651. ixgbevf_alloc_rx_buffers(ring, ixgbevf_desc_unused(ring));
  1652. }
  1653. static void ixgbevf_set_rx_buffer_len(struct ixgbevf_adapter *adapter,
  1654. struct ixgbevf_ring *rx_ring)
  1655. {
  1656. struct net_device *netdev = adapter->netdev;
  1657. unsigned int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  1658. /* set build_skb and buffer size flags */
  1659. clear_ring_build_skb_enabled(rx_ring);
  1660. clear_ring_uses_large_buffer(rx_ring);
  1661. if (adapter->flags & IXGBEVF_FLAGS_LEGACY_RX)
  1662. return;
  1663. if (PAGE_SIZE < 8192)
  1664. if (max_frame > IXGBEVF_MAX_FRAME_BUILD_SKB)
  1665. set_ring_uses_large_buffer(rx_ring);
  1666. /* 82599 can't rely on RXDCTL.RLPML to restrict the size of the frame */
  1667. if (adapter->hw.mac.type == ixgbe_mac_82599_vf && !ring_uses_large_buffer(rx_ring))
  1668. return;
  1669. set_ring_build_skb_enabled(rx_ring);
  1670. }
  1671. /**
  1672. * ixgbevf_configure_rx - Configure 82599 VF Receive Unit after Reset
  1673. * @adapter: board private structure
  1674. *
  1675. * Configure the Rx unit of the MAC after a reset.
  1676. **/
  1677. static void ixgbevf_configure_rx(struct ixgbevf_adapter *adapter)
  1678. {
  1679. struct ixgbe_hw *hw = &adapter->hw;
  1680. struct net_device *netdev = adapter->netdev;
  1681. int i, ret;
  1682. ixgbevf_setup_psrtype(adapter);
  1683. if (hw->mac.type >= ixgbe_mac_X550_vf)
  1684. ixgbevf_setup_vfmrqc(adapter);
  1685. spin_lock_bh(&adapter->mbx_lock);
  1686. /* notify the PF of our intent to use this size of frame */
  1687. ret = hw->mac.ops.set_rlpml(hw, netdev->mtu + ETH_HLEN + ETH_FCS_LEN);
  1688. spin_unlock_bh(&adapter->mbx_lock);
  1689. if (ret)
  1690. dev_err(&adapter->pdev->dev,
  1691. "Failed to set MTU at %d\n", netdev->mtu);
  1692. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1693. * the Base and Length of the Rx Descriptor Ring
  1694. */
  1695. for (i = 0; i < adapter->num_rx_queues; i++) {
  1696. struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
  1697. ixgbevf_set_rx_buffer_len(adapter, rx_ring);
  1698. ixgbevf_configure_rx_ring(adapter, rx_ring);
  1699. }
  1700. }
  1701. static int ixgbevf_vlan_rx_add_vid(struct net_device *netdev,
  1702. __be16 proto, u16 vid)
  1703. {
  1704. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1705. struct ixgbe_hw *hw = &adapter->hw;
  1706. int err;
  1707. spin_lock_bh(&adapter->mbx_lock);
  1708. /* add VID to filter table */
  1709. err = hw->mac.ops.set_vfta(hw, vid, 0, true);
  1710. spin_unlock_bh(&adapter->mbx_lock);
  1711. if (err) {
  1712. netdev_err(netdev, "VF could not set VLAN %d\n", vid);
  1713. /* translate error return types so error makes sense */
  1714. if (err == IXGBE_ERR_MBX)
  1715. return -EIO;
  1716. if (err == IXGBE_ERR_INVALID_ARGUMENT)
  1717. return -EACCES;
  1718. }
  1719. set_bit(vid, adapter->active_vlans);
  1720. return err;
  1721. }
  1722. static int ixgbevf_vlan_rx_kill_vid(struct net_device *netdev,
  1723. __be16 proto, u16 vid)
  1724. {
  1725. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1726. struct ixgbe_hw *hw = &adapter->hw;
  1727. int err;
  1728. spin_lock_bh(&adapter->mbx_lock);
  1729. /* remove VID from filter table */
  1730. err = hw->mac.ops.set_vfta(hw, vid, 0, false);
  1731. spin_unlock_bh(&adapter->mbx_lock);
  1732. if (err)
  1733. netdev_err(netdev, "Could not remove VLAN %d\n", vid);
  1734. clear_bit(vid, adapter->active_vlans);
  1735. return err;
  1736. }
  1737. static void ixgbevf_restore_vlan(struct ixgbevf_adapter *adapter)
  1738. {
  1739. u16 vid;
  1740. for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
  1741. ixgbevf_vlan_rx_add_vid(adapter->netdev,
  1742. htons(ETH_P_8021Q), vid);
  1743. }
  1744. static int ixgbevf_write_uc_addr_list(struct net_device *netdev)
  1745. {
  1746. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1747. struct ixgbe_hw *hw = &adapter->hw;
  1748. int count = 0;
  1749. if (!netdev_uc_empty(netdev)) {
  1750. struct netdev_hw_addr *ha;
  1751. netdev_for_each_uc_addr(ha, netdev) {
  1752. hw->mac.ops.set_uc_addr(hw, ++count, ha->addr);
  1753. udelay(200);
  1754. }
  1755. } else {
  1756. /* If the list is empty then send message to PF driver to
  1757. * clear all MAC VLANs on this VF.
  1758. */
  1759. hw->mac.ops.set_uc_addr(hw, 0, NULL);
  1760. }
  1761. return count;
  1762. }
  1763. /**
  1764. * ixgbevf_set_rx_mode - Multicast and unicast set
  1765. * @netdev: network interface device structure
  1766. *
  1767. * The set_rx_method entry point is called whenever the multicast address
  1768. * list, unicast address list or the network interface flags are updated.
  1769. * This routine is responsible for configuring the hardware for proper
  1770. * multicast mode and configuring requested unicast filters.
  1771. **/
  1772. static void ixgbevf_set_rx_mode(struct net_device *netdev)
  1773. {
  1774. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  1775. struct ixgbe_hw *hw = &adapter->hw;
  1776. unsigned int flags = netdev->flags;
  1777. int xcast_mode;
  1778. /* request the most inclusive mode we need */
  1779. if (flags & IFF_PROMISC)
  1780. xcast_mode = IXGBEVF_XCAST_MODE_PROMISC;
  1781. else if (flags & IFF_ALLMULTI)
  1782. xcast_mode = IXGBEVF_XCAST_MODE_ALLMULTI;
  1783. else if (flags & (IFF_BROADCAST | IFF_MULTICAST))
  1784. xcast_mode = IXGBEVF_XCAST_MODE_MULTI;
  1785. else
  1786. xcast_mode = IXGBEVF_XCAST_MODE_NONE;
  1787. spin_lock_bh(&adapter->mbx_lock);
  1788. hw->mac.ops.update_xcast_mode(hw, xcast_mode);
  1789. /* reprogram multicast list */
  1790. hw->mac.ops.update_mc_addr_list(hw, netdev);
  1791. ixgbevf_write_uc_addr_list(netdev);
  1792. spin_unlock_bh(&adapter->mbx_lock);
  1793. }
  1794. static void ixgbevf_napi_enable_all(struct ixgbevf_adapter *adapter)
  1795. {
  1796. int q_idx;
  1797. struct ixgbevf_q_vector *q_vector;
  1798. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1799. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1800. q_vector = adapter->q_vector[q_idx];
  1801. napi_enable(&q_vector->napi);
  1802. }
  1803. }
  1804. static void ixgbevf_napi_disable_all(struct ixgbevf_adapter *adapter)
  1805. {
  1806. int q_idx;
  1807. struct ixgbevf_q_vector *q_vector;
  1808. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  1809. for (q_idx = 0; q_idx < q_vectors; q_idx++) {
  1810. q_vector = adapter->q_vector[q_idx];
  1811. napi_disable(&q_vector->napi);
  1812. }
  1813. }
  1814. static int ixgbevf_configure_dcb(struct ixgbevf_adapter *adapter)
  1815. {
  1816. struct ixgbe_hw *hw = &adapter->hw;
  1817. unsigned int def_q = 0;
  1818. unsigned int num_tcs = 0;
  1819. unsigned int num_rx_queues = adapter->num_rx_queues;
  1820. unsigned int num_tx_queues = adapter->num_tx_queues;
  1821. int err;
  1822. spin_lock_bh(&adapter->mbx_lock);
  1823. /* fetch queue configuration from the PF */
  1824. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  1825. spin_unlock_bh(&adapter->mbx_lock);
  1826. if (err)
  1827. return err;
  1828. if (num_tcs > 1) {
  1829. /* we need only one Tx queue */
  1830. num_tx_queues = 1;
  1831. /* update default Tx ring register index */
  1832. adapter->tx_ring[0]->reg_idx = def_q;
  1833. /* we need as many queues as traffic classes */
  1834. num_rx_queues = num_tcs;
  1835. }
  1836. /* if we have a bad config abort request queue reset */
  1837. if ((adapter->num_rx_queues != num_rx_queues) ||
  1838. (adapter->num_tx_queues != num_tx_queues)) {
  1839. /* force mailbox timeout to prevent further messages */
  1840. hw->mbx.timeout = 0;
  1841. /* wait for watchdog to come around and bail us out */
  1842. set_bit(__IXGBEVF_QUEUE_RESET_REQUESTED, &adapter->state);
  1843. }
  1844. return 0;
  1845. }
  1846. static void ixgbevf_configure(struct ixgbevf_adapter *adapter)
  1847. {
  1848. ixgbevf_configure_dcb(adapter);
  1849. ixgbevf_set_rx_mode(adapter->netdev);
  1850. ixgbevf_restore_vlan(adapter);
  1851. ixgbevf_ipsec_restore(adapter);
  1852. ixgbevf_configure_tx(adapter);
  1853. ixgbevf_configure_rx(adapter);
  1854. }
  1855. static void ixgbevf_save_reset_stats(struct ixgbevf_adapter *adapter)
  1856. {
  1857. /* Only save pre-reset stats if there are some */
  1858. if (adapter->stats.vfgprc || adapter->stats.vfgptc) {
  1859. adapter->stats.saved_reset_vfgprc += adapter->stats.vfgprc -
  1860. adapter->stats.base_vfgprc;
  1861. adapter->stats.saved_reset_vfgptc += adapter->stats.vfgptc -
  1862. adapter->stats.base_vfgptc;
  1863. adapter->stats.saved_reset_vfgorc += adapter->stats.vfgorc -
  1864. adapter->stats.base_vfgorc;
  1865. adapter->stats.saved_reset_vfgotc += adapter->stats.vfgotc -
  1866. adapter->stats.base_vfgotc;
  1867. adapter->stats.saved_reset_vfmprc += adapter->stats.vfmprc -
  1868. adapter->stats.base_vfmprc;
  1869. }
  1870. }
  1871. static void ixgbevf_init_last_counter_stats(struct ixgbevf_adapter *adapter)
  1872. {
  1873. struct ixgbe_hw *hw = &adapter->hw;
  1874. adapter->stats.last_vfgprc = IXGBE_READ_REG(hw, IXGBE_VFGPRC);
  1875. adapter->stats.last_vfgorc = IXGBE_READ_REG(hw, IXGBE_VFGORC_LSB);
  1876. adapter->stats.last_vfgorc |=
  1877. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGORC_MSB))) << 32);
  1878. adapter->stats.last_vfgptc = IXGBE_READ_REG(hw, IXGBE_VFGPTC);
  1879. adapter->stats.last_vfgotc = IXGBE_READ_REG(hw, IXGBE_VFGOTC_LSB);
  1880. adapter->stats.last_vfgotc |=
  1881. (((u64)(IXGBE_READ_REG(hw, IXGBE_VFGOTC_MSB))) << 32);
  1882. adapter->stats.last_vfmprc = IXGBE_READ_REG(hw, IXGBE_VFMPRC);
  1883. adapter->stats.base_vfgprc = adapter->stats.last_vfgprc;
  1884. adapter->stats.base_vfgorc = adapter->stats.last_vfgorc;
  1885. adapter->stats.base_vfgptc = adapter->stats.last_vfgptc;
  1886. adapter->stats.base_vfgotc = adapter->stats.last_vfgotc;
  1887. adapter->stats.base_vfmprc = adapter->stats.last_vfmprc;
  1888. }
  1889. /**
  1890. * ixgbevf_set_features - Set features supported by PF
  1891. * @adapter: pointer to the adapter struct
  1892. *
  1893. * Negotiate with PF supported features and then set pf_features accordingly.
  1894. */
  1895. static void ixgbevf_set_features(struct ixgbevf_adapter *adapter)
  1896. {
  1897. u32 *pf_features = &adapter->pf_features;
  1898. struct ixgbe_hw *hw = &adapter->hw;
  1899. int err;
  1900. err = hw->mac.ops.negotiate_features(hw, pf_features);
  1901. if (err && err != -EOPNOTSUPP)
  1902. netdev_dbg(adapter->netdev,
  1903. "PF feature negotiation failed.\n");
  1904. /* Address also pre API 1.7 cases */
  1905. if (hw->api_version == ixgbe_mbox_api_14)
  1906. *pf_features |= IXGBEVF_PF_SUP_IPSEC;
  1907. else if (hw->api_version == ixgbe_mbox_api_15)
  1908. *pf_features |= IXGBEVF_PF_SUP_ESX_MBX;
  1909. }
  1910. static void ixgbevf_negotiate_api(struct ixgbevf_adapter *adapter)
  1911. {
  1912. struct ixgbe_hw *hw = &adapter->hw;
  1913. static const int api[] = {
  1914. ixgbe_mbox_api_17,
  1915. ixgbe_mbox_api_16,
  1916. ixgbe_mbox_api_15,
  1917. ixgbe_mbox_api_14,
  1918. ixgbe_mbox_api_13,
  1919. ixgbe_mbox_api_12,
  1920. ixgbe_mbox_api_11,
  1921. ixgbe_mbox_api_10,
  1922. ixgbe_mbox_api_unknown
  1923. };
  1924. int err, idx = 0;
  1925. spin_lock_bh(&adapter->mbx_lock);
  1926. while (api[idx] != ixgbe_mbox_api_unknown) {
  1927. err = hw->mac.ops.negotiate_api_version(hw, api[idx]);
  1928. if (!err)
  1929. break;
  1930. idx++;
  1931. }
  1932. ixgbevf_set_features(adapter);
  1933. if (adapter->pf_features & IXGBEVF_PF_SUP_ESX_MBX) {
  1934. hw->mbx.ops.init_params(hw);
  1935. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops,
  1936. sizeof(struct ixgbe_mbx_operations));
  1937. }
  1938. spin_unlock_bh(&adapter->mbx_lock);
  1939. }
  1940. static void ixgbevf_up_complete(struct ixgbevf_adapter *adapter)
  1941. {
  1942. struct net_device *netdev = adapter->netdev;
  1943. struct pci_dev *pdev = adapter->pdev;
  1944. struct ixgbe_hw *hw = &adapter->hw;
  1945. bool state;
  1946. ixgbevf_configure_msix(adapter);
  1947. spin_lock_bh(&adapter->mbx_lock);
  1948. if (is_valid_ether_addr(hw->mac.addr))
  1949. hw->mac.ops.set_rar(hw, 0, hw->mac.addr, 0);
  1950. else
  1951. hw->mac.ops.set_rar(hw, 0, hw->mac.perm_addr, 0);
  1952. spin_unlock_bh(&adapter->mbx_lock);
  1953. state = adapter->link_state;
  1954. hw->mac.ops.get_link_state(hw, &adapter->link_state);
  1955. if (state && state != adapter->link_state)
  1956. dev_info(&pdev->dev, "VF is administratively disabled\n");
  1957. smp_mb__before_atomic();
  1958. clear_bit(__IXGBEVF_DOWN, &adapter->state);
  1959. ixgbevf_napi_enable_all(adapter);
  1960. /* clear any pending interrupts, may auto mask */
  1961. IXGBE_READ_REG(hw, IXGBE_VTEICR);
  1962. ixgbevf_irq_enable(adapter);
  1963. /* enable transmits */
  1964. netif_tx_start_all_queues(netdev);
  1965. ixgbevf_save_reset_stats(adapter);
  1966. ixgbevf_init_last_counter_stats(adapter);
  1967. hw->mac.get_link_status = 1;
  1968. mod_timer(&adapter->service_timer, jiffies);
  1969. }
  1970. void ixgbevf_up(struct ixgbevf_adapter *adapter)
  1971. {
  1972. ixgbevf_configure(adapter);
  1973. ixgbevf_up_complete(adapter);
  1974. }
  1975. /**
  1976. * ixgbevf_clean_rx_ring - Free Rx Buffers per Queue
  1977. * @rx_ring: ring to free buffers from
  1978. **/
  1979. static void ixgbevf_clean_rx_ring(struct ixgbevf_ring *rx_ring)
  1980. {
  1981. u16 i = rx_ring->next_to_clean;
  1982. /* Free Rx ring sk_buff */
  1983. if (rx_ring->skb) {
  1984. dev_kfree_skb(rx_ring->skb);
  1985. rx_ring->skb = NULL;
  1986. }
  1987. /* Free all the Rx ring pages */
  1988. while (i != rx_ring->next_to_alloc) {
  1989. struct ixgbevf_rx_buffer *rx_buffer;
  1990. rx_buffer = &rx_ring->rx_buffer_info[i];
  1991. /* Invalidate cache lines that may have been written to by
  1992. * device so that we avoid corrupting memory.
  1993. */
  1994. dma_sync_single_range_for_cpu(rx_ring->dev,
  1995. rx_buffer->dma,
  1996. rx_buffer->page_offset,
  1997. ixgbevf_rx_bufsz(rx_ring),
  1998. DMA_FROM_DEVICE);
  1999. /* free resources associated with mapping */
  2000. dma_unmap_page_attrs(rx_ring->dev,
  2001. rx_buffer->dma,
  2002. ixgbevf_rx_pg_size(rx_ring),
  2003. DMA_FROM_DEVICE,
  2004. IXGBEVF_RX_DMA_ATTR);
  2005. __page_frag_cache_drain(rx_buffer->page,
  2006. rx_buffer->pagecnt_bias);
  2007. i++;
  2008. if (i == rx_ring->count)
  2009. i = 0;
  2010. }
  2011. rx_ring->next_to_alloc = 0;
  2012. rx_ring->next_to_clean = 0;
  2013. rx_ring->next_to_use = 0;
  2014. }
  2015. /**
  2016. * ixgbevf_clean_tx_ring - Free Tx Buffers
  2017. * @tx_ring: ring to be cleaned
  2018. **/
  2019. static void ixgbevf_clean_tx_ring(struct ixgbevf_ring *tx_ring)
  2020. {
  2021. u16 i = tx_ring->next_to_clean;
  2022. struct ixgbevf_tx_buffer *tx_buffer = &tx_ring->tx_buffer_info[i];
  2023. while (i != tx_ring->next_to_use) {
  2024. union ixgbe_adv_tx_desc *eop_desc, *tx_desc;
  2025. /* Free all the Tx ring sk_buffs */
  2026. if (ring_is_xdp(tx_ring))
  2027. page_frag_free(tx_buffer->data);
  2028. else
  2029. dev_kfree_skb_any(tx_buffer->skb);
  2030. /* unmap skb header data */
  2031. dma_unmap_single(tx_ring->dev,
  2032. dma_unmap_addr(tx_buffer, dma),
  2033. dma_unmap_len(tx_buffer, len),
  2034. DMA_TO_DEVICE);
  2035. /* check for eop_desc to determine the end of the packet */
  2036. eop_desc = tx_buffer->next_to_watch;
  2037. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  2038. /* unmap remaining buffers */
  2039. while (tx_desc != eop_desc) {
  2040. tx_buffer++;
  2041. tx_desc++;
  2042. i++;
  2043. if (unlikely(i == tx_ring->count)) {
  2044. i = 0;
  2045. tx_buffer = tx_ring->tx_buffer_info;
  2046. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  2047. }
  2048. /* unmap any remaining paged data */
  2049. if (dma_unmap_len(tx_buffer, len))
  2050. dma_unmap_page(tx_ring->dev,
  2051. dma_unmap_addr(tx_buffer, dma),
  2052. dma_unmap_len(tx_buffer, len),
  2053. DMA_TO_DEVICE);
  2054. }
  2055. /* move us one more past the eop_desc for start of next pkt */
  2056. tx_buffer++;
  2057. i++;
  2058. if (unlikely(i == tx_ring->count)) {
  2059. i = 0;
  2060. tx_buffer = tx_ring->tx_buffer_info;
  2061. }
  2062. }
  2063. /* reset next_to_use and next_to_clean */
  2064. tx_ring->next_to_use = 0;
  2065. tx_ring->next_to_clean = 0;
  2066. }
  2067. /**
  2068. * ixgbevf_clean_all_rx_rings - Free Rx Buffers for all queues
  2069. * @adapter: board private structure
  2070. **/
  2071. static void ixgbevf_clean_all_rx_rings(struct ixgbevf_adapter *adapter)
  2072. {
  2073. int i;
  2074. for (i = 0; i < adapter->num_rx_queues; i++)
  2075. ixgbevf_clean_rx_ring(adapter->rx_ring[i]);
  2076. }
  2077. /**
  2078. * ixgbevf_clean_all_tx_rings - Free Tx Buffers for all queues
  2079. * @adapter: board private structure
  2080. **/
  2081. static void ixgbevf_clean_all_tx_rings(struct ixgbevf_adapter *adapter)
  2082. {
  2083. int i;
  2084. for (i = 0; i < adapter->num_tx_queues; i++)
  2085. ixgbevf_clean_tx_ring(adapter->tx_ring[i]);
  2086. for (i = 0; i < adapter->num_xdp_queues; i++)
  2087. ixgbevf_clean_tx_ring(adapter->xdp_ring[i]);
  2088. }
  2089. void ixgbevf_down(struct ixgbevf_adapter *adapter)
  2090. {
  2091. struct net_device *netdev = adapter->netdev;
  2092. struct ixgbe_hw *hw = &adapter->hw;
  2093. int i;
  2094. /* signal that we are down to the interrupt handler */
  2095. if (test_and_set_bit(__IXGBEVF_DOWN, &adapter->state))
  2096. return; /* do nothing if already down */
  2097. /* disable all enabled Rx queues */
  2098. for (i = 0; i < adapter->num_rx_queues; i++)
  2099. ixgbevf_disable_rx_queue(adapter, adapter->rx_ring[i]);
  2100. usleep_range(10000, 20000);
  2101. netif_tx_stop_all_queues(netdev);
  2102. /* call carrier off first to avoid false dev_watchdog timeouts */
  2103. netif_carrier_off(netdev);
  2104. netif_tx_disable(netdev);
  2105. ixgbevf_irq_disable(adapter);
  2106. ixgbevf_napi_disable_all(adapter);
  2107. timer_delete_sync(&adapter->service_timer);
  2108. /* disable transmits in the hardware now that interrupts are off */
  2109. for (i = 0; i < adapter->num_tx_queues; i++) {
  2110. u8 reg_idx = adapter->tx_ring[i]->reg_idx;
  2111. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  2112. IXGBE_TXDCTL_SWFLSH);
  2113. }
  2114. for (i = 0; i < adapter->num_xdp_queues; i++) {
  2115. u8 reg_idx = adapter->xdp_ring[i]->reg_idx;
  2116. IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(reg_idx),
  2117. IXGBE_TXDCTL_SWFLSH);
  2118. }
  2119. if (!pci_channel_offline(adapter->pdev))
  2120. ixgbevf_reset(adapter);
  2121. ixgbevf_clean_all_tx_rings(adapter);
  2122. ixgbevf_clean_all_rx_rings(adapter);
  2123. }
  2124. void ixgbevf_reinit_locked(struct ixgbevf_adapter *adapter)
  2125. {
  2126. while (test_and_set_bit(__IXGBEVF_RESETTING, &adapter->state))
  2127. msleep(1);
  2128. ixgbevf_down(adapter);
  2129. pci_set_master(adapter->pdev);
  2130. ixgbevf_up(adapter);
  2131. clear_bit(__IXGBEVF_RESETTING, &adapter->state);
  2132. }
  2133. void ixgbevf_reset(struct ixgbevf_adapter *adapter)
  2134. {
  2135. struct ixgbe_hw *hw = &adapter->hw;
  2136. struct net_device *netdev = adapter->netdev;
  2137. if (hw->mac.ops.reset_hw(hw)) {
  2138. hw_dbg(hw, "PF still resetting\n");
  2139. } else {
  2140. hw->mac.ops.init_hw(hw);
  2141. ixgbevf_negotiate_api(adapter);
  2142. }
  2143. if (is_valid_ether_addr(adapter->hw.mac.addr)) {
  2144. eth_hw_addr_set(netdev, adapter->hw.mac.addr);
  2145. ether_addr_copy(netdev->perm_addr, adapter->hw.mac.addr);
  2146. }
  2147. adapter->last_reset = jiffies;
  2148. }
  2149. static int ixgbevf_acquire_msix_vectors(struct ixgbevf_adapter *adapter,
  2150. int vectors)
  2151. {
  2152. int vector_threshold;
  2153. /* We'll want at least 2 (vector_threshold):
  2154. * 1) TxQ[0] + RxQ[0] handler
  2155. * 2) Other (Link Status Change, etc.)
  2156. */
  2157. vector_threshold = MIN_MSIX_COUNT;
  2158. /* The more we get, the more we will assign to Tx/Rx Cleanup
  2159. * for the separate queues...where Rx Cleanup >= Tx Cleanup.
  2160. * Right now, we simply care about how many we'll get; we'll
  2161. * set them up later while requesting irq's.
  2162. */
  2163. vectors = pci_enable_msix_range(adapter->pdev, adapter->msix_entries,
  2164. vector_threshold, vectors);
  2165. if (vectors < 0) {
  2166. dev_err(&adapter->pdev->dev,
  2167. "Unable to allocate MSI-X interrupts\n");
  2168. kfree(adapter->msix_entries);
  2169. adapter->msix_entries = NULL;
  2170. return vectors;
  2171. }
  2172. /* Adjust for only the vectors we'll use, which is minimum
  2173. * of max_msix_q_vectors + NON_Q_VECTORS, or the number of
  2174. * vectors we were allocated.
  2175. */
  2176. adapter->num_msix_vectors = vectors;
  2177. return 0;
  2178. }
  2179. /**
  2180. * ixgbevf_set_num_queues - Allocate queues for device, feature dependent
  2181. * @adapter: board private structure to initialize
  2182. *
  2183. * This is the top level queue allocation routine. The order here is very
  2184. * important, starting with the "most" number of features turned on at once,
  2185. * and ending with the smallest set of features. This way large combinations
  2186. * can be allocated if they're turned on, and smaller combinations are the
  2187. * fall through conditions.
  2188. *
  2189. **/
  2190. static void ixgbevf_set_num_queues(struct ixgbevf_adapter *adapter)
  2191. {
  2192. struct ixgbe_hw *hw = &adapter->hw;
  2193. unsigned int def_q = 0;
  2194. unsigned int num_tcs = 0;
  2195. int err;
  2196. /* Start with base case */
  2197. adapter->num_rx_queues = 1;
  2198. adapter->num_tx_queues = 1;
  2199. adapter->num_xdp_queues = 0;
  2200. spin_lock_bh(&adapter->mbx_lock);
  2201. /* fetch queue configuration from the PF */
  2202. err = ixgbevf_get_queues(hw, &num_tcs, &def_q);
  2203. spin_unlock_bh(&adapter->mbx_lock);
  2204. if (err)
  2205. return;
  2206. /* we need as many queues as traffic classes */
  2207. if (num_tcs > 1) {
  2208. adapter->num_rx_queues = num_tcs;
  2209. } else {
  2210. u16 rss = min_t(u16, num_online_cpus(), IXGBEVF_MAX_RSS_QUEUES);
  2211. switch (hw->api_version) {
  2212. case ixgbe_mbox_api_11:
  2213. case ixgbe_mbox_api_12:
  2214. case ixgbe_mbox_api_13:
  2215. case ixgbe_mbox_api_14:
  2216. case ixgbe_mbox_api_15:
  2217. case ixgbe_mbox_api_16:
  2218. case ixgbe_mbox_api_17:
  2219. if (adapter->xdp_prog &&
  2220. hw->mac.max_tx_queues == rss)
  2221. rss = rss > 3 ? 2 : 1;
  2222. adapter->num_rx_queues = rss;
  2223. adapter->num_tx_queues = rss;
  2224. adapter->num_xdp_queues = adapter->xdp_prog ? rss : 0;
  2225. break;
  2226. default:
  2227. break;
  2228. }
  2229. }
  2230. }
  2231. /**
  2232. * ixgbevf_set_interrupt_capability - set MSI-X or FAIL if not supported
  2233. * @adapter: board private structure to initialize
  2234. *
  2235. * Attempt to configure the interrupts using the best available
  2236. * capabilities of the hardware and the kernel.
  2237. **/
  2238. static int ixgbevf_set_interrupt_capability(struct ixgbevf_adapter *adapter)
  2239. {
  2240. int vector, v_budget;
  2241. /* It's easy to be greedy for MSI-X vectors, but it really
  2242. * doesn't do us much good if we have a lot more vectors
  2243. * than CPU's. So let's be conservative and only ask for
  2244. * (roughly) the same number of vectors as there are CPU's.
  2245. * The default is to use pairs of vectors.
  2246. */
  2247. v_budget = max(adapter->num_rx_queues, adapter->num_tx_queues);
  2248. v_budget = min_t(int, v_budget, num_online_cpus());
  2249. v_budget += NON_Q_VECTORS;
  2250. adapter->msix_entries = kzalloc_objs(struct msix_entry, v_budget);
  2251. if (!adapter->msix_entries)
  2252. return -ENOMEM;
  2253. for (vector = 0; vector < v_budget; vector++)
  2254. adapter->msix_entries[vector].entry = vector;
  2255. /* A failure in MSI-X entry allocation isn't fatal, but the VF driver
  2256. * does not support any other modes, so we will simply fail here. Note
  2257. * that we clean up the msix_entries pointer else-where.
  2258. */
  2259. return ixgbevf_acquire_msix_vectors(adapter, v_budget);
  2260. }
  2261. static void ixgbevf_add_ring(struct ixgbevf_ring *ring,
  2262. struct ixgbevf_ring_container *head)
  2263. {
  2264. ring->next = head->ring;
  2265. head->ring = ring;
  2266. head->count++;
  2267. }
  2268. /**
  2269. * ixgbevf_alloc_q_vector - Allocate memory for a single interrupt vector
  2270. * @adapter: board private structure to initialize
  2271. * @v_idx: index of vector in adapter struct
  2272. * @txr_count: number of Tx rings for q vector
  2273. * @txr_idx: index of first Tx ring to assign
  2274. * @xdp_count: total number of XDP rings to allocate
  2275. * @xdp_idx: index of first XDP ring to allocate
  2276. * @rxr_count: number of Rx rings for q vector
  2277. * @rxr_idx: index of first Rx ring to assign
  2278. *
  2279. * We allocate one q_vector. If allocation fails we return -ENOMEM.
  2280. **/
  2281. static int ixgbevf_alloc_q_vector(struct ixgbevf_adapter *adapter, int v_idx,
  2282. int txr_count, int txr_idx,
  2283. int xdp_count, int xdp_idx,
  2284. int rxr_count, int rxr_idx)
  2285. {
  2286. struct ixgbevf_q_vector *q_vector;
  2287. int reg_idx = txr_idx + xdp_idx;
  2288. struct ixgbevf_ring *ring;
  2289. int ring_count, size;
  2290. ring_count = txr_count + xdp_count + rxr_count;
  2291. size = sizeof(*q_vector) + (sizeof(*ring) * ring_count);
  2292. /* allocate q_vector and rings */
  2293. q_vector = kzalloc(size, GFP_KERNEL);
  2294. if (!q_vector)
  2295. return -ENOMEM;
  2296. /* initialize NAPI */
  2297. netif_napi_add(adapter->netdev, &q_vector->napi, ixgbevf_poll);
  2298. /* tie q_vector and adapter together */
  2299. adapter->q_vector[v_idx] = q_vector;
  2300. q_vector->adapter = adapter;
  2301. q_vector->v_idx = v_idx;
  2302. /* initialize pointer to rings */
  2303. ring = q_vector->ring;
  2304. while (txr_count) {
  2305. /* assign generic ring traits */
  2306. ring->dev = &adapter->pdev->dev;
  2307. ring->netdev = adapter->netdev;
  2308. /* configure backlink on ring */
  2309. ring->q_vector = q_vector;
  2310. /* update q_vector Tx values */
  2311. ixgbevf_add_ring(ring, &q_vector->tx);
  2312. /* apply Tx specific ring traits */
  2313. ring->count = adapter->tx_ring_count;
  2314. ring->queue_index = txr_idx;
  2315. ring->reg_idx = reg_idx;
  2316. /* assign ring to adapter */
  2317. adapter->tx_ring[txr_idx] = ring;
  2318. /* update count and index */
  2319. txr_count--;
  2320. txr_idx++;
  2321. reg_idx++;
  2322. /* push pointer to next ring */
  2323. ring++;
  2324. }
  2325. while (xdp_count) {
  2326. /* assign generic ring traits */
  2327. ring->dev = &adapter->pdev->dev;
  2328. ring->netdev = adapter->netdev;
  2329. /* configure backlink on ring */
  2330. ring->q_vector = q_vector;
  2331. /* update q_vector Tx values */
  2332. ixgbevf_add_ring(ring, &q_vector->tx);
  2333. /* apply Tx specific ring traits */
  2334. ring->count = adapter->tx_ring_count;
  2335. ring->queue_index = xdp_idx;
  2336. ring->reg_idx = reg_idx;
  2337. set_ring_xdp(ring);
  2338. /* assign ring to adapter */
  2339. adapter->xdp_ring[xdp_idx] = ring;
  2340. /* update count and index */
  2341. xdp_count--;
  2342. xdp_idx++;
  2343. reg_idx++;
  2344. /* push pointer to next ring */
  2345. ring++;
  2346. }
  2347. while (rxr_count) {
  2348. /* assign generic ring traits */
  2349. ring->dev = &adapter->pdev->dev;
  2350. ring->netdev = adapter->netdev;
  2351. /* configure backlink on ring */
  2352. ring->q_vector = q_vector;
  2353. /* update q_vector Rx values */
  2354. ixgbevf_add_ring(ring, &q_vector->rx);
  2355. /* apply Rx specific ring traits */
  2356. ring->count = adapter->rx_ring_count;
  2357. ring->queue_index = rxr_idx;
  2358. ring->reg_idx = rxr_idx;
  2359. /* assign ring to adapter */
  2360. adapter->rx_ring[rxr_idx] = ring;
  2361. /* update count and index */
  2362. rxr_count--;
  2363. rxr_idx++;
  2364. /* push pointer to next ring */
  2365. ring++;
  2366. }
  2367. return 0;
  2368. }
  2369. /**
  2370. * ixgbevf_free_q_vector - Free memory allocated for specific interrupt vector
  2371. * @adapter: board private structure to initialize
  2372. * @v_idx: index of vector in adapter struct
  2373. *
  2374. * This function frees the memory allocated to the q_vector. In addition if
  2375. * NAPI is enabled it will delete any references to the NAPI struct prior
  2376. * to freeing the q_vector.
  2377. **/
  2378. static void ixgbevf_free_q_vector(struct ixgbevf_adapter *adapter, int v_idx)
  2379. {
  2380. struct ixgbevf_q_vector *q_vector = adapter->q_vector[v_idx];
  2381. struct ixgbevf_ring *ring;
  2382. ixgbevf_for_each_ring(ring, q_vector->tx) {
  2383. if (ring_is_xdp(ring))
  2384. adapter->xdp_ring[ring->queue_index] = NULL;
  2385. else
  2386. adapter->tx_ring[ring->queue_index] = NULL;
  2387. }
  2388. ixgbevf_for_each_ring(ring, q_vector->rx)
  2389. adapter->rx_ring[ring->queue_index] = NULL;
  2390. adapter->q_vector[v_idx] = NULL;
  2391. netif_napi_del(&q_vector->napi);
  2392. /* ixgbevf_get_stats() might access the rings on this vector,
  2393. * we must wait a grace period before freeing it.
  2394. */
  2395. kfree_rcu(q_vector, rcu);
  2396. }
  2397. /**
  2398. * ixgbevf_alloc_q_vectors - Allocate memory for interrupt vectors
  2399. * @adapter: board private structure to initialize
  2400. *
  2401. * We allocate one q_vector per queue interrupt. If allocation fails we
  2402. * return -ENOMEM.
  2403. **/
  2404. static int ixgbevf_alloc_q_vectors(struct ixgbevf_adapter *adapter)
  2405. {
  2406. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2407. int rxr_remaining = adapter->num_rx_queues;
  2408. int txr_remaining = adapter->num_tx_queues;
  2409. int xdp_remaining = adapter->num_xdp_queues;
  2410. int rxr_idx = 0, txr_idx = 0, xdp_idx = 0, v_idx = 0;
  2411. int err;
  2412. if (q_vectors >= (rxr_remaining + txr_remaining + xdp_remaining)) {
  2413. for (; rxr_remaining; v_idx++, q_vectors--) {
  2414. int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
  2415. err = ixgbevf_alloc_q_vector(adapter, v_idx,
  2416. 0, 0, 0, 0, rqpv, rxr_idx);
  2417. if (err)
  2418. goto err_out;
  2419. /* update counts and index */
  2420. rxr_remaining -= rqpv;
  2421. rxr_idx += rqpv;
  2422. }
  2423. }
  2424. for (; q_vectors; v_idx++, q_vectors--) {
  2425. int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors);
  2426. int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors);
  2427. int xqpv = DIV_ROUND_UP(xdp_remaining, q_vectors);
  2428. err = ixgbevf_alloc_q_vector(adapter, v_idx,
  2429. tqpv, txr_idx,
  2430. xqpv, xdp_idx,
  2431. rqpv, rxr_idx);
  2432. if (err)
  2433. goto err_out;
  2434. /* update counts and index */
  2435. rxr_remaining -= rqpv;
  2436. rxr_idx += rqpv;
  2437. txr_remaining -= tqpv;
  2438. txr_idx += tqpv;
  2439. xdp_remaining -= xqpv;
  2440. xdp_idx += xqpv;
  2441. }
  2442. return 0;
  2443. err_out:
  2444. while (v_idx) {
  2445. v_idx--;
  2446. ixgbevf_free_q_vector(adapter, v_idx);
  2447. }
  2448. return -ENOMEM;
  2449. }
  2450. /**
  2451. * ixgbevf_free_q_vectors - Free memory allocated for interrupt vectors
  2452. * @adapter: board private structure to initialize
  2453. *
  2454. * This function frees the memory allocated to the q_vectors. In addition if
  2455. * NAPI is enabled it will delete any references to the NAPI struct prior
  2456. * to freeing the q_vector.
  2457. **/
  2458. static void ixgbevf_free_q_vectors(struct ixgbevf_adapter *adapter)
  2459. {
  2460. int q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
  2461. while (q_vectors) {
  2462. q_vectors--;
  2463. ixgbevf_free_q_vector(adapter, q_vectors);
  2464. }
  2465. }
  2466. /**
  2467. * ixgbevf_reset_interrupt_capability - Reset MSIX setup
  2468. * @adapter: board private structure
  2469. *
  2470. **/
  2471. static void ixgbevf_reset_interrupt_capability(struct ixgbevf_adapter *adapter)
  2472. {
  2473. if (!adapter->msix_entries)
  2474. return;
  2475. pci_disable_msix(adapter->pdev);
  2476. kfree(adapter->msix_entries);
  2477. adapter->msix_entries = NULL;
  2478. }
  2479. /**
  2480. * ixgbevf_init_interrupt_scheme - Determine if MSIX is supported and init
  2481. * @adapter: board private structure to initialize
  2482. *
  2483. **/
  2484. static int ixgbevf_init_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2485. {
  2486. int err;
  2487. /* Number of supported queues */
  2488. ixgbevf_set_num_queues(adapter);
  2489. err = ixgbevf_set_interrupt_capability(adapter);
  2490. if (err) {
  2491. hw_dbg(&adapter->hw,
  2492. "Unable to setup interrupt capabilities\n");
  2493. goto err_set_interrupt;
  2494. }
  2495. err = ixgbevf_alloc_q_vectors(adapter);
  2496. if (err) {
  2497. hw_dbg(&adapter->hw, "Unable to allocate memory for queue vectors\n");
  2498. goto err_alloc_q_vectors;
  2499. }
  2500. hw_dbg(&adapter->hw, "Multiqueue %s: Rx Queue count = %u, Tx Queue count = %u XDP Queue count %u\n",
  2501. (adapter->num_rx_queues > 1) ? "Enabled" : "Disabled",
  2502. adapter->num_rx_queues, adapter->num_tx_queues,
  2503. adapter->num_xdp_queues);
  2504. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2505. return 0;
  2506. err_alloc_q_vectors:
  2507. ixgbevf_reset_interrupt_capability(adapter);
  2508. err_set_interrupt:
  2509. return err;
  2510. }
  2511. /**
  2512. * ixgbevf_clear_interrupt_scheme - Clear the current interrupt scheme settings
  2513. * @adapter: board private structure to clear interrupt scheme on
  2514. *
  2515. * We go through and clear interrupt specific resources and reset the structure
  2516. * to pre-load conditions
  2517. **/
  2518. static void ixgbevf_clear_interrupt_scheme(struct ixgbevf_adapter *adapter)
  2519. {
  2520. adapter->num_tx_queues = 0;
  2521. adapter->num_xdp_queues = 0;
  2522. adapter->num_rx_queues = 0;
  2523. ixgbevf_free_q_vectors(adapter);
  2524. ixgbevf_reset_interrupt_capability(adapter);
  2525. }
  2526. /**
  2527. * ixgbevf_sw_init - Initialize general software structures
  2528. * @adapter: board private structure to initialize
  2529. *
  2530. * ixgbevf_sw_init initializes the Adapter private data structure.
  2531. * Fields are initialized based on PCI device information and
  2532. * OS network device settings (MTU size).
  2533. **/
  2534. static int ixgbevf_sw_init(struct ixgbevf_adapter *adapter)
  2535. {
  2536. struct ixgbe_hw *hw = &adapter->hw;
  2537. struct pci_dev *pdev = adapter->pdev;
  2538. struct net_device *netdev = adapter->netdev;
  2539. int err;
  2540. /* PCI config space info */
  2541. hw->vendor_id = pdev->vendor;
  2542. hw->device_id = pdev->device;
  2543. hw->revision_id = pdev->revision;
  2544. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  2545. hw->subsystem_device_id = pdev->subsystem_device;
  2546. hw->mbx.ops.init_params(hw);
  2547. if (hw->mac.type >= ixgbe_mac_X550_vf) {
  2548. err = ixgbevf_init_rss_key(adapter);
  2549. if (err)
  2550. goto out;
  2551. }
  2552. /* assume legacy case in which PF would only give VF 2 queues */
  2553. hw->mac.max_tx_queues = 2;
  2554. hw->mac.max_rx_queues = 2;
  2555. /* lock to protect mailbox accesses */
  2556. spin_lock_init(&adapter->mbx_lock);
  2557. err = hw->mac.ops.reset_hw(hw);
  2558. if (err) {
  2559. dev_info(&pdev->dev,
  2560. "PF still in reset state. Is the PF interface up?\n");
  2561. } else {
  2562. err = hw->mac.ops.init_hw(hw);
  2563. if (err) {
  2564. pr_err("init_shared_code failed: %d\n", err);
  2565. goto out;
  2566. }
  2567. ixgbevf_negotiate_api(adapter);
  2568. err = hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
  2569. if (err)
  2570. dev_info(&pdev->dev, "Error reading MAC address\n");
  2571. else if (is_zero_ether_addr(adapter->hw.mac.addr))
  2572. dev_info(&pdev->dev,
  2573. "MAC address not assigned by administrator.\n");
  2574. eth_hw_addr_set(netdev, hw->mac.addr);
  2575. }
  2576. if (!is_valid_ether_addr(netdev->dev_addr)) {
  2577. dev_info(&pdev->dev, "Assigning random MAC address\n");
  2578. eth_hw_addr_random(netdev);
  2579. ether_addr_copy(hw->mac.addr, netdev->dev_addr);
  2580. ether_addr_copy(hw->mac.perm_addr, netdev->dev_addr);
  2581. }
  2582. /* Enable dynamic interrupt throttling rates */
  2583. adapter->rx_itr_setting = 1;
  2584. adapter->tx_itr_setting = 1;
  2585. /* set default ring sizes */
  2586. adapter->tx_ring_count = IXGBEVF_DEFAULT_TXD;
  2587. adapter->rx_ring_count = IXGBEVF_DEFAULT_RXD;
  2588. adapter->link_state = true;
  2589. set_bit(__IXGBEVF_DOWN, &adapter->state);
  2590. return 0;
  2591. out:
  2592. return err;
  2593. }
  2594. #define UPDATE_VF_COUNTER_32bit(reg, last_counter, counter) \
  2595. { \
  2596. u32 current_counter = IXGBE_READ_REG(hw, reg); \
  2597. if (current_counter < last_counter) \
  2598. counter += 0x100000000LL; \
  2599. last_counter = current_counter; \
  2600. counter &= 0xFFFFFFFF00000000LL; \
  2601. counter |= current_counter; \
  2602. }
  2603. #define UPDATE_VF_COUNTER_36bit(reg_lsb, reg_msb, last_counter, counter) \
  2604. { \
  2605. u64 current_counter_lsb = IXGBE_READ_REG(hw, reg_lsb); \
  2606. u64 current_counter_msb = IXGBE_READ_REG(hw, reg_msb); \
  2607. u64 current_counter = (current_counter_msb << 32) | \
  2608. current_counter_lsb; \
  2609. if (current_counter < last_counter) \
  2610. counter += 0x1000000000LL; \
  2611. last_counter = current_counter; \
  2612. counter &= 0xFFFFFFF000000000LL; \
  2613. counter |= current_counter; \
  2614. }
  2615. /**
  2616. * ixgbevf_update_stats - Update the board statistics counters.
  2617. * @adapter: board private structure
  2618. **/
  2619. void ixgbevf_update_stats(struct ixgbevf_adapter *adapter)
  2620. {
  2621. struct ixgbe_hw *hw = &adapter->hw;
  2622. u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
  2623. u64 alloc_rx_page = 0, hw_csum_rx_error = 0;
  2624. int i;
  2625. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2626. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2627. return;
  2628. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPRC, adapter->stats.last_vfgprc,
  2629. adapter->stats.vfgprc);
  2630. UPDATE_VF_COUNTER_32bit(IXGBE_VFGPTC, adapter->stats.last_vfgptc,
  2631. adapter->stats.vfgptc);
  2632. UPDATE_VF_COUNTER_36bit(IXGBE_VFGORC_LSB, IXGBE_VFGORC_MSB,
  2633. adapter->stats.last_vfgorc,
  2634. adapter->stats.vfgorc);
  2635. UPDATE_VF_COUNTER_36bit(IXGBE_VFGOTC_LSB, IXGBE_VFGOTC_MSB,
  2636. adapter->stats.last_vfgotc,
  2637. adapter->stats.vfgotc);
  2638. UPDATE_VF_COUNTER_32bit(IXGBE_VFMPRC, adapter->stats.last_vfmprc,
  2639. adapter->stats.vfmprc);
  2640. for (i = 0; i < adapter->num_rx_queues; i++) {
  2641. struct ixgbevf_ring *rx_ring = adapter->rx_ring[i];
  2642. hw_csum_rx_error += rx_ring->rx_stats.csum_err;
  2643. alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
  2644. alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
  2645. alloc_rx_page += rx_ring->rx_stats.alloc_rx_page;
  2646. }
  2647. adapter->hw_csum_rx_error = hw_csum_rx_error;
  2648. adapter->alloc_rx_page_failed = alloc_rx_page_failed;
  2649. adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
  2650. adapter->alloc_rx_page = alloc_rx_page;
  2651. }
  2652. /**
  2653. * ixgbevf_service_timer - Timer Call-back
  2654. * @t: pointer to timer_list struct
  2655. **/
  2656. static void ixgbevf_service_timer(struct timer_list *t)
  2657. {
  2658. struct ixgbevf_adapter *adapter = timer_container_of(adapter, t,
  2659. service_timer);
  2660. /* Reset the timer */
  2661. mod_timer(&adapter->service_timer, (HZ * 2) + jiffies);
  2662. ixgbevf_service_event_schedule(adapter);
  2663. }
  2664. static void ixgbevf_reset_subtask(struct ixgbevf_adapter *adapter)
  2665. {
  2666. if (!test_and_clear_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state))
  2667. return;
  2668. rtnl_lock();
  2669. /* If we're already down or resetting, just bail */
  2670. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2671. test_bit(__IXGBEVF_REMOVING, &adapter->state) ||
  2672. test_bit(__IXGBEVF_RESETTING, &adapter->state)) {
  2673. rtnl_unlock();
  2674. return;
  2675. }
  2676. adapter->tx_timeout_count++;
  2677. ixgbevf_reinit_locked(adapter);
  2678. rtnl_unlock();
  2679. }
  2680. /**
  2681. * ixgbevf_check_hang_subtask - check for hung queues and dropped interrupts
  2682. * @adapter: pointer to the device adapter structure
  2683. *
  2684. * This function serves two purposes. First it strobes the interrupt lines
  2685. * in order to make certain interrupts are occurring. Secondly it sets the
  2686. * bits needed to check for TX hangs. As a result we should immediately
  2687. * determine if a hang has occurred.
  2688. **/
  2689. static void ixgbevf_check_hang_subtask(struct ixgbevf_adapter *adapter)
  2690. {
  2691. struct ixgbe_hw *hw = &adapter->hw;
  2692. u32 eics = 0;
  2693. int i;
  2694. /* If we're down or resetting, just bail */
  2695. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2696. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2697. return;
  2698. /* Force detection of hung controller */
  2699. if (netif_carrier_ok(adapter->netdev)) {
  2700. for (i = 0; i < adapter->num_tx_queues; i++)
  2701. set_check_for_tx_hang(adapter->tx_ring[i]);
  2702. for (i = 0; i < adapter->num_xdp_queues; i++)
  2703. set_check_for_tx_hang(adapter->xdp_ring[i]);
  2704. }
  2705. /* get one bit for every active Tx/Rx interrupt vector */
  2706. for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
  2707. struct ixgbevf_q_vector *qv = adapter->q_vector[i];
  2708. if (qv->rx.ring || qv->tx.ring)
  2709. eics |= BIT(i);
  2710. }
  2711. /* Cause software interrupt to ensure rings are cleaned */
  2712. IXGBE_WRITE_REG(hw, IXGBE_VTEICS, eics);
  2713. }
  2714. /**
  2715. * ixgbevf_watchdog_update_link - update the link status
  2716. * @adapter: pointer to the device adapter structure
  2717. **/
  2718. static void ixgbevf_watchdog_update_link(struct ixgbevf_adapter *adapter)
  2719. {
  2720. struct ixgbe_hw *hw = &adapter->hw;
  2721. u32 link_speed = adapter->link_speed;
  2722. bool link_up = adapter->link_up;
  2723. s32 err;
  2724. spin_lock_bh(&adapter->mbx_lock);
  2725. err = hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
  2726. spin_unlock_bh(&adapter->mbx_lock);
  2727. /* if check for link returns error we will need to reset */
  2728. if (err && time_after(jiffies, adapter->last_reset + (10 * HZ))) {
  2729. set_bit(__IXGBEVF_RESET_REQUESTED, &adapter->state);
  2730. link_up = false;
  2731. }
  2732. adapter->link_up = link_up;
  2733. adapter->link_speed = link_speed;
  2734. }
  2735. /**
  2736. * ixgbevf_watchdog_link_is_up - update netif_carrier status and
  2737. * print link up message
  2738. * @adapter: pointer to the device adapter structure
  2739. **/
  2740. static void ixgbevf_watchdog_link_is_up(struct ixgbevf_adapter *adapter)
  2741. {
  2742. struct net_device *netdev = adapter->netdev;
  2743. /* only continue if link was previously down */
  2744. if (netif_carrier_ok(netdev))
  2745. return;
  2746. dev_info(&adapter->pdev->dev, "NIC Link is Up %s\n",
  2747. (adapter->link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
  2748. "10 Gbps" :
  2749. (adapter->link_speed == IXGBE_LINK_SPEED_1GB_FULL) ?
  2750. "1 Gbps" :
  2751. (adapter->link_speed == IXGBE_LINK_SPEED_100_FULL) ?
  2752. "100 Mbps" :
  2753. "unknown speed");
  2754. netif_carrier_on(netdev);
  2755. }
  2756. /**
  2757. * ixgbevf_watchdog_link_is_down - update netif_carrier status and
  2758. * print link down message
  2759. * @adapter: pointer to the adapter structure
  2760. **/
  2761. static void ixgbevf_watchdog_link_is_down(struct ixgbevf_adapter *adapter)
  2762. {
  2763. struct net_device *netdev = adapter->netdev;
  2764. adapter->link_speed = 0;
  2765. /* only continue if link was up previously */
  2766. if (!netif_carrier_ok(netdev))
  2767. return;
  2768. dev_info(&adapter->pdev->dev, "NIC Link is Down\n");
  2769. netif_carrier_off(netdev);
  2770. }
  2771. /**
  2772. * ixgbevf_watchdog_subtask - worker thread to bring link up
  2773. * @adapter: board private structure
  2774. **/
  2775. static void ixgbevf_watchdog_subtask(struct ixgbevf_adapter *adapter)
  2776. {
  2777. /* if interface is down do nothing */
  2778. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  2779. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  2780. return;
  2781. ixgbevf_watchdog_update_link(adapter);
  2782. if (adapter->link_up && adapter->link_state)
  2783. ixgbevf_watchdog_link_is_up(adapter);
  2784. else
  2785. ixgbevf_watchdog_link_is_down(adapter);
  2786. ixgbevf_update_stats(adapter);
  2787. }
  2788. /**
  2789. * ixgbevf_service_task - manages and runs subtasks
  2790. * @work: pointer to work_struct containing our data
  2791. **/
  2792. static void ixgbevf_service_task(struct work_struct *work)
  2793. {
  2794. struct ixgbevf_adapter *adapter = container_of(work,
  2795. struct ixgbevf_adapter,
  2796. service_task);
  2797. struct ixgbe_hw *hw = &adapter->hw;
  2798. if (IXGBE_REMOVED(hw->hw_addr)) {
  2799. if (!test_bit(__IXGBEVF_DOWN, &adapter->state)) {
  2800. rtnl_lock();
  2801. ixgbevf_down(adapter);
  2802. rtnl_unlock();
  2803. }
  2804. return;
  2805. }
  2806. ixgbevf_queue_reset_subtask(adapter);
  2807. ixgbevf_reset_subtask(adapter);
  2808. ixgbevf_watchdog_subtask(adapter);
  2809. ixgbevf_check_hang_subtask(adapter);
  2810. ixgbevf_service_event_complete(adapter);
  2811. }
  2812. /**
  2813. * ixgbevf_free_tx_resources - Free Tx Resources per Queue
  2814. * @tx_ring: Tx descriptor ring for a specific queue
  2815. *
  2816. * Free all transmit software resources
  2817. **/
  2818. void ixgbevf_free_tx_resources(struct ixgbevf_ring *tx_ring)
  2819. {
  2820. ixgbevf_clean_tx_ring(tx_ring);
  2821. vfree(tx_ring->tx_buffer_info);
  2822. tx_ring->tx_buffer_info = NULL;
  2823. /* if not set, then don't free */
  2824. if (!tx_ring->desc)
  2825. return;
  2826. dma_free_coherent(tx_ring->dev, tx_ring->size, tx_ring->desc,
  2827. tx_ring->dma);
  2828. tx_ring->desc = NULL;
  2829. }
  2830. /**
  2831. * ixgbevf_free_all_tx_resources - Free Tx Resources for All Queues
  2832. * @adapter: board private structure
  2833. *
  2834. * Free all transmit software resources
  2835. **/
  2836. static void ixgbevf_free_all_tx_resources(struct ixgbevf_adapter *adapter)
  2837. {
  2838. int i;
  2839. for (i = 0; i < adapter->num_tx_queues; i++)
  2840. if (adapter->tx_ring[i]->desc)
  2841. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2842. for (i = 0; i < adapter->num_xdp_queues; i++)
  2843. if (adapter->xdp_ring[i]->desc)
  2844. ixgbevf_free_tx_resources(adapter->xdp_ring[i]);
  2845. }
  2846. /**
  2847. * ixgbevf_setup_tx_resources - allocate Tx resources (Descriptors)
  2848. * @tx_ring: Tx descriptor ring (for a specific queue) to setup
  2849. *
  2850. * Return 0 on success, negative on failure
  2851. **/
  2852. int ixgbevf_setup_tx_resources(struct ixgbevf_ring *tx_ring)
  2853. {
  2854. struct ixgbevf_adapter *adapter = netdev_priv(tx_ring->netdev);
  2855. int size;
  2856. size = sizeof(struct ixgbevf_tx_buffer) * tx_ring->count;
  2857. tx_ring->tx_buffer_info = vmalloc(size);
  2858. if (!tx_ring->tx_buffer_info)
  2859. goto err;
  2860. u64_stats_init(&tx_ring->syncp);
  2861. /* round up to nearest 4K */
  2862. tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
  2863. tx_ring->size = ALIGN(tx_ring->size, 4096);
  2864. tx_ring->desc = dma_alloc_coherent(tx_ring->dev, tx_ring->size,
  2865. &tx_ring->dma, GFP_KERNEL);
  2866. if (!tx_ring->desc)
  2867. goto err;
  2868. return 0;
  2869. err:
  2870. vfree(tx_ring->tx_buffer_info);
  2871. tx_ring->tx_buffer_info = NULL;
  2872. hw_dbg(&adapter->hw, "Unable to allocate memory for the transmit descriptor ring\n");
  2873. return -ENOMEM;
  2874. }
  2875. /**
  2876. * ixgbevf_setup_all_tx_resources - allocate all queues Tx resources
  2877. * @adapter: board private structure
  2878. *
  2879. * If this function returns with an error, then it's possible one or
  2880. * more of the rings is populated (while the rest are not). It is the
  2881. * callers duty to clean those orphaned rings.
  2882. *
  2883. * Return 0 on success, negative on failure
  2884. **/
  2885. static int ixgbevf_setup_all_tx_resources(struct ixgbevf_adapter *adapter)
  2886. {
  2887. int i, j = 0, err = 0;
  2888. for (i = 0; i < adapter->num_tx_queues; i++) {
  2889. err = ixgbevf_setup_tx_resources(adapter->tx_ring[i]);
  2890. if (!err)
  2891. continue;
  2892. hw_dbg(&adapter->hw, "Allocation for Tx Queue %u failed\n", i);
  2893. goto err_setup_tx;
  2894. }
  2895. for (j = 0; j < adapter->num_xdp_queues; j++) {
  2896. err = ixgbevf_setup_tx_resources(adapter->xdp_ring[j]);
  2897. if (!err)
  2898. continue;
  2899. hw_dbg(&adapter->hw, "Allocation for XDP Queue %u failed\n", j);
  2900. goto err_setup_tx;
  2901. }
  2902. return 0;
  2903. err_setup_tx:
  2904. /* rewind the index freeing the rings as we go */
  2905. while (j--)
  2906. ixgbevf_free_tx_resources(adapter->xdp_ring[j]);
  2907. while (i--)
  2908. ixgbevf_free_tx_resources(adapter->tx_ring[i]);
  2909. return err;
  2910. }
  2911. /**
  2912. * ixgbevf_setup_rx_resources - allocate Rx resources (Descriptors)
  2913. * @adapter: board private structure
  2914. * @rx_ring: Rx descriptor ring (for a specific queue) to setup
  2915. *
  2916. * Returns 0 on success, negative on failure
  2917. **/
  2918. int ixgbevf_setup_rx_resources(struct ixgbevf_adapter *adapter,
  2919. struct ixgbevf_ring *rx_ring)
  2920. {
  2921. int size;
  2922. size = sizeof(struct ixgbevf_rx_buffer) * rx_ring->count;
  2923. rx_ring->rx_buffer_info = vmalloc(size);
  2924. if (!rx_ring->rx_buffer_info)
  2925. goto err;
  2926. u64_stats_init(&rx_ring->syncp);
  2927. /* Round up to nearest 4K */
  2928. rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
  2929. rx_ring->size = ALIGN(rx_ring->size, 4096);
  2930. rx_ring->desc = dma_alloc_coherent(rx_ring->dev, rx_ring->size,
  2931. &rx_ring->dma, GFP_KERNEL);
  2932. if (!rx_ring->desc)
  2933. goto err;
  2934. /* XDP RX-queue info */
  2935. if (xdp_rxq_info_reg(&rx_ring->xdp_rxq, adapter->netdev,
  2936. rx_ring->queue_index, 0) < 0)
  2937. goto err;
  2938. rx_ring->xdp_prog = adapter->xdp_prog;
  2939. return 0;
  2940. err:
  2941. vfree(rx_ring->rx_buffer_info);
  2942. rx_ring->rx_buffer_info = NULL;
  2943. dev_err(rx_ring->dev, "Unable to allocate memory for the Rx descriptor ring\n");
  2944. return -ENOMEM;
  2945. }
  2946. /**
  2947. * ixgbevf_setup_all_rx_resources - allocate all queues Rx resources
  2948. * @adapter: board private structure
  2949. *
  2950. * If this function returns with an error, then it's possible one or
  2951. * more of the rings is populated (while the rest are not). It is the
  2952. * callers duty to clean those orphaned rings.
  2953. *
  2954. * Return 0 on success, negative on failure
  2955. **/
  2956. static int ixgbevf_setup_all_rx_resources(struct ixgbevf_adapter *adapter)
  2957. {
  2958. int i, err = 0;
  2959. for (i = 0; i < adapter->num_rx_queues; i++) {
  2960. err = ixgbevf_setup_rx_resources(adapter, adapter->rx_ring[i]);
  2961. if (!err)
  2962. continue;
  2963. hw_dbg(&adapter->hw, "Allocation for Rx Queue %u failed\n", i);
  2964. goto err_setup_rx;
  2965. }
  2966. return 0;
  2967. err_setup_rx:
  2968. /* rewind the index freeing the rings as we go */
  2969. while (i--)
  2970. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  2971. return err;
  2972. }
  2973. /**
  2974. * ixgbevf_free_rx_resources - Free Rx Resources
  2975. * @rx_ring: ring to clean the resources from
  2976. *
  2977. * Free all receive software resources
  2978. **/
  2979. void ixgbevf_free_rx_resources(struct ixgbevf_ring *rx_ring)
  2980. {
  2981. ixgbevf_clean_rx_ring(rx_ring);
  2982. rx_ring->xdp_prog = NULL;
  2983. xdp_rxq_info_unreg(&rx_ring->xdp_rxq);
  2984. vfree(rx_ring->rx_buffer_info);
  2985. rx_ring->rx_buffer_info = NULL;
  2986. dma_free_coherent(rx_ring->dev, rx_ring->size, rx_ring->desc,
  2987. rx_ring->dma);
  2988. rx_ring->desc = NULL;
  2989. }
  2990. /**
  2991. * ixgbevf_free_all_rx_resources - Free Rx Resources for All Queues
  2992. * @adapter: board private structure
  2993. *
  2994. * Free all receive software resources
  2995. **/
  2996. static void ixgbevf_free_all_rx_resources(struct ixgbevf_adapter *adapter)
  2997. {
  2998. int i;
  2999. for (i = 0; i < adapter->num_rx_queues; i++)
  3000. if (adapter->rx_ring[i]->desc)
  3001. ixgbevf_free_rx_resources(adapter->rx_ring[i]);
  3002. }
  3003. /**
  3004. * ixgbevf_open - Called when a network interface is made active
  3005. * @netdev: network interface device structure
  3006. *
  3007. * Returns 0 on success, negative value on failure
  3008. *
  3009. * The open entry point is called when a network interface is made
  3010. * active by the system (IFF_UP). At this point all resources needed
  3011. * for transmit and receive operations are allocated, the interrupt
  3012. * handler is registered with the OS, the watchdog timer is started,
  3013. * and the stack is notified that the interface is ready.
  3014. **/
  3015. int ixgbevf_open(struct net_device *netdev)
  3016. {
  3017. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3018. struct ixgbe_hw *hw = &adapter->hw;
  3019. int err;
  3020. /* A previous failure to open the device because of a lack of
  3021. * available MSIX vector resources may have reset the number
  3022. * of msix vectors variable to zero. The only way to recover
  3023. * is to unload/reload the driver and hope that the system has
  3024. * been able to recover some MSIX vector resources.
  3025. */
  3026. if (!adapter->num_msix_vectors)
  3027. return -ENOMEM;
  3028. if (hw->adapter_stopped) {
  3029. ixgbevf_reset(adapter);
  3030. /* if adapter is still stopped then PF isn't up and
  3031. * the VF can't start.
  3032. */
  3033. if (hw->adapter_stopped) {
  3034. err = IXGBE_ERR_MBX;
  3035. pr_err("Unable to start - perhaps the PF Driver isn't up yet\n");
  3036. goto err_setup_reset;
  3037. }
  3038. }
  3039. /* disallow open during test */
  3040. if (test_bit(__IXGBEVF_TESTING, &adapter->state))
  3041. return -EBUSY;
  3042. netif_carrier_off(netdev);
  3043. /* allocate transmit descriptors */
  3044. err = ixgbevf_setup_all_tx_resources(adapter);
  3045. if (err)
  3046. goto err_setup_tx;
  3047. /* allocate receive descriptors */
  3048. err = ixgbevf_setup_all_rx_resources(adapter);
  3049. if (err)
  3050. goto err_setup_rx;
  3051. ixgbevf_configure(adapter);
  3052. err = ixgbevf_request_irq(adapter);
  3053. if (err)
  3054. goto err_req_irq;
  3055. /* Notify the stack of the actual queue counts. */
  3056. err = netif_set_real_num_tx_queues(netdev, adapter->num_tx_queues);
  3057. if (err)
  3058. goto err_set_queues;
  3059. err = netif_set_real_num_rx_queues(netdev, adapter->num_rx_queues);
  3060. if (err)
  3061. goto err_set_queues;
  3062. ixgbevf_up_complete(adapter);
  3063. return 0;
  3064. err_set_queues:
  3065. ixgbevf_free_irq(adapter);
  3066. err_req_irq:
  3067. ixgbevf_free_all_rx_resources(adapter);
  3068. err_setup_rx:
  3069. ixgbevf_free_all_tx_resources(adapter);
  3070. err_setup_tx:
  3071. ixgbevf_reset(adapter);
  3072. err_setup_reset:
  3073. return err;
  3074. }
  3075. /**
  3076. * ixgbevf_close_suspend - actions necessary to both suspend and close flows
  3077. * @adapter: the private adapter struct
  3078. *
  3079. * This function should contain the necessary work common to both suspending
  3080. * and closing of the device.
  3081. */
  3082. static void ixgbevf_close_suspend(struct ixgbevf_adapter *adapter)
  3083. {
  3084. ixgbevf_down(adapter);
  3085. ixgbevf_free_irq(adapter);
  3086. ixgbevf_free_all_tx_resources(adapter);
  3087. ixgbevf_free_all_rx_resources(adapter);
  3088. }
  3089. /**
  3090. * ixgbevf_close - Disables a network interface
  3091. * @netdev: network interface device structure
  3092. *
  3093. * Returns 0, this is not allowed to fail
  3094. *
  3095. * The close entry point is called when an interface is de-activated
  3096. * by the OS. The hardware is still under the drivers control, but
  3097. * needs to be disabled. A global MAC reset is issued to stop the
  3098. * hardware, and all transmit and receive resources are freed.
  3099. **/
  3100. int ixgbevf_close(struct net_device *netdev)
  3101. {
  3102. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3103. if (netif_device_present(netdev))
  3104. ixgbevf_close_suspend(adapter);
  3105. return 0;
  3106. }
  3107. static void ixgbevf_queue_reset_subtask(struct ixgbevf_adapter *adapter)
  3108. {
  3109. struct net_device *dev = adapter->netdev;
  3110. if (!test_and_clear_bit(__IXGBEVF_QUEUE_RESET_REQUESTED,
  3111. &adapter->state))
  3112. return;
  3113. /* if interface is down do nothing */
  3114. if (test_bit(__IXGBEVF_DOWN, &adapter->state) ||
  3115. test_bit(__IXGBEVF_RESETTING, &adapter->state))
  3116. return;
  3117. /* Hardware has to reinitialize queues and interrupts to
  3118. * match packet buffer alignment. Unfortunately, the
  3119. * hardware is not flexible enough to do this dynamically.
  3120. */
  3121. rtnl_lock();
  3122. if (netif_running(dev))
  3123. ixgbevf_close(dev);
  3124. ixgbevf_clear_interrupt_scheme(adapter);
  3125. ixgbevf_init_interrupt_scheme(adapter);
  3126. if (netif_running(dev))
  3127. ixgbevf_open(dev);
  3128. rtnl_unlock();
  3129. }
  3130. static void ixgbevf_tx_ctxtdesc(struct ixgbevf_ring *tx_ring,
  3131. u32 vlan_macip_lens, u32 fceof_saidx,
  3132. u32 type_tucmd, u32 mss_l4len_idx)
  3133. {
  3134. struct ixgbe_adv_tx_context_desc *context_desc;
  3135. u16 i = tx_ring->next_to_use;
  3136. context_desc = IXGBEVF_TX_CTXTDESC(tx_ring, i);
  3137. i++;
  3138. tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
  3139. /* set bits to identify this as an advanced context descriptor */
  3140. type_tucmd |= IXGBE_TXD_CMD_DEXT | IXGBE_ADVTXD_DTYP_CTXT;
  3141. context_desc->vlan_macip_lens = cpu_to_le32(vlan_macip_lens);
  3142. context_desc->fceof_saidx = cpu_to_le32(fceof_saidx);
  3143. context_desc->type_tucmd_mlhl = cpu_to_le32(type_tucmd);
  3144. context_desc->mss_l4len_idx = cpu_to_le32(mss_l4len_idx);
  3145. }
  3146. static int ixgbevf_tso(struct ixgbevf_ring *tx_ring,
  3147. struct ixgbevf_tx_buffer *first,
  3148. u8 *hdr_len,
  3149. struct ixgbevf_ipsec_tx_data *itd)
  3150. {
  3151. u32 vlan_macip_lens, type_tucmd, mss_l4len_idx;
  3152. struct sk_buff *skb = first->skb;
  3153. union {
  3154. struct iphdr *v4;
  3155. struct ipv6hdr *v6;
  3156. unsigned char *hdr;
  3157. } ip;
  3158. union {
  3159. struct tcphdr *tcp;
  3160. unsigned char *hdr;
  3161. } l4;
  3162. u32 paylen, l4_offset;
  3163. u32 fceof_saidx = 0;
  3164. int err;
  3165. if (skb->ip_summed != CHECKSUM_PARTIAL)
  3166. return 0;
  3167. if (!skb_is_gso(skb))
  3168. return 0;
  3169. err = skb_cow_head(skb, 0);
  3170. if (err < 0)
  3171. return err;
  3172. if (eth_p_mpls(first->protocol))
  3173. ip.hdr = skb_inner_network_header(skb);
  3174. else
  3175. ip.hdr = skb_network_header(skb);
  3176. l4.hdr = skb_checksum_start(skb);
  3177. /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
  3178. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  3179. /* initialize outer IP header fields */
  3180. if (ip.v4->version == 4) {
  3181. unsigned char *csum_start = skb_checksum_start(skb);
  3182. unsigned char *trans_start = ip.hdr + (ip.v4->ihl * 4);
  3183. int len = csum_start - trans_start;
  3184. /* IP header will have to cancel out any data that
  3185. * is not a part of the outer IP header, so set to
  3186. * a reverse csum if needed, else init check to 0.
  3187. */
  3188. ip.v4->check = (skb_shinfo(skb)->gso_type & SKB_GSO_PARTIAL) ?
  3189. csum_fold(csum_partial(trans_start,
  3190. len, 0)) : 0;
  3191. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  3192. ip.v4->tot_len = 0;
  3193. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  3194. IXGBE_TX_FLAGS_CSUM |
  3195. IXGBE_TX_FLAGS_IPV4;
  3196. } else {
  3197. ip.v6->payload_len = 0;
  3198. first->tx_flags |= IXGBE_TX_FLAGS_TSO |
  3199. IXGBE_TX_FLAGS_CSUM;
  3200. }
  3201. /* determine offset of inner transport header */
  3202. l4_offset = l4.hdr - skb->data;
  3203. /* compute length of segmentation header */
  3204. *hdr_len = (l4.tcp->doff * 4) + l4_offset;
  3205. /* remove payload length from inner checksum */
  3206. paylen = skb->len - l4_offset;
  3207. csum_replace_by_diff(&l4.tcp->check, (__force __wsum)htonl(paylen));
  3208. /* update gso size and bytecount with header size */
  3209. first->gso_segs = skb_shinfo(skb)->gso_segs;
  3210. first->bytecount += (first->gso_segs - 1) * *hdr_len;
  3211. /* mss_l4len_id: use 1 as index for TSO */
  3212. mss_l4len_idx = (*hdr_len - l4_offset) << IXGBE_ADVTXD_L4LEN_SHIFT;
  3213. mss_l4len_idx |= skb_shinfo(skb)->gso_size << IXGBE_ADVTXD_MSS_SHIFT;
  3214. mss_l4len_idx |= (1u << IXGBE_ADVTXD_IDX_SHIFT);
  3215. fceof_saidx |= itd->pfsa;
  3216. type_tucmd |= itd->flags | itd->trailer_len;
  3217. /* vlan_macip_lens: HEADLEN, MACLEN, VLAN tag */
  3218. vlan_macip_lens = l4.hdr - ip.hdr;
  3219. vlan_macip_lens |= (ip.hdr - skb->data) << IXGBE_ADVTXD_MACLEN_SHIFT;
  3220. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  3221. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens, fceof_saidx, type_tucmd,
  3222. mss_l4len_idx);
  3223. return 1;
  3224. }
  3225. static void ixgbevf_tx_csum(struct ixgbevf_ring *tx_ring,
  3226. struct ixgbevf_tx_buffer *first,
  3227. struct ixgbevf_ipsec_tx_data *itd)
  3228. {
  3229. struct sk_buff *skb = first->skb;
  3230. u32 vlan_macip_lens = 0;
  3231. u32 fceof_saidx = 0;
  3232. u32 type_tucmd = 0;
  3233. if (skb->ip_summed != CHECKSUM_PARTIAL)
  3234. goto no_csum;
  3235. switch (skb->csum_offset) {
  3236. case offsetof(struct tcphdr, check):
  3237. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_TCP;
  3238. fallthrough;
  3239. case offsetof(struct udphdr, check):
  3240. break;
  3241. case offsetof(struct sctphdr, checksum):
  3242. /* validate that this is actually an SCTP request */
  3243. if (skb_csum_is_sctp(skb)) {
  3244. type_tucmd = IXGBE_ADVTXD_TUCMD_L4T_SCTP;
  3245. break;
  3246. }
  3247. fallthrough;
  3248. default:
  3249. skb_checksum_help(skb);
  3250. goto no_csum;
  3251. }
  3252. if (first->protocol == htons(ETH_P_IP))
  3253. type_tucmd |= IXGBE_ADVTXD_TUCMD_IPV4;
  3254. /* update TX checksum flag */
  3255. first->tx_flags |= IXGBE_TX_FLAGS_CSUM;
  3256. vlan_macip_lens = skb_checksum_start_offset(skb) -
  3257. skb_network_offset(skb);
  3258. no_csum:
  3259. /* vlan_macip_lens: MACLEN, VLAN tag */
  3260. vlan_macip_lens |= skb_network_offset(skb) << IXGBE_ADVTXD_MACLEN_SHIFT;
  3261. vlan_macip_lens |= first->tx_flags & IXGBE_TX_FLAGS_VLAN_MASK;
  3262. fceof_saidx |= itd->pfsa;
  3263. type_tucmd |= itd->flags | itd->trailer_len;
  3264. ixgbevf_tx_ctxtdesc(tx_ring, vlan_macip_lens,
  3265. fceof_saidx, type_tucmd, 0);
  3266. }
  3267. static __le32 ixgbevf_tx_cmd_type(u32 tx_flags)
  3268. {
  3269. /* set type for advanced descriptor with frame checksum insertion */
  3270. __le32 cmd_type = cpu_to_le32(IXGBE_ADVTXD_DTYP_DATA |
  3271. IXGBE_ADVTXD_DCMD_IFCS |
  3272. IXGBE_ADVTXD_DCMD_DEXT);
  3273. /* set HW VLAN bit if VLAN is present */
  3274. if (tx_flags & IXGBE_TX_FLAGS_VLAN)
  3275. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_VLE);
  3276. /* set segmentation enable bits for TSO/FSO */
  3277. if (tx_flags & IXGBE_TX_FLAGS_TSO)
  3278. cmd_type |= cpu_to_le32(IXGBE_ADVTXD_DCMD_TSE);
  3279. return cmd_type;
  3280. }
  3281. static void ixgbevf_tx_olinfo_status(union ixgbe_adv_tx_desc *tx_desc,
  3282. u32 tx_flags, unsigned int paylen)
  3283. {
  3284. __le32 olinfo_status = cpu_to_le32(paylen << IXGBE_ADVTXD_PAYLEN_SHIFT);
  3285. /* enable L4 checksum for TSO and TX checksum offload */
  3286. if (tx_flags & IXGBE_TX_FLAGS_CSUM)
  3287. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_TXSM);
  3288. /* enble IPv4 checksum for TSO */
  3289. if (tx_flags & IXGBE_TX_FLAGS_IPV4)
  3290. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IXSM);
  3291. /* enable IPsec */
  3292. if (tx_flags & IXGBE_TX_FLAGS_IPSEC)
  3293. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_POPTS_IPSEC);
  3294. /* use index 1 context for TSO/FSO/FCOE/IPSEC */
  3295. if (tx_flags & (IXGBE_TX_FLAGS_TSO | IXGBE_TX_FLAGS_IPSEC))
  3296. olinfo_status |= cpu_to_le32(1u << IXGBE_ADVTXD_IDX_SHIFT);
  3297. /* Check Context must be set if Tx switch is enabled, which it
  3298. * always is for case where virtual functions are running
  3299. */
  3300. olinfo_status |= cpu_to_le32(IXGBE_ADVTXD_CC);
  3301. tx_desc->read.olinfo_status = olinfo_status;
  3302. }
  3303. static void ixgbevf_tx_map(struct ixgbevf_ring *tx_ring,
  3304. struct ixgbevf_tx_buffer *first,
  3305. const u8 hdr_len)
  3306. {
  3307. struct sk_buff *skb = first->skb;
  3308. struct ixgbevf_tx_buffer *tx_buffer;
  3309. union ixgbe_adv_tx_desc *tx_desc;
  3310. skb_frag_t *frag;
  3311. dma_addr_t dma;
  3312. unsigned int data_len, size;
  3313. u32 tx_flags = first->tx_flags;
  3314. __le32 cmd_type = ixgbevf_tx_cmd_type(tx_flags);
  3315. u16 i = tx_ring->next_to_use;
  3316. tx_desc = IXGBEVF_TX_DESC(tx_ring, i);
  3317. ixgbevf_tx_olinfo_status(tx_desc, tx_flags, skb->len - hdr_len);
  3318. size = skb_headlen(skb);
  3319. data_len = skb->data_len;
  3320. dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
  3321. tx_buffer = first;
  3322. for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
  3323. if (dma_mapping_error(tx_ring->dev, dma))
  3324. goto dma_error;
  3325. /* record length, and DMA address */
  3326. dma_unmap_len_set(tx_buffer, len, size);
  3327. dma_unmap_addr_set(tx_buffer, dma, dma);
  3328. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  3329. while (unlikely(size > IXGBE_MAX_DATA_PER_TXD)) {
  3330. tx_desc->read.cmd_type_len =
  3331. cmd_type | cpu_to_le32(IXGBE_MAX_DATA_PER_TXD);
  3332. i++;
  3333. tx_desc++;
  3334. if (i == tx_ring->count) {
  3335. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  3336. i = 0;
  3337. }
  3338. tx_desc->read.olinfo_status = 0;
  3339. dma += IXGBE_MAX_DATA_PER_TXD;
  3340. size -= IXGBE_MAX_DATA_PER_TXD;
  3341. tx_desc->read.buffer_addr = cpu_to_le64(dma);
  3342. }
  3343. if (likely(!data_len))
  3344. break;
  3345. tx_desc->read.cmd_type_len = cmd_type | cpu_to_le32(size);
  3346. i++;
  3347. tx_desc++;
  3348. if (i == tx_ring->count) {
  3349. tx_desc = IXGBEVF_TX_DESC(tx_ring, 0);
  3350. i = 0;
  3351. }
  3352. tx_desc->read.olinfo_status = 0;
  3353. size = skb_frag_size(frag);
  3354. data_len -= size;
  3355. dma = skb_frag_dma_map(tx_ring->dev, frag, 0, size,
  3356. DMA_TO_DEVICE);
  3357. tx_buffer = &tx_ring->tx_buffer_info[i];
  3358. }
  3359. /* write last descriptor with RS and EOP bits */
  3360. cmd_type |= cpu_to_le32(size) | cpu_to_le32(IXGBE_TXD_CMD);
  3361. tx_desc->read.cmd_type_len = cmd_type;
  3362. /* set the timestamp */
  3363. first->time_stamp = jiffies;
  3364. skb_tx_timestamp(skb);
  3365. /* Force memory writes to complete before letting h/w know there
  3366. * are new descriptors to fetch. (Only applicable for weak-ordered
  3367. * memory model archs, such as IA-64).
  3368. *
  3369. * We also need this memory barrier (wmb) to make certain all of the
  3370. * status bits have been updated before next_to_watch is written.
  3371. */
  3372. wmb();
  3373. /* set next_to_watch value indicating a packet is present */
  3374. first->next_to_watch = tx_desc;
  3375. i++;
  3376. if (i == tx_ring->count)
  3377. i = 0;
  3378. tx_ring->next_to_use = i;
  3379. /* notify HW of packet */
  3380. ixgbevf_write_tail(tx_ring, i);
  3381. return;
  3382. dma_error:
  3383. dev_err(tx_ring->dev, "TX DMA map failed\n");
  3384. tx_buffer = &tx_ring->tx_buffer_info[i];
  3385. /* clear dma mappings for failed tx_buffer_info map */
  3386. while (tx_buffer != first) {
  3387. if (dma_unmap_len(tx_buffer, len))
  3388. dma_unmap_page(tx_ring->dev,
  3389. dma_unmap_addr(tx_buffer, dma),
  3390. dma_unmap_len(tx_buffer, len),
  3391. DMA_TO_DEVICE);
  3392. dma_unmap_len_set(tx_buffer, len, 0);
  3393. if (i-- == 0)
  3394. i += tx_ring->count;
  3395. tx_buffer = &tx_ring->tx_buffer_info[i];
  3396. }
  3397. if (dma_unmap_len(tx_buffer, len))
  3398. dma_unmap_single(tx_ring->dev,
  3399. dma_unmap_addr(tx_buffer, dma),
  3400. dma_unmap_len(tx_buffer, len),
  3401. DMA_TO_DEVICE);
  3402. dma_unmap_len_set(tx_buffer, len, 0);
  3403. dev_kfree_skb_any(tx_buffer->skb);
  3404. tx_buffer->skb = NULL;
  3405. tx_ring->next_to_use = i;
  3406. }
  3407. static int __ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  3408. {
  3409. netif_stop_subqueue(tx_ring->netdev, tx_ring->queue_index);
  3410. /* Herbert's original patch had:
  3411. * smp_mb__after_netif_stop_queue();
  3412. * but since that doesn't exist yet, just open code it.
  3413. */
  3414. smp_mb();
  3415. /* We need to check again in a case another CPU has just
  3416. * made room available.
  3417. */
  3418. if (likely(ixgbevf_desc_unused(tx_ring) < size))
  3419. return -EBUSY;
  3420. /* A reprieve! - use start_queue because it doesn't call schedule */
  3421. netif_start_subqueue(tx_ring->netdev, tx_ring->queue_index);
  3422. ++tx_ring->tx_stats.restart_queue;
  3423. return 0;
  3424. }
  3425. static int ixgbevf_maybe_stop_tx(struct ixgbevf_ring *tx_ring, int size)
  3426. {
  3427. if (likely(ixgbevf_desc_unused(tx_ring) >= size))
  3428. return 0;
  3429. return __ixgbevf_maybe_stop_tx(tx_ring, size);
  3430. }
  3431. static int ixgbevf_xmit_frame_ring(struct sk_buff *skb,
  3432. struct ixgbevf_ring *tx_ring)
  3433. {
  3434. struct ixgbevf_tx_buffer *first;
  3435. int tso;
  3436. u32 tx_flags = 0;
  3437. u16 count = TXD_USE_COUNT(skb_headlen(skb));
  3438. struct ixgbevf_ipsec_tx_data ipsec_tx = { 0 };
  3439. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  3440. unsigned short f;
  3441. #endif
  3442. u8 hdr_len = 0;
  3443. u8 *dst_mac = skb_header_pointer(skb, 0, 0, NULL);
  3444. if (!dst_mac || is_link_local_ether_addr(dst_mac)) {
  3445. dev_kfree_skb_any(skb);
  3446. return NETDEV_TX_OK;
  3447. }
  3448. /* need: 1 descriptor per page * PAGE_SIZE/IXGBE_MAX_DATA_PER_TXD,
  3449. * + 1 desc for skb_headlen/IXGBE_MAX_DATA_PER_TXD,
  3450. * + 2 desc gap to keep tail from touching head,
  3451. * + 1 desc for context descriptor,
  3452. * otherwise try next time
  3453. */
  3454. #if PAGE_SIZE > IXGBE_MAX_DATA_PER_TXD
  3455. for (f = 0; f < skb_shinfo(skb)->nr_frags; f++) {
  3456. skb_frag_t *frag = &skb_shinfo(skb)->frags[f];
  3457. count += TXD_USE_COUNT(skb_frag_size(frag));
  3458. }
  3459. #else
  3460. count += skb_shinfo(skb)->nr_frags;
  3461. #endif
  3462. if (ixgbevf_maybe_stop_tx(tx_ring, count + 3)) {
  3463. tx_ring->tx_stats.tx_busy++;
  3464. return NETDEV_TX_BUSY;
  3465. }
  3466. /* record the location of the first descriptor for this packet */
  3467. first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
  3468. first->skb = skb;
  3469. first->bytecount = skb->len;
  3470. first->gso_segs = 1;
  3471. if (skb_vlan_tag_present(skb)) {
  3472. tx_flags |= skb_vlan_tag_get(skb);
  3473. tx_flags <<= IXGBE_TX_FLAGS_VLAN_SHIFT;
  3474. tx_flags |= IXGBE_TX_FLAGS_VLAN;
  3475. }
  3476. /* record initial flags and protocol */
  3477. first->tx_flags = tx_flags;
  3478. first->protocol = vlan_get_protocol(skb);
  3479. #ifdef CONFIG_IXGBEVF_IPSEC
  3480. if (xfrm_offload(skb) && !ixgbevf_ipsec_tx(tx_ring, first, &ipsec_tx))
  3481. goto out_drop;
  3482. #endif
  3483. tso = ixgbevf_tso(tx_ring, first, &hdr_len, &ipsec_tx);
  3484. if (tso < 0)
  3485. goto out_drop;
  3486. else if (!tso)
  3487. ixgbevf_tx_csum(tx_ring, first, &ipsec_tx);
  3488. ixgbevf_tx_map(tx_ring, first, hdr_len);
  3489. ixgbevf_maybe_stop_tx(tx_ring, DESC_NEEDED);
  3490. return NETDEV_TX_OK;
  3491. out_drop:
  3492. dev_kfree_skb_any(first->skb);
  3493. first->skb = NULL;
  3494. return NETDEV_TX_OK;
  3495. }
  3496. static netdev_tx_t ixgbevf_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  3497. {
  3498. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3499. struct ixgbevf_ring *tx_ring;
  3500. if (skb->len <= 0) {
  3501. dev_kfree_skb_any(skb);
  3502. return NETDEV_TX_OK;
  3503. }
  3504. /* The minimum packet size for olinfo paylen is 17 so pad the skb
  3505. * in order to meet this minimum size requirement.
  3506. */
  3507. if (skb->len < 17) {
  3508. if (skb_padto(skb, 17))
  3509. return NETDEV_TX_OK;
  3510. skb->len = 17;
  3511. }
  3512. tx_ring = adapter->tx_ring[skb->queue_mapping];
  3513. return ixgbevf_xmit_frame_ring(skb, tx_ring);
  3514. }
  3515. /**
  3516. * ixgbevf_set_mac - Change the Ethernet Address of the NIC
  3517. * @netdev: network interface device structure
  3518. * @p: pointer to an address structure
  3519. *
  3520. * Returns 0 on success, negative on failure
  3521. **/
  3522. static int ixgbevf_set_mac(struct net_device *netdev, void *p)
  3523. {
  3524. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3525. struct ixgbe_hw *hw = &adapter->hw;
  3526. struct sockaddr *addr = p;
  3527. int err;
  3528. if (!is_valid_ether_addr(addr->sa_data))
  3529. return -EADDRNOTAVAIL;
  3530. spin_lock_bh(&adapter->mbx_lock);
  3531. err = hw->mac.ops.set_rar(hw, 0, addr->sa_data, 0);
  3532. spin_unlock_bh(&adapter->mbx_lock);
  3533. if (err)
  3534. return -EPERM;
  3535. ether_addr_copy(hw->mac.addr, addr->sa_data);
  3536. ether_addr_copy(hw->mac.perm_addr, addr->sa_data);
  3537. eth_hw_addr_set(netdev, addr->sa_data);
  3538. return 0;
  3539. }
  3540. /**
  3541. * ixgbevf_change_mtu - Change the Maximum Transfer Unit
  3542. * @netdev: network interface device structure
  3543. * @new_mtu: new value for maximum frame size
  3544. *
  3545. * Returns 0 on success, negative on failure
  3546. **/
  3547. static int ixgbevf_change_mtu(struct net_device *netdev, int new_mtu)
  3548. {
  3549. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3550. struct ixgbe_hw *hw = &adapter->hw;
  3551. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN;
  3552. int ret;
  3553. /* prevent MTU being changed to a size unsupported by XDP */
  3554. if (adapter->xdp_prog) {
  3555. dev_warn(&adapter->pdev->dev, "MTU cannot be changed while XDP program is loaded\n");
  3556. return -EPERM;
  3557. }
  3558. spin_lock_bh(&adapter->mbx_lock);
  3559. /* notify the PF of our intent to use this size of frame */
  3560. ret = hw->mac.ops.set_rlpml(hw, max_frame);
  3561. spin_unlock_bh(&adapter->mbx_lock);
  3562. if (ret)
  3563. return -EINVAL;
  3564. hw_dbg(hw, "changing MTU from %d to %d\n",
  3565. netdev->mtu, new_mtu);
  3566. /* must set new MTU before calling down or up */
  3567. WRITE_ONCE(netdev->mtu, new_mtu);
  3568. if (netif_running(netdev))
  3569. ixgbevf_reinit_locked(adapter);
  3570. return 0;
  3571. }
  3572. static int ixgbevf_suspend(struct device *dev_d)
  3573. {
  3574. struct net_device *netdev = dev_get_drvdata(dev_d);
  3575. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3576. rtnl_lock();
  3577. netif_device_detach(netdev);
  3578. if (netif_running(netdev))
  3579. ixgbevf_close_suspend(adapter);
  3580. ixgbevf_clear_interrupt_scheme(adapter);
  3581. rtnl_unlock();
  3582. return 0;
  3583. }
  3584. static int ixgbevf_resume(struct device *dev_d)
  3585. {
  3586. struct pci_dev *pdev = to_pci_dev(dev_d);
  3587. struct net_device *netdev = pci_get_drvdata(pdev);
  3588. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3589. int err;
  3590. adapter->hw.hw_addr = adapter->io_addr;
  3591. smp_mb__before_atomic();
  3592. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  3593. pci_set_master(pdev);
  3594. ixgbevf_reset(adapter);
  3595. rtnl_lock();
  3596. err = ixgbevf_init_interrupt_scheme(adapter);
  3597. if (!err && netif_running(netdev))
  3598. err = ixgbevf_open(netdev);
  3599. rtnl_unlock();
  3600. if (err)
  3601. return err;
  3602. netif_device_attach(netdev);
  3603. return err;
  3604. }
  3605. static void ixgbevf_shutdown(struct pci_dev *pdev)
  3606. {
  3607. ixgbevf_suspend(&pdev->dev);
  3608. }
  3609. static void ixgbevf_get_tx_ring_stats(struct rtnl_link_stats64 *stats,
  3610. const struct ixgbevf_ring *ring)
  3611. {
  3612. u64 bytes, packets;
  3613. unsigned int start;
  3614. if (ring) {
  3615. do {
  3616. start = u64_stats_fetch_begin(&ring->syncp);
  3617. bytes = ring->stats.bytes;
  3618. packets = ring->stats.packets;
  3619. } while (u64_stats_fetch_retry(&ring->syncp, start));
  3620. stats->tx_bytes += bytes;
  3621. stats->tx_packets += packets;
  3622. }
  3623. }
  3624. static void ixgbevf_get_stats(struct net_device *netdev,
  3625. struct rtnl_link_stats64 *stats)
  3626. {
  3627. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3628. unsigned int start;
  3629. u64 bytes, packets;
  3630. const struct ixgbevf_ring *ring;
  3631. int i;
  3632. ixgbevf_update_stats(adapter);
  3633. stats->multicast = adapter->stats.vfmprc - adapter->stats.base_vfmprc;
  3634. rcu_read_lock();
  3635. for (i = 0; i < adapter->num_rx_queues; i++) {
  3636. ring = adapter->rx_ring[i];
  3637. do {
  3638. start = u64_stats_fetch_begin(&ring->syncp);
  3639. bytes = ring->stats.bytes;
  3640. packets = ring->stats.packets;
  3641. } while (u64_stats_fetch_retry(&ring->syncp, start));
  3642. stats->rx_bytes += bytes;
  3643. stats->rx_packets += packets;
  3644. }
  3645. for (i = 0; i < adapter->num_tx_queues; i++) {
  3646. ring = adapter->tx_ring[i];
  3647. ixgbevf_get_tx_ring_stats(stats, ring);
  3648. }
  3649. for (i = 0; i < adapter->num_xdp_queues; i++) {
  3650. ring = adapter->xdp_ring[i];
  3651. ixgbevf_get_tx_ring_stats(stats, ring);
  3652. }
  3653. rcu_read_unlock();
  3654. }
  3655. #define IXGBEVF_MAX_MAC_HDR_LEN 127
  3656. #define IXGBEVF_MAX_NETWORK_HDR_LEN 511
  3657. static netdev_features_t
  3658. ixgbevf_features_check(struct sk_buff *skb, struct net_device *dev,
  3659. netdev_features_t features)
  3660. {
  3661. unsigned int network_hdr_len, mac_hdr_len;
  3662. /* Make certain the headers can be described by a context descriptor */
  3663. mac_hdr_len = skb_network_offset(skb);
  3664. if (unlikely(mac_hdr_len > IXGBEVF_MAX_MAC_HDR_LEN))
  3665. return features & ~(NETIF_F_HW_CSUM |
  3666. NETIF_F_SCTP_CRC |
  3667. NETIF_F_HW_VLAN_CTAG_TX |
  3668. NETIF_F_TSO |
  3669. NETIF_F_TSO6);
  3670. network_hdr_len = skb_checksum_start(skb) - skb_network_header(skb);
  3671. if (unlikely(network_hdr_len > IXGBEVF_MAX_NETWORK_HDR_LEN))
  3672. return features & ~(NETIF_F_HW_CSUM |
  3673. NETIF_F_SCTP_CRC |
  3674. NETIF_F_TSO |
  3675. NETIF_F_TSO6);
  3676. /* We can only support IPV4 TSO in tunnels if we can mangle the
  3677. * inner IP ID field, so strip TSO if MANGLEID is not supported.
  3678. */
  3679. if (skb->encapsulation && !(features & NETIF_F_TSO_MANGLEID))
  3680. features &= ~NETIF_F_TSO;
  3681. return features;
  3682. }
  3683. static int ixgbevf_xdp_setup(struct net_device *dev, struct bpf_prog *prog)
  3684. {
  3685. int i, frame_size = dev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  3686. struct ixgbevf_adapter *adapter = netdev_priv(dev);
  3687. struct bpf_prog *old_prog;
  3688. /* verify ixgbevf ring attributes are sufficient for XDP */
  3689. for (i = 0; i < adapter->num_rx_queues; i++) {
  3690. struct ixgbevf_ring *ring = adapter->rx_ring[i];
  3691. if (frame_size > ixgbevf_rx_bufsz(ring))
  3692. return -EINVAL;
  3693. }
  3694. old_prog = xchg(&adapter->xdp_prog, prog);
  3695. /* If transitioning XDP modes reconfigure rings */
  3696. if (!!prog != !!old_prog) {
  3697. /* Hardware has to reinitialize queues and interrupts to
  3698. * match packet buffer alignment. Unfortunately, the
  3699. * hardware is not flexible enough to do this dynamically.
  3700. */
  3701. if (netif_running(dev))
  3702. ixgbevf_close(dev);
  3703. ixgbevf_clear_interrupt_scheme(adapter);
  3704. ixgbevf_init_interrupt_scheme(adapter);
  3705. if (netif_running(dev))
  3706. ixgbevf_open(dev);
  3707. } else {
  3708. for (i = 0; i < adapter->num_rx_queues; i++)
  3709. xchg(&adapter->rx_ring[i]->xdp_prog, adapter->xdp_prog);
  3710. }
  3711. if (old_prog)
  3712. bpf_prog_put(old_prog);
  3713. return 0;
  3714. }
  3715. static int ixgbevf_xdp(struct net_device *dev, struct netdev_bpf *xdp)
  3716. {
  3717. switch (xdp->command) {
  3718. case XDP_SETUP_PROG:
  3719. return ixgbevf_xdp_setup(dev, xdp->prog);
  3720. default:
  3721. return -EINVAL;
  3722. }
  3723. }
  3724. static const struct net_device_ops ixgbevf_netdev_ops = {
  3725. .ndo_open = ixgbevf_open,
  3726. .ndo_stop = ixgbevf_close,
  3727. .ndo_start_xmit = ixgbevf_xmit_frame,
  3728. .ndo_set_rx_mode = ixgbevf_set_rx_mode,
  3729. .ndo_get_stats64 = ixgbevf_get_stats,
  3730. .ndo_validate_addr = eth_validate_addr,
  3731. .ndo_set_mac_address = ixgbevf_set_mac,
  3732. .ndo_change_mtu = ixgbevf_change_mtu,
  3733. .ndo_tx_timeout = ixgbevf_tx_timeout,
  3734. .ndo_vlan_rx_add_vid = ixgbevf_vlan_rx_add_vid,
  3735. .ndo_vlan_rx_kill_vid = ixgbevf_vlan_rx_kill_vid,
  3736. .ndo_features_check = ixgbevf_features_check,
  3737. .ndo_bpf = ixgbevf_xdp,
  3738. };
  3739. static void ixgbevf_assign_netdev_ops(struct net_device *dev)
  3740. {
  3741. dev->netdev_ops = &ixgbevf_netdev_ops;
  3742. ixgbevf_set_ethtool_ops(dev);
  3743. dev->watchdog_timeo = 5 * HZ;
  3744. }
  3745. /**
  3746. * ixgbevf_probe - Device Initialization Routine
  3747. * @pdev: PCI device information struct
  3748. * @ent: entry in ixgbevf_pci_tbl
  3749. *
  3750. * Returns 0 on success, negative on failure
  3751. *
  3752. * ixgbevf_probe initializes an adapter identified by a pci_dev structure.
  3753. * The OS initialization, configuring of the adapter private structure,
  3754. * and a hardware reset occur.
  3755. **/
  3756. static int ixgbevf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3757. {
  3758. struct net_device *netdev;
  3759. struct ixgbevf_adapter *adapter = NULL;
  3760. struct ixgbe_hw *hw = NULL;
  3761. const struct ixgbevf_info *ii = ixgbevf_info_tbl[ent->driver_data];
  3762. bool disable_dev = false;
  3763. int err;
  3764. err = pci_enable_device(pdev);
  3765. if (err)
  3766. return err;
  3767. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
  3768. if (err) {
  3769. dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
  3770. goto err_dma;
  3771. }
  3772. err = pci_request_regions(pdev, ixgbevf_driver_name);
  3773. if (err) {
  3774. dev_err(&pdev->dev, "pci_request_regions failed 0x%x\n", err);
  3775. goto err_pci_reg;
  3776. }
  3777. pci_set_master(pdev);
  3778. netdev = alloc_etherdev_mq(sizeof(struct ixgbevf_adapter),
  3779. MAX_TX_QUEUES);
  3780. if (!netdev) {
  3781. err = -ENOMEM;
  3782. goto err_alloc_etherdev;
  3783. }
  3784. SET_NETDEV_DEV(netdev, &pdev->dev);
  3785. adapter = netdev_priv(netdev);
  3786. adapter->netdev = netdev;
  3787. adapter->pdev = pdev;
  3788. hw = &adapter->hw;
  3789. hw->back = adapter;
  3790. adapter->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
  3791. /* call save state here in standalone driver because it relies on
  3792. * adapter struct to exist, and needs to call netdev_priv
  3793. */
  3794. pci_save_state(pdev);
  3795. hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
  3796. pci_resource_len(pdev, 0));
  3797. adapter->io_addr = hw->hw_addr;
  3798. if (!hw->hw_addr) {
  3799. err = -EIO;
  3800. goto err_ioremap;
  3801. }
  3802. ixgbevf_assign_netdev_ops(netdev);
  3803. /* Setup HW API */
  3804. memcpy(&hw->mac.ops, ii->mac_ops, sizeof(hw->mac.ops));
  3805. hw->mac.type = ii->mac;
  3806. memcpy(&hw->mbx.ops, &ixgbevf_mbx_ops_legacy,
  3807. sizeof(struct ixgbe_mbx_operations));
  3808. /* setup the private structure */
  3809. err = ixgbevf_sw_init(adapter);
  3810. if (err)
  3811. goto err_sw_init;
  3812. /* The HW MAC address was set and/or determined in sw_init */
  3813. if (!is_valid_ether_addr(netdev->dev_addr)) {
  3814. pr_err("invalid MAC address\n");
  3815. err = -EIO;
  3816. goto err_sw_init;
  3817. }
  3818. netdev->hw_features = NETIF_F_SG |
  3819. NETIF_F_TSO |
  3820. NETIF_F_TSO6 |
  3821. NETIF_F_RXCSUM |
  3822. NETIF_F_HW_CSUM |
  3823. NETIF_F_SCTP_CRC;
  3824. #define IXGBEVF_GSO_PARTIAL_FEATURES (NETIF_F_GSO_GRE | \
  3825. NETIF_F_GSO_GRE_CSUM | \
  3826. NETIF_F_GSO_IPXIP4 | \
  3827. NETIF_F_GSO_IPXIP6 | \
  3828. NETIF_F_GSO_UDP_TUNNEL | \
  3829. NETIF_F_GSO_UDP_TUNNEL_CSUM)
  3830. netdev->gso_partial_features = IXGBEVF_GSO_PARTIAL_FEATURES;
  3831. netdev->hw_features |= NETIF_F_GSO_PARTIAL |
  3832. IXGBEVF_GSO_PARTIAL_FEATURES;
  3833. netdev->features = netdev->hw_features | NETIF_F_HIGHDMA;
  3834. netdev->vlan_features |= netdev->features | NETIF_F_TSO_MANGLEID;
  3835. netdev->mpls_features |= NETIF_F_SG |
  3836. NETIF_F_TSO |
  3837. NETIF_F_TSO6 |
  3838. NETIF_F_HW_CSUM;
  3839. netdev->mpls_features |= IXGBEVF_GSO_PARTIAL_FEATURES;
  3840. netdev->hw_enc_features |= netdev->vlan_features;
  3841. /* set this bit last since it cannot be part of vlan_features */
  3842. netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER |
  3843. NETIF_F_HW_VLAN_CTAG_RX |
  3844. NETIF_F_HW_VLAN_CTAG_TX;
  3845. netdev->priv_flags |= IFF_UNICAST_FLT;
  3846. netdev->xdp_features = NETDEV_XDP_ACT_BASIC;
  3847. /* MTU range: 68 - 1504 or 9710 */
  3848. netdev->min_mtu = ETH_MIN_MTU;
  3849. switch (adapter->hw.api_version) {
  3850. case ixgbe_mbox_api_11:
  3851. case ixgbe_mbox_api_12:
  3852. case ixgbe_mbox_api_13:
  3853. case ixgbe_mbox_api_14:
  3854. case ixgbe_mbox_api_15:
  3855. case ixgbe_mbox_api_16:
  3856. case ixgbe_mbox_api_17:
  3857. netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
  3858. (ETH_HLEN + ETH_FCS_LEN);
  3859. break;
  3860. default:
  3861. if (adapter->hw.mac.type != ixgbe_mac_82599_vf)
  3862. netdev->max_mtu = IXGBE_MAX_JUMBO_FRAME_SIZE -
  3863. (ETH_HLEN + ETH_FCS_LEN);
  3864. else
  3865. netdev->max_mtu = ETH_DATA_LEN + ETH_FCS_LEN;
  3866. break;
  3867. }
  3868. if (IXGBE_REMOVED(hw->hw_addr)) {
  3869. err = -EIO;
  3870. goto err_sw_init;
  3871. }
  3872. timer_setup(&adapter->service_timer, ixgbevf_service_timer, 0);
  3873. INIT_WORK(&adapter->service_task, ixgbevf_service_task);
  3874. set_bit(__IXGBEVF_SERVICE_INITED, &adapter->state);
  3875. clear_bit(__IXGBEVF_SERVICE_SCHED, &adapter->state);
  3876. err = ixgbevf_init_interrupt_scheme(adapter);
  3877. if (err)
  3878. goto err_sw_init;
  3879. strcpy(netdev->name, "eth%d");
  3880. err = register_netdev(netdev);
  3881. if (err)
  3882. goto err_register;
  3883. pci_set_drvdata(pdev, netdev);
  3884. netif_carrier_off(netdev);
  3885. ixgbevf_init_ipsec_offload(adapter);
  3886. ixgbevf_init_last_counter_stats(adapter);
  3887. /* print the VF info */
  3888. dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
  3889. dev_info(&pdev->dev, "MAC: %d\n", hw->mac.type);
  3890. switch (hw->mac.type) {
  3891. case ixgbe_mac_X550_vf:
  3892. dev_info(&pdev->dev, "Intel(R) X550 Virtual Function\n");
  3893. break;
  3894. case ixgbe_mac_X540_vf:
  3895. dev_info(&pdev->dev, "Intel(R) X540 Virtual Function\n");
  3896. break;
  3897. case ixgbe_mac_e610_vf:
  3898. dev_info(&pdev->dev, "Intel(R) E610 Virtual Function\n");
  3899. break;
  3900. case ixgbe_mac_82599_vf:
  3901. default:
  3902. dev_info(&pdev->dev, "Intel(R) 82599 Virtual Function\n");
  3903. break;
  3904. }
  3905. return 0;
  3906. err_register:
  3907. ixgbevf_clear_interrupt_scheme(adapter);
  3908. err_sw_init:
  3909. ixgbevf_reset_interrupt_capability(adapter);
  3910. iounmap(adapter->io_addr);
  3911. kfree(adapter->rss_key);
  3912. err_ioremap:
  3913. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3914. free_netdev(netdev);
  3915. err_alloc_etherdev:
  3916. pci_release_regions(pdev);
  3917. err_pci_reg:
  3918. err_dma:
  3919. if (!adapter || disable_dev)
  3920. pci_disable_device(pdev);
  3921. return err;
  3922. }
  3923. /**
  3924. * ixgbevf_remove - Device Removal Routine
  3925. * @pdev: PCI device information struct
  3926. *
  3927. * ixgbevf_remove is called by the PCI subsystem to alert the driver
  3928. * that it should release a PCI device. The could be caused by a
  3929. * Hot-Plug event, or because the driver is going to be removed from
  3930. * memory.
  3931. **/
  3932. static void ixgbevf_remove(struct pci_dev *pdev)
  3933. {
  3934. struct net_device *netdev = pci_get_drvdata(pdev);
  3935. struct ixgbevf_adapter *adapter;
  3936. bool disable_dev;
  3937. if (!netdev)
  3938. return;
  3939. adapter = netdev_priv(netdev);
  3940. set_bit(__IXGBEVF_REMOVING, &adapter->state);
  3941. cancel_work_sync(&adapter->service_task);
  3942. if (netdev->reg_state == NETREG_REGISTERED)
  3943. unregister_netdev(netdev);
  3944. ixgbevf_stop_ipsec_offload(adapter);
  3945. ixgbevf_clear_interrupt_scheme(adapter);
  3946. ixgbevf_reset_interrupt_capability(adapter);
  3947. iounmap(adapter->io_addr);
  3948. pci_release_regions(pdev);
  3949. hw_dbg(&adapter->hw, "Remove complete\n");
  3950. kfree(adapter->rss_key);
  3951. disable_dev = !test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state);
  3952. free_netdev(netdev);
  3953. if (disable_dev)
  3954. pci_disable_device(pdev);
  3955. }
  3956. /**
  3957. * ixgbevf_io_error_detected - called when PCI error is detected
  3958. * @pdev: Pointer to PCI device
  3959. * @state: The current pci connection state
  3960. *
  3961. * This function is called after a PCI bus error affecting
  3962. * this device has been detected.
  3963. **/
  3964. static pci_ers_result_t ixgbevf_io_error_detected(struct pci_dev *pdev,
  3965. pci_channel_state_t state)
  3966. {
  3967. struct net_device *netdev = pci_get_drvdata(pdev);
  3968. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3969. if (!test_bit(__IXGBEVF_SERVICE_INITED, &adapter->state))
  3970. return PCI_ERS_RESULT_DISCONNECT;
  3971. rtnl_lock();
  3972. netif_device_detach(netdev);
  3973. if (netif_running(netdev))
  3974. ixgbevf_close_suspend(adapter);
  3975. if (state == pci_channel_io_perm_failure) {
  3976. rtnl_unlock();
  3977. return PCI_ERS_RESULT_DISCONNECT;
  3978. }
  3979. if (!test_and_set_bit(__IXGBEVF_DISABLED, &adapter->state))
  3980. pci_disable_device(pdev);
  3981. rtnl_unlock();
  3982. /* Request a slot reset. */
  3983. return PCI_ERS_RESULT_NEED_RESET;
  3984. }
  3985. /**
  3986. * ixgbevf_io_slot_reset - called after the pci bus has been reset.
  3987. * @pdev: Pointer to PCI device
  3988. *
  3989. * Restart the card from scratch, as if from a cold-boot. Implementation
  3990. * resembles the first-half of the ixgbevf_resume routine.
  3991. **/
  3992. static pci_ers_result_t ixgbevf_io_slot_reset(struct pci_dev *pdev)
  3993. {
  3994. struct net_device *netdev = pci_get_drvdata(pdev);
  3995. struct ixgbevf_adapter *adapter = netdev_priv(netdev);
  3996. if (pci_enable_device_mem(pdev)) {
  3997. dev_err(&pdev->dev,
  3998. "Cannot re-enable PCI device after reset.\n");
  3999. return PCI_ERS_RESULT_DISCONNECT;
  4000. }
  4001. adapter->hw.hw_addr = adapter->io_addr;
  4002. smp_mb__before_atomic();
  4003. clear_bit(__IXGBEVF_DISABLED, &adapter->state);
  4004. pci_set_master(pdev);
  4005. ixgbevf_reset(adapter);
  4006. return PCI_ERS_RESULT_RECOVERED;
  4007. }
  4008. /**
  4009. * ixgbevf_io_resume - called when traffic can start flowing again.
  4010. * @pdev: Pointer to PCI device
  4011. *
  4012. * This callback is called when the error recovery driver tells us that
  4013. * its OK to resume normal operation. Implementation resembles the
  4014. * second-half of the ixgbevf_resume routine.
  4015. **/
  4016. static void ixgbevf_io_resume(struct pci_dev *pdev)
  4017. {
  4018. struct net_device *netdev = pci_get_drvdata(pdev);
  4019. rtnl_lock();
  4020. if (netif_running(netdev))
  4021. ixgbevf_open(netdev);
  4022. netif_device_attach(netdev);
  4023. rtnl_unlock();
  4024. }
  4025. /* PCI Error Recovery (ERS) */
  4026. static const struct pci_error_handlers ixgbevf_err_handler = {
  4027. .error_detected = ixgbevf_io_error_detected,
  4028. .slot_reset = ixgbevf_io_slot_reset,
  4029. .resume = ixgbevf_io_resume,
  4030. };
  4031. static DEFINE_SIMPLE_DEV_PM_OPS(ixgbevf_pm_ops, ixgbevf_suspend, ixgbevf_resume);
  4032. static struct pci_driver ixgbevf_driver = {
  4033. .name = ixgbevf_driver_name,
  4034. .id_table = ixgbevf_pci_tbl,
  4035. .probe = ixgbevf_probe,
  4036. .remove = ixgbevf_remove,
  4037. /* Power Management Hooks */
  4038. .driver.pm = pm_sleep_ptr(&ixgbevf_pm_ops),
  4039. .shutdown = ixgbevf_shutdown,
  4040. .err_handler = &ixgbevf_err_handler
  4041. };
  4042. /**
  4043. * ixgbevf_init_module - Driver Registration Routine
  4044. *
  4045. * ixgbevf_init_module is the first routine called when the driver is
  4046. * loaded. All it does is register with the PCI subsystem.
  4047. **/
  4048. static int __init ixgbevf_init_module(void)
  4049. {
  4050. int err;
  4051. pr_info("%s\n", ixgbevf_driver_string);
  4052. pr_info("%s\n", ixgbevf_copyright);
  4053. ixgbevf_wq = create_singlethread_workqueue(ixgbevf_driver_name);
  4054. if (!ixgbevf_wq) {
  4055. pr_err("%s: Failed to create workqueue\n", ixgbevf_driver_name);
  4056. return -ENOMEM;
  4057. }
  4058. err = pci_register_driver(&ixgbevf_driver);
  4059. if (err) {
  4060. destroy_workqueue(ixgbevf_wq);
  4061. return err;
  4062. }
  4063. return 0;
  4064. }
  4065. module_init(ixgbevf_init_module);
  4066. /**
  4067. * ixgbevf_exit_module - Driver Exit Cleanup Routine
  4068. *
  4069. * ixgbevf_exit_module is called just before the driver is removed
  4070. * from memory.
  4071. **/
  4072. static void __exit ixgbevf_exit_module(void)
  4073. {
  4074. pci_unregister_driver(&ixgbevf_driver);
  4075. if (ixgbevf_wq) {
  4076. destroy_workqueue(ixgbevf_wq);
  4077. ixgbevf_wq = NULL;
  4078. }
  4079. }
  4080. #ifdef DEBUG
  4081. /**
  4082. * ixgbevf_get_hw_dev_name - return device name string
  4083. * used by hardware layer to print debugging information
  4084. * @hw: pointer to private hardware struct
  4085. **/
  4086. char *ixgbevf_get_hw_dev_name(struct ixgbe_hw *hw)
  4087. {
  4088. struct ixgbevf_adapter *adapter = hw->back;
  4089. return adapter->netdev->name;
  4090. }
  4091. #endif
  4092. module_exit(ixgbevf_exit_module);
  4093. /* ixgbevf_main.c */