ftmac100.c 32 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Faraday FTMAC100 10/100 Ethernet
  4. *
  5. * (C) Copyright 2009-2011 Faraday Technology
  6. * Po-Yu Chuang <ratbert@faraday-tech.com>
  7. */
  8. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  9. #include <linux/dma-mapping.h>
  10. #include <linux/etherdevice.h>
  11. #include <linux/ethtool.h>
  12. #include <linux/if_ether.h>
  13. #include <linux/if_vlan.h>
  14. #include <linux/init.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/mii.h>
  18. #include <linux/module.h>
  19. #include <linux/mod_devicetable.h>
  20. #include <linux/netdevice.h>
  21. #include <linux/platform_device.h>
  22. #include "ftmac100.h"
  23. #define DRV_NAME "ftmac100"
  24. #define RX_QUEUE_ENTRIES 128 /* must be power of 2 */
  25. #define TX_QUEUE_ENTRIES 16 /* must be power of 2 */
  26. #define RX_BUF_SIZE 2044 /* must be smaller than 0x7ff */
  27. #define MAX_PKT_SIZE RX_BUF_SIZE /* multi-segment not supported */
  28. #if MAX_PKT_SIZE > 0x7ff
  29. #error invalid MAX_PKT_SIZE
  30. #endif
  31. #if RX_BUF_SIZE > 0x7ff || RX_BUF_SIZE > PAGE_SIZE
  32. #error invalid RX_BUF_SIZE
  33. #endif
  34. /******************************************************************************
  35. * private data
  36. *****************************************************************************/
  37. struct ftmac100_descs {
  38. struct ftmac100_rxdes rxdes[RX_QUEUE_ENTRIES];
  39. struct ftmac100_txdes txdes[TX_QUEUE_ENTRIES];
  40. };
  41. struct ftmac100 {
  42. struct resource *res;
  43. void __iomem *base;
  44. int irq;
  45. struct ftmac100_descs *descs;
  46. dma_addr_t descs_dma_addr;
  47. unsigned int rx_pointer;
  48. unsigned int tx_clean_pointer;
  49. unsigned int tx_pointer;
  50. unsigned int tx_pending;
  51. spinlock_t tx_lock;
  52. struct net_device *netdev;
  53. struct device *dev;
  54. struct napi_struct napi;
  55. struct mii_if_info mii;
  56. };
  57. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  58. struct ftmac100_rxdes *rxdes, gfp_t gfp);
  59. /******************************************************************************
  60. * internal functions (hardware register access)
  61. *****************************************************************************/
  62. #define INT_MASK_ALL_ENABLED (FTMAC100_INT_RPKT_FINISH | \
  63. FTMAC100_INT_NORXBUF | \
  64. FTMAC100_INT_XPKT_OK | \
  65. FTMAC100_INT_XPKT_LOST | \
  66. FTMAC100_INT_RPKT_LOST | \
  67. FTMAC100_INT_AHB_ERR | \
  68. FTMAC100_INT_PHYSTS_CHG)
  69. #define INT_MASK_ALL_DISABLED 0
  70. static void ftmac100_enable_all_int(struct ftmac100 *priv)
  71. {
  72. iowrite32(INT_MASK_ALL_ENABLED, priv->base + FTMAC100_OFFSET_IMR);
  73. }
  74. static void ftmac100_disable_all_int(struct ftmac100 *priv)
  75. {
  76. iowrite32(INT_MASK_ALL_DISABLED, priv->base + FTMAC100_OFFSET_IMR);
  77. }
  78. static void ftmac100_set_rx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  79. {
  80. iowrite32(addr, priv->base + FTMAC100_OFFSET_RXR_BADR);
  81. }
  82. static void ftmac100_set_tx_ring_base(struct ftmac100 *priv, dma_addr_t addr)
  83. {
  84. iowrite32(addr, priv->base + FTMAC100_OFFSET_TXR_BADR);
  85. }
  86. static void ftmac100_txdma_start_polling(struct ftmac100 *priv)
  87. {
  88. iowrite32(1, priv->base + FTMAC100_OFFSET_TXPD);
  89. }
  90. static int ftmac100_reset(struct ftmac100 *priv)
  91. {
  92. struct net_device *netdev = priv->netdev;
  93. int i;
  94. /* NOTE: reset clears all registers */
  95. iowrite32(FTMAC100_MACCR_SW_RST, priv->base + FTMAC100_OFFSET_MACCR);
  96. for (i = 0; i < 5; i++) {
  97. unsigned int maccr;
  98. maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  99. if (!(maccr & FTMAC100_MACCR_SW_RST)) {
  100. /*
  101. * FTMAC100_MACCR_SW_RST cleared does not indicate
  102. * that hardware reset completed (what the f*ck).
  103. * We still need to wait for a while.
  104. */
  105. udelay(500);
  106. return 0;
  107. }
  108. udelay(1000);
  109. }
  110. netdev_err(netdev, "software reset failed\n");
  111. return -EIO;
  112. }
  113. static void ftmac100_set_mac(struct ftmac100 *priv, const unsigned char *mac)
  114. {
  115. unsigned int maddr = mac[0] << 8 | mac[1];
  116. unsigned int laddr = mac[2] << 24 | mac[3] << 16 | mac[4] << 8 | mac[5];
  117. iowrite32(maddr, priv->base + FTMAC100_OFFSET_MAC_MADR);
  118. iowrite32(laddr, priv->base + FTMAC100_OFFSET_MAC_LADR);
  119. }
  120. static void ftmac100_setup_mc_ht(struct ftmac100 *priv)
  121. {
  122. struct netdev_hw_addr *ha;
  123. u64 maht = 0; /* Multicast Address Hash Table */
  124. netdev_for_each_mc_addr(ha, priv->netdev) {
  125. u32 hash = ether_crc(ETH_ALEN, ha->addr) >> 26;
  126. maht |= BIT_ULL(hash);
  127. }
  128. iowrite32(lower_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT0);
  129. iowrite32(upper_32_bits(maht), priv->base + FTMAC100_OFFSET_MAHT1);
  130. }
  131. static void ftmac100_set_rx_bits(struct ftmac100 *priv, unsigned int *maccr)
  132. {
  133. struct net_device *netdev = priv->netdev;
  134. /* Clear all */
  135. *maccr &= ~(FTMAC100_MACCR_RCV_ALL | FTMAC100_MACCR_RX_MULTIPKT |
  136. FTMAC100_MACCR_HT_MULTI_EN);
  137. /* Set the requested bits */
  138. if (netdev->flags & IFF_PROMISC)
  139. *maccr |= FTMAC100_MACCR_RCV_ALL;
  140. if (netdev->flags & IFF_ALLMULTI)
  141. *maccr |= FTMAC100_MACCR_RX_MULTIPKT;
  142. else if (netdev_mc_count(netdev)) {
  143. *maccr |= FTMAC100_MACCR_HT_MULTI_EN;
  144. ftmac100_setup_mc_ht(priv);
  145. }
  146. }
  147. #define MACCR_ENABLE_ALL (FTMAC100_MACCR_XMT_EN | \
  148. FTMAC100_MACCR_RCV_EN | \
  149. FTMAC100_MACCR_XDMA_EN | \
  150. FTMAC100_MACCR_RDMA_EN | \
  151. FTMAC100_MACCR_CRC_APD | \
  152. FTMAC100_MACCR_FULLDUP | \
  153. FTMAC100_MACCR_RX_RUNT | \
  154. FTMAC100_MACCR_RX_BROADPKT)
  155. static int ftmac100_start_hw(struct ftmac100 *priv)
  156. {
  157. struct net_device *netdev = priv->netdev;
  158. unsigned int maccr = MACCR_ENABLE_ALL;
  159. if (ftmac100_reset(priv))
  160. return -EIO;
  161. /* setup ring buffer base registers */
  162. ftmac100_set_rx_ring_base(priv,
  163. priv->descs_dma_addr +
  164. offsetof(struct ftmac100_descs, rxdes));
  165. ftmac100_set_tx_ring_base(priv,
  166. priv->descs_dma_addr +
  167. offsetof(struct ftmac100_descs, txdes));
  168. iowrite32(FTMAC100_APTC_RXPOLL_CNT(1), priv->base + FTMAC100_OFFSET_APTC);
  169. ftmac100_set_mac(priv, netdev->dev_addr);
  170. /* See ftmac100_change_mtu() */
  171. if (netdev->mtu > ETH_DATA_LEN)
  172. maccr |= FTMAC100_MACCR_RX_FTL;
  173. ftmac100_set_rx_bits(priv, &maccr);
  174. iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
  175. return 0;
  176. }
  177. static void ftmac100_stop_hw(struct ftmac100 *priv)
  178. {
  179. iowrite32(0, priv->base + FTMAC100_OFFSET_MACCR);
  180. }
  181. /******************************************************************************
  182. * internal functions (receive descriptor)
  183. *****************************************************************************/
  184. static bool ftmac100_rxdes_first_segment(struct ftmac100_rxdes *rxdes)
  185. {
  186. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_FRS);
  187. }
  188. static bool ftmac100_rxdes_last_segment(struct ftmac100_rxdes *rxdes)
  189. {
  190. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_LRS);
  191. }
  192. static bool ftmac100_rxdes_owned_by_dma(struct ftmac100_rxdes *rxdes)
  193. {
  194. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  195. }
  196. static void ftmac100_rxdes_set_dma_own(struct ftmac100_rxdes *rxdes)
  197. {
  198. /* clear status bits */
  199. rxdes->rxdes0 = cpu_to_le32(FTMAC100_RXDES0_RXDMA_OWN);
  200. }
  201. static bool ftmac100_rxdes_rx_error(struct ftmac100_rxdes *rxdes)
  202. {
  203. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ERR);
  204. }
  205. static bool ftmac100_rxdes_crc_error(struct ftmac100_rxdes *rxdes)
  206. {
  207. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_CRC_ERR);
  208. }
  209. static bool ftmac100_rxdes_runt(struct ftmac100_rxdes *rxdes)
  210. {
  211. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RUNT);
  212. }
  213. static bool ftmac100_rxdes_odd_nibble(struct ftmac100_rxdes *rxdes)
  214. {
  215. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_RX_ODD_NB);
  216. }
  217. static unsigned int ftmac100_rxdes_frame_length(struct ftmac100_rxdes *rxdes)
  218. {
  219. return le32_to_cpu(rxdes->rxdes0) & FTMAC100_RXDES0_RFL;
  220. }
  221. static bool ftmac100_rxdes_multicast(struct ftmac100_rxdes *rxdes)
  222. {
  223. return rxdes->rxdes0 & cpu_to_le32(FTMAC100_RXDES0_MULTICAST);
  224. }
  225. static void ftmac100_rxdes_set_buffer_size(struct ftmac100_rxdes *rxdes,
  226. unsigned int size)
  227. {
  228. rxdes->rxdes1 &= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  229. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_RXBUF_SIZE(size));
  230. }
  231. static void ftmac100_rxdes_set_end_of_ring(struct ftmac100_rxdes *rxdes)
  232. {
  233. rxdes->rxdes1 |= cpu_to_le32(FTMAC100_RXDES1_EDORR);
  234. }
  235. static void ftmac100_rxdes_set_dma_addr(struct ftmac100_rxdes *rxdes,
  236. dma_addr_t addr)
  237. {
  238. rxdes->rxdes2 = cpu_to_le32(addr);
  239. }
  240. static dma_addr_t ftmac100_rxdes_get_dma_addr(struct ftmac100_rxdes *rxdes)
  241. {
  242. return le32_to_cpu(rxdes->rxdes2);
  243. }
  244. /*
  245. * rxdes3 is not used by hardware. We use it to keep track of page.
  246. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  247. */
  248. static void ftmac100_rxdes_set_page(struct ftmac100_rxdes *rxdes, struct page *page)
  249. {
  250. rxdes->rxdes3 = (unsigned int)page;
  251. }
  252. static struct page *ftmac100_rxdes_get_page(struct ftmac100_rxdes *rxdes)
  253. {
  254. return (struct page *)rxdes->rxdes3;
  255. }
  256. /******************************************************************************
  257. * internal functions (receive)
  258. *****************************************************************************/
  259. static int ftmac100_next_rx_pointer(int pointer)
  260. {
  261. return (pointer + 1) & (RX_QUEUE_ENTRIES - 1);
  262. }
  263. static void ftmac100_rx_pointer_advance(struct ftmac100 *priv)
  264. {
  265. priv->rx_pointer = ftmac100_next_rx_pointer(priv->rx_pointer);
  266. }
  267. static struct ftmac100_rxdes *ftmac100_current_rxdes(struct ftmac100 *priv)
  268. {
  269. return &priv->descs->rxdes[priv->rx_pointer];
  270. }
  271. static struct ftmac100_rxdes *
  272. ftmac100_rx_locate_first_segment(struct ftmac100 *priv)
  273. {
  274. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  275. while (!ftmac100_rxdes_owned_by_dma(rxdes)) {
  276. if (ftmac100_rxdes_first_segment(rxdes))
  277. return rxdes;
  278. ftmac100_rxdes_set_dma_own(rxdes);
  279. ftmac100_rx_pointer_advance(priv);
  280. rxdes = ftmac100_current_rxdes(priv);
  281. }
  282. return NULL;
  283. }
  284. static bool ftmac100_rx_packet_error(struct ftmac100 *priv,
  285. struct ftmac100_rxdes *rxdes)
  286. {
  287. struct net_device *netdev = priv->netdev;
  288. bool error = false;
  289. if (unlikely(ftmac100_rxdes_rx_error(rxdes))) {
  290. if (net_ratelimit())
  291. netdev_info(netdev, "rx err\n");
  292. netdev->stats.rx_errors++;
  293. error = true;
  294. }
  295. if (unlikely(ftmac100_rxdes_crc_error(rxdes))) {
  296. if (net_ratelimit())
  297. netdev_info(netdev, "rx crc err\n");
  298. netdev->stats.rx_crc_errors++;
  299. error = true;
  300. }
  301. if (unlikely(ftmac100_rxdes_runt(rxdes))) {
  302. if (net_ratelimit())
  303. netdev_info(netdev, "rx runt\n");
  304. netdev->stats.rx_length_errors++;
  305. error = true;
  306. } else if (unlikely(ftmac100_rxdes_odd_nibble(rxdes))) {
  307. if (net_ratelimit())
  308. netdev_info(netdev, "rx odd nibble\n");
  309. netdev->stats.rx_length_errors++;
  310. error = true;
  311. }
  312. /*
  313. * FTMAC100_RXDES0_FTL is not an error, it just indicates that the
  314. * frame is longer than 1518 octets. Receiving these is possible when
  315. * we told the hardware not to drop them, via FTMAC100_MACCR_RX_FTL.
  316. */
  317. return error;
  318. }
  319. static void ftmac100_rx_drop_packet(struct ftmac100 *priv)
  320. {
  321. struct net_device *netdev = priv->netdev;
  322. struct ftmac100_rxdes *rxdes = ftmac100_current_rxdes(priv);
  323. bool done = false;
  324. if (net_ratelimit())
  325. netdev_dbg(netdev, "drop packet %p\n", rxdes);
  326. do {
  327. if (ftmac100_rxdes_last_segment(rxdes))
  328. done = true;
  329. ftmac100_rxdes_set_dma_own(rxdes);
  330. ftmac100_rx_pointer_advance(priv);
  331. rxdes = ftmac100_current_rxdes(priv);
  332. } while (!done && !ftmac100_rxdes_owned_by_dma(rxdes));
  333. netdev->stats.rx_dropped++;
  334. }
  335. static bool ftmac100_rx_packet(struct ftmac100 *priv, int *processed)
  336. {
  337. struct net_device *netdev = priv->netdev;
  338. struct ftmac100_rxdes *rxdes;
  339. struct sk_buff *skb;
  340. struct page *page;
  341. dma_addr_t map;
  342. int length;
  343. bool ret;
  344. rxdes = ftmac100_rx_locate_first_segment(priv);
  345. if (!rxdes)
  346. return false;
  347. if (unlikely(ftmac100_rx_packet_error(priv, rxdes))) {
  348. ftmac100_rx_drop_packet(priv);
  349. return true;
  350. }
  351. /* We don't support multi-segment packets for now, so drop them. */
  352. ret = ftmac100_rxdes_last_segment(rxdes);
  353. if (unlikely(!ret)) {
  354. netdev->stats.rx_length_errors++;
  355. ftmac100_rx_drop_packet(priv);
  356. return true;
  357. }
  358. /* start processing */
  359. skb = netdev_alloc_skb_ip_align(netdev, 128);
  360. if (unlikely(!skb)) {
  361. if (net_ratelimit())
  362. netdev_err(netdev, "rx skb alloc failed\n");
  363. ftmac100_rx_drop_packet(priv);
  364. return true;
  365. }
  366. if (unlikely(ftmac100_rxdes_multicast(rxdes)))
  367. netdev->stats.multicast++;
  368. map = ftmac100_rxdes_get_dma_addr(rxdes);
  369. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  370. length = ftmac100_rxdes_frame_length(rxdes);
  371. page = ftmac100_rxdes_get_page(rxdes);
  372. skb_fill_page_desc(skb, 0, page, 0, length);
  373. skb->len += length;
  374. skb->data_len += length;
  375. if (length > 128) {
  376. skb->truesize += PAGE_SIZE;
  377. /* We pull the minimum amount into linear part */
  378. __pskb_pull_tail(skb, ETH_HLEN);
  379. } else {
  380. /* Small frames are copied into linear part to free one page */
  381. __pskb_pull_tail(skb, length);
  382. }
  383. ftmac100_alloc_rx_page(priv, rxdes, GFP_ATOMIC);
  384. ftmac100_rx_pointer_advance(priv);
  385. skb->protocol = eth_type_trans(skb, netdev);
  386. netdev->stats.rx_packets++;
  387. netdev->stats.rx_bytes += skb->len;
  388. /* push packet to protocol stack */
  389. netif_receive_skb(skb);
  390. (*processed)++;
  391. return true;
  392. }
  393. /******************************************************************************
  394. * internal functions (transmit descriptor)
  395. *****************************************************************************/
  396. static void ftmac100_txdes_reset(struct ftmac100_txdes *txdes)
  397. {
  398. /* clear all except end of ring bit */
  399. txdes->txdes0 = 0;
  400. txdes->txdes1 &= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  401. txdes->txdes2 = 0;
  402. txdes->txdes3 = 0;
  403. }
  404. static bool ftmac100_txdes_owned_by_dma(struct ftmac100_txdes *txdes)
  405. {
  406. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  407. }
  408. static void ftmac100_txdes_set_dma_own(struct ftmac100_txdes *txdes)
  409. {
  410. /*
  411. * Make sure dma own bit will not be set before any other
  412. * descriptor fields.
  413. */
  414. wmb();
  415. txdes->txdes0 |= cpu_to_le32(FTMAC100_TXDES0_TXDMA_OWN);
  416. }
  417. static bool ftmac100_txdes_excessive_collision(struct ftmac100_txdes *txdes)
  418. {
  419. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_EXSCOL);
  420. }
  421. static bool ftmac100_txdes_late_collision(struct ftmac100_txdes *txdes)
  422. {
  423. return txdes->txdes0 & cpu_to_le32(FTMAC100_TXDES0_TXPKT_LATECOL);
  424. }
  425. static void ftmac100_txdes_set_end_of_ring(struct ftmac100_txdes *txdes)
  426. {
  427. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_EDOTR);
  428. }
  429. static void ftmac100_txdes_set_first_segment(struct ftmac100_txdes *txdes)
  430. {
  431. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_FTS);
  432. }
  433. static void ftmac100_txdes_set_last_segment(struct ftmac100_txdes *txdes)
  434. {
  435. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_LTS);
  436. }
  437. static void ftmac100_txdes_set_txint(struct ftmac100_txdes *txdes)
  438. {
  439. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXIC);
  440. }
  441. static void ftmac100_txdes_set_buffer_size(struct ftmac100_txdes *txdes,
  442. unsigned int len)
  443. {
  444. txdes->txdes1 |= cpu_to_le32(FTMAC100_TXDES1_TXBUF_SIZE(len));
  445. }
  446. static void ftmac100_txdes_set_dma_addr(struct ftmac100_txdes *txdes,
  447. dma_addr_t addr)
  448. {
  449. txdes->txdes2 = cpu_to_le32(addr);
  450. }
  451. static dma_addr_t ftmac100_txdes_get_dma_addr(struct ftmac100_txdes *txdes)
  452. {
  453. return le32_to_cpu(txdes->txdes2);
  454. }
  455. /*
  456. * txdes3 is not used by hardware. We use it to keep track of socket buffer.
  457. * Since hardware does not touch it, we can skip cpu_to_le32()/le32_to_cpu().
  458. */
  459. static void ftmac100_txdes_set_skb(struct ftmac100_txdes *txdes, struct sk_buff *skb)
  460. {
  461. txdes->txdes3 = (unsigned int)skb;
  462. }
  463. static struct sk_buff *ftmac100_txdes_get_skb(struct ftmac100_txdes *txdes)
  464. {
  465. return (struct sk_buff *)txdes->txdes3;
  466. }
  467. /******************************************************************************
  468. * internal functions (transmit)
  469. *****************************************************************************/
  470. static int ftmac100_next_tx_pointer(int pointer)
  471. {
  472. return (pointer + 1) & (TX_QUEUE_ENTRIES - 1);
  473. }
  474. static void ftmac100_tx_pointer_advance(struct ftmac100 *priv)
  475. {
  476. priv->tx_pointer = ftmac100_next_tx_pointer(priv->tx_pointer);
  477. }
  478. static void ftmac100_tx_clean_pointer_advance(struct ftmac100 *priv)
  479. {
  480. priv->tx_clean_pointer = ftmac100_next_tx_pointer(priv->tx_clean_pointer);
  481. }
  482. static struct ftmac100_txdes *ftmac100_current_txdes(struct ftmac100 *priv)
  483. {
  484. return &priv->descs->txdes[priv->tx_pointer];
  485. }
  486. static struct ftmac100_txdes *ftmac100_current_clean_txdes(struct ftmac100 *priv)
  487. {
  488. return &priv->descs->txdes[priv->tx_clean_pointer];
  489. }
  490. static bool ftmac100_tx_complete_packet(struct ftmac100 *priv)
  491. {
  492. struct net_device *netdev = priv->netdev;
  493. struct ftmac100_txdes *txdes;
  494. struct sk_buff *skb;
  495. dma_addr_t map;
  496. if (priv->tx_pending == 0)
  497. return false;
  498. txdes = ftmac100_current_clean_txdes(priv);
  499. if (ftmac100_txdes_owned_by_dma(txdes))
  500. return false;
  501. skb = ftmac100_txdes_get_skb(txdes);
  502. map = ftmac100_txdes_get_dma_addr(txdes);
  503. if (unlikely(ftmac100_txdes_excessive_collision(txdes) ||
  504. ftmac100_txdes_late_collision(txdes))) {
  505. /*
  506. * packet transmitted to ethernet lost due to late collision
  507. * or excessive collision
  508. */
  509. netdev->stats.tx_aborted_errors++;
  510. } else {
  511. netdev->stats.tx_packets++;
  512. netdev->stats.tx_bytes += skb->len;
  513. }
  514. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  515. dev_kfree_skb(skb);
  516. ftmac100_txdes_reset(txdes);
  517. ftmac100_tx_clean_pointer_advance(priv);
  518. spin_lock(&priv->tx_lock);
  519. priv->tx_pending--;
  520. spin_unlock(&priv->tx_lock);
  521. netif_wake_queue(netdev);
  522. return true;
  523. }
  524. static void ftmac100_tx_complete(struct ftmac100 *priv)
  525. {
  526. while (ftmac100_tx_complete_packet(priv))
  527. ;
  528. }
  529. static netdev_tx_t ftmac100_xmit(struct ftmac100 *priv, struct sk_buff *skb,
  530. dma_addr_t map)
  531. {
  532. struct net_device *netdev = priv->netdev;
  533. struct ftmac100_txdes *txdes;
  534. unsigned int len = (skb->len < ETH_ZLEN) ? ETH_ZLEN : skb->len;
  535. txdes = ftmac100_current_txdes(priv);
  536. ftmac100_tx_pointer_advance(priv);
  537. /* setup TX descriptor */
  538. ftmac100_txdes_set_skb(txdes, skb);
  539. ftmac100_txdes_set_dma_addr(txdes, map);
  540. ftmac100_txdes_set_first_segment(txdes);
  541. ftmac100_txdes_set_last_segment(txdes);
  542. ftmac100_txdes_set_txint(txdes);
  543. ftmac100_txdes_set_buffer_size(txdes, len);
  544. spin_lock(&priv->tx_lock);
  545. priv->tx_pending++;
  546. if (priv->tx_pending == TX_QUEUE_ENTRIES)
  547. netif_stop_queue(netdev);
  548. /* start transmit */
  549. ftmac100_txdes_set_dma_own(txdes);
  550. spin_unlock(&priv->tx_lock);
  551. ftmac100_txdma_start_polling(priv);
  552. return NETDEV_TX_OK;
  553. }
  554. /******************************************************************************
  555. * internal functions (buffer)
  556. *****************************************************************************/
  557. static int ftmac100_alloc_rx_page(struct ftmac100 *priv,
  558. struct ftmac100_rxdes *rxdes, gfp_t gfp)
  559. {
  560. struct net_device *netdev = priv->netdev;
  561. struct page *page;
  562. dma_addr_t map;
  563. page = alloc_page(gfp);
  564. if (!page) {
  565. if (net_ratelimit())
  566. netdev_err(netdev, "failed to allocate rx page\n");
  567. return -ENOMEM;
  568. }
  569. map = dma_map_page(priv->dev, page, 0, RX_BUF_SIZE, DMA_FROM_DEVICE);
  570. if (unlikely(dma_mapping_error(priv->dev, map))) {
  571. if (net_ratelimit())
  572. netdev_err(netdev, "failed to map rx page\n");
  573. __free_page(page);
  574. return -ENOMEM;
  575. }
  576. ftmac100_rxdes_set_page(rxdes, page);
  577. ftmac100_rxdes_set_dma_addr(rxdes, map);
  578. ftmac100_rxdes_set_buffer_size(rxdes, RX_BUF_SIZE);
  579. ftmac100_rxdes_set_dma_own(rxdes);
  580. return 0;
  581. }
  582. static void ftmac100_free_buffers(struct ftmac100 *priv)
  583. {
  584. int i;
  585. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  586. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  587. struct page *page = ftmac100_rxdes_get_page(rxdes);
  588. dma_addr_t map = ftmac100_rxdes_get_dma_addr(rxdes);
  589. if (!page)
  590. continue;
  591. dma_unmap_page(priv->dev, map, RX_BUF_SIZE, DMA_FROM_DEVICE);
  592. __free_page(page);
  593. }
  594. for (i = 0; i < TX_QUEUE_ENTRIES; i++) {
  595. struct ftmac100_txdes *txdes = &priv->descs->txdes[i];
  596. struct sk_buff *skb = ftmac100_txdes_get_skb(txdes);
  597. dma_addr_t map = ftmac100_txdes_get_dma_addr(txdes);
  598. if (!skb)
  599. continue;
  600. dma_unmap_single(priv->dev, map, skb_headlen(skb), DMA_TO_DEVICE);
  601. dev_kfree_skb(skb);
  602. }
  603. dma_free_coherent(priv->dev, sizeof(struct ftmac100_descs),
  604. priv->descs, priv->descs_dma_addr);
  605. }
  606. static int ftmac100_alloc_buffers(struct ftmac100 *priv)
  607. {
  608. int i;
  609. priv->descs = dma_alloc_coherent(priv->dev,
  610. sizeof(struct ftmac100_descs),
  611. &priv->descs_dma_addr, GFP_KERNEL);
  612. if (!priv->descs)
  613. return -ENOMEM;
  614. /* initialize RX ring */
  615. ftmac100_rxdes_set_end_of_ring(&priv->descs->rxdes[RX_QUEUE_ENTRIES - 1]);
  616. for (i = 0; i < RX_QUEUE_ENTRIES; i++) {
  617. struct ftmac100_rxdes *rxdes = &priv->descs->rxdes[i];
  618. if (ftmac100_alloc_rx_page(priv, rxdes, GFP_KERNEL))
  619. goto err;
  620. }
  621. /* initialize TX ring */
  622. ftmac100_txdes_set_end_of_ring(&priv->descs->txdes[TX_QUEUE_ENTRIES - 1]);
  623. return 0;
  624. err:
  625. ftmac100_free_buffers(priv);
  626. return -ENOMEM;
  627. }
  628. /******************************************************************************
  629. * struct mii_if_info functions
  630. *****************************************************************************/
  631. static int ftmac100_mdio_read(struct net_device *netdev, int phy_id, int reg)
  632. {
  633. struct ftmac100 *priv = netdev_priv(netdev);
  634. unsigned int phycr;
  635. int i;
  636. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  637. FTMAC100_PHYCR_REGAD(reg) |
  638. FTMAC100_PHYCR_MIIRD;
  639. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  640. for (i = 0; i < 10; i++) {
  641. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  642. if ((phycr & FTMAC100_PHYCR_MIIRD) == 0)
  643. return phycr & FTMAC100_PHYCR_MIIRDATA;
  644. udelay(100);
  645. }
  646. netdev_err(netdev, "mdio read timed out\n");
  647. return 0;
  648. }
  649. static void ftmac100_mdio_write(struct net_device *netdev, int phy_id, int reg,
  650. int data)
  651. {
  652. struct ftmac100 *priv = netdev_priv(netdev);
  653. unsigned int phycr;
  654. int i;
  655. phycr = FTMAC100_PHYCR_PHYAD(phy_id) |
  656. FTMAC100_PHYCR_REGAD(reg) |
  657. FTMAC100_PHYCR_MIIWR;
  658. data = FTMAC100_PHYWDATA_MIIWDATA(data);
  659. iowrite32(data, priv->base + FTMAC100_OFFSET_PHYWDATA);
  660. iowrite32(phycr, priv->base + FTMAC100_OFFSET_PHYCR);
  661. for (i = 0; i < 10; i++) {
  662. phycr = ioread32(priv->base + FTMAC100_OFFSET_PHYCR);
  663. if ((phycr & FTMAC100_PHYCR_MIIWR) == 0)
  664. return;
  665. udelay(100);
  666. }
  667. netdev_err(netdev, "mdio write timed out\n");
  668. }
  669. /******************************************************************************
  670. * struct ethtool_ops functions
  671. *****************************************************************************/
  672. static void ftmac100_get_drvinfo(struct net_device *netdev,
  673. struct ethtool_drvinfo *info)
  674. {
  675. strscpy(info->driver, DRV_NAME, sizeof(info->driver));
  676. strscpy(info->bus_info, dev_name(&netdev->dev), sizeof(info->bus_info));
  677. }
  678. static int ftmac100_get_link_ksettings(struct net_device *netdev,
  679. struct ethtool_link_ksettings *cmd)
  680. {
  681. struct ftmac100 *priv = netdev_priv(netdev);
  682. mii_ethtool_get_link_ksettings(&priv->mii, cmd);
  683. return 0;
  684. }
  685. static int ftmac100_set_link_ksettings(struct net_device *netdev,
  686. const struct ethtool_link_ksettings *cmd)
  687. {
  688. struct ftmac100 *priv = netdev_priv(netdev);
  689. return mii_ethtool_set_link_ksettings(&priv->mii, cmd);
  690. }
  691. static int ftmac100_nway_reset(struct net_device *netdev)
  692. {
  693. struct ftmac100 *priv = netdev_priv(netdev);
  694. return mii_nway_restart(&priv->mii);
  695. }
  696. static u32 ftmac100_get_link(struct net_device *netdev)
  697. {
  698. struct ftmac100 *priv = netdev_priv(netdev);
  699. return mii_link_ok(&priv->mii);
  700. }
  701. static const struct ethtool_ops ftmac100_ethtool_ops = {
  702. .get_drvinfo = ftmac100_get_drvinfo,
  703. .nway_reset = ftmac100_nway_reset,
  704. .get_link = ftmac100_get_link,
  705. .get_link_ksettings = ftmac100_get_link_ksettings,
  706. .set_link_ksettings = ftmac100_set_link_ksettings,
  707. };
  708. /******************************************************************************
  709. * interrupt handler
  710. *****************************************************************************/
  711. static irqreturn_t ftmac100_interrupt(int irq, void *dev_id)
  712. {
  713. struct net_device *netdev = dev_id;
  714. struct ftmac100 *priv = netdev_priv(netdev);
  715. /* Disable interrupts for polling */
  716. ftmac100_disable_all_int(priv);
  717. if (likely(netif_running(netdev)))
  718. napi_schedule(&priv->napi);
  719. return IRQ_HANDLED;
  720. }
  721. /******************************************************************************
  722. * struct napi_struct functions
  723. *****************************************************************************/
  724. static int ftmac100_poll(struct napi_struct *napi, int budget)
  725. {
  726. struct ftmac100 *priv = container_of(napi, struct ftmac100, napi);
  727. struct net_device *netdev = priv->netdev;
  728. unsigned int status;
  729. bool completed = true;
  730. int rx = 0;
  731. status = ioread32(priv->base + FTMAC100_OFFSET_ISR);
  732. if (status & (FTMAC100_INT_RPKT_FINISH | FTMAC100_INT_NORXBUF)) {
  733. /*
  734. * FTMAC100_INT_RPKT_FINISH:
  735. * RX DMA has received packets into RX buffer successfully
  736. *
  737. * FTMAC100_INT_NORXBUF:
  738. * RX buffer unavailable
  739. */
  740. bool retry;
  741. do {
  742. retry = ftmac100_rx_packet(priv, &rx);
  743. } while (retry && rx < budget);
  744. if (retry && rx == budget)
  745. completed = false;
  746. }
  747. if (status & (FTMAC100_INT_XPKT_OK | FTMAC100_INT_XPKT_LOST)) {
  748. /*
  749. * FTMAC100_INT_XPKT_OK:
  750. * packet transmitted to ethernet successfully
  751. *
  752. * FTMAC100_INT_XPKT_LOST:
  753. * packet transmitted to ethernet lost due to late
  754. * collision or excessive collision
  755. */
  756. ftmac100_tx_complete(priv);
  757. }
  758. if (status & (FTMAC100_INT_NORXBUF | FTMAC100_INT_RPKT_LOST |
  759. FTMAC100_INT_AHB_ERR | FTMAC100_INT_PHYSTS_CHG)) {
  760. if (net_ratelimit())
  761. netdev_info(netdev, "[ISR] = 0x%x: %s%s%s%s\n", status,
  762. status & FTMAC100_INT_NORXBUF ? "NORXBUF " : "",
  763. status & FTMAC100_INT_RPKT_LOST ? "RPKT_LOST " : "",
  764. status & FTMAC100_INT_AHB_ERR ? "AHB_ERR " : "",
  765. status & FTMAC100_INT_PHYSTS_CHG ? "PHYSTS_CHG" : "");
  766. if (status & FTMAC100_INT_NORXBUF) {
  767. /* RX buffer unavailable */
  768. netdev->stats.rx_over_errors++;
  769. }
  770. if (status & FTMAC100_INT_RPKT_LOST) {
  771. /* received packet lost due to RX FIFO full */
  772. netdev->stats.rx_fifo_errors++;
  773. }
  774. if (status & FTMAC100_INT_PHYSTS_CHG) {
  775. /* PHY link status change */
  776. mii_check_link(&priv->mii);
  777. }
  778. }
  779. if (completed) {
  780. /* stop polling */
  781. napi_complete(napi);
  782. ftmac100_enable_all_int(priv);
  783. }
  784. return rx;
  785. }
  786. /******************************************************************************
  787. * struct net_device_ops functions
  788. *****************************************************************************/
  789. static int ftmac100_open(struct net_device *netdev)
  790. {
  791. struct ftmac100 *priv = netdev_priv(netdev);
  792. int err;
  793. err = ftmac100_alloc_buffers(priv);
  794. if (err) {
  795. netdev_err(netdev, "failed to allocate buffers\n");
  796. goto err_alloc;
  797. }
  798. err = request_irq(priv->irq, ftmac100_interrupt, 0, netdev->name, netdev);
  799. if (err) {
  800. netdev_err(netdev, "failed to request irq %d\n", priv->irq);
  801. goto err_irq;
  802. }
  803. priv->rx_pointer = 0;
  804. priv->tx_clean_pointer = 0;
  805. priv->tx_pointer = 0;
  806. priv->tx_pending = 0;
  807. err = ftmac100_start_hw(priv);
  808. if (err)
  809. goto err_hw;
  810. napi_enable(&priv->napi);
  811. netif_start_queue(netdev);
  812. ftmac100_enable_all_int(priv);
  813. return 0;
  814. err_hw:
  815. free_irq(priv->irq, netdev);
  816. err_irq:
  817. ftmac100_free_buffers(priv);
  818. err_alloc:
  819. return err;
  820. }
  821. static int ftmac100_stop(struct net_device *netdev)
  822. {
  823. struct ftmac100 *priv = netdev_priv(netdev);
  824. ftmac100_disable_all_int(priv);
  825. netif_stop_queue(netdev);
  826. napi_disable(&priv->napi);
  827. ftmac100_stop_hw(priv);
  828. free_irq(priv->irq, netdev);
  829. ftmac100_free_buffers(priv);
  830. return 0;
  831. }
  832. static netdev_tx_t
  833. ftmac100_hard_start_xmit(struct sk_buff *skb, struct net_device *netdev)
  834. {
  835. struct ftmac100 *priv = netdev_priv(netdev);
  836. dma_addr_t map;
  837. if (unlikely(skb->len > MAX_PKT_SIZE)) {
  838. if (net_ratelimit())
  839. netdev_dbg(netdev, "tx packet too big\n");
  840. netdev->stats.tx_dropped++;
  841. dev_kfree_skb(skb);
  842. return NETDEV_TX_OK;
  843. }
  844. map = dma_map_single(priv->dev, skb->data, skb_headlen(skb), DMA_TO_DEVICE);
  845. if (unlikely(dma_mapping_error(priv->dev, map))) {
  846. /* drop packet */
  847. if (net_ratelimit())
  848. netdev_err(netdev, "map socket buffer failed\n");
  849. netdev->stats.tx_dropped++;
  850. dev_kfree_skb(skb);
  851. return NETDEV_TX_OK;
  852. }
  853. return ftmac100_xmit(priv, skb, map);
  854. }
  855. /* optional */
  856. static int ftmac100_do_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  857. {
  858. struct ftmac100 *priv = netdev_priv(netdev);
  859. struct mii_ioctl_data *data = if_mii(ifr);
  860. return generic_mii_ioctl(&priv->mii, data, cmd, NULL);
  861. }
  862. static int ftmac100_change_mtu(struct net_device *netdev, int mtu)
  863. {
  864. struct ftmac100 *priv = netdev_priv(netdev);
  865. unsigned int maccr;
  866. maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  867. if (mtu > ETH_DATA_LEN) {
  868. /* process long packets in the driver */
  869. maccr |= FTMAC100_MACCR_RX_FTL;
  870. } else {
  871. /* Let the controller drop incoming packets greater
  872. * than 1518 (that is 1500 + 14 Ethernet + 4 FCS).
  873. */
  874. maccr &= ~FTMAC100_MACCR_RX_FTL;
  875. }
  876. iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
  877. WRITE_ONCE(netdev->mtu, mtu);
  878. return 0;
  879. }
  880. static void ftmac100_set_rx_mode(struct net_device *netdev)
  881. {
  882. struct ftmac100 *priv = netdev_priv(netdev);
  883. unsigned int maccr = ioread32(priv->base + FTMAC100_OFFSET_MACCR);
  884. ftmac100_set_rx_bits(priv, &maccr);
  885. iowrite32(maccr, priv->base + FTMAC100_OFFSET_MACCR);
  886. }
  887. static const struct net_device_ops ftmac100_netdev_ops = {
  888. .ndo_open = ftmac100_open,
  889. .ndo_stop = ftmac100_stop,
  890. .ndo_start_xmit = ftmac100_hard_start_xmit,
  891. .ndo_set_mac_address = eth_mac_addr,
  892. .ndo_validate_addr = eth_validate_addr,
  893. .ndo_eth_ioctl = ftmac100_do_ioctl,
  894. .ndo_change_mtu = ftmac100_change_mtu,
  895. .ndo_set_rx_mode = ftmac100_set_rx_mode,
  896. };
  897. /******************************************************************************
  898. * struct platform_driver functions
  899. *****************************************************************************/
  900. static int ftmac100_probe(struct platform_device *pdev)
  901. {
  902. struct resource *res;
  903. int irq;
  904. struct net_device *netdev;
  905. struct ftmac100 *priv;
  906. int err;
  907. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  908. if (!res)
  909. return -ENXIO;
  910. irq = platform_get_irq(pdev, 0);
  911. if (irq < 0)
  912. return irq;
  913. /* setup net_device */
  914. netdev = alloc_etherdev(sizeof(*priv));
  915. if (!netdev) {
  916. err = -ENOMEM;
  917. goto err_alloc_etherdev;
  918. }
  919. SET_NETDEV_DEV(netdev, &pdev->dev);
  920. netdev->ethtool_ops = &ftmac100_ethtool_ops;
  921. netdev->netdev_ops = &ftmac100_netdev_ops;
  922. netdev->max_mtu = MAX_PKT_SIZE - VLAN_ETH_HLEN;
  923. err = platform_get_ethdev_address(&pdev->dev, netdev);
  924. if (err == -EPROBE_DEFER)
  925. goto defer_get_mac;
  926. platform_set_drvdata(pdev, netdev);
  927. /* setup private data */
  928. priv = netdev_priv(netdev);
  929. priv->netdev = netdev;
  930. priv->dev = &pdev->dev;
  931. spin_lock_init(&priv->tx_lock);
  932. /* initialize NAPI */
  933. netif_napi_add(netdev, &priv->napi, ftmac100_poll);
  934. /* map io memory */
  935. priv->res = request_mem_region(res->start, resource_size(res),
  936. dev_name(&pdev->dev));
  937. if (!priv->res) {
  938. dev_err(&pdev->dev, "Could not reserve memory region\n");
  939. err = -ENOMEM;
  940. goto err_req_mem;
  941. }
  942. priv->base = ioremap(res->start, resource_size(res));
  943. if (!priv->base) {
  944. dev_err(&pdev->dev, "Failed to ioremap ethernet registers\n");
  945. err = -EIO;
  946. goto err_ioremap;
  947. }
  948. priv->irq = irq;
  949. /* initialize struct mii_if_info */
  950. priv->mii.phy_id = 0;
  951. priv->mii.phy_id_mask = 0x1f;
  952. priv->mii.reg_num_mask = 0x1f;
  953. priv->mii.dev = netdev;
  954. priv->mii.mdio_read = ftmac100_mdio_read;
  955. priv->mii.mdio_write = ftmac100_mdio_write;
  956. /* register network device */
  957. err = register_netdev(netdev);
  958. if (err) {
  959. dev_err(&pdev->dev, "Failed to register netdev\n");
  960. goto err_register_netdev;
  961. }
  962. netdev_info(netdev, "irq %d, mapped at %p\n", priv->irq, priv->base);
  963. if (!is_valid_ether_addr(netdev->dev_addr)) {
  964. eth_hw_addr_random(netdev);
  965. netdev_info(netdev, "generated random MAC address %pM\n",
  966. netdev->dev_addr);
  967. }
  968. return 0;
  969. err_register_netdev:
  970. iounmap(priv->base);
  971. err_ioremap:
  972. release_resource(priv->res);
  973. err_req_mem:
  974. netif_napi_del(&priv->napi);
  975. defer_get_mac:
  976. free_netdev(netdev);
  977. err_alloc_etherdev:
  978. return err;
  979. }
  980. static void ftmac100_remove(struct platform_device *pdev)
  981. {
  982. struct net_device *netdev;
  983. struct ftmac100 *priv;
  984. netdev = platform_get_drvdata(pdev);
  985. priv = netdev_priv(netdev);
  986. unregister_netdev(netdev);
  987. iounmap(priv->base);
  988. release_resource(priv->res);
  989. netif_napi_del(&priv->napi);
  990. free_netdev(netdev);
  991. }
  992. static const struct of_device_id ftmac100_of_ids[] = {
  993. { .compatible = "andestech,atmac100" },
  994. { }
  995. };
  996. static struct platform_driver ftmac100_driver = {
  997. .probe = ftmac100_probe,
  998. .remove = ftmac100_remove,
  999. .driver = {
  1000. .name = DRV_NAME,
  1001. .of_match_table = ftmac100_of_ids
  1002. },
  1003. };
  1004. /******************************************************************************
  1005. * initialization / finalization
  1006. *****************************************************************************/
  1007. module_platform_driver(ftmac100_driver);
  1008. MODULE_AUTHOR("Po-Yu Chuang <ratbert@faraday-tech.com>");
  1009. MODULE_DESCRIPTION("FTMAC100 driver");
  1010. MODULE_LICENSE("GPL");
  1011. MODULE_DEVICE_TABLE(of, ftmac100_of_ids);