response_manager.c 6.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238
  1. /**********************************************************************
  2. * Author: Cavium, Inc.
  3. *
  4. * Contact: support@cavium.com
  5. * Please include "LiquidIO" in the subject.
  6. *
  7. * Copyright (c) 2003-2016 Cavium, Inc.
  8. *
  9. * This file is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License, Version 2, as
  11. * published by the Free Software Foundation.
  12. *
  13. * This file is distributed in the hope that it will be useful, but
  14. * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
  15. * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
  16. * NONINFRINGEMENT. See the GNU General Public License for more
  17. * details.
  18. **********************************************************************/
  19. #include <linux/pci.h>
  20. #include <linux/netdevice.h>
  21. #include "liquidio_common.h"
  22. #include "octeon_droq.h"
  23. #include "octeon_iq.h"
  24. #include "response_manager.h"
  25. #include "octeon_device.h"
  26. #include "octeon_main.h"
  27. static void oct_poll_req_completion(struct work_struct *work);
  28. int octeon_setup_response_list(struct octeon_device *oct)
  29. {
  30. int i, ret = 0;
  31. struct cavium_wq *cwq;
  32. for (i = 0; i < MAX_RESPONSE_LISTS; i++) {
  33. INIT_LIST_HEAD(&oct->response_list[i].head);
  34. spin_lock_init(&oct->response_list[i].lock);
  35. atomic_set(&oct->response_list[i].pending_req_count, 0);
  36. }
  37. spin_lock_init(&oct->cmd_resp_wqlock);
  38. oct->dma_comp_wq.wq = alloc_workqueue("dma-comp",
  39. WQ_MEM_RECLAIM | WQ_PERCPU, 0);
  40. if (!oct->dma_comp_wq.wq) {
  41. dev_err(&oct->pci_dev->dev, "failed to create wq thread\n");
  42. return -ENOMEM;
  43. }
  44. cwq = &oct->dma_comp_wq;
  45. INIT_DELAYED_WORK(&cwq->wk.work, oct_poll_req_completion);
  46. cwq->wk.ctxptr = oct;
  47. oct->cmd_resp_state = OCT_DRV_ONLINE;
  48. return ret;
  49. }
  50. EXPORT_SYMBOL_GPL(octeon_setup_response_list);
  51. void octeon_delete_response_list(struct octeon_device *oct)
  52. {
  53. cancel_delayed_work_sync(&oct->dma_comp_wq.wk.work);
  54. destroy_workqueue(oct->dma_comp_wq.wq);
  55. }
  56. EXPORT_SYMBOL_GPL(octeon_delete_response_list);
  57. int lio_process_ordered_list(struct octeon_device *octeon_dev,
  58. u32 force_quit)
  59. {
  60. struct octeon_response_list *ordered_sc_list;
  61. struct octeon_soft_command *sc;
  62. int request_complete = 0;
  63. int resp_to_process = MAX_ORD_REQS_TO_PROCESS;
  64. u32 status;
  65. u64 status64;
  66. octeon_free_sc_done_list(octeon_dev);
  67. ordered_sc_list = &octeon_dev->response_list[OCTEON_ORDERED_SC_LIST];
  68. do {
  69. spin_lock_bh(&ordered_sc_list->lock);
  70. if (list_empty(&ordered_sc_list->head)) {
  71. spin_unlock_bh(&ordered_sc_list->lock);
  72. return 1;
  73. }
  74. sc = list_first_entry(&ordered_sc_list->head,
  75. struct octeon_soft_command, node);
  76. status = OCTEON_REQUEST_PENDING;
  77. /* check if octeon has finished DMA'ing a response
  78. * to where rptr is pointing to
  79. */
  80. status64 = *sc->status_word;
  81. if (status64 != COMPLETION_WORD_INIT) {
  82. /* This logic ensures that all 64b have been written.
  83. * 1. check byte 0 for non-FF
  84. * 2. if non-FF, then swap result from BE to host order
  85. * 3. check byte 7 (swapped to 0) for non-FF
  86. * 4. if non-FF, use the low 32-bit status code
  87. * 5. if either byte 0 or byte 7 is FF, don't use status
  88. */
  89. if ((status64 & 0xff) != 0xff) {
  90. octeon_swap_8B_data(&status64, 1);
  91. if (((status64 & 0xff) != 0xff)) {
  92. /* retrieve 16-bit firmware status */
  93. status = (u32)(status64 & 0xffffULL);
  94. if (status) {
  95. status =
  96. FIRMWARE_STATUS_CODE(status);
  97. } else {
  98. /* i.e. no error */
  99. status = OCTEON_REQUEST_DONE;
  100. }
  101. }
  102. }
  103. } else if (unlikely(force_quit) || (sc->expiry_time &&
  104. time_after(jiffies, (unsigned long)sc->expiry_time))) {
  105. struct octeon_instr_irh *irh =
  106. (struct octeon_instr_irh *)&sc->cmd.cmd3.irh;
  107. dev_err(&octeon_dev->pci_dev->dev, "%s: ", __func__);
  108. dev_err(&octeon_dev->pci_dev->dev,
  109. "cmd %x/%x/%llx/%llx failed, ",
  110. irh->opcode, irh->subcode,
  111. sc->cmd.cmd3.ossp[0], sc->cmd.cmd3.ossp[1]);
  112. dev_err(&octeon_dev->pci_dev->dev,
  113. "timeout (%ld, %ld)\n",
  114. (long)jiffies, (long)sc->expiry_time);
  115. status = OCTEON_REQUEST_TIMEOUT;
  116. }
  117. if (status != OCTEON_REQUEST_PENDING) {
  118. sc->sc_status = status;
  119. /* we have received a response or we have timed out */
  120. /* remove node from linked list */
  121. list_del(&sc->node);
  122. atomic_dec(&octeon_dev->response_list
  123. [OCTEON_ORDERED_SC_LIST].
  124. pending_req_count);
  125. if (!sc->callback) {
  126. atomic_inc(&octeon_dev->response_list
  127. [OCTEON_DONE_SC_LIST].
  128. pending_req_count);
  129. list_add_tail(&sc->node,
  130. &octeon_dev->response_list
  131. [OCTEON_DONE_SC_LIST].head);
  132. if (unlikely(READ_ONCE(sc->caller_is_done))) {
  133. /* caller does not wait for response
  134. * from firmware
  135. */
  136. if (status != OCTEON_REQUEST_DONE) {
  137. struct octeon_instr_irh *irh;
  138. irh =
  139. (struct octeon_instr_irh *)
  140. &sc->cmd.cmd3.irh;
  141. dev_dbg
  142. (&octeon_dev->pci_dev->dev,
  143. "%s: sc failed: opcode=%x, ",
  144. __func__, irh->opcode);
  145. dev_dbg
  146. (&octeon_dev->pci_dev->dev,
  147. "subcode=%x, ossp[0]=%llx, ",
  148. irh->subcode,
  149. sc->cmd.cmd3.ossp[0]);
  150. dev_dbg
  151. (&octeon_dev->pci_dev->dev,
  152. "ossp[1]=%llx, status=%d\n",
  153. sc->cmd.cmd3.ossp[1],
  154. status);
  155. }
  156. } else {
  157. complete(&sc->complete);
  158. }
  159. spin_unlock_bh(&ordered_sc_list->lock);
  160. } else {
  161. /* sc with callback function */
  162. if (status == OCTEON_REQUEST_TIMEOUT) {
  163. atomic_inc(&octeon_dev->response_list
  164. [OCTEON_ZOMBIE_SC_LIST].
  165. pending_req_count);
  166. list_add_tail(&sc->node,
  167. &octeon_dev->response_list
  168. [OCTEON_ZOMBIE_SC_LIST].
  169. head);
  170. }
  171. spin_unlock_bh(&ordered_sc_list->lock);
  172. sc->callback(octeon_dev, status,
  173. sc->callback_arg);
  174. /* sc is freed by caller */
  175. }
  176. request_complete++;
  177. } else {
  178. /* no response yet */
  179. request_complete = 0;
  180. spin_unlock_bh
  181. (&ordered_sc_list->lock);
  182. }
  183. /* If we hit the Max Ordered requests to process every loop,
  184. * we quit
  185. * and let this function be invoked the next time the poll
  186. * thread runs
  187. * to process the remaining requests. This function can take up
  188. * the entire CPU if there is no upper limit to the requests
  189. * processed.
  190. */
  191. if (request_complete >= resp_to_process)
  192. break;
  193. } while (request_complete);
  194. return 0;
  195. }
  196. EXPORT_SYMBOL_GPL(lio_process_ordered_list);
  197. static void oct_poll_req_completion(struct work_struct *work)
  198. {
  199. struct cavium_wk *wk = (struct cavium_wk *)work;
  200. struct octeon_device *oct = (struct octeon_device *)wk->ctxptr;
  201. struct cavium_wq *cwq = &oct->dma_comp_wq;
  202. lio_process_ordered_list(oct, 0);
  203. if (atomic_read(&oct->response_list
  204. [OCTEON_ORDERED_SC_LIST].pending_req_count))
  205. queue_delayed_work(cwq->wq, &cwq->wk.work, msecs_to_jiffies(1));
  206. }