emac_main.c 26 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (C) 2004-2013 Synopsys, Inc. (www.synopsys.com)
  4. *
  5. * Driver for the ARC EMAC 10100 (hardware revision 5)
  6. *
  7. * Contributors:
  8. * Amit Bhor
  9. * Sameer Dhavale
  10. * Vineet Gupta
  11. */
  12. #include <linux/crc32.h>
  13. #include <linux/etherdevice.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/of.h>
  18. #include <linux/of_address.h>
  19. #include <linux/of_irq.h>
  20. #include <linux/of_mdio.h>
  21. #include <linux/of_net.h>
  22. #include "emac.h"
  23. static void arc_emac_restart(struct net_device *ndev);
  24. /**
  25. * arc_emac_tx_avail - Return the number of available slots in the tx ring.
  26. * @priv: Pointer to ARC EMAC private data structure.
  27. *
  28. * returns: the number of slots available for transmission in tx the ring.
  29. */
  30. static inline int arc_emac_tx_avail(struct arc_emac_priv *priv)
  31. {
  32. return (priv->txbd_dirty + TX_BD_NUM - priv->txbd_curr - 1) % TX_BD_NUM;
  33. }
  34. /**
  35. * arc_emac_adjust_link - Adjust the PHY link duplex.
  36. * @ndev: Pointer to the net_device structure.
  37. *
  38. * This function is called to change the duplex setting after auto negotiation
  39. * is done by the PHY.
  40. */
  41. static void arc_emac_adjust_link(struct net_device *ndev)
  42. {
  43. struct arc_emac_priv *priv = netdev_priv(ndev);
  44. struct phy_device *phy_dev = ndev->phydev;
  45. unsigned int reg, state_changed = 0;
  46. if (priv->link != phy_dev->link) {
  47. priv->link = phy_dev->link;
  48. state_changed = 1;
  49. }
  50. if (priv->speed != phy_dev->speed) {
  51. priv->speed = phy_dev->speed;
  52. state_changed = 1;
  53. if (priv->set_mac_speed)
  54. priv->set_mac_speed(priv, priv->speed);
  55. }
  56. if (priv->duplex != phy_dev->duplex) {
  57. reg = arc_reg_get(priv, R_CTRL);
  58. if (phy_dev->duplex == DUPLEX_FULL)
  59. reg |= ENFL_MASK;
  60. else
  61. reg &= ~ENFL_MASK;
  62. arc_reg_set(priv, R_CTRL, reg);
  63. priv->duplex = phy_dev->duplex;
  64. state_changed = 1;
  65. }
  66. if (state_changed)
  67. phy_print_status(phy_dev);
  68. }
  69. /**
  70. * arc_emac_get_drvinfo - Get EMAC driver information.
  71. * @ndev: Pointer to net_device structure.
  72. * @info: Pointer to ethtool_drvinfo structure.
  73. *
  74. * This implements ethtool command for getting the driver information.
  75. * Issue "ethtool -i ethX" under linux prompt to execute this function.
  76. */
  77. static void arc_emac_get_drvinfo(struct net_device *ndev,
  78. struct ethtool_drvinfo *info)
  79. {
  80. struct arc_emac_priv *priv = netdev_priv(ndev);
  81. strscpy(info->driver, priv->drv_name, sizeof(info->driver));
  82. }
  83. static const struct ethtool_ops arc_emac_ethtool_ops = {
  84. .get_drvinfo = arc_emac_get_drvinfo,
  85. .get_link = ethtool_op_get_link,
  86. .get_link_ksettings = phy_ethtool_get_link_ksettings,
  87. .set_link_ksettings = phy_ethtool_set_link_ksettings,
  88. };
  89. #define FIRST_OR_LAST_MASK (FIRST_MASK | LAST_MASK)
  90. /**
  91. * arc_emac_tx_clean - clears processed by EMAC Tx BDs.
  92. * @ndev: Pointer to the network device.
  93. */
  94. static void arc_emac_tx_clean(struct net_device *ndev)
  95. {
  96. struct arc_emac_priv *priv = netdev_priv(ndev);
  97. struct net_device_stats *stats = &ndev->stats;
  98. struct device *dev = ndev->dev.parent;
  99. unsigned int i;
  100. for (i = 0; i < TX_BD_NUM; i++) {
  101. unsigned int *txbd_dirty = &priv->txbd_dirty;
  102. struct arc_emac_bd *txbd = &priv->txbd[*txbd_dirty];
  103. struct buffer_state *tx_buff = &priv->tx_buff[*txbd_dirty];
  104. struct sk_buff *skb = tx_buff->skb;
  105. unsigned int info = le32_to_cpu(txbd->info);
  106. if ((info & FOR_EMAC) || !txbd->data || !skb)
  107. break;
  108. if (unlikely(info & (DROP | DEFR | LTCL | UFLO))) {
  109. stats->tx_errors++;
  110. stats->tx_dropped++;
  111. if (info & DEFR)
  112. stats->tx_carrier_errors++;
  113. if (info & LTCL)
  114. stats->collisions++;
  115. if (info & UFLO)
  116. stats->tx_fifo_errors++;
  117. } else if (likely(info & FIRST_OR_LAST_MASK)) {
  118. stats->tx_packets++;
  119. stats->tx_bytes += skb->len;
  120. }
  121. dma_unmap_single(dev, dma_unmap_addr(tx_buff, addr),
  122. dma_unmap_len(tx_buff, len), DMA_TO_DEVICE);
  123. /* return the sk_buff to system */
  124. dev_consume_skb_irq(skb);
  125. txbd->data = 0;
  126. txbd->info = 0;
  127. tx_buff->skb = NULL;
  128. *txbd_dirty = (*txbd_dirty + 1) % TX_BD_NUM;
  129. }
  130. /* Ensure that txbd_dirty is visible to tx() before checking
  131. * for queue stopped.
  132. */
  133. smp_mb();
  134. if (netif_queue_stopped(ndev) && arc_emac_tx_avail(priv))
  135. netif_wake_queue(ndev);
  136. }
  137. /**
  138. * arc_emac_rx - processing of Rx packets.
  139. * @ndev: Pointer to the network device.
  140. * @budget: How many BDs to process on 1 call.
  141. *
  142. * returns: Number of processed BDs
  143. *
  144. * Iterate through Rx BDs and deliver received packages to upper layer.
  145. */
  146. static int arc_emac_rx(struct net_device *ndev, int budget)
  147. {
  148. struct arc_emac_priv *priv = netdev_priv(ndev);
  149. struct device *dev = ndev->dev.parent;
  150. unsigned int work_done;
  151. for (work_done = 0; work_done < budget; work_done++) {
  152. unsigned int *last_rx_bd = &priv->last_rx_bd;
  153. struct net_device_stats *stats = &ndev->stats;
  154. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  155. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  156. unsigned int pktlen, info = le32_to_cpu(rxbd->info);
  157. struct sk_buff *skb;
  158. dma_addr_t addr;
  159. if (unlikely((info & OWN_MASK) == FOR_EMAC))
  160. break;
  161. /* Make a note that we saw a packet at this BD.
  162. * So next time, driver starts from this + 1
  163. */
  164. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  165. if (unlikely((info & FIRST_OR_LAST_MASK) !=
  166. FIRST_OR_LAST_MASK)) {
  167. /* We pre-allocate buffers of MTU size so incoming
  168. * packets won't be split/chained.
  169. */
  170. if (net_ratelimit())
  171. netdev_err(ndev, "incomplete packet received\n");
  172. /* Return ownership to EMAC */
  173. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  174. stats->rx_errors++;
  175. stats->rx_length_errors++;
  176. continue;
  177. }
  178. /* Prepare the BD for next cycle. netif_receive_skb()
  179. * only if new skb was allocated and mapped to avoid holes
  180. * in the RX fifo.
  181. */
  182. skb = netdev_alloc_skb_ip_align(ndev, EMAC_BUFFER_SIZE);
  183. if (unlikely(!skb)) {
  184. if (net_ratelimit())
  185. netdev_err(ndev, "cannot allocate skb\n");
  186. /* Return ownership to EMAC */
  187. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  188. stats->rx_errors++;
  189. stats->rx_dropped++;
  190. continue;
  191. }
  192. addr = dma_map_single(dev, (void *)skb->data,
  193. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  194. if (dma_mapping_error(dev, addr)) {
  195. if (net_ratelimit())
  196. netdev_err(ndev, "cannot map dma buffer\n");
  197. dev_kfree_skb(skb);
  198. /* Return ownership to EMAC */
  199. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  200. stats->rx_errors++;
  201. stats->rx_dropped++;
  202. continue;
  203. }
  204. /* unmap previosly mapped skb */
  205. dma_unmap_single(dev, dma_unmap_addr(rx_buff, addr),
  206. dma_unmap_len(rx_buff, len), DMA_FROM_DEVICE);
  207. pktlen = info & LEN_MASK;
  208. stats->rx_packets++;
  209. stats->rx_bytes += pktlen;
  210. skb_put(rx_buff->skb, pktlen);
  211. rx_buff->skb->dev = ndev;
  212. rx_buff->skb->protocol = eth_type_trans(rx_buff->skb, ndev);
  213. netif_receive_skb(rx_buff->skb);
  214. rx_buff->skb = skb;
  215. dma_unmap_addr_set(rx_buff, addr, addr);
  216. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  217. rxbd->data = cpu_to_le32(addr);
  218. /* Make sure pointer to data buffer is set */
  219. wmb();
  220. /* Return ownership to EMAC */
  221. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  222. }
  223. return work_done;
  224. }
  225. /**
  226. * arc_emac_rx_miss_handle - handle R_MISS register
  227. * @ndev: Pointer to the net_device structure.
  228. */
  229. static void arc_emac_rx_miss_handle(struct net_device *ndev)
  230. {
  231. struct arc_emac_priv *priv = netdev_priv(ndev);
  232. struct net_device_stats *stats = &ndev->stats;
  233. unsigned int miss;
  234. miss = arc_reg_get(priv, R_MISS);
  235. if (miss) {
  236. stats->rx_errors += miss;
  237. stats->rx_missed_errors += miss;
  238. priv->rx_missed_errors += miss;
  239. }
  240. }
  241. /**
  242. * arc_emac_rx_stall_check - check RX stall
  243. * @ndev: Pointer to the net_device structure.
  244. * @budget: How many BDs requested to process on 1 call.
  245. * @work_done: How many BDs processed
  246. *
  247. * Under certain conditions EMAC stop reception of incoming packets and
  248. * continuously increment R_MISS register instead of saving data into
  249. * provided buffer. This function detect that condition and restart
  250. * EMAC.
  251. */
  252. static void arc_emac_rx_stall_check(struct net_device *ndev,
  253. int budget, unsigned int work_done)
  254. {
  255. struct arc_emac_priv *priv = netdev_priv(ndev);
  256. struct arc_emac_bd *rxbd;
  257. if (work_done)
  258. priv->rx_missed_errors = 0;
  259. if (priv->rx_missed_errors && budget) {
  260. rxbd = &priv->rxbd[priv->last_rx_bd];
  261. if (le32_to_cpu(rxbd->info) & FOR_EMAC) {
  262. arc_emac_restart(ndev);
  263. priv->rx_missed_errors = 0;
  264. }
  265. }
  266. }
  267. /**
  268. * arc_emac_poll - NAPI poll handler.
  269. * @napi: Pointer to napi_struct structure.
  270. * @budget: How many BDs to process on 1 call.
  271. *
  272. * returns: Number of processed BDs
  273. */
  274. static int arc_emac_poll(struct napi_struct *napi, int budget)
  275. {
  276. struct net_device *ndev = napi->dev;
  277. struct arc_emac_priv *priv = netdev_priv(ndev);
  278. unsigned int work_done;
  279. arc_emac_tx_clean(ndev);
  280. arc_emac_rx_miss_handle(ndev);
  281. work_done = arc_emac_rx(ndev, budget);
  282. if (work_done < budget) {
  283. napi_complete_done(napi, work_done);
  284. arc_reg_or(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
  285. }
  286. arc_emac_rx_stall_check(ndev, budget, work_done);
  287. return work_done;
  288. }
  289. /**
  290. * arc_emac_intr - Global interrupt handler for EMAC.
  291. * @irq: irq number.
  292. * @dev_instance: device instance.
  293. *
  294. * returns: IRQ_HANDLED for all cases.
  295. *
  296. * ARC EMAC has only 1 interrupt line, and depending on bits raised in
  297. * STATUS register we may tell what is a reason for interrupt to fire.
  298. */
  299. static irqreturn_t arc_emac_intr(int irq, void *dev_instance)
  300. {
  301. struct net_device *ndev = dev_instance;
  302. struct arc_emac_priv *priv = netdev_priv(ndev);
  303. struct net_device_stats *stats = &ndev->stats;
  304. unsigned int status;
  305. status = arc_reg_get(priv, R_STATUS);
  306. status &= ~MDIO_MASK;
  307. /* Reset all flags except "MDIO complete" */
  308. arc_reg_set(priv, R_STATUS, status);
  309. if (status & (RXINT_MASK | TXINT_MASK)) {
  310. if (likely(napi_schedule_prep(&priv->napi))) {
  311. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK);
  312. __napi_schedule(&priv->napi);
  313. }
  314. }
  315. if (status & ERR_MASK) {
  316. /* MSER/RXCR/RXFR/RXFL interrupt fires on corresponding
  317. * 8-bit error counter overrun.
  318. */
  319. if (status & MSER_MASK) {
  320. stats->rx_missed_errors += 0x100;
  321. stats->rx_errors += 0x100;
  322. priv->rx_missed_errors += 0x100;
  323. napi_schedule(&priv->napi);
  324. }
  325. if (status & RXCR_MASK) {
  326. stats->rx_crc_errors += 0x100;
  327. stats->rx_errors += 0x100;
  328. }
  329. if (status & RXFR_MASK) {
  330. stats->rx_frame_errors += 0x100;
  331. stats->rx_errors += 0x100;
  332. }
  333. if (status & RXFL_MASK) {
  334. stats->rx_over_errors += 0x100;
  335. stats->rx_errors += 0x100;
  336. }
  337. }
  338. return IRQ_HANDLED;
  339. }
  340. #ifdef CONFIG_NET_POLL_CONTROLLER
  341. static void arc_emac_poll_controller(struct net_device *dev)
  342. {
  343. disable_irq(dev->irq);
  344. arc_emac_intr(dev->irq, dev);
  345. enable_irq(dev->irq);
  346. }
  347. #endif
  348. /**
  349. * arc_emac_open - Open the network device.
  350. * @ndev: Pointer to the network device.
  351. *
  352. * returns: 0, on success or non-zero error value on failure.
  353. *
  354. * This function sets the MAC address, requests and enables an IRQ
  355. * for the EMAC device and starts the Tx queue.
  356. * It also connects to the phy device.
  357. */
  358. static int arc_emac_open(struct net_device *ndev)
  359. {
  360. struct arc_emac_priv *priv = netdev_priv(ndev);
  361. struct phy_device *phy_dev = ndev->phydev;
  362. struct device *dev = ndev->dev.parent;
  363. int i;
  364. phy_dev->autoneg = AUTONEG_ENABLE;
  365. phy_dev->speed = 0;
  366. phy_dev->duplex = 0;
  367. linkmode_and(phy_dev->advertising, phy_dev->advertising,
  368. phy_dev->supported);
  369. priv->last_rx_bd = 0;
  370. /* Allocate and set buffers for Rx BD's */
  371. for (i = 0; i < RX_BD_NUM; i++) {
  372. dma_addr_t addr;
  373. unsigned int *last_rx_bd = &priv->last_rx_bd;
  374. struct arc_emac_bd *rxbd = &priv->rxbd[*last_rx_bd];
  375. struct buffer_state *rx_buff = &priv->rx_buff[*last_rx_bd];
  376. rx_buff->skb = netdev_alloc_skb_ip_align(ndev,
  377. EMAC_BUFFER_SIZE);
  378. if (unlikely(!rx_buff->skb))
  379. return -ENOMEM;
  380. addr = dma_map_single(dev, (void *)rx_buff->skb->data,
  381. EMAC_BUFFER_SIZE, DMA_FROM_DEVICE);
  382. if (dma_mapping_error(dev, addr)) {
  383. netdev_err(ndev, "cannot dma map\n");
  384. dev_kfree_skb(rx_buff->skb);
  385. return -ENOMEM;
  386. }
  387. dma_unmap_addr_set(rx_buff, addr, addr);
  388. dma_unmap_len_set(rx_buff, len, EMAC_BUFFER_SIZE);
  389. rxbd->data = cpu_to_le32(addr);
  390. /* Make sure pointer to data buffer is set */
  391. wmb();
  392. /* Return ownership to EMAC */
  393. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  394. *last_rx_bd = (*last_rx_bd + 1) % RX_BD_NUM;
  395. }
  396. priv->txbd_curr = 0;
  397. priv->txbd_dirty = 0;
  398. /* Clean Tx BD's */
  399. memset(priv->txbd, 0, TX_RING_SZ);
  400. /* Initialize logical address filter */
  401. arc_reg_set(priv, R_LAFL, 0);
  402. arc_reg_set(priv, R_LAFH, 0);
  403. /* Set BD ring pointers for device side */
  404. arc_reg_set(priv, R_RX_RING, (unsigned int)priv->rxbd_dma);
  405. arc_reg_set(priv, R_TX_RING, (unsigned int)priv->txbd_dma);
  406. /* Enable interrupts */
  407. arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  408. /* Set CONTROL */
  409. arc_reg_set(priv, R_CTRL,
  410. (RX_BD_NUM << 24) | /* RX BD table length */
  411. (TX_BD_NUM << 16) | /* TX BD table length */
  412. TXRN_MASK | RXRN_MASK);
  413. napi_enable(&priv->napi);
  414. /* Enable EMAC */
  415. arc_reg_or(priv, R_CTRL, EN_MASK);
  416. phy_start(ndev->phydev);
  417. netif_start_queue(ndev);
  418. return 0;
  419. }
  420. /**
  421. * arc_emac_set_rx_mode - Change the receive filtering mode.
  422. * @ndev: Pointer to the network device.
  423. *
  424. * This function enables/disables promiscuous or all-multicast mode
  425. * and updates the multicast filtering list of the network device.
  426. */
  427. static void arc_emac_set_rx_mode(struct net_device *ndev)
  428. {
  429. struct arc_emac_priv *priv = netdev_priv(ndev);
  430. if (ndev->flags & IFF_PROMISC) {
  431. arc_reg_or(priv, R_CTRL, PROM_MASK);
  432. } else {
  433. arc_reg_clr(priv, R_CTRL, PROM_MASK);
  434. if (ndev->flags & IFF_ALLMULTI) {
  435. arc_reg_set(priv, R_LAFL, ~0);
  436. arc_reg_set(priv, R_LAFH, ~0);
  437. } else if (ndev->flags & IFF_MULTICAST) {
  438. struct netdev_hw_addr *ha;
  439. unsigned int filter[2] = { 0, 0 };
  440. int bit;
  441. netdev_for_each_mc_addr(ha, ndev) {
  442. bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26;
  443. filter[bit >> 5] |= 1 << (bit & 31);
  444. }
  445. arc_reg_set(priv, R_LAFL, filter[0]);
  446. arc_reg_set(priv, R_LAFH, filter[1]);
  447. } else {
  448. arc_reg_set(priv, R_LAFL, 0);
  449. arc_reg_set(priv, R_LAFH, 0);
  450. }
  451. }
  452. }
  453. /**
  454. * arc_free_tx_queue - free skb from tx queue
  455. * @ndev: Pointer to the network device.
  456. *
  457. * This function must be called while EMAC disable
  458. */
  459. static void arc_free_tx_queue(struct net_device *ndev)
  460. {
  461. struct arc_emac_priv *priv = netdev_priv(ndev);
  462. struct device *dev = ndev->dev.parent;
  463. unsigned int i;
  464. for (i = 0; i < TX_BD_NUM; i++) {
  465. struct arc_emac_bd *txbd = &priv->txbd[i];
  466. struct buffer_state *tx_buff = &priv->tx_buff[i];
  467. if (tx_buff->skb) {
  468. dma_unmap_single(dev,
  469. dma_unmap_addr(tx_buff, addr),
  470. dma_unmap_len(tx_buff, len),
  471. DMA_TO_DEVICE);
  472. /* return the sk_buff to system */
  473. dev_kfree_skb_irq(tx_buff->skb);
  474. }
  475. txbd->info = 0;
  476. txbd->data = 0;
  477. tx_buff->skb = NULL;
  478. }
  479. }
  480. /**
  481. * arc_free_rx_queue - free skb from rx queue
  482. * @ndev: Pointer to the network device.
  483. *
  484. * This function must be called while EMAC disable
  485. */
  486. static void arc_free_rx_queue(struct net_device *ndev)
  487. {
  488. struct arc_emac_priv *priv = netdev_priv(ndev);
  489. struct device *dev = ndev->dev.parent;
  490. unsigned int i;
  491. for (i = 0; i < RX_BD_NUM; i++) {
  492. struct arc_emac_bd *rxbd = &priv->rxbd[i];
  493. struct buffer_state *rx_buff = &priv->rx_buff[i];
  494. if (rx_buff->skb) {
  495. dma_unmap_single(dev,
  496. dma_unmap_addr(rx_buff, addr),
  497. dma_unmap_len(rx_buff, len),
  498. DMA_FROM_DEVICE);
  499. /* return the sk_buff to system */
  500. dev_kfree_skb_irq(rx_buff->skb);
  501. }
  502. rxbd->info = 0;
  503. rxbd->data = 0;
  504. rx_buff->skb = NULL;
  505. }
  506. }
  507. /**
  508. * arc_emac_stop - Close the network device.
  509. * @ndev: Pointer to the network device.
  510. *
  511. * This function stops the Tx queue, disables interrupts and frees the IRQ for
  512. * the EMAC device.
  513. * It also disconnects the PHY device associated with the EMAC device.
  514. */
  515. static int arc_emac_stop(struct net_device *ndev)
  516. {
  517. struct arc_emac_priv *priv = netdev_priv(ndev);
  518. napi_disable(&priv->napi);
  519. netif_stop_queue(ndev);
  520. phy_stop(ndev->phydev);
  521. /* Disable interrupts */
  522. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  523. /* Disable EMAC */
  524. arc_reg_clr(priv, R_CTRL, EN_MASK);
  525. /* Return the sk_buff to system */
  526. arc_free_tx_queue(ndev);
  527. arc_free_rx_queue(ndev);
  528. return 0;
  529. }
  530. /**
  531. * arc_emac_stats - Get system network statistics.
  532. * @ndev: Pointer to net_device structure.
  533. *
  534. * Returns the address of the device statistics structure.
  535. * Statistics are updated in interrupt handler.
  536. */
  537. static struct net_device_stats *arc_emac_stats(struct net_device *ndev)
  538. {
  539. struct arc_emac_priv *priv = netdev_priv(ndev);
  540. struct net_device_stats *stats = &ndev->stats;
  541. unsigned long miss, rxerr;
  542. u8 rxcrc, rxfram, rxoflow;
  543. rxerr = arc_reg_get(priv, R_RXERR);
  544. miss = arc_reg_get(priv, R_MISS);
  545. rxcrc = rxerr;
  546. rxfram = rxerr >> 8;
  547. rxoflow = rxerr >> 16;
  548. stats->rx_errors += miss;
  549. stats->rx_errors += rxcrc + rxfram + rxoflow;
  550. stats->rx_over_errors += rxoflow;
  551. stats->rx_frame_errors += rxfram;
  552. stats->rx_crc_errors += rxcrc;
  553. stats->rx_missed_errors += miss;
  554. return stats;
  555. }
  556. /**
  557. * arc_emac_tx - Starts the data transmission.
  558. * @skb: sk_buff pointer that contains data to be Transmitted.
  559. * @ndev: Pointer to net_device structure.
  560. *
  561. * returns: NETDEV_TX_OK, on success
  562. * NETDEV_TX_BUSY, if any of the descriptors are not free.
  563. *
  564. * This function is invoked from upper layers to initiate transmission.
  565. */
  566. static netdev_tx_t arc_emac_tx(struct sk_buff *skb, struct net_device *ndev)
  567. {
  568. struct arc_emac_priv *priv = netdev_priv(ndev);
  569. unsigned int len, *txbd_curr = &priv->txbd_curr;
  570. struct net_device_stats *stats = &ndev->stats;
  571. __le32 *info = &priv->txbd[*txbd_curr].info;
  572. struct device *dev = ndev->dev.parent;
  573. dma_addr_t addr;
  574. if (skb_padto(skb, ETH_ZLEN))
  575. return NETDEV_TX_OK;
  576. len = max_t(unsigned int, ETH_ZLEN, skb->len);
  577. if (unlikely(!arc_emac_tx_avail(priv))) {
  578. netif_stop_queue(ndev);
  579. netdev_err(ndev, "BUG! Tx Ring full when queue awake!\n");
  580. return NETDEV_TX_BUSY;
  581. }
  582. addr = dma_map_single(dev, (void *)skb->data, len, DMA_TO_DEVICE);
  583. if (unlikely(dma_mapping_error(dev, addr))) {
  584. stats->tx_dropped++;
  585. stats->tx_errors++;
  586. dev_kfree_skb_any(skb);
  587. return NETDEV_TX_OK;
  588. }
  589. dma_unmap_addr_set(&priv->tx_buff[*txbd_curr], addr, addr);
  590. dma_unmap_len_set(&priv->tx_buff[*txbd_curr], len, len);
  591. priv->txbd[*txbd_curr].data = cpu_to_le32(addr);
  592. /* Make sure pointer to data buffer is set */
  593. wmb();
  594. skb_tx_timestamp(skb);
  595. *info = cpu_to_le32(FOR_EMAC | FIRST_OR_LAST_MASK | len);
  596. /* Make sure info word is set */
  597. wmb();
  598. priv->tx_buff[*txbd_curr].skb = skb;
  599. /* Increment index to point to the next BD */
  600. *txbd_curr = (*txbd_curr + 1) % TX_BD_NUM;
  601. /* Ensure that tx_clean() sees the new txbd_curr before
  602. * checking the queue status. This prevents an unneeded wake
  603. * of the queue in tx_clean().
  604. */
  605. smp_mb();
  606. if (!arc_emac_tx_avail(priv)) {
  607. netif_stop_queue(ndev);
  608. /* Refresh tx_dirty */
  609. smp_mb();
  610. if (arc_emac_tx_avail(priv))
  611. netif_start_queue(ndev);
  612. }
  613. arc_reg_set(priv, R_STATUS, TXPL_MASK);
  614. return NETDEV_TX_OK;
  615. }
  616. static void arc_emac_set_address_internal(struct net_device *ndev)
  617. {
  618. struct arc_emac_priv *priv = netdev_priv(ndev);
  619. unsigned int addr_low, addr_hi;
  620. addr_low = le32_to_cpu(*(__le32 *)&ndev->dev_addr[0]);
  621. addr_hi = le16_to_cpu(*(__le16 *)&ndev->dev_addr[4]);
  622. arc_reg_set(priv, R_ADDRL, addr_low);
  623. arc_reg_set(priv, R_ADDRH, addr_hi);
  624. }
  625. /**
  626. * arc_emac_set_address - Set the MAC address for this device.
  627. * @ndev: Pointer to net_device structure.
  628. * @p: 6 byte Address to be written as MAC address.
  629. *
  630. * This function copies the HW address from the sockaddr structure to the
  631. * net_device structure and updates the address in HW.
  632. *
  633. * returns: -EBUSY if the net device is busy or 0 if the address is set
  634. * successfully.
  635. */
  636. static int arc_emac_set_address(struct net_device *ndev, void *p)
  637. {
  638. struct sockaddr *addr = p;
  639. if (netif_running(ndev))
  640. return -EBUSY;
  641. if (!is_valid_ether_addr(addr->sa_data))
  642. return -EADDRNOTAVAIL;
  643. eth_hw_addr_set(ndev, addr->sa_data);
  644. arc_emac_set_address_internal(ndev);
  645. return 0;
  646. }
  647. /**
  648. * arc_emac_restart - Restart EMAC
  649. * @ndev: Pointer to net_device structure.
  650. *
  651. * This function do hardware reset of EMAC in order to restore
  652. * network packets reception.
  653. */
  654. static void arc_emac_restart(struct net_device *ndev)
  655. {
  656. struct arc_emac_priv *priv = netdev_priv(ndev);
  657. struct net_device_stats *stats = &ndev->stats;
  658. int i;
  659. if (net_ratelimit())
  660. netdev_warn(ndev, "restarting stalled EMAC\n");
  661. netif_stop_queue(ndev);
  662. /* Disable interrupts */
  663. arc_reg_clr(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  664. /* Disable EMAC */
  665. arc_reg_clr(priv, R_CTRL, EN_MASK);
  666. /* Return the sk_buff to system */
  667. arc_free_tx_queue(ndev);
  668. /* Clean Tx BD's */
  669. priv->txbd_curr = 0;
  670. priv->txbd_dirty = 0;
  671. memset(priv->txbd, 0, TX_RING_SZ);
  672. for (i = 0; i < RX_BD_NUM; i++) {
  673. struct arc_emac_bd *rxbd = &priv->rxbd[i];
  674. unsigned int info = le32_to_cpu(rxbd->info);
  675. if (!(info & FOR_EMAC)) {
  676. stats->rx_errors++;
  677. stats->rx_dropped++;
  678. }
  679. /* Return ownership to EMAC */
  680. rxbd->info = cpu_to_le32(FOR_EMAC | EMAC_BUFFER_SIZE);
  681. }
  682. priv->last_rx_bd = 0;
  683. /* Make sure info is visible to EMAC before enable */
  684. wmb();
  685. /* Enable interrupts */
  686. arc_reg_set(priv, R_ENABLE, RXINT_MASK | TXINT_MASK | ERR_MASK);
  687. /* Enable EMAC */
  688. arc_reg_or(priv, R_CTRL, EN_MASK);
  689. netif_start_queue(ndev);
  690. }
  691. static const struct net_device_ops arc_emac_netdev_ops = {
  692. .ndo_open = arc_emac_open,
  693. .ndo_stop = arc_emac_stop,
  694. .ndo_start_xmit = arc_emac_tx,
  695. .ndo_set_mac_address = arc_emac_set_address,
  696. .ndo_get_stats = arc_emac_stats,
  697. .ndo_set_rx_mode = arc_emac_set_rx_mode,
  698. .ndo_eth_ioctl = phy_do_ioctl_running,
  699. #ifdef CONFIG_NET_POLL_CONTROLLER
  700. .ndo_poll_controller = arc_emac_poll_controller,
  701. #endif
  702. };
  703. int arc_emac_probe(struct net_device *ndev, int interface)
  704. {
  705. struct device *dev = ndev->dev.parent;
  706. struct resource res_regs;
  707. struct device_node *phy_node;
  708. struct phy_device *phydev = NULL;
  709. struct arc_emac_priv *priv;
  710. unsigned int id, clock_frequency, irq;
  711. int err;
  712. /* Get PHY from device tree */
  713. phy_node = of_parse_phandle(dev->of_node, "phy", 0);
  714. if (!phy_node) {
  715. dev_err(dev, "failed to retrieve phy description from device tree\n");
  716. return -ENODEV;
  717. }
  718. /* Get EMAC registers base address from device tree */
  719. err = of_address_to_resource(dev->of_node, 0, &res_regs);
  720. if (err) {
  721. dev_err(dev, "failed to retrieve registers base from device tree\n");
  722. err = -ENODEV;
  723. goto out_put_node;
  724. }
  725. /* Get IRQ from device tree */
  726. irq = irq_of_parse_and_map(dev->of_node, 0);
  727. if (!irq) {
  728. dev_err(dev, "failed to retrieve <irq> value from device tree\n");
  729. err = -ENODEV;
  730. goto out_put_node;
  731. }
  732. ndev->netdev_ops = &arc_emac_netdev_ops;
  733. ndev->ethtool_ops = &arc_emac_ethtool_ops;
  734. ndev->watchdog_timeo = TX_TIMEOUT;
  735. priv = netdev_priv(ndev);
  736. priv->dev = dev;
  737. priv->regs = devm_ioremap_resource(dev, &res_regs);
  738. if (IS_ERR(priv->regs)) {
  739. err = PTR_ERR(priv->regs);
  740. goto out_put_node;
  741. }
  742. dev_dbg(dev, "Registers base address is 0x%p\n", priv->regs);
  743. if (priv->clk) {
  744. err = clk_prepare_enable(priv->clk);
  745. if (err) {
  746. dev_err(dev, "failed to enable clock\n");
  747. goto out_put_node;
  748. }
  749. clock_frequency = clk_get_rate(priv->clk);
  750. } else {
  751. /* Get CPU clock frequency from device tree */
  752. if (of_property_read_u32(dev->of_node, "clock-frequency",
  753. &clock_frequency)) {
  754. dev_err(dev, "failed to retrieve <clock-frequency> from device tree\n");
  755. err = -EINVAL;
  756. goto out_put_node;
  757. }
  758. }
  759. id = arc_reg_get(priv, R_ID);
  760. /* Check for EMAC revision 5 or 7, magic number */
  761. if (!(id == 0x0005fd02 || id == 0x0007fd02)) {
  762. dev_err(dev, "ARC EMAC not detected, id=0x%x\n", id);
  763. err = -ENODEV;
  764. goto out_clken;
  765. }
  766. dev_info(dev, "ARC EMAC detected with id: 0x%x\n", id);
  767. /* Set poll rate so that it polls every 1 ms */
  768. arc_reg_set(priv, R_POLLRATE, clock_frequency / 1000000);
  769. /*
  770. * Put the device into a known quiescent state before requesting
  771. * the IRQ. Clear only EMAC interrupt status bits here; leave the
  772. * MDIO completion bit alone and avoid writing TXPL_MASK, which is
  773. * used to force TX polling rather than acknowledge interrupts.
  774. */
  775. arc_reg_set(priv, R_ENABLE, 0);
  776. arc_reg_set(priv, R_STATUS, RXINT_MASK | TXINT_MASK | ERR_MASK |
  777. TXCH_MASK | MSER_MASK | RXCR_MASK |
  778. RXFR_MASK | RXFL_MASK);
  779. ndev->irq = irq;
  780. dev_info(dev, "IRQ is %d\n", ndev->irq);
  781. /* Register interrupt handler for device */
  782. err = devm_request_irq(dev, ndev->irq, arc_emac_intr, 0,
  783. ndev->name, ndev);
  784. if (err) {
  785. dev_err(dev, "could not allocate IRQ\n");
  786. goto out_clken;
  787. }
  788. /* Get MAC address from device tree */
  789. err = of_get_ethdev_address(dev->of_node, ndev);
  790. if (err)
  791. eth_hw_addr_random(ndev);
  792. arc_emac_set_address_internal(ndev);
  793. dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
  794. /* Do 1 allocation instead of 2 separate ones for Rx and Tx BD rings */
  795. priv->rxbd = dmam_alloc_coherent(dev, RX_RING_SZ + TX_RING_SZ,
  796. &priv->rxbd_dma, GFP_KERNEL);
  797. if (!priv->rxbd) {
  798. dev_err(dev, "failed to allocate data buffers\n");
  799. err = -ENOMEM;
  800. goto out_clken;
  801. }
  802. priv->txbd = priv->rxbd + RX_BD_NUM;
  803. priv->txbd_dma = priv->rxbd_dma + RX_RING_SZ;
  804. dev_dbg(dev, "EMAC Device addr: Rx Ring [0x%x], Tx Ring[%x]\n",
  805. (unsigned int)priv->rxbd_dma, (unsigned int)priv->txbd_dma);
  806. err = arc_mdio_probe(priv);
  807. if (err) {
  808. dev_err(dev, "failed to probe MII bus\n");
  809. goto out_clken;
  810. }
  811. phydev = of_phy_connect(ndev, phy_node, arc_emac_adjust_link, 0,
  812. interface);
  813. if (!phydev) {
  814. dev_err(dev, "of_phy_connect() failed\n");
  815. err = -ENODEV;
  816. goto out_mdio;
  817. }
  818. dev_info(dev, "connected to %s phy with id 0x%x\n",
  819. phydev->drv->name, phydev->phy_id);
  820. netif_napi_add_weight(ndev, &priv->napi, arc_emac_poll,
  821. ARC_EMAC_NAPI_WEIGHT);
  822. err = register_netdev(ndev);
  823. if (err) {
  824. dev_err(dev, "failed to register network device\n");
  825. goto out_netif_api;
  826. }
  827. of_node_put(phy_node);
  828. return 0;
  829. out_netif_api:
  830. netif_napi_del(&priv->napi);
  831. phy_disconnect(phydev);
  832. out_mdio:
  833. arc_mdio_remove(priv);
  834. out_clken:
  835. if (priv->clk)
  836. clk_disable_unprepare(priv->clk);
  837. out_put_node:
  838. of_node_put(phy_node);
  839. return err;
  840. }
  841. EXPORT_SYMBOL_GPL(arc_emac_probe);
  842. void arc_emac_remove(struct net_device *ndev)
  843. {
  844. struct arc_emac_priv *priv = netdev_priv(ndev);
  845. phy_disconnect(ndev->phydev);
  846. arc_mdio_remove(priv);
  847. unregister_netdev(ndev);
  848. netif_napi_del(&priv->napi);
  849. if (!IS_ERR(priv->clk))
  850. clk_disable_unprepare(priv->clk);
  851. }
  852. EXPORT_SYMBOL_GPL(arc_emac_remove);
  853. MODULE_AUTHOR("Alexey Brodkin <abrodkin@synopsys.com>");
  854. MODULE_DESCRIPTION("ARC EMAC driver");
  855. MODULE_LICENSE("GPL");