airoha_ppe.c 39 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2025 AIROHA Inc
  4. * Author: Lorenzo Bianconi <lorenzo@kernel.org>
  5. */
  6. #include <linux/ip.h>
  7. #include <linux/ipv6.h>
  8. #include <linux/of_platform.h>
  9. #include <linux/platform_device.h>
  10. #include <linux/rhashtable.h>
  11. #include <net/ipv6.h>
  12. #include <net/pkt_cls.h>
  13. #include "airoha_regs.h"
  14. #include "airoha_eth.h"
  15. static DEFINE_MUTEX(flow_offload_mutex);
  16. static DEFINE_SPINLOCK(ppe_lock);
  17. static const struct rhashtable_params airoha_flow_table_params = {
  18. .head_offset = offsetof(struct airoha_flow_table_entry, node),
  19. .key_offset = offsetof(struct airoha_flow_table_entry, cookie),
  20. .key_len = sizeof(unsigned long),
  21. .automatic_shrinking = true,
  22. };
  23. static const struct rhashtable_params airoha_l2_flow_table_params = {
  24. .head_offset = offsetof(struct airoha_flow_table_entry, l2_node),
  25. .key_offset = offsetof(struct airoha_flow_table_entry, data.bridge),
  26. .key_len = 2 * ETH_ALEN,
  27. .automatic_shrinking = true,
  28. };
  29. static int airoha_ppe_get_num_stats_entries(struct airoha_ppe *ppe)
  30. {
  31. if (!IS_ENABLED(CONFIG_NET_AIROHA_FLOW_STATS))
  32. return -EOPNOTSUPP;
  33. if (airoha_is_7583(ppe->eth))
  34. return -EOPNOTSUPP;
  35. return PPE_STATS_NUM_ENTRIES;
  36. }
  37. static int airoha_ppe_get_total_num_stats_entries(struct airoha_ppe *ppe)
  38. {
  39. int num_stats = airoha_ppe_get_num_stats_entries(ppe);
  40. if (num_stats > 0) {
  41. struct airoha_eth *eth = ppe->eth;
  42. num_stats = num_stats * eth->soc->num_ppe;
  43. }
  44. return num_stats;
  45. }
  46. static u32 airoha_ppe_get_total_sram_num_entries(struct airoha_ppe *ppe)
  47. {
  48. struct airoha_eth *eth = ppe->eth;
  49. return PPE_SRAM_NUM_ENTRIES * eth->soc->num_ppe;
  50. }
  51. u32 airoha_ppe_get_total_num_entries(struct airoha_ppe *ppe)
  52. {
  53. u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);
  54. return sram_num_entries + PPE_DRAM_NUM_ENTRIES;
  55. }
  56. bool airoha_ppe_is_enabled(struct airoha_eth *eth, int index)
  57. {
  58. if (index >= eth->soc->num_ppe)
  59. return false;
  60. return airoha_fe_rr(eth, REG_PPE_GLO_CFG(index)) & PPE_GLO_CFG_EN_MASK;
  61. }
  62. static u32 airoha_ppe_get_timestamp(struct airoha_ppe *ppe)
  63. {
  64. u16 timestamp = airoha_fe_rr(ppe->eth, REG_FE_FOE_TS);
  65. return FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, timestamp);
  66. }
  67. static void airoha_ppe_hw_init(struct airoha_ppe *ppe)
  68. {
  69. u32 sram_ppe_num_data_entries = PPE_SRAM_NUM_ENTRIES, sram_num_entries;
  70. u32 sram_tb_size, dram_num_entries;
  71. struct airoha_eth *eth = ppe->eth;
  72. int i, sram_num_stats_entries;
  73. sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);
  74. sram_tb_size = sram_num_entries * sizeof(struct airoha_foe_entry);
  75. dram_num_entries = PPE_RAM_NUM_ENTRIES_SHIFT(PPE_DRAM_NUM_ENTRIES);
  76. sram_num_stats_entries = airoha_ppe_get_num_stats_entries(ppe);
  77. if (sram_num_stats_entries > 0)
  78. sram_ppe_num_data_entries -= sram_num_stats_entries;
  79. sram_ppe_num_data_entries =
  80. PPE_RAM_NUM_ENTRIES_SHIFT(sram_ppe_num_data_entries);
  81. for (i = 0; i < eth->soc->num_ppe; i++) {
  82. int p;
  83. airoha_fe_wr(eth, REG_PPE_TB_BASE(i),
  84. ppe->foe_dma + sram_tb_size);
  85. airoha_fe_rmw(eth, REG_PPE_BND_AGE0(i),
  86. PPE_BIND_AGE0_DELTA_NON_L4 |
  87. PPE_BIND_AGE0_DELTA_UDP,
  88. FIELD_PREP(PPE_BIND_AGE0_DELTA_NON_L4, 1) |
  89. FIELD_PREP(PPE_BIND_AGE0_DELTA_UDP, 12));
  90. airoha_fe_rmw(eth, REG_PPE_BND_AGE1(i),
  91. PPE_BIND_AGE1_DELTA_TCP_FIN |
  92. PPE_BIND_AGE1_DELTA_TCP,
  93. FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP_FIN, 1) |
  94. FIELD_PREP(PPE_BIND_AGE1_DELTA_TCP, 7));
  95. airoha_fe_rmw(eth, REG_PPE_TB_HASH_CFG(i),
  96. PPE_SRAM_TABLE_EN_MASK |
  97. PPE_SRAM_HASH1_EN_MASK |
  98. PPE_DRAM_TABLE_EN_MASK |
  99. PPE_SRAM_HASH0_MODE_MASK |
  100. PPE_SRAM_HASH1_MODE_MASK |
  101. PPE_DRAM_HASH0_MODE_MASK |
  102. PPE_DRAM_HASH1_MODE_MASK,
  103. FIELD_PREP(PPE_SRAM_TABLE_EN_MASK, 1) |
  104. FIELD_PREP(PPE_SRAM_HASH1_EN_MASK, 1) |
  105. FIELD_PREP(PPE_SRAM_HASH1_MODE_MASK, 1) |
  106. FIELD_PREP(PPE_DRAM_HASH1_MODE_MASK, 3));
  107. airoha_fe_rmw(eth, REG_PPE_TB_CFG(i),
  108. PPE_TB_CFG_SEARCH_MISS_MASK |
  109. PPE_SRAM_TB_NUM_ENTRY_MASK |
  110. PPE_DRAM_TB_NUM_ENTRY_MASK |
  111. PPE_TB_CFG_KEEPALIVE_MASK |
  112. PPE_TB_ENTRY_SIZE_MASK,
  113. FIELD_PREP(PPE_TB_CFG_SEARCH_MISS_MASK, 3) |
  114. FIELD_PREP(PPE_TB_ENTRY_SIZE_MASK, 0) |
  115. FIELD_PREP(PPE_SRAM_TB_NUM_ENTRY_MASK,
  116. sram_ppe_num_data_entries) |
  117. FIELD_PREP(PPE_DRAM_TB_NUM_ENTRY_MASK,
  118. dram_num_entries));
  119. airoha_fe_wr(eth, REG_PPE_HASH_SEED(i), PPE_HASH_SEED);
  120. for (p = 0; p < ARRAY_SIZE(eth->ports); p++)
  121. airoha_fe_rmw(eth, REG_PPE_MTU(i, p),
  122. FP0_EGRESS_MTU_MASK |
  123. FP1_EGRESS_MTU_MASK,
  124. FIELD_PREP(FP0_EGRESS_MTU_MASK,
  125. AIROHA_MAX_MTU) |
  126. FIELD_PREP(FP1_EGRESS_MTU_MASK,
  127. AIROHA_MAX_MTU));
  128. }
  129. }
  130. static void airoha_ppe_flow_mangle_eth(const struct flow_action_entry *act, void *eth)
  131. {
  132. void *dest = eth + act->mangle.offset;
  133. const void *src = &act->mangle.val;
  134. if (act->mangle.offset > 8)
  135. return;
  136. if (act->mangle.mask == 0xffff) {
  137. src += 2;
  138. dest += 2;
  139. }
  140. memcpy(dest, src, act->mangle.mask ? 2 : 4);
  141. }
  142. static int airoha_ppe_flow_mangle_ports(const struct flow_action_entry *act,
  143. struct airoha_flow_data *data)
  144. {
  145. u32 val = be32_to_cpu((__force __be32)act->mangle.val);
  146. switch (act->mangle.offset) {
  147. case 0:
  148. if ((__force __be32)act->mangle.mask == ~cpu_to_be32(0xffff))
  149. data->dst_port = cpu_to_be16(val);
  150. else
  151. data->src_port = cpu_to_be16(val >> 16);
  152. break;
  153. case 2:
  154. data->dst_port = cpu_to_be16(val);
  155. break;
  156. default:
  157. return -EINVAL;
  158. }
  159. return 0;
  160. }
  161. static int airoha_ppe_flow_mangle_ipv4(const struct flow_action_entry *act,
  162. struct airoha_flow_data *data)
  163. {
  164. __be32 *dest;
  165. switch (act->mangle.offset) {
  166. case offsetof(struct iphdr, saddr):
  167. dest = &data->v4.src_addr;
  168. break;
  169. case offsetof(struct iphdr, daddr):
  170. dest = &data->v4.dst_addr;
  171. break;
  172. default:
  173. return -EINVAL;
  174. }
  175. memcpy(dest, &act->mangle.val, sizeof(u32));
  176. return 0;
  177. }
  178. static int airoha_ppe_get_wdma_info(struct net_device *dev, const u8 *addr,
  179. struct airoha_wdma_info *info)
  180. {
  181. struct net_device_path_stack stack;
  182. struct net_device_path *path;
  183. int err;
  184. if (!dev)
  185. return -ENODEV;
  186. rcu_read_lock();
  187. err = dev_fill_forward_path(dev, addr, &stack);
  188. rcu_read_unlock();
  189. if (err)
  190. return err;
  191. path = &stack.path[stack.num_paths - 1];
  192. if (path->type != DEV_PATH_MTK_WDMA)
  193. return -1;
  194. info->idx = path->mtk_wdma.wdma_idx;
  195. info->bss = path->mtk_wdma.bss;
  196. info->wcid = path->mtk_wdma.wcid;
  197. return 0;
  198. }
  199. static int airoha_get_dsa_port(struct net_device **dev)
  200. {
  201. #if IS_ENABLED(CONFIG_NET_DSA)
  202. struct dsa_port *dp = dsa_port_from_netdev(*dev);
  203. if (IS_ERR(dp))
  204. return -ENODEV;
  205. *dev = dsa_port_to_conduit(dp);
  206. return dp->index;
  207. #else
  208. return -ENODEV;
  209. #endif
  210. }
  211. static void airoha_ppe_foe_set_bridge_addrs(struct airoha_foe_bridge *br,
  212. struct ethhdr *eh)
  213. {
  214. br->dest_mac_hi = get_unaligned_be32(eh->h_dest);
  215. br->dest_mac_lo = get_unaligned_be16(eh->h_dest + 4);
  216. br->src_mac_hi = get_unaligned_be16(eh->h_source);
  217. br->src_mac_lo = get_unaligned_be32(eh->h_source + 2);
  218. }
  219. static int airoha_ppe_foe_entry_prepare(struct airoha_eth *eth,
  220. struct airoha_foe_entry *hwe,
  221. struct net_device *dev, int type,
  222. struct airoha_flow_data *data,
  223. int l4proto)
  224. {
  225. u32 qdata = FIELD_PREP(AIROHA_FOE_SHAPER_ID, 0x7f), ports_pad, val;
  226. int wlan_etype = -EINVAL, dsa_port = airoha_get_dsa_port(&dev);
  227. struct airoha_foe_mac_info_common *l2;
  228. u8 smac_id = 0xf;
  229. memset(hwe, 0, sizeof(*hwe));
  230. val = FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE, AIROHA_FOE_STATE_BIND) |
  231. FIELD_PREP(AIROHA_FOE_IB1_BIND_PACKET_TYPE, type) |
  232. FIELD_PREP(AIROHA_FOE_IB1_BIND_UDP, l4proto == IPPROTO_UDP) |
  233. FIELD_PREP(AIROHA_FOE_IB1_BIND_VLAN_LAYER, data->vlan.num) |
  234. FIELD_PREP(AIROHA_FOE_IB1_BIND_VPM, data->vlan.num) |
  235. FIELD_PREP(AIROHA_FOE_IB1_BIND_PPPOE, data->pppoe.num) |
  236. AIROHA_FOE_IB1_BIND_TTL;
  237. hwe->ib1 = val;
  238. val = FIELD_PREP(AIROHA_FOE_IB2_PORT_AG, 0x1f);
  239. if (dev) {
  240. struct airoha_wdma_info info = {};
  241. if (!airoha_ppe_get_wdma_info(dev, data->eth.h_dest, &info)) {
  242. val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ, info.idx) |
  243. FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT,
  244. FE_PSE_PORT_CDM4);
  245. qdata |= FIELD_PREP(AIROHA_FOE_ACTDP, info.bss);
  246. wlan_etype = FIELD_PREP(AIROHA_FOE_MAC_WDMA_BAND,
  247. info.idx) |
  248. FIELD_PREP(AIROHA_FOE_MAC_WDMA_WCID,
  249. info.wcid);
  250. } else {
  251. struct airoha_gdm_port *port = netdev_priv(dev);
  252. u8 pse_port;
  253. if (!airoha_is_valid_gdm_port(eth, port))
  254. return -EINVAL;
  255. if (dsa_port >= 0 || eth->ports[1])
  256. pse_port = port->id == 4 ? FE_PSE_PORT_GDM4
  257. : port->id;
  258. else
  259. pse_port = 2; /* uplink relies on GDM2
  260. * loopback
  261. */
  262. val |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, pse_port) |
  263. AIROHA_FOE_IB2_PSE_QOS;
  264. /* For downlink traffic consume SRAM memory for hw
  265. * forwarding descriptors queue.
  266. */
  267. if (airhoa_is_lan_gdm_port(port))
  268. val |= AIROHA_FOE_IB2_FAST_PATH;
  269. if (dsa_port >= 0)
  270. val |= FIELD_PREP(AIROHA_FOE_IB2_NBQ,
  271. dsa_port);
  272. smac_id = port->id;
  273. }
  274. }
  275. if (is_multicast_ether_addr(data->eth.h_dest))
  276. val |= AIROHA_FOE_IB2_MULTICAST;
  277. ports_pad = 0xa5a5a500 | (l4proto & 0xff);
  278. if (type == PPE_PKT_TYPE_IPV4_ROUTE)
  279. hwe->ipv4.orig_tuple.ports = ports_pad;
  280. if (type == PPE_PKT_TYPE_IPV6_ROUTE_3T)
  281. hwe->ipv6.ports = ports_pad;
  282. if (type == PPE_PKT_TYPE_BRIDGE) {
  283. airoha_ppe_foe_set_bridge_addrs(&hwe->bridge, &data->eth);
  284. hwe->bridge.data = qdata;
  285. hwe->bridge.ib2 = val;
  286. l2 = &hwe->bridge.l2.common;
  287. } else if (type >= PPE_PKT_TYPE_IPV6_ROUTE_3T) {
  288. hwe->ipv6.data = qdata;
  289. hwe->ipv6.ib2 = val;
  290. l2 = &hwe->ipv6.l2;
  291. l2->etype = ETH_P_IPV6;
  292. } else {
  293. hwe->ipv4.data = qdata;
  294. hwe->ipv4.ib2 = val;
  295. l2 = &hwe->ipv4.l2.common;
  296. l2->etype = ETH_P_IP;
  297. }
  298. l2->dest_mac_hi = get_unaligned_be32(data->eth.h_dest);
  299. l2->dest_mac_lo = get_unaligned_be16(data->eth.h_dest + 4);
  300. if (type <= PPE_PKT_TYPE_IPV4_DSLITE) {
  301. struct airoha_foe_mac_info *mac_info;
  302. l2->src_mac_hi = get_unaligned_be32(data->eth.h_source);
  303. hwe->ipv4.l2.src_mac_lo =
  304. get_unaligned_be16(data->eth.h_source + 4);
  305. mac_info = (struct airoha_foe_mac_info *)l2;
  306. mac_info->pppoe_id = data->pppoe.sid;
  307. } else {
  308. l2->src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID, smac_id) |
  309. FIELD_PREP(AIROHA_FOE_MAC_PPPOE_ID,
  310. data->pppoe.sid);
  311. }
  312. if (data->vlan.num) {
  313. l2->vlan1 = data->vlan.hdr[0].id;
  314. if (data->vlan.num == 2)
  315. l2->vlan2 = data->vlan.hdr[1].id;
  316. }
  317. if (wlan_etype >= 0) {
  318. l2->etype = wlan_etype;
  319. } else if (dsa_port >= 0) {
  320. l2->etype = BIT(dsa_port);
  321. l2->etype |= !data->vlan.num ? BIT(15) : 0;
  322. } else if (data->pppoe.num) {
  323. l2->etype = ETH_P_PPP_SES;
  324. }
  325. return 0;
  326. }
  327. static int airoha_ppe_foe_entry_set_ipv4_tuple(struct airoha_foe_entry *hwe,
  328. struct airoha_flow_data *data,
  329. bool egress)
  330. {
  331. int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe->ib1);
  332. struct airoha_foe_ipv4_tuple *t;
  333. switch (type) {
  334. case PPE_PKT_TYPE_IPV4_HNAPT:
  335. if (egress) {
  336. t = &hwe->ipv4.new_tuple;
  337. break;
  338. }
  339. fallthrough;
  340. case PPE_PKT_TYPE_IPV4_DSLITE:
  341. case PPE_PKT_TYPE_IPV4_ROUTE:
  342. t = &hwe->ipv4.orig_tuple;
  343. break;
  344. default:
  345. WARN_ON_ONCE(1);
  346. return -EINVAL;
  347. }
  348. t->src_ip = be32_to_cpu(data->v4.src_addr);
  349. t->dest_ip = be32_to_cpu(data->v4.dst_addr);
  350. if (type != PPE_PKT_TYPE_IPV4_ROUTE) {
  351. t->src_port = be16_to_cpu(data->src_port);
  352. t->dest_port = be16_to_cpu(data->dst_port);
  353. }
  354. return 0;
  355. }
  356. static int airoha_ppe_foe_entry_set_ipv6_tuple(struct airoha_foe_entry *hwe,
  357. struct airoha_flow_data *data)
  358. {
  359. int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe->ib1);
  360. u32 *src, *dest;
  361. switch (type) {
  362. case PPE_PKT_TYPE_IPV6_ROUTE_5T:
  363. case PPE_PKT_TYPE_IPV6_6RD:
  364. hwe->ipv6.src_port = be16_to_cpu(data->src_port);
  365. hwe->ipv6.dest_port = be16_to_cpu(data->dst_port);
  366. fallthrough;
  367. case PPE_PKT_TYPE_IPV6_ROUTE_3T:
  368. src = hwe->ipv6.src_ip;
  369. dest = hwe->ipv6.dest_ip;
  370. break;
  371. default:
  372. WARN_ON_ONCE(1);
  373. return -EINVAL;
  374. }
  375. ipv6_addr_be32_to_cpu(src, data->v6.src_addr.s6_addr32);
  376. ipv6_addr_be32_to_cpu(dest, data->v6.dst_addr.s6_addr32);
  377. return 0;
  378. }
  379. static u32 airoha_ppe_foe_get_entry_hash(struct airoha_ppe *ppe,
  380. struct airoha_foe_entry *hwe)
  381. {
  382. int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe->ib1);
  383. u32 ppe_hash_mask = airoha_ppe_get_total_num_entries(ppe) - 1;
  384. u32 hash, hv1, hv2, hv3;
  385. switch (type) {
  386. case PPE_PKT_TYPE_IPV4_ROUTE:
  387. case PPE_PKT_TYPE_IPV4_HNAPT:
  388. hv1 = hwe->ipv4.orig_tuple.ports;
  389. hv2 = hwe->ipv4.orig_tuple.dest_ip;
  390. hv3 = hwe->ipv4.orig_tuple.src_ip;
  391. break;
  392. case PPE_PKT_TYPE_IPV6_ROUTE_3T:
  393. case PPE_PKT_TYPE_IPV6_ROUTE_5T:
  394. hv1 = hwe->ipv6.src_ip[3] ^ hwe->ipv6.dest_ip[3];
  395. hv1 ^= hwe->ipv6.ports;
  396. hv2 = hwe->ipv6.src_ip[2] ^ hwe->ipv6.dest_ip[2];
  397. hv2 ^= hwe->ipv6.dest_ip[0];
  398. hv3 = hwe->ipv6.src_ip[1] ^ hwe->ipv6.dest_ip[1];
  399. hv3 ^= hwe->ipv6.src_ip[0];
  400. break;
  401. case PPE_PKT_TYPE_BRIDGE: {
  402. struct airoha_foe_mac_info *l2 = &hwe->bridge.l2;
  403. hv1 = l2->common.src_mac_hi & 0xffff;
  404. hv1 = hv1 << 16 | l2->src_mac_lo;
  405. hv2 = l2->common.dest_mac_lo;
  406. hv2 = hv2 << 16;
  407. hv2 = hv2 | ((l2->common.src_mac_hi & 0xffff0000) >> 16);
  408. hv3 = l2->common.dest_mac_hi;
  409. break;
  410. }
  411. case PPE_PKT_TYPE_IPV4_DSLITE:
  412. case PPE_PKT_TYPE_IPV6_6RD:
  413. default:
  414. WARN_ON_ONCE(1);
  415. return ppe_hash_mask;
  416. }
  417. hash = (hv1 & hv2) | ((~hv1) & hv3);
  418. hash = (hash >> 24) | ((hash & 0xffffff) << 8);
  419. hash ^= hv1 ^ hv2 ^ hv3;
  420. hash ^= hash >> 16;
  421. hash &= ppe_hash_mask;
  422. return hash;
  423. }
  424. static int airoha_ppe_foe_get_flow_stats_index(struct airoha_ppe *ppe,
  425. u32 hash, u32 *index)
  426. {
  427. int ppe_num_stats_entries;
  428. ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);
  429. if (ppe_num_stats_entries < 0)
  430. return ppe_num_stats_entries;
  431. *index = hash >= ppe_num_stats_entries ? hash - PPE_STATS_NUM_ENTRIES
  432. : hash;
  433. return 0;
  434. }
  435. static void airoha_ppe_foe_flow_stat_entry_reset(struct airoha_ppe *ppe,
  436. struct airoha_npu *npu,
  437. int index)
  438. {
  439. memset_io(&npu->stats[index], 0, sizeof(*npu->stats));
  440. memset(&ppe->foe_stats[index], 0, sizeof(*ppe->foe_stats));
  441. }
  442. static void airoha_ppe_foe_flow_stats_reset(struct airoha_ppe *ppe,
  443. struct airoha_npu *npu)
  444. {
  445. int i, ppe_num_stats_entries;
  446. ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);
  447. if (ppe_num_stats_entries < 0)
  448. return;
  449. for (i = 0; i < ppe_num_stats_entries; i++)
  450. airoha_ppe_foe_flow_stat_entry_reset(ppe, npu, i);
  451. }
  452. static void airoha_ppe_foe_flow_stats_update(struct airoha_ppe *ppe,
  453. struct airoha_npu *npu,
  454. struct airoha_foe_entry *hwe,
  455. u32 hash)
  456. {
  457. int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe->ib1);
  458. u32 index, pse_port, val, *data, *ib2, *meter;
  459. int ppe_num_stats_entries;
  460. u8 nbq;
  461. ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);
  462. if (ppe_num_stats_entries < 0)
  463. return;
  464. if (airoha_ppe_foe_get_flow_stats_index(ppe, hash, &index))
  465. return;
  466. if (index >= ppe_num_stats_entries)
  467. return;
  468. if (type == PPE_PKT_TYPE_BRIDGE) {
  469. data = &hwe->bridge.data;
  470. ib2 = &hwe->bridge.ib2;
  471. meter = &hwe->bridge.l2.meter;
  472. } else if (type >= PPE_PKT_TYPE_IPV6_ROUTE_3T) {
  473. data = &hwe->ipv6.data;
  474. ib2 = &hwe->ipv6.ib2;
  475. meter = &hwe->ipv6.meter;
  476. } else {
  477. data = &hwe->ipv4.data;
  478. ib2 = &hwe->ipv4.ib2;
  479. meter = &hwe->ipv4.l2.meter;
  480. }
  481. pse_port = FIELD_GET(AIROHA_FOE_IB2_PSE_PORT, *ib2);
  482. if (pse_port == FE_PSE_PORT_CDM4)
  483. return;
  484. airoha_ppe_foe_flow_stat_entry_reset(ppe, npu, index);
  485. val = FIELD_GET(AIROHA_FOE_CHANNEL | AIROHA_FOE_QID, *data);
  486. *data = (*data & ~AIROHA_FOE_ACTDP) |
  487. FIELD_PREP(AIROHA_FOE_ACTDP, val);
  488. val = *ib2 & (AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT |
  489. AIROHA_FOE_IB2_PSE_QOS | AIROHA_FOE_IB2_FAST_PATH);
  490. *meter |= FIELD_PREP(AIROHA_FOE_TUNNEL_MTU, val);
  491. nbq = pse_port == 1 ? 6 : 5;
  492. *ib2 &= ~(AIROHA_FOE_IB2_NBQ | AIROHA_FOE_IB2_PSE_PORT |
  493. AIROHA_FOE_IB2_PSE_QOS);
  494. *ib2 |= FIELD_PREP(AIROHA_FOE_IB2_PSE_PORT, 6) |
  495. FIELD_PREP(AIROHA_FOE_IB2_NBQ, nbq);
  496. }
  497. static struct airoha_foe_entry *
  498. airoha_ppe_foe_get_entry_locked(struct airoha_ppe *ppe, u32 hash)
  499. {
  500. u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);
  501. lockdep_assert_held(&ppe_lock);
  502. if (hash < sram_num_entries) {
  503. u32 *hwe = ppe->foe + hash * sizeof(struct airoha_foe_entry);
  504. bool ppe2 = hash >= PPE_SRAM_NUM_ENTRIES;
  505. struct airoha_eth *eth = ppe->eth;
  506. u32 val;
  507. int i;
  508. airoha_fe_wr(ppe->eth, REG_PPE_RAM_CTRL(ppe2),
  509. FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |
  510. PPE_SRAM_CTRL_REQ_MASK);
  511. if (read_poll_timeout_atomic(airoha_fe_rr, val,
  512. val & PPE_SRAM_CTRL_ACK_MASK,
  513. 10, 100, false, eth,
  514. REG_PPE_RAM_CTRL(ppe2)))
  515. return NULL;
  516. for (i = 0; i < sizeof(struct airoha_foe_entry) / sizeof(*hwe);
  517. i++)
  518. hwe[i] = airoha_fe_rr(eth,
  519. REG_PPE_RAM_ENTRY(ppe2, i));
  520. }
  521. return ppe->foe + hash * sizeof(struct airoha_foe_entry);
  522. }
  523. struct airoha_foe_entry *airoha_ppe_foe_get_entry(struct airoha_ppe *ppe,
  524. u32 hash)
  525. {
  526. struct airoha_foe_entry *hwe;
  527. spin_lock_bh(&ppe_lock);
  528. hwe = airoha_ppe_foe_get_entry_locked(ppe, hash);
  529. spin_unlock_bh(&ppe_lock);
  530. return hwe;
  531. }
  532. static bool airoha_ppe_foe_compare_entry(struct airoha_flow_table_entry *e,
  533. struct airoha_foe_entry *hwe)
  534. {
  535. int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, e->data.ib1);
  536. int len;
  537. if ((hwe->ib1 ^ e->data.ib1) & AIROHA_FOE_IB1_BIND_UDP)
  538. return false;
  539. if (type > PPE_PKT_TYPE_IPV4_DSLITE)
  540. len = offsetof(struct airoha_foe_entry, ipv6.data);
  541. else
  542. len = offsetof(struct airoha_foe_entry, ipv4.ib2);
  543. return !memcmp(&e->data.d, &hwe->d, len - sizeof(hwe->ib1));
  544. }
  545. static int airoha_ppe_foe_commit_sram_entry(struct airoha_ppe *ppe, u32 hash)
  546. {
  547. struct airoha_foe_entry *hwe = ppe->foe + hash * sizeof(*hwe);
  548. bool ppe2 = hash >= PPE_SRAM_NUM_ENTRIES;
  549. u32 *ptr = (u32 *)hwe, val;
  550. int i;
  551. for (i = 0; i < sizeof(*hwe) / sizeof(*ptr); i++)
  552. airoha_fe_wr(ppe->eth, REG_PPE_RAM_ENTRY(ppe2, i), ptr[i]);
  553. wmb();
  554. airoha_fe_wr(ppe->eth, REG_PPE_RAM_CTRL(ppe2),
  555. FIELD_PREP(PPE_SRAM_CTRL_ENTRY_MASK, hash) |
  556. PPE_SRAM_CTRL_WR_MASK | PPE_SRAM_CTRL_REQ_MASK);
  557. return read_poll_timeout_atomic(airoha_fe_rr, val,
  558. val & PPE_SRAM_CTRL_ACK_MASK,
  559. 10, 100, false, ppe->eth,
  560. REG_PPE_RAM_CTRL(ppe2));
  561. }
  562. static int airoha_ppe_foe_commit_entry(struct airoha_ppe *ppe,
  563. struct airoha_foe_entry *e,
  564. u32 hash, bool rx_wlan)
  565. {
  566. u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);
  567. struct airoha_foe_entry *hwe = ppe->foe + hash * sizeof(*hwe);
  568. u32 ts = airoha_ppe_get_timestamp(ppe);
  569. struct airoha_eth *eth = ppe->eth;
  570. struct airoha_npu *npu;
  571. int err = 0;
  572. memcpy(&hwe->d, &e->d, sizeof(*hwe) - sizeof(hwe->ib1));
  573. wmb();
  574. e->ib1 &= ~AIROHA_FOE_IB1_BIND_TIMESTAMP;
  575. e->ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_TIMESTAMP, ts);
  576. hwe->ib1 = e->ib1;
  577. rcu_read_lock();
  578. npu = rcu_dereference(eth->npu);
  579. if (!npu) {
  580. err = -ENODEV;
  581. goto unlock;
  582. }
  583. if (!rx_wlan)
  584. airoha_ppe_foe_flow_stats_update(ppe, npu, hwe, hash);
  585. if (hash < sram_num_entries)
  586. err = airoha_ppe_foe_commit_sram_entry(ppe, hash);
  587. unlock:
  588. rcu_read_unlock();
  589. return err;
  590. }
  591. static void airoha_ppe_foe_remove_flow(struct airoha_ppe *ppe,
  592. struct airoha_flow_table_entry *e)
  593. {
  594. lockdep_assert_held(&ppe_lock);
  595. hlist_del_init(&e->list);
  596. if (e->hash != 0xffff) {
  597. e->data.ib1 &= ~AIROHA_FOE_IB1_BIND_STATE;
  598. e->data.ib1 |= FIELD_PREP(AIROHA_FOE_IB1_BIND_STATE,
  599. AIROHA_FOE_STATE_INVALID);
  600. airoha_ppe_foe_commit_entry(ppe, &e->data, e->hash, false);
  601. e->hash = 0xffff;
  602. }
  603. if (e->type == FLOW_TYPE_L2_SUBFLOW) {
  604. hlist_del_init(&e->l2_subflow_node);
  605. kfree(e);
  606. }
  607. }
  608. static void airoha_ppe_foe_remove_l2_flow(struct airoha_ppe *ppe,
  609. struct airoha_flow_table_entry *e)
  610. {
  611. struct hlist_head *head = &e->l2_flows;
  612. struct hlist_node *n;
  613. lockdep_assert_held(&ppe_lock);
  614. rhashtable_remove_fast(&ppe->l2_flows, &e->l2_node,
  615. airoha_l2_flow_table_params);
  616. hlist_for_each_entry_safe(e, n, head, l2_subflow_node)
  617. airoha_ppe_foe_remove_flow(ppe, e);
  618. }
  619. static void airoha_ppe_foe_flow_remove_entry(struct airoha_ppe *ppe,
  620. struct airoha_flow_table_entry *e)
  621. {
  622. spin_lock_bh(&ppe_lock);
  623. if (e->type == FLOW_TYPE_L2)
  624. airoha_ppe_foe_remove_l2_flow(ppe, e);
  625. else
  626. airoha_ppe_foe_remove_flow(ppe, e);
  627. spin_unlock_bh(&ppe_lock);
  628. }
  629. static int
  630. airoha_ppe_foe_commit_subflow_entry(struct airoha_ppe *ppe,
  631. struct airoha_flow_table_entry *e,
  632. u32 hash, bool rx_wlan)
  633. {
  634. u32 mask = AIROHA_FOE_IB1_BIND_PACKET_TYPE | AIROHA_FOE_IB1_BIND_UDP;
  635. struct airoha_foe_entry *hwe_p, hwe;
  636. struct airoha_flow_table_entry *f;
  637. int type;
  638. hwe_p = airoha_ppe_foe_get_entry_locked(ppe, hash);
  639. if (!hwe_p)
  640. return -EINVAL;
  641. f = kzalloc_obj(*f, GFP_ATOMIC);
  642. if (!f)
  643. return -ENOMEM;
  644. hlist_add_head(&f->l2_subflow_node, &e->l2_flows);
  645. f->type = FLOW_TYPE_L2_SUBFLOW;
  646. f->hash = hash;
  647. memcpy(&hwe, hwe_p, sizeof(*hwe_p));
  648. hwe.ib1 = (hwe.ib1 & mask) | (e->data.ib1 & ~mask);
  649. type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, hwe.ib1);
  650. if (type >= PPE_PKT_TYPE_IPV6_ROUTE_3T) {
  651. memcpy(&hwe.ipv6.l2, &e->data.bridge.l2, sizeof(hwe.ipv6.l2));
  652. hwe.ipv6.ib2 = e->data.bridge.ib2;
  653. /* setting smac_id to 0xf instruct the hw to keep original
  654. * source mac address
  655. */
  656. hwe.ipv6.l2.src_mac_hi = FIELD_PREP(AIROHA_FOE_MAC_SMAC_ID,
  657. 0xf);
  658. } else {
  659. memcpy(&hwe.bridge.l2, &e->data.bridge.l2,
  660. sizeof(hwe.bridge.l2));
  661. hwe.bridge.ib2 = e->data.bridge.ib2;
  662. if (type == PPE_PKT_TYPE_IPV4_HNAPT)
  663. memcpy(&hwe.ipv4.new_tuple, &hwe.ipv4.orig_tuple,
  664. sizeof(hwe.ipv4.new_tuple));
  665. }
  666. hwe.bridge.data = e->data.bridge.data;
  667. airoha_ppe_foe_commit_entry(ppe, &hwe, hash, rx_wlan);
  668. return 0;
  669. }
  670. static void airoha_ppe_foe_insert_entry(struct airoha_ppe *ppe,
  671. struct sk_buff *skb,
  672. u32 hash, bool rx_wlan)
  673. {
  674. struct airoha_flow_table_entry *e;
  675. struct airoha_foe_bridge br = {};
  676. struct airoha_foe_entry *hwe;
  677. bool commit_done = false;
  678. struct hlist_node *n;
  679. u32 index, state;
  680. spin_lock_bh(&ppe_lock);
  681. hwe = airoha_ppe_foe_get_entry_locked(ppe, hash);
  682. if (!hwe)
  683. goto unlock;
  684. state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe->ib1);
  685. if (state == AIROHA_FOE_STATE_BIND)
  686. goto unlock;
  687. index = airoha_ppe_foe_get_entry_hash(ppe, hwe);
  688. hlist_for_each_entry_safe(e, n, &ppe->foe_flow[index], list) {
  689. if (e->type == FLOW_TYPE_L2_SUBFLOW) {
  690. state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, hwe->ib1);
  691. if (state != AIROHA_FOE_STATE_BIND) {
  692. e->hash = 0xffff;
  693. airoha_ppe_foe_remove_flow(ppe, e);
  694. }
  695. continue;
  696. }
  697. if (!airoha_ppe_foe_compare_entry(e, hwe))
  698. continue;
  699. airoha_ppe_foe_commit_entry(ppe, &e->data, hash, rx_wlan);
  700. commit_done = true;
  701. e->hash = hash;
  702. }
  703. if (commit_done)
  704. goto unlock;
  705. airoha_ppe_foe_set_bridge_addrs(&br, eth_hdr(skb));
  706. e = rhashtable_lookup_fast(&ppe->l2_flows, &br,
  707. airoha_l2_flow_table_params);
  708. if (e)
  709. airoha_ppe_foe_commit_subflow_entry(ppe, e, hash, rx_wlan);
  710. unlock:
  711. spin_unlock_bh(&ppe_lock);
  712. }
  713. static int
  714. airoha_ppe_foe_l2_flow_commit_entry(struct airoha_ppe *ppe,
  715. struct airoha_flow_table_entry *e)
  716. {
  717. struct airoha_flow_table_entry *prev;
  718. e->type = FLOW_TYPE_L2;
  719. prev = rhashtable_lookup_get_insert_fast(&ppe->l2_flows, &e->l2_node,
  720. airoha_l2_flow_table_params);
  721. if (!prev)
  722. return 0;
  723. if (IS_ERR(prev))
  724. return PTR_ERR(prev);
  725. return rhashtable_replace_fast(&ppe->l2_flows, &prev->l2_node,
  726. &e->l2_node,
  727. airoha_l2_flow_table_params);
  728. }
  729. static int airoha_ppe_foe_flow_commit_entry(struct airoha_ppe *ppe,
  730. struct airoha_flow_table_entry *e)
  731. {
  732. int type = FIELD_GET(AIROHA_FOE_IB1_BIND_PACKET_TYPE, e->data.ib1);
  733. u32 hash;
  734. if (type == PPE_PKT_TYPE_BRIDGE)
  735. return airoha_ppe_foe_l2_flow_commit_entry(ppe, e);
  736. hash = airoha_ppe_foe_get_entry_hash(ppe, &e->data);
  737. e->type = FLOW_TYPE_L4;
  738. e->hash = 0xffff;
  739. spin_lock_bh(&ppe_lock);
  740. hlist_add_head(&e->list, &ppe->foe_flow[hash]);
  741. spin_unlock_bh(&ppe_lock);
  742. return 0;
  743. }
  744. static int airoha_ppe_get_entry_idle_time(struct airoha_ppe *ppe, u32 ib1)
  745. {
  746. u32 state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, ib1);
  747. u32 ts, ts_mask, now = airoha_ppe_get_timestamp(ppe);
  748. int idle;
  749. if (state == AIROHA_FOE_STATE_BIND) {
  750. ts = FIELD_GET(AIROHA_FOE_IB1_BIND_TIMESTAMP, ib1);
  751. ts_mask = AIROHA_FOE_IB1_BIND_TIMESTAMP;
  752. } else {
  753. ts = FIELD_GET(AIROHA_FOE_IB1_UNBIND_TIMESTAMP, ib1);
  754. now = FIELD_GET(AIROHA_FOE_IB1_UNBIND_TIMESTAMP, now);
  755. ts_mask = AIROHA_FOE_IB1_UNBIND_TIMESTAMP;
  756. }
  757. idle = now - ts;
  758. return idle < 0 ? idle + ts_mask + 1 : idle;
  759. }
  760. static void
  761. airoha_ppe_foe_flow_l2_entry_update(struct airoha_ppe *ppe,
  762. struct airoha_flow_table_entry *e)
  763. {
  764. int min_idle = airoha_ppe_get_entry_idle_time(ppe, e->data.ib1);
  765. struct airoha_flow_table_entry *iter;
  766. struct hlist_node *n;
  767. lockdep_assert_held(&ppe_lock);
  768. hlist_for_each_entry_safe(iter, n, &e->l2_flows, l2_subflow_node) {
  769. struct airoha_foe_entry *hwe;
  770. u32 ib1, state;
  771. int idle;
  772. hwe = airoha_ppe_foe_get_entry_locked(ppe, iter->hash);
  773. if (!hwe)
  774. continue;
  775. ib1 = READ_ONCE(hwe->ib1);
  776. state = FIELD_GET(AIROHA_FOE_IB1_BIND_STATE, ib1);
  777. if (state != AIROHA_FOE_STATE_BIND) {
  778. iter->hash = 0xffff;
  779. airoha_ppe_foe_remove_flow(ppe, iter);
  780. continue;
  781. }
  782. idle = airoha_ppe_get_entry_idle_time(ppe, ib1);
  783. if (idle >= min_idle)
  784. continue;
  785. min_idle = idle;
  786. e->data.ib1 &= ~AIROHA_FOE_IB1_BIND_TIMESTAMP;
  787. e->data.ib1 |= ib1 & AIROHA_FOE_IB1_BIND_TIMESTAMP;
  788. }
  789. }
  790. static void airoha_ppe_foe_flow_entry_update(struct airoha_ppe *ppe,
  791. struct airoha_flow_table_entry *e)
  792. {
  793. struct airoha_foe_entry *hwe_p, hwe = {};
  794. spin_lock_bh(&ppe_lock);
  795. if (e->type == FLOW_TYPE_L2) {
  796. airoha_ppe_foe_flow_l2_entry_update(ppe, e);
  797. goto unlock;
  798. }
  799. if (e->hash == 0xffff)
  800. goto unlock;
  801. hwe_p = airoha_ppe_foe_get_entry_locked(ppe, e->hash);
  802. if (!hwe_p)
  803. goto unlock;
  804. memcpy(&hwe, hwe_p, sizeof(*hwe_p));
  805. if (!airoha_ppe_foe_compare_entry(e, &hwe)) {
  806. e->hash = 0xffff;
  807. goto unlock;
  808. }
  809. e->data.ib1 = hwe.ib1;
  810. unlock:
  811. spin_unlock_bh(&ppe_lock);
  812. }
  813. static int airoha_ppe_entry_idle_time(struct airoha_ppe *ppe,
  814. struct airoha_flow_table_entry *e)
  815. {
  816. airoha_ppe_foe_flow_entry_update(ppe, e);
  817. return airoha_ppe_get_entry_idle_time(ppe, e->data.ib1);
  818. }
  819. static int airoha_ppe_flow_offload_replace(struct airoha_eth *eth,
  820. struct flow_cls_offload *f)
  821. {
  822. struct flow_rule *rule = flow_cls_offload_flow_rule(f);
  823. struct airoha_flow_table_entry *e;
  824. struct airoha_flow_data data = {};
  825. struct net_device *odev = NULL;
  826. struct flow_action_entry *act;
  827. struct airoha_foe_entry hwe;
  828. int err, i, offload_type;
  829. u16 addr_type = 0;
  830. u8 l4proto = 0;
  831. if (rhashtable_lookup(&eth->flow_table, &f->cookie,
  832. airoha_flow_table_params))
  833. return -EEXIST;
  834. if (!flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_META))
  835. return -EOPNOTSUPP;
  836. if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_CONTROL)) {
  837. struct flow_match_control match;
  838. flow_rule_match_control(rule, &match);
  839. addr_type = match.key->addr_type;
  840. if (flow_rule_has_control_flags(match.mask->flags,
  841. f->common.extack))
  842. return -EOPNOTSUPP;
  843. } else {
  844. return -EOPNOTSUPP;
  845. }
  846. if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_BASIC)) {
  847. struct flow_match_basic match;
  848. flow_rule_match_basic(rule, &match);
  849. l4proto = match.key->ip_proto;
  850. } else {
  851. return -EOPNOTSUPP;
  852. }
  853. switch (addr_type) {
  854. case 0:
  855. offload_type = PPE_PKT_TYPE_BRIDGE;
  856. if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ETH_ADDRS)) {
  857. struct flow_match_eth_addrs match;
  858. flow_rule_match_eth_addrs(rule, &match);
  859. memcpy(data.eth.h_dest, match.key->dst, ETH_ALEN);
  860. memcpy(data.eth.h_source, match.key->src, ETH_ALEN);
  861. } else {
  862. return -EOPNOTSUPP;
  863. }
  864. break;
  865. case FLOW_DISSECTOR_KEY_IPV4_ADDRS:
  866. offload_type = PPE_PKT_TYPE_IPV4_HNAPT;
  867. break;
  868. case FLOW_DISSECTOR_KEY_IPV6_ADDRS:
  869. offload_type = PPE_PKT_TYPE_IPV6_ROUTE_5T;
  870. break;
  871. default:
  872. return -EOPNOTSUPP;
  873. }
  874. flow_action_for_each(i, act, &rule->action) {
  875. switch (act->id) {
  876. case FLOW_ACTION_MANGLE:
  877. if (offload_type == PPE_PKT_TYPE_BRIDGE)
  878. return -EOPNOTSUPP;
  879. if (act->mangle.htype == FLOW_ACT_MANGLE_HDR_TYPE_ETH)
  880. airoha_ppe_flow_mangle_eth(act, &data.eth);
  881. break;
  882. case FLOW_ACTION_REDIRECT:
  883. odev = act->dev;
  884. break;
  885. case FLOW_ACTION_CSUM:
  886. break;
  887. case FLOW_ACTION_VLAN_PUSH:
  888. if (data.vlan.num == 2 ||
  889. act->vlan.proto != htons(ETH_P_8021Q))
  890. return -EOPNOTSUPP;
  891. data.vlan.hdr[data.vlan.num].id = act->vlan.vid;
  892. data.vlan.hdr[data.vlan.num].proto = act->vlan.proto;
  893. data.vlan.num++;
  894. break;
  895. case FLOW_ACTION_VLAN_POP:
  896. break;
  897. case FLOW_ACTION_PPPOE_PUSH:
  898. if (data.pppoe.num == 1 || data.vlan.num == 2)
  899. return -EOPNOTSUPP;
  900. data.pppoe.sid = act->pppoe.sid;
  901. data.pppoe.num++;
  902. break;
  903. default:
  904. return -EOPNOTSUPP;
  905. }
  906. }
  907. if (!is_valid_ether_addr(data.eth.h_source) ||
  908. !is_valid_ether_addr(data.eth.h_dest))
  909. return -EINVAL;
  910. err = airoha_ppe_foe_entry_prepare(eth, &hwe, odev, offload_type,
  911. &data, l4proto);
  912. if (err)
  913. return err;
  914. if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_PORTS)) {
  915. struct flow_match_ports ports;
  916. if (offload_type == PPE_PKT_TYPE_BRIDGE)
  917. return -EOPNOTSUPP;
  918. flow_rule_match_ports(rule, &ports);
  919. data.src_port = ports.key->src;
  920. data.dst_port = ports.key->dst;
  921. } else if (offload_type != PPE_PKT_TYPE_BRIDGE) {
  922. return -EOPNOTSUPP;
  923. }
  924. if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
  925. struct flow_match_ipv4_addrs addrs;
  926. flow_rule_match_ipv4_addrs(rule, &addrs);
  927. data.v4.src_addr = addrs.key->src;
  928. data.v4.dst_addr = addrs.key->dst;
  929. airoha_ppe_foe_entry_set_ipv4_tuple(&hwe, &data, false);
  930. }
  931. if (addr_type == FLOW_DISSECTOR_KEY_IPV6_ADDRS) {
  932. struct flow_match_ipv6_addrs addrs;
  933. flow_rule_match_ipv6_addrs(rule, &addrs);
  934. data.v6.src_addr = addrs.key->src;
  935. data.v6.dst_addr = addrs.key->dst;
  936. airoha_ppe_foe_entry_set_ipv6_tuple(&hwe, &data);
  937. }
  938. flow_action_for_each(i, act, &rule->action) {
  939. if (act->id != FLOW_ACTION_MANGLE)
  940. continue;
  941. if (offload_type == PPE_PKT_TYPE_BRIDGE)
  942. return -EOPNOTSUPP;
  943. switch (act->mangle.htype) {
  944. case FLOW_ACT_MANGLE_HDR_TYPE_TCP:
  945. case FLOW_ACT_MANGLE_HDR_TYPE_UDP:
  946. err = airoha_ppe_flow_mangle_ports(act, &data);
  947. break;
  948. case FLOW_ACT_MANGLE_HDR_TYPE_IP4:
  949. err = airoha_ppe_flow_mangle_ipv4(act, &data);
  950. break;
  951. case FLOW_ACT_MANGLE_HDR_TYPE_ETH:
  952. /* handled earlier */
  953. break;
  954. default:
  955. return -EOPNOTSUPP;
  956. }
  957. if (err)
  958. return err;
  959. }
  960. if (addr_type == FLOW_DISSECTOR_KEY_IPV4_ADDRS) {
  961. err = airoha_ppe_foe_entry_set_ipv4_tuple(&hwe, &data, true);
  962. if (err)
  963. return err;
  964. }
  965. e = kzalloc_obj(*e);
  966. if (!e)
  967. return -ENOMEM;
  968. e->cookie = f->cookie;
  969. memcpy(&e->data, &hwe, sizeof(e->data));
  970. err = airoha_ppe_foe_flow_commit_entry(eth->ppe, e);
  971. if (err)
  972. goto free_entry;
  973. err = rhashtable_insert_fast(&eth->flow_table, &e->node,
  974. airoha_flow_table_params);
  975. if (err < 0)
  976. goto remove_foe_entry;
  977. return 0;
  978. remove_foe_entry:
  979. airoha_ppe_foe_flow_remove_entry(eth->ppe, e);
  980. free_entry:
  981. kfree(e);
  982. return err;
  983. }
  984. static int airoha_ppe_flow_offload_destroy(struct airoha_eth *eth,
  985. struct flow_cls_offload *f)
  986. {
  987. struct airoha_flow_table_entry *e;
  988. e = rhashtable_lookup(&eth->flow_table, &f->cookie,
  989. airoha_flow_table_params);
  990. if (!e)
  991. return -ENOENT;
  992. airoha_ppe_foe_flow_remove_entry(eth->ppe, e);
  993. rhashtable_remove_fast(&eth->flow_table, &e->node,
  994. airoha_flow_table_params);
  995. kfree(e);
  996. return 0;
  997. }
  998. void airoha_ppe_foe_entry_get_stats(struct airoha_ppe *ppe, u32 hash,
  999. struct airoha_foe_stats64 *stats)
  1000. {
  1001. struct airoha_eth *eth = ppe->eth;
  1002. int ppe_num_stats_entries;
  1003. struct airoha_npu *npu;
  1004. u32 index;
  1005. ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);
  1006. if (ppe_num_stats_entries < 0)
  1007. return;
  1008. if (airoha_ppe_foe_get_flow_stats_index(ppe, hash, &index))
  1009. return;
  1010. if (index >= ppe_num_stats_entries)
  1011. return;
  1012. rcu_read_lock();
  1013. npu = rcu_dereference(eth->npu);
  1014. if (npu) {
  1015. u64 packets = ppe->foe_stats[index].packets;
  1016. u64 bytes = ppe->foe_stats[index].bytes;
  1017. struct airoha_foe_stats npu_stats;
  1018. memcpy_fromio(&npu_stats, &npu->stats[index],
  1019. sizeof(*npu->stats));
  1020. stats->packets = packets << 32 | npu_stats.packets;
  1021. stats->bytes = bytes << 32 | npu_stats.bytes;
  1022. }
  1023. rcu_read_unlock();
  1024. }
  1025. static int airoha_ppe_flow_offload_stats(struct airoha_eth *eth,
  1026. struct flow_cls_offload *f)
  1027. {
  1028. struct airoha_flow_table_entry *e;
  1029. u32 idle;
  1030. e = rhashtable_lookup(&eth->flow_table, &f->cookie,
  1031. airoha_flow_table_params);
  1032. if (!e)
  1033. return -ENOENT;
  1034. idle = airoha_ppe_entry_idle_time(eth->ppe, e);
  1035. f->stats.lastused = jiffies - idle * HZ;
  1036. if (e->hash != 0xffff) {
  1037. struct airoha_foe_stats64 stats = {};
  1038. airoha_ppe_foe_entry_get_stats(eth->ppe, e->hash, &stats);
  1039. f->stats.pkts += (stats.packets - e->stats.packets);
  1040. f->stats.bytes += (stats.bytes - e->stats.bytes);
  1041. e->stats = stats;
  1042. }
  1043. return 0;
  1044. }
  1045. static int airoha_ppe_flow_offload_cmd(struct airoha_eth *eth,
  1046. struct flow_cls_offload *f)
  1047. {
  1048. switch (f->command) {
  1049. case FLOW_CLS_REPLACE:
  1050. return airoha_ppe_flow_offload_replace(eth, f);
  1051. case FLOW_CLS_DESTROY:
  1052. return airoha_ppe_flow_offload_destroy(eth, f);
  1053. case FLOW_CLS_STATS:
  1054. return airoha_ppe_flow_offload_stats(eth, f);
  1055. default:
  1056. break;
  1057. }
  1058. return -EOPNOTSUPP;
  1059. }
  1060. static int airoha_ppe_flush_sram_entries(struct airoha_ppe *ppe)
  1061. {
  1062. u32 sram_num_entries = airoha_ppe_get_total_sram_num_entries(ppe);
  1063. struct airoha_foe_entry *hwe = ppe->foe;
  1064. int i, err = 0;
  1065. for (i = 0; i < sram_num_entries; i++) {
  1066. int err;
  1067. memset(&hwe[i], 0, sizeof(*hwe));
  1068. err = airoha_ppe_foe_commit_sram_entry(ppe, i);
  1069. if (err)
  1070. break;
  1071. }
  1072. return err;
  1073. }
  1074. static struct airoha_npu *airoha_ppe_npu_get(struct airoha_eth *eth)
  1075. {
  1076. struct airoha_npu *npu = airoha_npu_get(eth->dev);
  1077. if (IS_ERR(npu)) {
  1078. request_module("airoha-npu");
  1079. npu = airoha_npu_get(eth->dev);
  1080. }
  1081. return npu;
  1082. }
  1083. static int airoha_ppe_offload_setup(struct airoha_eth *eth)
  1084. {
  1085. struct airoha_npu *npu = airoha_ppe_npu_get(eth);
  1086. struct airoha_ppe *ppe = eth->ppe;
  1087. int err, ppe_num_stats_entries;
  1088. if (IS_ERR(npu))
  1089. return PTR_ERR(npu);
  1090. err = npu->ops.ppe_init(npu);
  1091. if (err)
  1092. goto error_npu_put;
  1093. ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);
  1094. if (ppe_num_stats_entries > 0) {
  1095. err = npu->ops.ppe_init_stats(npu, ppe->foe_stats_dma,
  1096. ppe_num_stats_entries);
  1097. if (err)
  1098. goto error_npu_put;
  1099. }
  1100. airoha_ppe_hw_init(ppe);
  1101. airoha_ppe_foe_flow_stats_reset(ppe, npu);
  1102. rcu_assign_pointer(eth->npu, npu);
  1103. synchronize_rcu();
  1104. return 0;
  1105. error_npu_put:
  1106. airoha_npu_put(npu);
  1107. return err;
  1108. }
  1109. int airoha_ppe_setup_tc_block_cb(struct airoha_ppe_dev *dev, void *type_data)
  1110. {
  1111. struct airoha_ppe *ppe = dev->priv;
  1112. struct airoha_eth *eth = ppe->eth;
  1113. int err = 0;
  1114. /* Netfilter flowtable can try to offload flower rules while not all
  1115. * the net_devices are registered or initialized. Delay offloading
  1116. * until all net_devices are registered in the system.
  1117. */
  1118. if (!test_bit(DEV_STATE_REGISTERED, &eth->state))
  1119. return -EBUSY;
  1120. mutex_lock(&flow_offload_mutex);
  1121. if (!eth->npu)
  1122. err = airoha_ppe_offload_setup(eth);
  1123. if (!err)
  1124. err = airoha_ppe_flow_offload_cmd(eth, type_data);
  1125. mutex_unlock(&flow_offload_mutex);
  1126. return err;
  1127. }
  1128. void airoha_ppe_check_skb(struct airoha_ppe_dev *dev, struct sk_buff *skb,
  1129. u16 hash, bool rx_wlan)
  1130. {
  1131. struct airoha_ppe *ppe = dev->priv;
  1132. u32 ppe_hash_mask = airoha_ppe_get_total_num_entries(ppe) - 1;
  1133. u16 now, diff;
  1134. if (hash > ppe_hash_mask)
  1135. return;
  1136. now = (u16)jiffies;
  1137. diff = now - ppe->foe_check_time[hash];
  1138. if (diff < HZ / 10)
  1139. return;
  1140. ppe->foe_check_time[hash] = now;
  1141. airoha_ppe_foe_insert_entry(ppe, skb, hash, rx_wlan);
  1142. }
  1143. void airoha_ppe_init_upd_mem(struct airoha_gdm_port *port)
  1144. {
  1145. struct airoha_eth *eth = port->qdma->eth;
  1146. struct net_device *dev = port->dev;
  1147. const u8 *addr = dev->dev_addr;
  1148. u32 val;
  1149. val = (addr[2] << 24) | (addr[3] << 16) | (addr[4] << 8) | addr[5];
  1150. airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);
  1151. airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),
  1152. FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port->id) |
  1153. PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);
  1154. val = (addr[0] << 8) | addr[1];
  1155. airoha_fe_wr(eth, REG_UPDMEM_DATA(0), val);
  1156. airoha_fe_wr(eth, REG_UPDMEM_CTRL(0),
  1157. FIELD_PREP(PPE_UPDMEM_ADDR_MASK, port->id) |
  1158. FIELD_PREP(PPE_UPDMEM_OFFSET_MASK, 1) |
  1159. PPE_UPDMEM_WR_MASK | PPE_UPDMEM_REQ_MASK);
  1160. }
  1161. struct airoha_ppe_dev *airoha_ppe_get_dev(struct device *dev)
  1162. {
  1163. struct platform_device *pdev;
  1164. struct device_node *np;
  1165. struct airoha_eth *eth;
  1166. np = of_parse_phandle(dev->of_node, "airoha,eth", 0);
  1167. if (!np)
  1168. return ERR_PTR(-ENODEV);
  1169. pdev = of_find_device_by_node(np);
  1170. if (!pdev) {
  1171. dev_err(dev, "cannot find device node %s\n", np->name);
  1172. of_node_put(np);
  1173. return ERR_PTR(-ENODEV);
  1174. }
  1175. of_node_put(np);
  1176. if (!try_module_get(THIS_MODULE)) {
  1177. dev_err(dev, "failed to get the device driver module\n");
  1178. goto error_pdev_put;
  1179. }
  1180. eth = platform_get_drvdata(pdev);
  1181. if (!eth)
  1182. goto error_module_put;
  1183. if (!device_link_add(dev, &pdev->dev, DL_FLAG_AUTOREMOVE_SUPPLIER)) {
  1184. dev_err(&pdev->dev,
  1185. "failed to create device link to consumer %s\n",
  1186. dev_name(dev));
  1187. goto error_module_put;
  1188. }
  1189. return &eth->ppe->dev;
  1190. error_module_put:
  1191. module_put(THIS_MODULE);
  1192. error_pdev_put:
  1193. platform_device_put(pdev);
  1194. return ERR_PTR(-ENODEV);
  1195. }
  1196. EXPORT_SYMBOL_GPL(airoha_ppe_get_dev);
  1197. void airoha_ppe_put_dev(struct airoha_ppe_dev *dev)
  1198. {
  1199. struct airoha_ppe *ppe = dev->priv;
  1200. struct airoha_eth *eth = ppe->eth;
  1201. module_put(THIS_MODULE);
  1202. put_device(eth->dev);
  1203. }
  1204. EXPORT_SYMBOL_GPL(airoha_ppe_put_dev);
  1205. int airoha_ppe_init(struct airoha_eth *eth)
  1206. {
  1207. int foe_size, err, ppe_num_stats_entries;
  1208. u32 ppe_num_entries;
  1209. struct airoha_ppe *ppe;
  1210. ppe = devm_kzalloc(eth->dev, sizeof(*ppe), GFP_KERNEL);
  1211. if (!ppe)
  1212. return -ENOMEM;
  1213. ppe->dev.ops.setup_tc_block_cb = airoha_ppe_setup_tc_block_cb;
  1214. ppe->dev.ops.check_skb = airoha_ppe_check_skb;
  1215. ppe->dev.priv = ppe;
  1216. ppe->eth = eth;
  1217. eth->ppe = ppe;
  1218. ppe_num_entries = airoha_ppe_get_total_num_entries(ppe);
  1219. foe_size = ppe_num_entries * sizeof(struct airoha_foe_entry);
  1220. ppe->foe = dmam_alloc_coherent(eth->dev, foe_size, &ppe->foe_dma,
  1221. GFP_KERNEL);
  1222. if (!ppe->foe)
  1223. return -ENOMEM;
  1224. ppe->foe_flow = devm_kzalloc(eth->dev,
  1225. ppe_num_entries * sizeof(*ppe->foe_flow),
  1226. GFP_KERNEL);
  1227. if (!ppe->foe_flow)
  1228. return -ENOMEM;
  1229. ppe_num_stats_entries = airoha_ppe_get_total_num_stats_entries(ppe);
  1230. if (ppe_num_stats_entries > 0) {
  1231. foe_size = ppe_num_stats_entries * sizeof(*ppe->foe_stats);
  1232. ppe->foe_stats = dmam_alloc_coherent(eth->dev, foe_size,
  1233. &ppe->foe_stats_dma,
  1234. GFP_KERNEL);
  1235. if (!ppe->foe_stats)
  1236. return -ENOMEM;
  1237. }
  1238. ppe->foe_check_time = devm_kzalloc(eth->dev, ppe_num_entries,
  1239. GFP_KERNEL);
  1240. if (!ppe->foe_check_time)
  1241. return -ENOMEM;
  1242. err = airoha_ppe_flush_sram_entries(ppe);
  1243. if (err)
  1244. return err;
  1245. err = rhashtable_init(&eth->flow_table, &airoha_flow_table_params);
  1246. if (err)
  1247. return err;
  1248. err = rhashtable_init(&ppe->l2_flows, &airoha_l2_flow_table_params);
  1249. if (err)
  1250. goto error_flow_table_destroy;
  1251. err = airoha_ppe_debugfs_init(ppe);
  1252. if (err)
  1253. goto error_l2_flow_table_destroy;
  1254. return 0;
  1255. error_l2_flow_table_destroy:
  1256. rhashtable_destroy(&ppe->l2_flows);
  1257. error_flow_table_destroy:
  1258. rhashtable_destroy(&eth->flow_table);
  1259. return err;
  1260. }
  1261. void airoha_ppe_deinit(struct airoha_eth *eth)
  1262. {
  1263. struct airoha_npu *npu;
  1264. mutex_lock(&flow_offload_mutex);
  1265. npu = rcu_replace_pointer(eth->npu, NULL,
  1266. lockdep_is_held(&flow_offload_mutex));
  1267. if (npu) {
  1268. npu->ops.ppe_deinit(npu);
  1269. airoha_npu_put(npu);
  1270. }
  1271. mutex_unlock(&flow_offload_mutex);
  1272. rhashtable_destroy(&eth->ppe->l2_flows);
  1273. rhashtable_destroy(&eth->flow_table);
  1274. debugfs_remove(eth->ppe->debugfs_dir);
  1275. }