mchp48l640.c 9.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for Microchip 48L640 64 Kb SPI Serial EERAM
  4. *
  5. * Copyright Heiko Schocher <hs@denx.de>
  6. *
  7. * datasheet: http://ww1.microchip.com/downloads/en/DeviceDoc/20006055B.pdf
  8. *
  9. * we set continuous mode but reading/writing more bytes than
  10. * pagesize seems to bring chip into state where readden values
  11. * are wrong ... no idea why.
  12. *
  13. */
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <linux/jiffies.h>
  17. #include <linux/module.h>
  18. #include <linux/mtd/mtd.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <linux/mutex.h>
  21. #include <linux/sched.h>
  22. #include <linux/sizes.h>
  23. #include <linux/spi/flash.h>
  24. #include <linux/spi/spi.h>
  25. #include <linux/of.h>
  26. #include <linux/string_choices.h>
  27. struct mchp48_caps {
  28. unsigned int size;
  29. unsigned int page_size;
  30. bool auto_disable_wel;
  31. };
  32. struct mchp48l640_flash {
  33. struct spi_device *spi;
  34. struct mutex lock;
  35. struct mtd_info mtd;
  36. const struct mchp48_caps *caps;
  37. };
  38. #define MCHP48L640_CMD_WREN 0x06
  39. #define MCHP48L640_CMD_WRDI 0x04
  40. #define MCHP48L640_CMD_WRITE 0x02
  41. #define MCHP48L640_CMD_READ 0x03
  42. #define MCHP48L640_CMD_WRSR 0x01
  43. #define MCHP48L640_CMD_RDSR 0x05
  44. #define MCHP48L640_STATUS_RDY 0x01
  45. #define MCHP48L640_STATUS_WEL 0x02
  46. #define MCHP48L640_STATUS_BP0 0x04
  47. #define MCHP48L640_STATUS_BP1 0x08
  48. #define MCHP48L640_STATUS_SWM 0x10
  49. #define MCHP48L640_STATUS_PRO 0x20
  50. #define MCHP48L640_STATUS_ASE 0x40
  51. #define MCHP48L640_TIMEOUT 100
  52. #define MAX_CMD_SIZE 0x10
  53. #define to_mchp48l640_flash(x) container_of(x, struct mchp48l640_flash, mtd)
  54. static int mchp48l640_mkcmd(struct mchp48l640_flash *flash, u8 cmd, loff_t addr, char *buf)
  55. {
  56. buf[0] = cmd;
  57. buf[1] = addr >> 8;
  58. buf[2] = addr;
  59. return 3;
  60. }
  61. static int mchp48l640_read_status(struct mchp48l640_flash *flash, int *status)
  62. {
  63. unsigned char cmd[2];
  64. int ret;
  65. cmd[0] = MCHP48L640_CMD_RDSR;
  66. cmd[1] = 0x00;
  67. mutex_lock(&flash->lock);
  68. ret = spi_write_then_read(flash->spi, &cmd[0], 1, &cmd[1], 1);
  69. mutex_unlock(&flash->lock);
  70. if (!ret)
  71. *status = cmd[1];
  72. dev_dbg(&flash->spi->dev, "read status ret: %d status: %x", ret, *status);
  73. return ret;
  74. }
  75. static int mchp48l640_waitforbit(struct mchp48l640_flash *flash, int bit, bool set)
  76. {
  77. int ret, status;
  78. unsigned long deadline;
  79. deadline = jiffies + msecs_to_jiffies(MCHP48L640_TIMEOUT);
  80. do {
  81. ret = mchp48l640_read_status(flash, &status);
  82. dev_dbg(&flash->spi->dev, "read status ret: %d bit: %x %sset status: %x",
  83. ret, bit, (set ? "" : "not"), status);
  84. if (ret)
  85. return ret;
  86. if (set) {
  87. if ((status & bit) == bit)
  88. return 0;
  89. } else {
  90. if ((status & bit) == 0)
  91. return 0;
  92. }
  93. usleep_range(1000, 2000);
  94. } while (!time_after_eq(jiffies, deadline));
  95. dev_err(&flash->spi->dev, "Timeout waiting for bit %x %s set in status register.",
  96. bit, (set ? "" : "not"));
  97. return -ETIMEDOUT;
  98. }
  99. static int mchp48l640_write_prepare(struct mchp48l640_flash *flash, bool enable)
  100. {
  101. unsigned char cmd[2];
  102. int ret;
  103. if (enable)
  104. cmd[0] = MCHP48L640_CMD_WREN;
  105. else
  106. cmd[0] = MCHP48L640_CMD_WRDI;
  107. mutex_lock(&flash->lock);
  108. ret = spi_write(flash->spi, cmd, 1);
  109. mutex_unlock(&flash->lock);
  110. if (ret)
  111. dev_err(&flash->spi->dev, "write %s failed ret: %d",
  112. str_enable_disable(enable), ret);
  113. dev_dbg(&flash->spi->dev, "write %s success ret: %d",
  114. str_enable_disable(enable), ret);
  115. if (enable)
  116. return mchp48l640_waitforbit(flash, MCHP48L640_STATUS_WEL, true);
  117. return ret;
  118. }
  119. static int mchp48l640_set_mode(struct mchp48l640_flash *flash)
  120. {
  121. unsigned char cmd[2];
  122. int ret;
  123. ret = mchp48l640_write_prepare(flash, true);
  124. if (ret)
  125. return ret;
  126. cmd[0] = MCHP48L640_CMD_WRSR;
  127. cmd[1] = MCHP48L640_STATUS_PRO;
  128. mutex_lock(&flash->lock);
  129. ret = spi_write(flash->spi, cmd, 2);
  130. mutex_unlock(&flash->lock);
  131. if (ret)
  132. dev_err(&flash->spi->dev, "Could not set continuous mode ret: %d", ret);
  133. return mchp48l640_waitforbit(flash, MCHP48L640_STATUS_PRO, true);
  134. }
  135. static int mchp48l640_wait_rdy(struct mchp48l640_flash *flash)
  136. {
  137. return mchp48l640_waitforbit(flash, MCHP48L640_STATUS_RDY, false);
  138. };
  139. static int mchp48l640_write_page(struct mtd_info *mtd, loff_t to, size_t len,
  140. size_t *retlen, const unsigned char *buf)
  141. {
  142. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  143. unsigned char *cmd;
  144. int ret;
  145. int cmdlen;
  146. cmd = kmalloc((3 + len), GFP_KERNEL | GFP_DMA);
  147. if (!cmd)
  148. return -ENOMEM;
  149. ret = mchp48l640_wait_rdy(flash);
  150. if (ret)
  151. goto fail;
  152. ret = mchp48l640_write_prepare(flash, true);
  153. if (ret)
  154. goto fail;
  155. mutex_lock(&flash->lock);
  156. cmdlen = mchp48l640_mkcmd(flash, MCHP48L640_CMD_WRITE, to, cmd);
  157. memcpy(&cmd[cmdlen], buf, len);
  158. ret = spi_write(flash->spi, cmd, cmdlen + len);
  159. mutex_unlock(&flash->lock);
  160. if (!ret)
  161. *retlen += len;
  162. else
  163. goto fail;
  164. if (flash->caps->auto_disable_wel) {
  165. ret = mchp48l640_waitforbit(flash, MCHP48L640_STATUS_WEL, false);
  166. if (ret)
  167. goto fail;
  168. } else {
  169. ret = mchp48l640_write_prepare(flash, false);
  170. if (ret)
  171. goto fail;
  172. }
  173. kfree(cmd);
  174. return 0;
  175. fail:
  176. kfree(cmd);
  177. dev_err(&flash->spi->dev, "write fail with: %d", ret);
  178. return ret;
  179. };
  180. static int mchp48l640_write(struct mtd_info *mtd, loff_t to, size_t len,
  181. size_t *retlen, const unsigned char *buf)
  182. {
  183. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  184. int ret;
  185. size_t wlen = 0;
  186. loff_t woff = to;
  187. size_t ws;
  188. size_t page_sz = flash->caps->page_size;
  189. /*
  190. * we set PRO bit (page rollover), but writing length > page size
  191. * does result in total chaos, so write in 32 byte chunks.
  192. */
  193. while (wlen < len) {
  194. ws = min((len - wlen), page_sz);
  195. ret = mchp48l640_write_page(mtd, woff, ws, retlen, &buf[wlen]);
  196. if (ret)
  197. return ret;
  198. wlen += ws;
  199. woff += ws;
  200. }
  201. return 0;
  202. }
  203. static int mchp48l640_read_page(struct mtd_info *mtd, loff_t from, size_t len,
  204. size_t *retlen, unsigned char *buf)
  205. {
  206. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  207. unsigned char *cmd;
  208. int ret;
  209. int cmdlen;
  210. cmd = kmalloc((3 + len), GFP_KERNEL | GFP_DMA);
  211. if (!cmd)
  212. return -ENOMEM;
  213. ret = mchp48l640_wait_rdy(flash);
  214. if (ret)
  215. goto fail;
  216. mutex_lock(&flash->lock);
  217. cmdlen = mchp48l640_mkcmd(flash, MCHP48L640_CMD_READ, from, cmd);
  218. ret = spi_write_then_read(flash->spi, cmd, cmdlen, buf, len);
  219. mutex_unlock(&flash->lock);
  220. if (!ret)
  221. *retlen += len;
  222. kfree(cmd);
  223. return ret;
  224. fail:
  225. kfree(cmd);
  226. dev_err(&flash->spi->dev, "read fail with: %d", ret);
  227. return ret;
  228. }
  229. static int mchp48l640_read(struct mtd_info *mtd, loff_t from, size_t len,
  230. size_t *retlen, unsigned char *buf)
  231. {
  232. struct mchp48l640_flash *flash = to_mchp48l640_flash(mtd);
  233. int ret;
  234. size_t wlen = 0;
  235. loff_t woff = from;
  236. size_t ws;
  237. size_t page_sz = flash->caps->page_size;
  238. /*
  239. * we set PRO bit (page rollover), but if read length > page size
  240. * does result in total chaos in result ...
  241. */
  242. while (wlen < len) {
  243. ws = min((len - wlen), page_sz);
  244. ret = mchp48l640_read_page(mtd, woff, ws, retlen, &buf[wlen]);
  245. if (ret)
  246. return ret;
  247. wlen += ws;
  248. woff += ws;
  249. }
  250. return 0;
  251. };
  252. static const struct mchp48_caps mchp48l640_caps = {
  253. .size = SZ_8K,
  254. .page_size = 32,
  255. .auto_disable_wel = true,
  256. };
  257. static const struct mchp48_caps mb85rs128ty_caps = {
  258. .size = SZ_16K,
  259. .page_size = 256,
  260. .auto_disable_wel = false,
  261. };
  262. static int mchp48l640_probe(struct spi_device *spi)
  263. {
  264. struct mchp48l640_flash *flash;
  265. struct flash_platform_data *data;
  266. int err;
  267. int status;
  268. flash = devm_kzalloc(&spi->dev, sizeof(*flash), GFP_KERNEL);
  269. if (!flash)
  270. return -ENOMEM;
  271. flash->spi = spi;
  272. mutex_init(&flash->lock);
  273. spi_set_drvdata(spi, flash);
  274. err = mchp48l640_read_status(flash, &status);
  275. if (err)
  276. return err;
  277. err = mchp48l640_set_mode(flash);
  278. if (err)
  279. return err;
  280. data = dev_get_platdata(&spi->dev);
  281. flash->caps = of_device_get_match_data(&spi->dev);
  282. if (!flash->caps)
  283. flash->caps = &mchp48l640_caps;
  284. mtd_set_of_node(&flash->mtd, spi->dev.of_node);
  285. flash->mtd.dev.parent = &spi->dev;
  286. flash->mtd.type = MTD_RAM;
  287. flash->mtd.flags = MTD_CAP_RAM;
  288. flash->mtd.writesize = flash->caps->page_size;
  289. flash->mtd.size = flash->caps->size;
  290. flash->mtd._read = mchp48l640_read;
  291. flash->mtd._write = mchp48l640_write;
  292. err = mtd_device_register(&flash->mtd, data ? data->parts : NULL,
  293. data ? data->nr_parts : 0);
  294. if (err)
  295. return err;
  296. return 0;
  297. }
  298. static void mchp48l640_remove(struct spi_device *spi)
  299. {
  300. struct mchp48l640_flash *flash = spi_get_drvdata(spi);
  301. WARN_ON(mtd_device_unregister(&flash->mtd));
  302. }
  303. static const struct of_device_id mchp48l640_of_table[] = {
  304. {
  305. .compatible = "microchip,48l640",
  306. .data = &mchp48l640_caps,
  307. },
  308. {
  309. .compatible = "fujitsu,mb85rs128ty",
  310. .data = &mb85rs128ty_caps,
  311. },
  312. {}
  313. };
  314. MODULE_DEVICE_TABLE(of, mchp48l640_of_table);
  315. static const struct spi_device_id mchp48l640_spi_ids[] = {
  316. {
  317. .name = "48l640",
  318. .driver_data = (kernel_ulong_t)&mchp48l640_caps,
  319. },
  320. {
  321. .name = "mb85rs128ty",
  322. .driver_data = (kernel_ulong_t)&mb85rs128ty_caps,
  323. },
  324. {}
  325. };
  326. MODULE_DEVICE_TABLE(spi, mchp48l640_spi_ids);
  327. static struct spi_driver mchp48l640_driver = {
  328. .driver = {
  329. .name = "mchp48l640",
  330. .of_match_table = mchp48l640_of_table,
  331. },
  332. .probe = mchp48l640_probe,
  333. .remove = mchp48l640_remove,
  334. .id_table = mchp48l640_spi_ids,
  335. };
  336. module_spi_driver(mchp48l640_driver);
  337. MODULE_DESCRIPTION("MTD SPI driver for Microchip 48l640 EERAM chips");
  338. MODULE_AUTHOR("Heiko Schocher <hs@denx.de>");
  339. MODULE_LICENSE("GPL v2");
  340. MODULE_ALIAS("spi:mchp48l640");