rtsx_usb_sdmmc.c 37 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Realtek USB SD/MMC Card Interface driver
  3. *
  4. * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
  5. *
  6. * Author:
  7. * Roger Tseng <rogerable@realtek.com>
  8. */
  9. #include <linux/module.h>
  10. #include <linux/slab.h>
  11. #include <linux/delay.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/usb.h>
  14. #include <linux/mmc/host.h>
  15. #include <linux/mmc/mmc.h>
  16. #include <linux/mmc/sd.h>
  17. #include <linux/mmc/card.h>
  18. #include <linux/scatterlist.h>
  19. #include <linux/pm.h>
  20. #include <linux/pm_runtime.h>
  21. #include <linux/rtsx_usb.h>
  22. #include <linux/unaligned.h>
  23. #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
  24. defined(CONFIG_MMC_REALTEK_USB_MODULE))
  25. #include <linux/leds.h>
  26. #include <linux/workqueue.h>
  27. #define RTSX_USB_USE_LEDS_CLASS
  28. #endif
  29. struct rtsx_usb_sdmmc {
  30. struct platform_device *pdev;
  31. struct rtsx_ucr *ucr;
  32. struct mmc_host *mmc;
  33. struct mmc_request *mrq;
  34. struct mutex host_mutex;
  35. u8 ssc_depth;
  36. unsigned int clock;
  37. bool vpclk;
  38. bool double_clk;
  39. bool host_removal;
  40. bool card_exist;
  41. bool initial_mode;
  42. bool ddr_mode;
  43. unsigned char power_mode;
  44. u16 ocp_stat;
  45. #ifdef RTSX_USB_USE_LEDS_CLASS
  46. struct led_classdev led;
  47. char led_name[32];
  48. struct work_struct led_work;
  49. #endif
  50. };
  51. static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
  52. {
  53. return &(host->pdev->dev);
  54. }
  55. static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
  56. {
  57. struct rtsx_ucr *ucr = host->ucr;
  58. rtsx_usb_ep0_write_register(ucr, CARD_STOP,
  59. SD_STOP | SD_CLR_ERR,
  60. SD_STOP | SD_CLR_ERR);
  61. rtsx_usb_clear_dma_err(ucr);
  62. rtsx_usb_clear_fsm_err(ucr);
  63. }
  64. #ifdef DEBUG
  65. static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
  66. {
  67. struct rtsx_ucr *ucr = host->ucr;
  68. u8 val = 0;
  69. rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
  70. dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
  71. rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
  72. dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
  73. rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
  74. dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
  75. }
  76. #else
  77. #define sd_print_debug_regs(host)
  78. #endif /* DEBUG */
  79. static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  80. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  81. {
  82. struct rtsx_ucr *ucr = host->ucr;
  83. int err;
  84. u8 trans_mode;
  85. if (!buf)
  86. buf_len = 0;
  87. rtsx_usb_init_cmd(ucr);
  88. if (cmd != NULL) {
  89. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
  90. , cmd->opcode);
  91. if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
  92. trans_mode = SD_TM_AUTO_TUNING;
  93. else
  94. trans_mode = SD_TM_NORMAL_READ;
  95. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  96. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  97. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  98. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  99. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  100. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  101. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  102. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  103. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  104. SD_CMD4, 0xFF, (u8)cmd->arg);
  105. } else {
  106. trans_mode = SD_TM_AUTO_READ_3;
  107. }
  108. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  109. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  110. 0xFF, (u8)(byte_cnt >> 8));
  111. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  112. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  113. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  114. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  115. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  116. if (trans_mode != SD_TM_AUTO_TUNING)
  117. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  118. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  119. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  120. 0xFF, trans_mode | SD_TRANSFER_START);
  121. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  122. SD_TRANSFER_END, SD_TRANSFER_END);
  123. if (cmd != NULL) {
  124. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  125. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  126. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  127. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  128. }
  129. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  130. if (err) {
  131. dev_dbg(sdmmc_dev(host),
  132. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  133. return err;
  134. }
  135. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  136. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  137. sd_print_debug_regs(host);
  138. if (!err) {
  139. dev_dbg(sdmmc_dev(host),
  140. "Transfer failed (SD_TRANSFER = %02x)\n",
  141. ucr->rsp_buf[0]);
  142. err = -EIO;
  143. } else {
  144. dev_dbg(sdmmc_dev(host),
  145. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  146. }
  147. return err;
  148. }
  149. if (cmd != NULL) {
  150. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  151. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  152. cmd->resp[0]);
  153. }
  154. if (buf && buf_len) {
  155. /* 2-byte aligned part */
  156. err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
  157. if (err) {
  158. dev_dbg(sdmmc_dev(host),
  159. "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
  160. return err;
  161. }
  162. /* unaligned byte */
  163. if (byte_cnt % 2)
  164. return rtsx_usb_read_register(ucr,
  165. PPBUF_BASE2 + byte_cnt,
  166. buf + byte_cnt - 1);
  167. }
  168. return 0;
  169. }
  170. static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
  171. u16 byte_cnt, u8 *buf, int buf_len, int timeout)
  172. {
  173. struct rtsx_ucr *ucr = host->ucr;
  174. int err;
  175. u8 trans_mode;
  176. if (!buf)
  177. buf_len = 0;
  178. if (buf && buf_len) {
  179. err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
  180. if (err) {
  181. dev_dbg(sdmmc_dev(host),
  182. "rtsx_usb_write_ppbuf failed (err = %d)\n",
  183. err);
  184. return err;
  185. }
  186. }
  187. trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
  188. rtsx_usb_init_cmd(ucr);
  189. if (cmd != NULL) {
  190. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
  191. cmd->opcode);
  192. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  193. SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
  194. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  195. SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
  196. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  197. SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
  198. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  199. SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
  200. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  201. SD_CMD4, 0xFF, (u8)cmd->arg);
  202. }
  203. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
  204. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
  205. 0xFF, (u8)(byte_cnt >> 8));
  206. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
  207. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
  208. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
  209. SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  210. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
  211. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  212. CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
  213. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  214. trans_mode | SD_TRANSFER_START);
  215. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  216. SD_TRANSFER_END, SD_TRANSFER_END);
  217. if (cmd != NULL) {
  218. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
  219. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
  220. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
  221. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
  222. }
  223. err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
  224. if (err) {
  225. dev_dbg(sdmmc_dev(host),
  226. "rtsx_usb_send_cmd failed (err = %d)\n", err);
  227. return err;
  228. }
  229. err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
  230. if (err) {
  231. sd_print_debug_regs(host);
  232. dev_dbg(sdmmc_dev(host),
  233. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  234. return err;
  235. }
  236. if (cmd != NULL) {
  237. cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
  238. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  239. cmd->resp[0]);
  240. }
  241. return 0;
  242. }
  243. static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
  244. struct mmc_command *cmd)
  245. {
  246. struct rtsx_ucr *ucr = host->ucr;
  247. u8 cmd_idx = (u8)cmd->opcode;
  248. u32 arg = cmd->arg;
  249. int err = 0;
  250. int timeout = 100;
  251. int i;
  252. u8 *ptr;
  253. int stat_idx = 0;
  254. int len = 2;
  255. u8 rsp_type;
  256. dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
  257. __func__, cmd_idx, arg);
  258. /* Response type:
  259. * R0
  260. * R1, R5, R6, R7
  261. * R1b
  262. * R2
  263. * R3, R4
  264. */
  265. switch (mmc_resp_type(cmd)) {
  266. case MMC_RSP_NONE:
  267. rsp_type = SD_RSP_TYPE_R0;
  268. break;
  269. case MMC_RSP_R1:
  270. rsp_type = SD_RSP_TYPE_R1;
  271. break;
  272. case MMC_RSP_R1B:
  273. rsp_type = SD_RSP_TYPE_R1b;
  274. break;
  275. case MMC_RSP_R2:
  276. rsp_type = SD_RSP_TYPE_R2;
  277. break;
  278. case MMC_RSP_R3:
  279. rsp_type = SD_RSP_TYPE_R3;
  280. break;
  281. default:
  282. dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
  283. err = -EINVAL;
  284. goto out;
  285. }
  286. if (rsp_type == SD_RSP_TYPE_R1b)
  287. timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
  288. if (cmd->opcode == SD_SWITCH_VOLTAGE) {
  289. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  290. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  291. SD_CLK_TOGGLE_EN);
  292. if (err)
  293. goto out;
  294. }
  295. rtsx_usb_init_cmd(ucr);
  296. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
  297. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
  298. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
  299. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
  300. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
  301. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
  302. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  303. 0x01, PINGPONG_BUFFER);
  304. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
  305. 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
  306. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  307. SD_TRANSFER_END | SD_STAT_IDLE,
  308. SD_TRANSFER_END | SD_STAT_IDLE);
  309. if (rsp_type == SD_RSP_TYPE_R2) {
  310. /* Read data from ping-pong buffer */
  311. for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
  312. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  313. stat_idx = 16;
  314. } else if (rsp_type != SD_RSP_TYPE_R0) {
  315. /* Read data from SD_CMDx registers */
  316. for (i = SD_CMD0; i <= SD_CMD4; i++)
  317. rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
  318. stat_idx = 5;
  319. }
  320. len += stat_idx;
  321. rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
  322. err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
  323. if (err) {
  324. dev_dbg(sdmmc_dev(host),
  325. "rtsx_usb_send_cmd error (err = %d)\n", err);
  326. goto out;
  327. }
  328. err = rtsx_usb_get_rsp(ucr, len, timeout);
  329. if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
  330. sd_print_debug_regs(host);
  331. sd_clear_error(host);
  332. if (!err) {
  333. dev_dbg(sdmmc_dev(host),
  334. "Transfer failed (SD_TRANSFER = %02x)\n",
  335. ucr->rsp_buf[0]);
  336. err = -EIO;
  337. } else {
  338. dev_dbg(sdmmc_dev(host),
  339. "rtsx_usb_get_rsp failed (err = %d)\n", err);
  340. }
  341. goto out;
  342. }
  343. if (rsp_type == SD_RSP_TYPE_R0) {
  344. err = 0;
  345. goto out;
  346. }
  347. /* Skip result of CHECK_REG_CMD */
  348. ptr = ucr->rsp_buf + 1;
  349. /* Check (Start,Transmission) bit of Response */
  350. if ((ptr[0] & 0xC0) != 0) {
  351. err = -EILSEQ;
  352. dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
  353. goto out;
  354. }
  355. /* Check CRC7 */
  356. if (!(rsp_type & SD_NO_CHECK_CRC7)) {
  357. if (ptr[stat_idx] & SD_CRC7_ERR) {
  358. err = -EILSEQ;
  359. dev_dbg(sdmmc_dev(host), "CRC7 error\n");
  360. goto out;
  361. }
  362. }
  363. if (rsp_type == SD_RSP_TYPE_R2) {
  364. /*
  365. * The controller offloads the last byte {CRC-7, end bit 1'b1}
  366. * of response type R2. Assign dummy CRC, 0, and end bit to the
  367. * byte(ptr[16], goes into the LSB of resp[3] later).
  368. */
  369. ptr[16] = 1;
  370. for (i = 0; i < 4; i++) {
  371. cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
  372. dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
  373. i, cmd->resp[i]);
  374. }
  375. } else {
  376. cmd->resp[0] = get_unaligned_be32(ptr + 1);
  377. dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
  378. cmd->resp[0]);
  379. }
  380. out:
  381. cmd->error = err;
  382. }
  383. static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
  384. {
  385. struct rtsx_ucr *ucr = host->ucr;
  386. struct mmc_data *data = mrq->data;
  387. int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
  388. u8 cfg2, trans_mode;
  389. int err;
  390. u8 flag;
  391. size_t data_len = data->blksz * data->blocks;
  392. unsigned int pipe;
  393. if (read) {
  394. dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
  395. __func__, data_len);
  396. cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  397. SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
  398. trans_mode = SD_TM_AUTO_READ_3;
  399. } else {
  400. dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
  401. __func__, data_len);
  402. cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
  403. SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
  404. trans_mode = SD_TM_AUTO_WRITE_3;
  405. }
  406. rtsx_usb_init_cmd(ucr);
  407. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
  408. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
  409. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
  410. 0xFF, (u8)data->blocks);
  411. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
  412. 0xFF, (u8)(data->blocks >> 8));
  413. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
  414. 0x01, RING_BUFFER);
  415. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
  416. 0xFF, (u8)(data_len >> 24));
  417. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
  418. 0xFF, (u8)(data_len >> 16));
  419. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
  420. 0xFF, (u8)(data_len >> 8));
  421. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
  422. 0xFF, (u8)data_len);
  423. if (read) {
  424. flag = MODE_CDIR;
  425. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  426. 0x03 | DMA_PACK_SIZE_MASK,
  427. DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
  428. } else {
  429. flag = MODE_CDOR;
  430. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
  431. 0x03 | DMA_PACK_SIZE_MASK,
  432. DMA_DIR_TO_CARD | DMA_EN | DMA_512);
  433. }
  434. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
  435. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
  436. trans_mode | SD_TRANSFER_START);
  437. rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
  438. SD_TRANSFER_END, SD_TRANSFER_END);
  439. err = rtsx_usb_send_cmd(ucr, flag, 100);
  440. if (err)
  441. return err;
  442. if (read)
  443. pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
  444. else
  445. pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
  446. err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
  447. data->sg_len, NULL, 10000);
  448. if (err) {
  449. dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
  450. , err);
  451. sd_clear_error(host);
  452. return err;
  453. }
  454. return rtsx_usb_get_rsp(ucr, 1, 2000);
  455. }
  456. static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
  457. {
  458. rtsx_usb_write_register(host->ucr, SD_CFG1,
  459. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
  460. }
  461. static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
  462. {
  463. rtsx_usb_write_register(host->ucr, SD_CFG1,
  464. SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
  465. }
  466. static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
  467. struct mmc_request *mrq)
  468. {
  469. struct mmc_command *cmd = mrq->cmd;
  470. struct mmc_data *data = mrq->data;
  471. u8 *buf;
  472. buf = kzalloc(data->blksz, GFP_NOIO);
  473. if (!buf) {
  474. cmd->error = -ENOMEM;
  475. return;
  476. }
  477. if (data->flags & MMC_DATA_READ) {
  478. if (host->initial_mode)
  479. sd_disable_initial_mode(host);
  480. cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
  481. data->blksz, 200);
  482. if (host->initial_mode)
  483. sd_enable_initial_mode(host);
  484. sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
  485. } else {
  486. sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
  487. cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
  488. data->blksz, 200);
  489. }
  490. kfree(buf);
  491. }
  492. static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
  493. {
  494. struct rtsx_ucr *ucr = host->ucr;
  495. dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
  496. __func__, tx ? "TX" : "RX", sample_point);
  497. rtsx_usb_init_cmd(ucr);
  498. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
  499. if (tx)
  500. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  501. 0x0F, sample_point);
  502. else
  503. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
  504. 0x0F, sample_point);
  505. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
  506. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
  507. PHASE_NOT_RESET, PHASE_NOT_RESET);
  508. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
  509. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
  510. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  511. }
  512. static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
  513. {
  514. idx &= MAX_PHASE;
  515. return phase_map & (1 << idx);
  516. }
  517. static int get_phase_len(u32 phase_map, unsigned int idx)
  518. {
  519. int i;
  520. for (i = 0; i < MAX_PHASE + 1; i++) {
  521. if (get_phase_point(phase_map, idx + i) == 0)
  522. return i;
  523. }
  524. return MAX_PHASE + 1;
  525. }
  526. static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
  527. {
  528. int start = 0, len = 0;
  529. int start_final = 0, len_final = 0;
  530. u8 final_phase = 0xFF;
  531. if (phase_map == 0) {
  532. dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
  533. return final_phase;
  534. }
  535. while (start < MAX_PHASE + 1) {
  536. len = get_phase_len(phase_map, start);
  537. if (len_final < len) {
  538. start_final = start;
  539. len_final = len;
  540. }
  541. start += len ? len : 1;
  542. }
  543. final_phase = (start_final + len_final / 2) & MAX_PHASE;
  544. dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
  545. phase_map, len_final, final_phase);
  546. return final_phase;
  547. }
  548. static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
  549. {
  550. int i;
  551. u8 val = 0;
  552. for (i = 0; i < 100; i++) {
  553. rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val);
  554. if (val & SD_DATA_IDLE)
  555. return;
  556. usleep_range(100, 1000);
  557. }
  558. }
  559. static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
  560. u8 opcode, u8 sample_point)
  561. {
  562. int err;
  563. struct mmc_command cmd = {};
  564. err = sd_change_phase(host, sample_point, 0);
  565. if (err)
  566. return err;
  567. cmd.opcode = MMC_SEND_TUNING_BLOCK;
  568. err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
  569. if (err) {
  570. /* Wait till SD DATA IDLE */
  571. sd_wait_data_idle(host);
  572. sd_clear_error(host);
  573. return err;
  574. }
  575. return 0;
  576. }
  577. static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
  578. u8 opcode, u16 *phase_map)
  579. {
  580. int err, i;
  581. u16 raw_phase_map = 0;
  582. for (i = MAX_PHASE; i >= 0; i--) {
  583. err = sd_tuning_rx_cmd(host, opcode, (u8)i);
  584. if (!err)
  585. raw_phase_map |= 1 << i;
  586. }
  587. if (phase_map)
  588. *phase_map = raw_phase_map;
  589. }
  590. static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
  591. {
  592. int err, i;
  593. u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
  594. u8 final_phase;
  595. /* setting fixed default TX phase */
  596. err = sd_change_phase(host, 0x01, 1);
  597. if (err) {
  598. dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
  599. return err;
  600. }
  601. /* tuning RX phase */
  602. for (i = 0; i < RX_TUNING_CNT; i++) {
  603. sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
  604. if (raw_phase_map[i] == 0)
  605. break;
  606. }
  607. phase_map = 0xFFFF;
  608. for (i = 0; i < RX_TUNING_CNT; i++) {
  609. dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
  610. i, raw_phase_map[i]);
  611. phase_map &= raw_phase_map[i];
  612. }
  613. dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
  614. if (phase_map) {
  615. final_phase = sd_search_final_phase(host, phase_map);
  616. if (final_phase == 0xFF)
  617. return -EINVAL;
  618. err = sd_change_phase(host, final_phase, 0);
  619. if (err)
  620. return err;
  621. } else {
  622. return -EINVAL;
  623. }
  624. return 0;
  625. }
  626. static int sdmmc_get_ro(struct mmc_host *mmc)
  627. {
  628. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  629. struct rtsx_ucr *ucr = host->ucr;
  630. int err;
  631. u16 val;
  632. if (host->host_removal)
  633. return -ENOMEDIUM;
  634. mutex_lock(&ucr->dev_mutex);
  635. /* Check SD card detect */
  636. err = rtsx_usb_get_card_status(ucr, &val);
  637. mutex_unlock(&ucr->dev_mutex);
  638. /* Treat failed detection as non-ro */
  639. if (err)
  640. return 0;
  641. if (val & SD_WP)
  642. return 1;
  643. return 0;
  644. }
  645. static int sdmmc_get_cd(struct mmc_host *mmc)
  646. {
  647. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  648. struct rtsx_ucr *ucr = host->ucr;
  649. int err;
  650. u16 val;
  651. if (host->host_removal)
  652. return -ENOMEDIUM;
  653. mutex_lock(&ucr->dev_mutex);
  654. /* Check SD card detect */
  655. err = rtsx_usb_get_card_status(ucr, &val);
  656. mutex_unlock(&ucr->dev_mutex);
  657. /* Treat failed detection as non-exist */
  658. if (err)
  659. goto no_card;
  660. /* get OCP status */
  661. host->ocp_stat = (val >> 4) & 0x03;
  662. if (val & SD_CD) {
  663. host->card_exist = true;
  664. return 1;
  665. }
  666. no_card:
  667. /* clear OCP status */
  668. if (host->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
  669. rtsx_usb_write_register(ucr, OCPCTL, MS_OCP_CLEAR, MS_OCP_CLEAR);
  670. host->ocp_stat = 0;
  671. }
  672. host->card_exist = false;
  673. return 0;
  674. }
  675. static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
  676. {
  677. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  678. struct rtsx_ucr *ucr = host->ucr;
  679. struct mmc_command *cmd = mrq->cmd;
  680. struct mmc_data *data = mrq->data;
  681. unsigned int data_size = 0;
  682. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  683. if (host->host_removal) {
  684. cmd->error = -ENOMEDIUM;
  685. goto finish;
  686. }
  687. if ((!host->card_exist)) {
  688. cmd->error = -ENOMEDIUM;
  689. goto finish_detect_card;
  690. }
  691. /* check OCP stat */
  692. if (host->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
  693. cmd->error = -ENOMEDIUM;
  694. goto finish_detect_card;
  695. }
  696. mutex_lock(&ucr->dev_mutex);
  697. mutex_lock(&host->host_mutex);
  698. host->mrq = mrq;
  699. mutex_unlock(&host->host_mutex);
  700. if (mrq->data)
  701. data_size = data->blocks * data->blksz;
  702. if (!data_size) {
  703. sd_send_cmd_get_rsp(host, cmd);
  704. } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
  705. mmc_op_multi(cmd->opcode)) {
  706. sd_send_cmd_get_rsp(host, cmd);
  707. if (!cmd->error) {
  708. sd_rw_multi(host, mrq);
  709. if (mmc_op_multi(cmd->opcode) && mrq->stop) {
  710. sd_send_cmd_get_rsp(host, mrq->stop);
  711. rtsx_usb_write_register(ucr, MC_FIFO_CTL,
  712. FIFO_FLUSH, FIFO_FLUSH);
  713. }
  714. }
  715. } else {
  716. sd_normal_rw(host, mrq);
  717. }
  718. if (mrq->data) {
  719. if (cmd->error || data->error)
  720. data->bytes_xfered = 0;
  721. else
  722. data->bytes_xfered = data->blocks * data->blksz;
  723. }
  724. mutex_unlock(&ucr->dev_mutex);
  725. finish_detect_card:
  726. if (cmd->error) {
  727. /*
  728. * detect card when fail to update card existence state and
  729. * speed up card removal when retry
  730. */
  731. sdmmc_get_cd(mmc);
  732. dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
  733. }
  734. finish:
  735. mutex_lock(&host->host_mutex);
  736. host->mrq = NULL;
  737. mutex_unlock(&host->host_mutex);
  738. mmc_request_done(mmc, mrq);
  739. }
  740. static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
  741. unsigned char bus_width)
  742. {
  743. int err = 0;
  744. static const u8 width[] = {
  745. [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
  746. [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
  747. [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
  748. };
  749. if (bus_width <= MMC_BUS_WIDTH_8)
  750. err = rtsx_usb_write_register(host->ucr, SD_CFG1,
  751. 0x03, width[bus_width]);
  752. return err;
  753. }
  754. static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
  755. {
  756. rtsx_usb_init_cmd(ucr);
  757. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
  758. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  759. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  760. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  761. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  762. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  763. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  764. }
  765. static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
  766. {
  767. rtsx_usb_init_cmd(ucr);
  768. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
  769. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
  770. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
  771. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  772. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
  773. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
  774. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  775. }
  776. static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
  777. {
  778. rtsx_usb_init_cmd(ucr);
  779. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
  780. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
  781. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
  782. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
  783. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
  784. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
  785. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  786. }
  787. static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
  788. {
  789. rtsx_usb_init_cmd(ucr);
  790. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
  791. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
  792. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
  793. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
  794. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
  795. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
  796. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  797. }
  798. static int sd_power_on(struct rtsx_usb_sdmmc *host)
  799. {
  800. struct rtsx_ucr *ucr = host->ucr;
  801. int err;
  802. if (host->ocp_stat & (MS_OCP_NOW | MS_OCP_EVER)) {
  803. dev_dbg(sdmmc_dev(host), "over current\n");
  804. return -EIO;
  805. }
  806. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  807. rtsx_usb_init_cmd(ucr);
  808. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
  809. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
  810. CARD_SHARE_MASK, CARD_SHARE_SD);
  811. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
  812. SD_CLK_EN, SD_CLK_EN);
  813. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  814. if (err)
  815. return err;
  816. if (CHECK_PKG(ucr, LQFP48))
  817. err = sd_pull_ctl_enable_lqfp48(ucr);
  818. else
  819. err = sd_pull_ctl_enable_qfn24(ucr);
  820. if (err)
  821. return err;
  822. err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
  823. POWER_MASK, PARTIAL_POWER_ON);
  824. if (err)
  825. return err;
  826. usleep_range(800, 1000);
  827. rtsx_usb_init_cmd(ucr);
  828. /* WA OCP issue: after OCP, there were problems with reopen card power */
  829. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL, POWER_MASK, POWER_ON);
  830. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, FPDCTL, SSC_POWER_MASK, SSC_POWER_DOWN);
  831. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  832. if (err)
  833. return err;
  834. msleep(20);
  835. rtsx_usb_write_register(ucr, FPDCTL, SSC_POWER_MASK, SSC_POWER_ON);
  836. usleep_range(180, 200);
  837. rtsx_usb_init_cmd(ucr);
  838. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  839. LDO3318_PWR_MASK, LDO_ON);
  840. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
  841. SD_OUTPUT_EN, SD_OUTPUT_EN);
  842. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  843. }
  844. static int sd_power_off(struct rtsx_usb_sdmmc *host)
  845. {
  846. struct rtsx_ucr *ucr = host->ucr;
  847. int err;
  848. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  849. rtsx_usb_init_cmd(ucr);
  850. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
  851. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
  852. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  853. POWER_MASK, POWER_OFF);
  854. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
  855. POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
  856. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  857. if (err)
  858. return err;
  859. if (CHECK_PKG(ucr, LQFP48))
  860. return sd_pull_ctl_disable_lqfp48(ucr);
  861. return sd_pull_ctl_disable_qfn24(ucr);
  862. }
  863. static void sd_set_power_mode(struct rtsx_usb_sdmmc *host,
  864. unsigned char power_mode)
  865. {
  866. int err;
  867. struct rtsx_ucr *ucr = host->ucr;
  868. if (power_mode == host->power_mode)
  869. return;
  870. switch (power_mode) {
  871. case MMC_POWER_OFF:
  872. err = sd_power_off(host);
  873. if (err)
  874. dev_dbg(sdmmc_dev(host), "power-off (err = %d)\n", err);
  875. pm_runtime_put_noidle(sdmmc_dev(host));
  876. break;
  877. case MMC_POWER_UP:
  878. pm_runtime_get_noresume(sdmmc_dev(host));
  879. err = sd_power_on(host);
  880. if (err)
  881. dev_dbg(sdmmc_dev(host), "power-on (err = %d)\n", err);
  882. /* issue the clock signals to card at least 74 clocks */
  883. rtsx_usb_write_register(ucr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, SD_CLK_TOGGLE_EN);
  884. break;
  885. case MMC_POWER_ON:
  886. /* stop to send the clock signals */
  887. rtsx_usb_write_register(ucr, SD_BUS_STAT, SD_CLK_TOGGLE_EN, 0x00);
  888. break;
  889. case MMC_POWER_UNDEFINED:
  890. break;
  891. default:
  892. break;
  893. }
  894. host->power_mode = power_mode;
  895. }
  896. static int sd_set_timing(struct rtsx_usb_sdmmc *host,
  897. unsigned char timing, bool *ddr_mode)
  898. {
  899. struct rtsx_ucr *ucr = host->ucr;
  900. *ddr_mode = false;
  901. rtsx_usb_init_cmd(ucr);
  902. switch (timing) {
  903. case MMC_TIMING_UHS_SDR104:
  904. case MMC_TIMING_UHS_SDR50:
  905. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  906. 0x0C | SD_ASYNC_FIFO_RST,
  907. SD_30_MODE | SD_ASYNC_FIFO_RST);
  908. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  909. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  910. break;
  911. case MMC_TIMING_UHS_DDR50:
  912. *ddr_mode = true;
  913. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  914. 0x0C | SD_ASYNC_FIFO_RST,
  915. SD_DDR_MODE | SD_ASYNC_FIFO_RST);
  916. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  917. CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
  918. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  919. DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
  920. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  921. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
  922. DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
  923. break;
  924. case MMC_TIMING_MMC_HS:
  925. case MMC_TIMING_SD_HS:
  926. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
  927. 0x0C, SD_20_MODE);
  928. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  929. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  930. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
  931. SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
  932. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  933. SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
  934. break;
  935. default:
  936. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  937. SD_CFG1, 0x0C, SD_20_MODE);
  938. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
  939. CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
  940. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
  941. SD_PUSH_POINT_CTL, 0xFF, 0);
  942. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
  943. SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
  944. break;
  945. }
  946. return rtsx_usb_send_cmd(ucr, MODE_C, 100);
  947. }
  948. static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  949. {
  950. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  951. struct rtsx_ucr *ucr = host->ucr;
  952. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  953. mutex_lock(&ucr->dev_mutex);
  954. sd_set_power_mode(host, ios->power_mode);
  955. sd_set_bus_width(host, ios->bus_width);
  956. sd_set_timing(host, ios->timing, &host->ddr_mode);
  957. host->vpclk = false;
  958. host->double_clk = true;
  959. switch (ios->timing) {
  960. case MMC_TIMING_UHS_SDR104:
  961. case MMC_TIMING_UHS_SDR50:
  962. host->ssc_depth = SSC_DEPTH_2M;
  963. host->vpclk = true;
  964. host->double_clk = false;
  965. break;
  966. case MMC_TIMING_UHS_DDR50:
  967. case MMC_TIMING_UHS_SDR25:
  968. host->ssc_depth = SSC_DEPTH_1M;
  969. break;
  970. default:
  971. host->ssc_depth = SSC_DEPTH_512K;
  972. break;
  973. }
  974. host->initial_mode = (ios->clock <= 1000000) ? true : false;
  975. host->clock = ios->clock;
  976. rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
  977. host->initial_mode, host->double_clk, host->vpclk);
  978. mutex_unlock(&ucr->dev_mutex);
  979. dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
  980. }
  981. static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
  982. {
  983. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  984. struct rtsx_ucr *ucr = host->ucr;
  985. int err = 0;
  986. dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
  987. __func__, ios->signal_voltage);
  988. if (host->host_removal)
  989. return -ENOMEDIUM;
  990. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
  991. return -EPERM;
  992. mutex_lock(&ucr->dev_mutex);
  993. err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
  994. if (err) {
  995. mutex_unlock(&ucr->dev_mutex);
  996. return err;
  997. }
  998. /* Let mmc core do the busy checking, simply stop the forced-toggle
  999. * clock(while issuing CMD11) and switch voltage.
  1000. */
  1001. rtsx_usb_init_cmd(ucr);
  1002. if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
  1003. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  1004. SD_IO_USING_1V8, SD_IO_USING_3V3);
  1005. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  1006. TUNE_SD18_MASK, TUNE_SD18_3V3);
  1007. } else {
  1008. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
  1009. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  1010. SD_CLK_FORCE_STOP);
  1011. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
  1012. SD_IO_USING_1V8, SD_IO_USING_1V8);
  1013. rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
  1014. TUNE_SD18_MASK, TUNE_SD18_1V8);
  1015. }
  1016. err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
  1017. mutex_unlock(&ucr->dev_mutex);
  1018. return err;
  1019. }
  1020. static int sdmmc_card_busy(struct mmc_host *mmc)
  1021. {
  1022. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1023. struct rtsx_ucr *ucr = host->ucr;
  1024. int err;
  1025. u8 stat;
  1026. u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
  1027. | SD_DAT0_STATUS;
  1028. dev_dbg(sdmmc_dev(host), "%s\n", __func__);
  1029. mutex_lock(&ucr->dev_mutex);
  1030. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1031. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
  1032. SD_CLK_TOGGLE_EN);
  1033. if (err)
  1034. goto out;
  1035. mdelay(1);
  1036. err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
  1037. if (err)
  1038. goto out;
  1039. err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
  1040. SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
  1041. out:
  1042. mutex_unlock(&ucr->dev_mutex);
  1043. if (err)
  1044. return err;
  1045. /* check if any pin between dat[0:3] is low */
  1046. if ((stat & mask) != mask)
  1047. return 1;
  1048. else
  1049. return 0;
  1050. }
  1051. static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
  1052. {
  1053. struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
  1054. struct rtsx_ucr *ucr = host->ucr;
  1055. int err = 0;
  1056. if (host->host_removal)
  1057. return -ENOMEDIUM;
  1058. mutex_lock(&ucr->dev_mutex);
  1059. if (!host->ddr_mode)
  1060. err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
  1061. mutex_unlock(&ucr->dev_mutex);
  1062. return err;
  1063. }
  1064. static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
  1065. .request = sdmmc_request,
  1066. .set_ios = sdmmc_set_ios,
  1067. .get_ro = sdmmc_get_ro,
  1068. .get_cd = sdmmc_get_cd,
  1069. .start_signal_voltage_switch = sdmmc_switch_voltage,
  1070. .card_busy = sdmmc_card_busy,
  1071. .execute_tuning = sdmmc_execute_tuning,
  1072. };
  1073. #ifdef RTSX_USB_USE_LEDS_CLASS
  1074. static void rtsx_usb_led_control(struct led_classdev *led,
  1075. enum led_brightness brightness)
  1076. {
  1077. struct rtsx_usb_sdmmc *host = container_of(led,
  1078. struct rtsx_usb_sdmmc, led);
  1079. if (host->host_removal)
  1080. return;
  1081. host->led.brightness = brightness;
  1082. schedule_work(&host->led_work);
  1083. }
  1084. static void rtsx_usb_update_led(struct work_struct *work)
  1085. {
  1086. struct rtsx_usb_sdmmc *host =
  1087. container_of(work, struct rtsx_usb_sdmmc, led_work);
  1088. struct rtsx_ucr *ucr = host->ucr;
  1089. pm_runtime_get_noresume(sdmmc_dev(host));
  1090. mutex_lock(&ucr->dev_mutex);
  1091. if (host->power_mode == MMC_POWER_OFF)
  1092. goto out;
  1093. if (host->led.brightness == LED_OFF)
  1094. rtsx_usb_turn_off_led(ucr);
  1095. else
  1096. rtsx_usb_turn_on_led(ucr);
  1097. out:
  1098. mutex_unlock(&ucr->dev_mutex);
  1099. pm_runtime_put_sync_suspend(sdmmc_dev(host));
  1100. }
  1101. #endif
  1102. static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
  1103. {
  1104. struct mmc_host *mmc = host->mmc;
  1105. mmc->f_min = 250000;
  1106. mmc->f_max = 208000000;
  1107. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
  1108. mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
  1109. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
  1110. MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
  1111. MMC_CAP_SYNC_RUNTIME_PM;
  1112. mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
  1113. MMC_CAP2_NO_SDIO;
  1114. mmc->max_current_330 = 400;
  1115. mmc->max_current_180 = 800;
  1116. mmc->ops = &rtsx_usb_sdmmc_ops;
  1117. mmc->max_segs = 256;
  1118. mmc->max_seg_size = 65536;
  1119. mmc->max_blk_size = 512;
  1120. mmc->max_blk_count = 65535;
  1121. mmc->max_req_size = 524288;
  1122. host->power_mode = MMC_POWER_OFF;
  1123. host->ocp_stat = 0;
  1124. }
  1125. static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
  1126. {
  1127. struct mmc_host *mmc;
  1128. struct rtsx_usb_sdmmc *host;
  1129. struct rtsx_ucr *ucr;
  1130. #ifdef RTSX_USB_USE_LEDS_CLASS
  1131. int err;
  1132. #endif
  1133. int ret;
  1134. ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
  1135. if (!ucr)
  1136. return -ENXIO;
  1137. dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
  1138. mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(*host));
  1139. if (!mmc)
  1140. return -ENOMEM;
  1141. host = mmc_priv(mmc);
  1142. host->ucr = ucr;
  1143. host->mmc = mmc;
  1144. host->pdev = pdev;
  1145. platform_set_drvdata(pdev, host);
  1146. mutex_init(&host->host_mutex);
  1147. rtsx_usb_init_host(host);
  1148. pm_runtime_enable(&pdev->dev);
  1149. #ifdef RTSX_USB_USE_LEDS_CLASS
  1150. snprintf(host->led_name, sizeof(host->led_name),
  1151. "%s::", mmc_hostname(mmc));
  1152. host->led.name = host->led_name;
  1153. host->led.brightness = LED_OFF;
  1154. host->led.default_trigger = mmc_hostname(mmc);
  1155. host->led.brightness_set = rtsx_usb_led_control;
  1156. err = led_classdev_register(mmc_dev(mmc), &host->led);
  1157. if (err)
  1158. dev_err(&(pdev->dev),
  1159. "Failed to register LED device: %d\n", err);
  1160. INIT_WORK(&host->led_work, rtsx_usb_update_led);
  1161. #endif
  1162. ret = mmc_add_host(mmc);
  1163. if (ret) {
  1164. #ifdef RTSX_USB_USE_LEDS_CLASS
  1165. led_classdev_unregister(&host->led);
  1166. #endif
  1167. pm_runtime_disable(&pdev->dev);
  1168. return ret;
  1169. }
  1170. return 0;
  1171. }
  1172. static void rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
  1173. {
  1174. struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
  1175. struct mmc_host *mmc;
  1176. if (!host)
  1177. return;
  1178. mmc = host->mmc;
  1179. host->host_removal = true;
  1180. mutex_lock(&host->host_mutex);
  1181. if (host->mrq) {
  1182. dev_dbg(&(pdev->dev),
  1183. "%s: Controller removed during transfer\n",
  1184. mmc_hostname(mmc));
  1185. host->mrq->cmd->error = -ENOMEDIUM;
  1186. if (host->mrq->stop)
  1187. host->mrq->stop->error = -ENOMEDIUM;
  1188. mmc_request_done(mmc, host->mrq);
  1189. }
  1190. mutex_unlock(&host->host_mutex);
  1191. mmc_remove_host(mmc);
  1192. #ifdef RTSX_USB_USE_LEDS_CLASS
  1193. cancel_work_sync(&host->led_work);
  1194. led_classdev_unregister(&host->led);
  1195. #endif
  1196. pm_runtime_disable(&pdev->dev);
  1197. platform_set_drvdata(pdev, NULL);
  1198. dev_dbg(&(pdev->dev),
  1199. ": Realtek USB SD/MMC module has been removed\n");
  1200. }
  1201. static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev)
  1202. {
  1203. struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
  1204. host->mmc->caps &= ~MMC_CAP_NEEDS_POLL;
  1205. return 0;
  1206. }
  1207. static int rtsx_usb_sdmmc_runtime_resume(struct device *dev)
  1208. {
  1209. struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
  1210. host->mmc->caps |= MMC_CAP_NEEDS_POLL;
  1211. if (sdmmc_get_cd(host->mmc) == 1)
  1212. mmc_detect_change(host->mmc, 0);
  1213. return 0;
  1214. }
  1215. static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = {
  1216. RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend, rtsx_usb_sdmmc_runtime_resume, NULL)
  1217. };
  1218. static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
  1219. {
  1220. .name = "rtsx_usb_sdmmc",
  1221. }, {
  1222. /* sentinel */
  1223. }
  1224. };
  1225. MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
  1226. static struct platform_driver rtsx_usb_sdmmc_driver = {
  1227. .probe = rtsx_usb_sdmmc_drv_probe,
  1228. .remove = rtsx_usb_sdmmc_drv_remove,
  1229. .id_table = rtsx_usb_sdmmc_ids,
  1230. .driver = {
  1231. .name = "rtsx_usb_sdmmc",
  1232. .probe_type = PROBE_PREFER_ASYNCHRONOUS,
  1233. .pm = pm_ptr(&rtsx_usb_sdmmc_dev_pm_ops),
  1234. },
  1235. };
  1236. module_platform_driver(rtsx_usb_sdmmc_driver);
  1237. MODULE_LICENSE("GPL v2");
  1238. MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
  1239. MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");