mx2_emmaprp.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Support eMMa-PrP through mem2mem framework.
  4. *
  5. * eMMa-PrP is a piece of HW that allows fetching buffers
  6. * from one memory location and do several operations on
  7. * them such as scaling or format conversion giving, as a result
  8. * a new processed buffer in another memory location.
  9. *
  10. * Based on mem2mem_testdev.c by Pawel Osciak.
  11. *
  12. * Copyright (c) 2011 Vista Silicon S.L.
  13. * Javier Martin <javier.martin@vista-silicon.com>
  14. */
  15. #include <linux/module.h>
  16. #include <linux/clk.h>
  17. #include <linux/slab.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/io.h>
  20. #include <linux/platform_device.h>
  21. #include <media/v4l2-mem2mem.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-ioctl.h>
  24. #include <media/videobuf2-dma-contig.h>
  25. #include <linux/sizes.h>
  26. #define EMMAPRP_MODULE_NAME "mem2mem-emmaprp"
  27. MODULE_DESCRIPTION("Mem-to-mem device which supports eMMa-PrP present in mx2 SoCs");
  28. MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com");
  29. MODULE_LICENSE("GPL");
  30. MODULE_VERSION("0.0.1");
  31. static bool debug;
  32. module_param(debug, bool, 0644);
  33. #define MIN_W 32
  34. #define MIN_H 32
  35. #define MAX_W 2040
  36. #define MAX_H 2046
  37. #define S_ALIGN 1 /* multiple of 2 */
  38. #define W_ALIGN_YUV420 3 /* multiple of 8 */
  39. #define W_ALIGN_OTHERS 2 /* multiple of 4 */
  40. #define H_ALIGN 1 /* multiple of 2 */
  41. /* Flags that indicate a format can be used for capture/output */
  42. #define MEM2MEM_CAPTURE (1 << 0)
  43. #define MEM2MEM_OUTPUT (1 << 1)
  44. #define MEM2MEM_NAME "m2m-emmaprp"
  45. /* In bytes, per queue */
  46. #define MEM2MEM_VID_MEM_LIMIT SZ_16M
  47. #define dprintk(dev, fmt, arg...) \
  48. v4l2_dbg(1, debug, &dev->v4l2_dev, "%s: " fmt, __func__, ## arg)
  49. /* EMMA PrP */
  50. #define PRP_CNTL 0x00
  51. #define PRP_INTR_CNTL 0x04
  52. #define PRP_INTRSTATUS 0x08
  53. #define PRP_SOURCE_Y_PTR 0x0c
  54. #define PRP_SOURCE_CB_PTR 0x10
  55. #define PRP_SOURCE_CR_PTR 0x14
  56. #define PRP_DEST_RGB1_PTR 0x18
  57. #define PRP_DEST_RGB2_PTR 0x1c
  58. #define PRP_DEST_Y_PTR 0x20
  59. #define PRP_DEST_CB_PTR 0x24
  60. #define PRP_DEST_CR_PTR 0x28
  61. #define PRP_SRC_FRAME_SIZE 0x2c
  62. #define PRP_DEST_CH1_LINE_STRIDE 0x30
  63. #define PRP_SRC_PIXEL_FORMAT_CNTL 0x34
  64. #define PRP_CH1_PIXEL_FORMAT_CNTL 0x38
  65. #define PRP_CH1_OUT_IMAGE_SIZE 0x3c
  66. #define PRP_CH2_OUT_IMAGE_SIZE 0x40
  67. #define PRP_SRC_LINE_STRIDE 0x44
  68. #define PRP_CSC_COEF_012 0x48
  69. #define PRP_CSC_COEF_345 0x4c
  70. #define PRP_CSC_COEF_678 0x50
  71. #define PRP_CH1_RZ_HORI_COEF1 0x54
  72. #define PRP_CH1_RZ_HORI_COEF2 0x58
  73. #define PRP_CH1_RZ_HORI_VALID 0x5c
  74. #define PRP_CH1_RZ_VERT_COEF1 0x60
  75. #define PRP_CH1_RZ_VERT_COEF2 0x64
  76. #define PRP_CH1_RZ_VERT_VALID 0x68
  77. #define PRP_CH2_RZ_HORI_COEF1 0x6c
  78. #define PRP_CH2_RZ_HORI_COEF2 0x70
  79. #define PRP_CH2_RZ_HORI_VALID 0x74
  80. #define PRP_CH2_RZ_VERT_COEF1 0x78
  81. #define PRP_CH2_RZ_VERT_COEF2 0x7c
  82. #define PRP_CH2_RZ_VERT_VALID 0x80
  83. #define PRP_CNTL_CH1EN (1 << 0)
  84. #define PRP_CNTL_CH2EN (1 << 1)
  85. #define PRP_CNTL_CSIEN (1 << 2)
  86. #define PRP_CNTL_DATA_IN_YUV420 (0 << 3)
  87. #define PRP_CNTL_DATA_IN_YUV422 (1 << 3)
  88. #define PRP_CNTL_DATA_IN_RGB16 (2 << 3)
  89. #define PRP_CNTL_DATA_IN_RGB32 (3 << 3)
  90. #define PRP_CNTL_CH1_OUT_RGB8 (0 << 5)
  91. #define PRP_CNTL_CH1_OUT_RGB16 (1 << 5)
  92. #define PRP_CNTL_CH1_OUT_RGB32 (2 << 5)
  93. #define PRP_CNTL_CH1_OUT_YUV422 (3 << 5)
  94. #define PRP_CNTL_CH2_OUT_YUV420 (0 << 7)
  95. #define PRP_CNTL_CH2_OUT_YUV422 (1 << 7)
  96. #define PRP_CNTL_CH2_OUT_YUV444 (2 << 7)
  97. #define PRP_CNTL_CH1_LEN (1 << 9)
  98. #define PRP_CNTL_CH2_LEN (1 << 10)
  99. #define PRP_CNTL_SKIP_FRAME (1 << 11)
  100. #define PRP_CNTL_SWRST (1 << 12)
  101. #define PRP_CNTL_CLKEN (1 << 13)
  102. #define PRP_CNTL_WEN (1 << 14)
  103. #define PRP_CNTL_CH1BYP (1 << 15)
  104. #define PRP_CNTL_IN_TSKIP(x) ((x) << 16)
  105. #define PRP_CNTL_CH1_TSKIP(x) ((x) << 19)
  106. #define PRP_CNTL_CH2_TSKIP(x) ((x) << 22)
  107. #define PRP_CNTL_INPUT_FIFO_LEVEL(x) ((x) << 25)
  108. #define PRP_CNTL_RZ_FIFO_LEVEL(x) ((x) << 27)
  109. #define PRP_CNTL_CH2B1EN (1 << 29)
  110. #define PRP_CNTL_CH2B2EN (1 << 30)
  111. #define PRP_CNTL_CH2FEN (1UL << 31)
  112. #define PRP_SIZE_HEIGHT(x) (x)
  113. #define PRP_SIZE_WIDTH(x) ((x) << 16)
  114. /* IRQ Enable and status register */
  115. #define PRP_INTR_RDERR (1 << 0)
  116. #define PRP_INTR_CH1WERR (1 << 1)
  117. #define PRP_INTR_CH2WERR (1 << 2)
  118. #define PRP_INTR_CH1FC (1 << 3)
  119. #define PRP_INTR_CH2FC (1 << 5)
  120. #define PRP_INTR_LBOVF (1 << 7)
  121. #define PRP_INTR_CH2OVF (1 << 8)
  122. #define PRP_INTR_ST_RDERR (1 << 0)
  123. #define PRP_INTR_ST_CH1WERR (1 << 1)
  124. #define PRP_INTR_ST_CH2WERR (1 << 2)
  125. #define PRP_INTR_ST_CH2B2CI (1 << 3)
  126. #define PRP_INTR_ST_CH2B1CI (1 << 4)
  127. #define PRP_INTR_ST_CH1B2CI (1 << 5)
  128. #define PRP_INTR_ST_CH1B1CI (1 << 6)
  129. #define PRP_INTR_ST_LBOVF (1 << 7)
  130. #define PRP_INTR_ST_CH2OVF (1 << 8)
  131. struct emmaprp_fmt {
  132. u32 fourcc;
  133. /* Types the format can be used for */
  134. u32 types;
  135. };
  136. static struct emmaprp_fmt formats[] = {
  137. {
  138. .fourcc = V4L2_PIX_FMT_YUV420,
  139. .types = MEM2MEM_CAPTURE,
  140. },
  141. {
  142. .fourcc = V4L2_PIX_FMT_YUYV,
  143. .types = MEM2MEM_OUTPUT,
  144. },
  145. };
  146. /* Per-queue, driver-specific private data */
  147. struct emmaprp_q_data {
  148. unsigned int width;
  149. unsigned int height;
  150. unsigned int sizeimage;
  151. struct emmaprp_fmt *fmt;
  152. };
  153. enum {
  154. V4L2_M2M_SRC = 0,
  155. V4L2_M2M_DST = 1,
  156. };
  157. #define NUM_FORMATS ARRAY_SIZE(formats)
  158. static struct emmaprp_fmt *find_format(struct v4l2_format *f)
  159. {
  160. struct emmaprp_fmt *fmt;
  161. unsigned int k;
  162. for (k = 0; k < NUM_FORMATS; k++) {
  163. fmt = &formats[k];
  164. if (fmt->fourcc == f->fmt.pix.pixelformat)
  165. break;
  166. }
  167. if (k == NUM_FORMATS)
  168. return NULL;
  169. return &formats[k];
  170. }
  171. struct emmaprp_dev {
  172. struct v4l2_device v4l2_dev;
  173. struct video_device *vfd;
  174. struct mutex dev_mutex;
  175. spinlock_t irqlock;
  176. void __iomem *base_emma;
  177. struct clk *clk_emma_ahb, *clk_emma_ipg;
  178. struct v4l2_m2m_dev *m2m_dev;
  179. };
  180. struct emmaprp_ctx {
  181. struct v4l2_fh fh;
  182. struct emmaprp_dev *dev;
  183. /* Abort requested by m2m */
  184. int aborting;
  185. struct emmaprp_q_data q_data[2];
  186. };
  187. static inline struct emmaprp_ctx *file_to_emmaprp_ctx(struct file *filp)
  188. {
  189. return container_of(file_to_v4l2_fh(filp), struct emmaprp_ctx, fh);
  190. }
  191. static struct emmaprp_q_data *get_q_data(struct emmaprp_ctx *ctx,
  192. enum v4l2_buf_type type)
  193. {
  194. switch (type) {
  195. case V4L2_BUF_TYPE_VIDEO_OUTPUT:
  196. return &(ctx->q_data[V4L2_M2M_SRC]);
  197. case V4L2_BUF_TYPE_VIDEO_CAPTURE:
  198. return &(ctx->q_data[V4L2_M2M_DST]);
  199. default:
  200. BUG();
  201. }
  202. return NULL;
  203. }
  204. /*
  205. * mem2mem callbacks
  206. */
  207. static void emmaprp_job_abort(void *priv)
  208. {
  209. struct emmaprp_ctx *ctx = priv;
  210. struct emmaprp_dev *pcdev = ctx->dev;
  211. ctx->aborting = 1;
  212. dprintk(pcdev, "Aborting task\n");
  213. v4l2_m2m_job_finish(pcdev->m2m_dev, ctx->fh.m2m_ctx);
  214. }
  215. static inline void emmaprp_dump_regs(struct emmaprp_dev *pcdev)
  216. {
  217. dprintk(pcdev,
  218. "eMMa-PrP Registers:\n"
  219. " SOURCE_Y_PTR = 0x%08X\n"
  220. " SRC_FRAME_SIZE = 0x%08X\n"
  221. " DEST_Y_PTR = 0x%08X\n"
  222. " DEST_CR_PTR = 0x%08X\n"
  223. " DEST_CB_PTR = 0x%08X\n"
  224. " CH2_OUT_IMAGE_SIZE = 0x%08X\n"
  225. " CNTL = 0x%08X\n",
  226. readl(pcdev->base_emma + PRP_SOURCE_Y_PTR),
  227. readl(pcdev->base_emma + PRP_SRC_FRAME_SIZE),
  228. readl(pcdev->base_emma + PRP_DEST_Y_PTR),
  229. readl(pcdev->base_emma + PRP_DEST_CR_PTR),
  230. readl(pcdev->base_emma + PRP_DEST_CB_PTR),
  231. readl(pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE),
  232. readl(pcdev->base_emma + PRP_CNTL));
  233. }
  234. static void emmaprp_device_run(void *priv)
  235. {
  236. struct emmaprp_ctx *ctx = priv;
  237. struct emmaprp_q_data *s_q_data, *d_q_data;
  238. struct vb2_v4l2_buffer *src_buf, *dst_buf;
  239. struct emmaprp_dev *pcdev = ctx->dev;
  240. unsigned int s_width, s_height;
  241. unsigned int d_width, d_height;
  242. unsigned int d_size;
  243. dma_addr_t p_in, p_out;
  244. u32 tmp;
  245. src_buf = v4l2_m2m_next_src_buf(ctx->fh.m2m_ctx);
  246. dst_buf = v4l2_m2m_next_dst_buf(ctx->fh.m2m_ctx);
  247. s_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
  248. s_width = s_q_data->width;
  249. s_height = s_q_data->height;
  250. d_q_data = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
  251. d_width = d_q_data->width;
  252. d_height = d_q_data->height;
  253. d_size = d_width * d_height;
  254. p_in = vb2_dma_contig_plane_dma_addr(&src_buf->vb2_buf, 0);
  255. p_out = vb2_dma_contig_plane_dma_addr(&dst_buf->vb2_buf, 0);
  256. if (!p_in || !p_out) {
  257. v4l2_err(&pcdev->v4l2_dev,
  258. "Acquiring kernel pointers to buffers failed\n");
  259. return;
  260. }
  261. /* Input frame parameters */
  262. writel(p_in, pcdev->base_emma + PRP_SOURCE_Y_PTR);
  263. writel(PRP_SIZE_WIDTH(s_width) | PRP_SIZE_HEIGHT(s_height),
  264. pcdev->base_emma + PRP_SRC_FRAME_SIZE);
  265. /* Output frame parameters */
  266. writel(p_out, pcdev->base_emma + PRP_DEST_Y_PTR);
  267. writel(p_out + d_size, pcdev->base_emma + PRP_DEST_CB_PTR);
  268. writel(p_out + d_size + (d_size >> 2),
  269. pcdev->base_emma + PRP_DEST_CR_PTR);
  270. writel(PRP_SIZE_WIDTH(d_width) | PRP_SIZE_HEIGHT(d_height),
  271. pcdev->base_emma + PRP_CH2_OUT_IMAGE_SIZE);
  272. /* IRQ configuration */
  273. tmp = readl(pcdev->base_emma + PRP_INTR_CNTL);
  274. writel(tmp | PRP_INTR_RDERR |
  275. PRP_INTR_CH2WERR |
  276. PRP_INTR_CH2FC,
  277. pcdev->base_emma + PRP_INTR_CNTL);
  278. emmaprp_dump_regs(pcdev);
  279. /* Enable transfer */
  280. tmp = readl(pcdev->base_emma + PRP_CNTL);
  281. writel(tmp | PRP_CNTL_CH2_OUT_YUV420 |
  282. PRP_CNTL_DATA_IN_YUV422 |
  283. PRP_CNTL_CH2EN,
  284. pcdev->base_emma + PRP_CNTL);
  285. }
  286. static irqreturn_t emmaprp_irq(int irq_emma, void *data)
  287. {
  288. struct emmaprp_dev *pcdev = data;
  289. struct emmaprp_ctx *curr_ctx;
  290. struct vb2_v4l2_buffer *src_vb, *dst_vb;
  291. unsigned long flags;
  292. u32 irqst;
  293. /* Check irq flags and clear irq */
  294. irqst = readl(pcdev->base_emma + PRP_INTRSTATUS);
  295. writel(irqst, pcdev->base_emma + PRP_INTRSTATUS);
  296. dprintk(pcdev, "irqst = 0x%08x\n", irqst);
  297. curr_ctx = v4l2_m2m_get_curr_priv(pcdev->m2m_dev);
  298. if (curr_ctx == NULL) {
  299. pr_err("Instance released before the end of transaction\n");
  300. return IRQ_HANDLED;
  301. }
  302. if (!curr_ctx->aborting) {
  303. if ((irqst & PRP_INTR_ST_RDERR) ||
  304. (irqst & PRP_INTR_ST_CH2WERR)) {
  305. pr_err("PrP bus error occurred, this transfer is probably corrupted\n");
  306. writel(PRP_CNTL_SWRST, pcdev->base_emma + PRP_CNTL);
  307. } else if (irqst & PRP_INTR_ST_CH2B1CI) { /* buffer ready */
  308. src_vb = v4l2_m2m_src_buf_remove(curr_ctx->fh.m2m_ctx);
  309. dst_vb = v4l2_m2m_dst_buf_remove(curr_ctx->fh.m2m_ctx);
  310. dst_vb->vb2_buf.timestamp = src_vb->vb2_buf.timestamp;
  311. dst_vb->flags &=
  312. ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  313. dst_vb->flags |=
  314. src_vb->flags
  315. & V4L2_BUF_FLAG_TSTAMP_SRC_MASK;
  316. dst_vb->timecode = src_vb->timecode;
  317. spin_lock_irqsave(&pcdev->irqlock, flags);
  318. v4l2_m2m_buf_done(src_vb, VB2_BUF_STATE_DONE);
  319. v4l2_m2m_buf_done(dst_vb, VB2_BUF_STATE_DONE);
  320. spin_unlock_irqrestore(&pcdev->irqlock, flags);
  321. }
  322. }
  323. v4l2_m2m_job_finish(pcdev->m2m_dev, curr_ctx->fh.m2m_ctx);
  324. return IRQ_HANDLED;
  325. }
  326. /*
  327. * video ioctls
  328. */
  329. static int vidioc_querycap(struct file *file, void *priv,
  330. struct v4l2_capability *cap)
  331. {
  332. strscpy(cap->driver, MEM2MEM_NAME, sizeof(cap->driver));
  333. strscpy(cap->card, MEM2MEM_NAME, sizeof(cap->card));
  334. return 0;
  335. }
  336. static int enum_fmt(struct v4l2_fmtdesc *f, u32 type)
  337. {
  338. int i, num;
  339. struct emmaprp_fmt *fmt;
  340. num = 0;
  341. for (i = 0; i < NUM_FORMATS; ++i) {
  342. if (formats[i].types & type) {
  343. /* index-th format of type type found ? */
  344. if (num == f->index)
  345. break;
  346. /* Correct type but haven't reached our index yet,
  347. * just increment per-type index */
  348. ++num;
  349. }
  350. }
  351. if (i < NUM_FORMATS) {
  352. /* Format found */
  353. fmt = &formats[i];
  354. f->pixelformat = fmt->fourcc;
  355. return 0;
  356. }
  357. /* Format not found */
  358. return -EINVAL;
  359. }
  360. static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
  361. struct v4l2_fmtdesc *f)
  362. {
  363. return enum_fmt(f, MEM2MEM_CAPTURE);
  364. }
  365. static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
  366. struct v4l2_fmtdesc *f)
  367. {
  368. return enum_fmt(f, MEM2MEM_OUTPUT);
  369. }
  370. static int vidioc_g_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
  371. {
  372. struct emmaprp_q_data *q_data;
  373. q_data = get_q_data(ctx, f->type);
  374. f->fmt.pix.width = q_data->width;
  375. f->fmt.pix.height = q_data->height;
  376. f->fmt.pix.field = V4L2_FIELD_NONE;
  377. f->fmt.pix.pixelformat = q_data->fmt->fourcc;
  378. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
  379. f->fmt.pix.bytesperline = q_data->width * 3 / 2;
  380. else /* YUYV */
  381. f->fmt.pix.bytesperline = q_data->width * 2;
  382. f->fmt.pix.sizeimage = q_data->sizeimage;
  383. return 0;
  384. }
  385. static int vidioc_g_fmt_vid_out(struct file *file, void *priv,
  386. struct v4l2_format *f)
  387. {
  388. return vidioc_g_fmt(file_to_emmaprp_ctx(file), f);
  389. }
  390. static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
  391. struct v4l2_format *f)
  392. {
  393. return vidioc_g_fmt(file_to_emmaprp_ctx(file), f);
  394. }
  395. static int vidioc_try_fmt(struct v4l2_format *f)
  396. {
  397. enum v4l2_field field;
  398. if (!find_format(f))
  399. return -EINVAL;
  400. field = f->fmt.pix.field;
  401. if (field == V4L2_FIELD_ANY)
  402. field = V4L2_FIELD_NONE;
  403. else if (V4L2_FIELD_NONE != field)
  404. return -EINVAL;
  405. /* V4L2 specification suggests the driver corrects the format struct
  406. * if any of the dimensions is unsupported */
  407. f->fmt.pix.field = field;
  408. if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
  409. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  410. W_ALIGN_YUV420, &f->fmt.pix.height,
  411. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  412. f->fmt.pix.bytesperline = f->fmt.pix.width * 3 / 2;
  413. } else {
  414. v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
  415. W_ALIGN_OTHERS, &f->fmt.pix.height,
  416. MIN_H, MAX_H, H_ALIGN, S_ALIGN);
  417. f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
  418. }
  419. f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
  420. return 0;
  421. }
  422. static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
  423. struct v4l2_format *f)
  424. {
  425. struct emmaprp_ctx *ctx = file_to_emmaprp_ctx(file);
  426. struct emmaprp_fmt *fmt;
  427. fmt = find_format(f);
  428. if (!fmt || !(fmt->types & MEM2MEM_CAPTURE)) {
  429. v4l2_err(&ctx->dev->v4l2_dev,
  430. "Fourcc format (0x%08x) invalid.\n",
  431. f->fmt.pix.pixelformat);
  432. return -EINVAL;
  433. }
  434. return vidioc_try_fmt(f);
  435. }
  436. static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
  437. struct v4l2_format *f)
  438. {
  439. struct emmaprp_ctx *ctx = file_to_emmaprp_ctx(file);
  440. struct emmaprp_fmt *fmt;
  441. fmt = find_format(f);
  442. if (!fmt || !(fmt->types & MEM2MEM_OUTPUT)) {
  443. v4l2_err(&ctx->dev->v4l2_dev,
  444. "Fourcc format (0x%08x) invalid.\n",
  445. f->fmt.pix.pixelformat);
  446. return -EINVAL;
  447. }
  448. return vidioc_try_fmt(f);
  449. }
  450. static int vidioc_s_fmt(struct emmaprp_ctx *ctx, struct v4l2_format *f)
  451. {
  452. struct emmaprp_q_data *q_data;
  453. struct vb2_queue *vq;
  454. int ret;
  455. vq = v4l2_m2m_get_vq(ctx->fh.m2m_ctx, f->type);
  456. q_data = get_q_data(ctx, f->type);
  457. if (!q_data)
  458. return -EINVAL;
  459. if (vb2_is_busy(vq)) {
  460. v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
  461. return -EBUSY;
  462. }
  463. ret = vidioc_try_fmt(f);
  464. if (ret)
  465. return ret;
  466. q_data->fmt = find_format(f);
  467. q_data->width = f->fmt.pix.width;
  468. q_data->height = f->fmt.pix.height;
  469. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
  470. q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
  471. else /* YUYV */
  472. q_data->sizeimage = q_data->width * q_data->height * 2;
  473. dprintk(ctx->dev,
  474. "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
  475. f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
  476. return 0;
  477. }
  478. static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
  479. struct v4l2_format *f)
  480. {
  481. int ret;
  482. ret = vidioc_try_fmt_vid_cap(file, priv, f);
  483. if (ret)
  484. return ret;
  485. return vidioc_s_fmt(file_to_emmaprp_ctx(file), f);
  486. }
  487. static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
  488. struct v4l2_format *f)
  489. {
  490. int ret;
  491. ret = vidioc_try_fmt_vid_out(file, priv, f);
  492. if (ret)
  493. return ret;
  494. return vidioc_s_fmt(file_to_emmaprp_ctx(file), f);
  495. }
  496. static const struct v4l2_ioctl_ops emmaprp_ioctl_ops = {
  497. .vidioc_querycap = vidioc_querycap,
  498. .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
  499. .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
  500. .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
  501. .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
  502. .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
  503. .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out,
  504. .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
  505. .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
  506. .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
  507. .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
  508. .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
  509. .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
  510. .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
  511. .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
  512. .vidioc_streamon = v4l2_m2m_ioctl_streamon,
  513. .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
  514. };
  515. /*
  516. * Queue operations
  517. */
  518. static int emmaprp_queue_setup(struct vb2_queue *vq,
  519. unsigned int *nbuffers, unsigned int *nplanes,
  520. unsigned int sizes[], struct device *alloc_devs[])
  521. {
  522. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vq);
  523. struct emmaprp_q_data *q_data;
  524. unsigned int size, count = *nbuffers;
  525. q_data = get_q_data(ctx, vq->type);
  526. if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420)
  527. size = q_data->width * q_data->height * 3 / 2;
  528. else
  529. size = q_data->width * q_data->height * 2;
  530. while (size * count > MEM2MEM_VID_MEM_LIMIT)
  531. (count)--;
  532. *nplanes = 1;
  533. *nbuffers = count;
  534. sizes[0] = size;
  535. dprintk(ctx->dev, "get %d buffer(s) of size %d each.\n", count, size);
  536. return 0;
  537. }
  538. static int emmaprp_buf_prepare(struct vb2_buffer *vb)
  539. {
  540. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  541. struct emmaprp_q_data *q_data;
  542. dprintk(ctx->dev, "type: %d\n", vb->vb2_queue->type);
  543. q_data = get_q_data(ctx, vb->vb2_queue->type);
  544. if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
  545. dprintk(ctx->dev,
  546. "%s data will not fit into plane(%lu < %lu)\n",
  547. __func__, vb2_plane_size(vb, 0),
  548. (long)q_data->sizeimage);
  549. return -EINVAL;
  550. }
  551. vb2_set_plane_payload(vb, 0, q_data->sizeimage);
  552. return 0;
  553. }
  554. static void emmaprp_buf_queue(struct vb2_buffer *vb)
  555. {
  556. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  557. struct emmaprp_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
  558. v4l2_m2m_buf_queue(ctx->fh.m2m_ctx, vbuf);
  559. }
  560. static const struct vb2_ops emmaprp_qops = {
  561. .queue_setup = emmaprp_queue_setup,
  562. .buf_prepare = emmaprp_buf_prepare,
  563. .buf_queue = emmaprp_buf_queue,
  564. };
  565. static int queue_init(void *priv, struct vb2_queue *src_vq,
  566. struct vb2_queue *dst_vq)
  567. {
  568. struct emmaprp_ctx *ctx = priv;
  569. int ret;
  570. src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
  571. src_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  572. src_vq->drv_priv = ctx;
  573. src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  574. src_vq->ops = &emmaprp_qops;
  575. src_vq->mem_ops = &vb2_dma_contig_memops;
  576. src_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  577. src_vq->dev = ctx->dev->v4l2_dev.dev;
  578. src_vq->lock = &ctx->dev->dev_mutex;
  579. ret = vb2_queue_init(src_vq);
  580. if (ret)
  581. return ret;
  582. dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  583. dst_vq->io_modes = VB2_MMAP | VB2_USERPTR | VB2_DMABUF;
  584. dst_vq->drv_priv = ctx;
  585. dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
  586. dst_vq->ops = &emmaprp_qops;
  587. dst_vq->mem_ops = &vb2_dma_contig_memops;
  588. dst_vq->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_COPY;
  589. dst_vq->dev = ctx->dev->v4l2_dev.dev;
  590. dst_vq->lock = &ctx->dev->dev_mutex;
  591. return vb2_queue_init(dst_vq);
  592. }
  593. /*
  594. * File operations
  595. */
  596. static int emmaprp_open(struct file *file)
  597. {
  598. struct emmaprp_dev *pcdev = video_drvdata(file);
  599. struct emmaprp_ctx *ctx;
  600. ctx = kzalloc_obj(*ctx);
  601. if (!ctx)
  602. return -ENOMEM;
  603. v4l2_fh_init(&ctx->fh, video_devdata(file));
  604. ctx->dev = pcdev;
  605. if (mutex_lock_interruptible(&pcdev->dev_mutex)) {
  606. kfree(ctx);
  607. return -ERESTARTSYS;
  608. }
  609. ctx->fh.m2m_ctx = v4l2_m2m_ctx_init(pcdev->m2m_dev, ctx, &queue_init);
  610. if (IS_ERR(ctx->fh.m2m_ctx)) {
  611. int ret = PTR_ERR(ctx->fh.m2m_ctx);
  612. mutex_unlock(&pcdev->dev_mutex);
  613. kfree(ctx);
  614. return ret;
  615. }
  616. clk_prepare_enable(pcdev->clk_emma_ipg);
  617. clk_prepare_enable(pcdev->clk_emma_ahb);
  618. ctx->q_data[V4L2_M2M_SRC].fmt = &formats[1];
  619. ctx->q_data[V4L2_M2M_DST].fmt = &formats[0];
  620. v4l2_fh_add(&ctx->fh, file);
  621. mutex_unlock(&pcdev->dev_mutex);
  622. dprintk(pcdev, "Created instance %p, m2m_ctx: %p\n", ctx, ctx->fh.m2m_ctx);
  623. return 0;
  624. }
  625. static int emmaprp_release(struct file *file)
  626. {
  627. struct emmaprp_dev *pcdev = video_drvdata(file);
  628. struct emmaprp_ctx *ctx = file_to_emmaprp_ctx(file);
  629. dprintk(pcdev, "Releasing instance %p\n", ctx);
  630. mutex_lock(&pcdev->dev_mutex);
  631. clk_disable_unprepare(pcdev->clk_emma_ahb);
  632. clk_disable_unprepare(pcdev->clk_emma_ipg);
  633. v4l2_fh_del(&ctx->fh, file);
  634. v4l2_fh_exit(&ctx->fh);
  635. v4l2_m2m_ctx_release(ctx->fh.m2m_ctx);
  636. mutex_unlock(&pcdev->dev_mutex);
  637. kfree(ctx);
  638. return 0;
  639. }
  640. static const struct v4l2_file_operations emmaprp_fops = {
  641. .owner = THIS_MODULE,
  642. .open = emmaprp_open,
  643. .release = emmaprp_release,
  644. .poll = v4l2_m2m_fop_poll,
  645. .unlocked_ioctl = video_ioctl2,
  646. .mmap = v4l2_m2m_fop_mmap,
  647. };
  648. static const struct video_device emmaprp_videodev = {
  649. .name = MEM2MEM_NAME,
  650. .fops = &emmaprp_fops,
  651. .ioctl_ops = &emmaprp_ioctl_ops,
  652. .minor = -1,
  653. .release = video_device_release,
  654. .vfl_dir = VFL_DIR_M2M,
  655. .device_caps = V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING,
  656. };
  657. static const struct v4l2_m2m_ops m2m_ops = {
  658. .device_run = emmaprp_device_run,
  659. .job_abort = emmaprp_job_abort,
  660. };
  661. static int emmaprp_probe(struct platform_device *pdev)
  662. {
  663. struct emmaprp_dev *pcdev;
  664. struct video_device *vfd;
  665. int irq, ret;
  666. pcdev = devm_kzalloc(&pdev->dev, sizeof(*pcdev), GFP_KERNEL);
  667. if (!pcdev)
  668. return -ENOMEM;
  669. spin_lock_init(&pcdev->irqlock);
  670. pcdev->clk_emma_ipg = devm_clk_get(&pdev->dev, "ipg");
  671. if (IS_ERR(pcdev->clk_emma_ipg)) {
  672. return PTR_ERR(pcdev->clk_emma_ipg);
  673. }
  674. pcdev->clk_emma_ahb = devm_clk_get(&pdev->dev, "ahb");
  675. if (IS_ERR(pcdev->clk_emma_ahb))
  676. return PTR_ERR(pcdev->clk_emma_ahb);
  677. pcdev->base_emma = devm_platform_ioremap_resource(pdev, 0);
  678. if (IS_ERR(pcdev->base_emma))
  679. return PTR_ERR(pcdev->base_emma);
  680. ret = v4l2_device_register(&pdev->dev, &pcdev->v4l2_dev);
  681. if (ret)
  682. return ret;
  683. mutex_init(&pcdev->dev_mutex);
  684. vfd = video_device_alloc();
  685. if (!vfd) {
  686. v4l2_err(&pcdev->v4l2_dev, "Failed to allocate video device\n");
  687. ret = -ENOMEM;
  688. goto unreg_dev;
  689. }
  690. *vfd = emmaprp_videodev;
  691. vfd->lock = &pcdev->dev_mutex;
  692. vfd->v4l2_dev = &pcdev->v4l2_dev;
  693. video_set_drvdata(vfd, pcdev);
  694. pcdev->vfd = vfd;
  695. v4l2_info(&pcdev->v4l2_dev, EMMAPRP_MODULE_NAME
  696. " Device registered as /dev/video%d\n", vfd->num);
  697. platform_set_drvdata(pdev, pcdev);
  698. irq = platform_get_irq(pdev, 0);
  699. if (irq < 0) {
  700. ret = irq;
  701. goto rel_vdev;
  702. }
  703. ret = devm_request_irq(&pdev->dev, irq, emmaprp_irq, 0,
  704. dev_name(&pdev->dev), pcdev);
  705. if (ret)
  706. goto rel_vdev;
  707. pcdev->m2m_dev = v4l2_m2m_init(&m2m_ops);
  708. if (IS_ERR(pcdev->m2m_dev)) {
  709. v4l2_err(&pcdev->v4l2_dev, "Failed to init mem2mem device\n");
  710. ret = PTR_ERR(pcdev->m2m_dev);
  711. goto rel_vdev;
  712. }
  713. ret = video_register_device(vfd, VFL_TYPE_VIDEO, 0);
  714. if (ret) {
  715. v4l2_err(&pcdev->v4l2_dev, "Failed to register video device\n");
  716. goto rel_m2m;
  717. }
  718. return 0;
  719. rel_m2m:
  720. v4l2_m2m_release(pcdev->m2m_dev);
  721. rel_vdev:
  722. video_device_release(vfd);
  723. unreg_dev:
  724. v4l2_device_unregister(&pcdev->v4l2_dev);
  725. mutex_destroy(&pcdev->dev_mutex);
  726. return ret;
  727. }
  728. static void emmaprp_remove(struct platform_device *pdev)
  729. {
  730. struct emmaprp_dev *pcdev = platform_get_drvdata(pdev);
  731. v4l2_info(&pcdev->v4l2_dev, "Removing " EMMAPRP_MODULE_NAME);
  732. video_unregister_device(pcdev->vfd);
  733. v4l2_m2m_release(pcdev->m2m_dev);
  734. v4l2_device_unregister(&pcdev->v4l2_dev);
  735. mutex_destroy(&pcdev->dev_mutex);
  736. }
  737. static struct platform_driver emmaprp_pdrv = {
  738. .probe = emmaprp_probe,
  739. .remove = emmaprp_remove,
  740. .driver = {
  741. .name = MEM2MEM_NAME,
  742. },
  743. };
  744. module_platform_driver(emmaprp_pdrv);