vdec.c 50 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright 2020-2021 NXP
  4. */
  5. #include <linux/init.h>
  6. #include <linux/interconnect.h>
  7. #include <linux/ioctl.h>
  8. #include <linux/list.h>
  9. #include <linux/kernel.h>
  10. #include <linux/module.h>
  11. #include <linux/videodev2.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-event.h>
  14. #include <media/v4l2-mem2mem.h>
  15. #include <media/v4l2-ioctl.h>
  16. #include <media/videobuf2-v4l2.h>
  17. #include <media/videobuf2-dma-contig.h>
  18. #include "vpu.h"
  19. #include "vpu_defs.h"
  20. #include "vpu_core.h"
  21. #include "vpu_helpers.h"
  22. #include "vpu_v4l2.h"
  23. #include "vpu_cmds.h"
  24. #include "vpu_rpc.h"
  25. #define VDEC_SLOT_CNT_DFT 32
  26. #define VDEC_MIN_BUFFER_CAP 8
  27. #define VDEC_MIN_BUFFER_OUT 8
  28. struct vdec_fs_info {
  29. char name[8];
  30. u32 type;
  31. u32 max_count;
  32. u32 req_count;
  33. u32 count;
  34. u32 index;
  35. u32 size;
  36. struct vpu_buffer buffer[32];
  37. u32 tag;
  38. };
  39. struct vdec_frame_store_t {
  40. struct vpu_vb2_buffer *curr;
  41. struct vpu_vb2_buffer *pend;
  42. dma_addr_t addr;
  43. unsigned int state;
  44. u32 tag;
  45. };
  46. struct vdec_t {
  47. u32 seq_hdr_found;
  48. struct vpu_buffer udata;
  49. struct vpu_decode_params params;
  50. struct vpu_dec_codec_info codec_info;
  51. enum vpu_codec_state state;
  52. struct vdec_frame_store_t *slots;
  53. u32 slot_count;
  54. u32 req_frame_count;
  55. struct vdec_fs_info mbi;
  56. struct vdec_fs_info dcp;
  57. u32 seq_tag;
  58. bool reset_codec;
  59. bool fixed_fmt;
  60. u32 decoded_frame_count;
  61. u32 display_frame_count;
  62. u32 sequence;
  63. u32 eos_received;
  64. bool is_source_changed;
  65. u32 source_change;
  66. u32 drain;
  67. bool aborting;
  68. };
  69. static const struct vpu_format vdec_formats[] = {
  70. {
  71. .pixfmt = V4L2_PIX_FMT_NV12M_8L128,
  72. .mem_planes = 2,
  73. .comp_planes = 2,
  74. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  75. .sibling = V4L2_PIX_FMT_NV12_8L128,
  76. },
  77. {
  78. .pixfmt = V4L2_PIX_FMT_NV12_8L128,
  79. .mem_planes = 1,
  80. .comp_planes = 2,
  81. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  82. .sibling = V4L2_PIX_FMT_NV12M_8L128,
  83. },
  84. {
  85. .pixfmt = V4L2_PIX_FMT_NV12M_10BE_8L128,
  86. .mem_planes = 2,
  87. .comp_planes = 2,
  88. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  89. .sibling = V4L2_PIX_FMT_NV12_10BE_8L128,
  90. },
  91. {
  92. .pixfmt = V4L2_PIX_FMT_NV12_10BE_8L128,
  93. .mem_planes = 1,
  94. .comp_planes = 2,
  95. .type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE,
  96. .sibling = V4L2_PIX_FMT_NV12M_10BE_8L128
  97. },
  98. {
  99. .pixfmt = V4L2_PIX_FMT_H264,
  100. .mem_planes = 1,
  101. .comp_planes = 1,
  102. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  103. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  104. },
  105. {
  106. .pixfmt = V4L2_PIX_FMT_H264_MVC,
  107. .mem_planes = 1,
  108. .comp_planes = 1,
  109. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  110. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  111. },
  112. {
  113. .pixfmt = V4L2_PIX_FMT_HEVC,
  114. .mem_planes = 1,
  115. .comp_planes = 1,
  116. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  117. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  118. },
  119. {
  120. .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_G,
  121. .mem_planes = 1,
  122. .comp_planes = 1,
  123. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  124. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  125. },
  126. {
  127. .pixfmt = V4L2_PIX_FMT_VC1_ANNEX_L,
  128. .mem_planes = 1,
  129. .comp_planes = 1,
  130. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  131. .flags = V4L2_FMT_FLAG_COMPRESSED
  132. },
  133. {
  134. .pixfmt = V4L2_PIX_FMT_MPEG2,
  135. .mem_planes = 1,
  136. .comp_planes = 1,
  137. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  138. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  139. },
  140. {
  141. .pixfmt = V4L2_PIX_FMT_MPEG4,
  142. .mem_planes = 1,
  143. .comp_planes = 1,
  144. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  145. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  146. },
  147. {
  148. .pixfmt = V4L2_PIX_FMT_XVID,
  149. .mem_planes = 1,
  150. .comp_planes = 1,
  151. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  152. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  153. },
  154. {
  155. .pixfmt = V4L2_PIX_FMT_VP8,
  156. .mem_planes = 1,
  157. .comp_planes = 1,
  158. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  159. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  160. },
  161. {
  162. .pixfmt = V4L2_PIX_FMT_H263,
  163. .mem_planes = 1,
  164. .comp_planes = 1,
  165. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  166. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  167. },
  168. {
  169. .pixfmt = V4L2_PIX_FMT_SPK,
  170. .mem_planes = 1,
  171. .comp_planes = 1,
  172. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  173. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  174. },
  175. {
  176. .pixfmt = V4L2_PIX_FMT_RV30,
  177. .mem_planes = 1,
  178. .comp_planes = 1,
  179. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  180. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  181. },
  182. {
  183. .pixfmt = V4L2_PIX_FMT_RV40,
  184. .mem_planes = 1,
  185. .comp_planes = 1,
  186. .type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE,
  187. .flags = V4L2_FMT_FLAG_DYN_RESOLUTION | V4L2_FMT_FLAG_COMPRESSED
  188. },
  189. {0, 0, 0, 0},
  190. };
  191. static int vdec_op_s_ctrl(struct v4l2_ctrl *ctrl)
  192. {
  193. struct vpu_inst *inst = ctrl_to_inst(ctrl);
  194. struct vdec_t *vdec = inst->priv;
  195. int ret = 0;
  196. switch (ctrl->id) {
  197. case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE:
  198. vdec->params.display_delay_enable = ctrl->val;
  199. break;
  200. case V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY:
  201. vdec->params.display_delay = ctrl->val;
  202. break;
  203. default:
  204. ret = -EINVAL;
  205. break;
  206. }
  207. return ret;
  208. }
  209. static const struct v4l2_ctrl_ops vdec_ctrl_ops = {
  210. .s_ctrl = vdec_op_s_ctrl,
  211. .g_volatile_ctrl = vpu_helper_g_volatile_ctrl,
  212. };
  213. static int vdec_ctrl_init(struct vpu_inst *inst)
  214. {
  215. struct v4l2_ctrl *ctrl;
  216. int ret;
  217. ret = v4l2_ctrl_handler_init(&inst->ctrl_handler, 20);
  218. if (ret)
  219. return ret;
  220. v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
  221. V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY,
  222. 0, 0, 1, 0);
  223. v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
  224. V4L2_CID_MPEG_VIDEO_DEC_DISPLAY_DELAY_ENABLE,
  225. 0, 1, 1, 0);
  226. v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
  227. V4L2_CID_MPEG_VIDEO_H264_PROFILE,
  228. V4L2_MPEG_VIDEO_H264_PROFILE_MULTIVIEW_HIGH,
  229. ~((1 << V4L2_MPEG_VIDEO_H264_PROFILE_BASELINE) |
  230. (1 << V4L2_MPEG_VIDEO_H264_PROFILE_CONSTRAINED_BASELINE) |
  231. (1 << V4L2_MPEG_VIDEO_H264_PROFILE_MAIN) |
  232. (1 << V4L2_MPEG_VIDEO_H264_PROFILE_EXTENDED) |
  233. (1 << V4L2_MPEG_VIDEO_H264_PROFILE_HIGH)),
  234. V4L2_MPEG_VIDEO_H264_PROFILE_MAIN);
  235. v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
  236. V4L2_CID_MPEG_VIDEO_H264_LEVEL,
  237. V4L2_MPEG_VIDEO_H264_LEVEL_6_2,
  238. 0,
  239. V4L2_MPEG_VIDEO_H264_LEVEL_4_0);
  240. v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
  241. V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
  242. V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,
  243. ~((1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN) |
  244. (1 << V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10)),
  245. V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN);
  246. v4l2_ctrl_new_std_menu(&inst->ctrl_handler, NULL,
  247. V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
  248. V4L2_MPEG_VIDEO_HEVC_LEVEL_6_2,
  249. 0,
  250. V4L2_MPEG_VIDEO_HEVC_LEVEL_4);
  251. ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
  252. V4L2_CID_MIN_BUFFERS_FOR_CAPTURE, 1, 32, 1, 2);
  253. if (ctrl)
  254. ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
  255. ctrl = v4l2_ctrl_new_std(&inst->ctrl_handler, &vdec_ctrl_ops,
  256. V4L2_CID_MIN_BUFFERS_FOR_OUTPUT, 1, 32, 1, 2);
  257. if (ctrl)
  258. ctrl->flags |= V4L2_CTRL_FLAG_VOLATILE;
  259. if (inst->ctrl_handler.error) {
  260. ret = inst->ctrl_handler.error;
  261. v4l2_ctrl_handler_free(&inst->ctrl_handler);
  262. return ret;
  263. }
  264. ret = v4l2_ctrl_handler_setup(&inst->ctrl_handler);
  265. if (ret) {
  266. dev_err(inst->dev, "[%d] setup ctrls fail, ret = %d\n", inst->id, ret);
  267. v4l2_ctrl_handler_free(&inst->ctrl_handler);
  268. return ret;
  269. }
  270. return 0;
  271. }
  272. static void vdec_attach_frame_store(struct vpu_inst *inst, struct vb2_buffer *vb)
  273. {
  274. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  275. struct vpu_vb2_buffer *vpu_buf = to_vpu_vb2_buffer(vbuf);
  276. struct vdec_t *vdec = inst->priv;
  277. struct vdec_frame_store_t *new_slots = NULL;
  278. dma_addr_t addr;
  279. int i;
  280. addr = vpu_get_vb_phy_addr(vb, 0);
  281. for (i = 0; i < vdec->slot_count; i++) {
  282. if (addr == vdec->slots[i].addr) {
  283. if (vdec->slots[i].curr && vdec->slots[i].curr != vpu_buf) {
  284. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_CHANGED);
  285. vdec->slots[i].pend = vpu_buf;
  286. } else {
  287. vpu_set_buffer_state(vbuf, vdec->slots[i].state);
  288. }
  289. vpu_buf->fs_id = i;
  290. return;
  291. }
  292. }
  293. for (i = 0; i < vdec->slot_count; i++) {
  294. if (!vdec->slots[i].addr) {
  295. vdec->slots[i].addr = addr;
  296. vpu_buf->fs_id = i;
  297. return;
  298. }
  299. }
  300. new_slots = krealloc_array(vdec->slots, vdec->slot_count * 2,
  301. sizeof(*vdec->slots),
  302. GFP_KERNEL | __GFP_ZERO);
  303. if (!new_slots) {
  304. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_ERROR);
  305. return;
  306. }
  307. vdec->slots = new_slots;
  308. vdec->slot_count *= 2;
  309. vdec->slots[i].addr = addr;
  310. vpu_buf->fs_id = i;
  311. }
  312. static void vdec_reset_frame_store(struct vpu_inst *inst)
  313. {
  314. struct vdec_t *vdec = inst->priv;
  315. if (!vdec->slots || !vdec->slot_count)
  316. return;
  317. vpu_trace(inst->dev, "inst[%d] reset slots\n", inst->id);
  318. memset(vdec->slots, 0, sizeof(*vdec->slots) * vdec->slot_count);
  319. }
  320. static void vdec_handle_resolution_change(struct vpu_inst *inst)
  321. {
  322. struct vdec_t *vdec = inst->priv;
  323. struct vb2_queue *q;
  324. if (!inst->fh.m2m_ctx)
  325. return;
  326. if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
  327. return;
  328. if (!vdec->source_change)
  329. return;
  330. q = v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx);
  331. if (!list_empty(&q->done_list))
  332. return;
  333. vdec->source_change--;
  334. vpu_notify_source_change(inst);
  335. vpu_set_last_buffer_dequeued(inst, false);
  336. }
  337. static int vdec_update_state(struct vpu_inst *inst, enum vpu_codec_state state, u32 force)
  338. {
  339. struct vdec_t *vdec = inst->priv;
  340. enum vpu_codec_state pre_state = inst->state;
  341. if (state == VPU_CODEC_STATE_SEEK) {
  342. if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
  343. vdec->state = inst->state;
  344. else
  345. vdec->state = VPU_CODEC_STATE_ACTIVE;
  346. }
  347. if (inst->state != VPU_CODEC_STATE_SEEK || force)
  348. inst->state = state;
  349. else if (state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
  350. vdec->state = VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE;
  351. if (inst->state != pre_state)
  352. vpu_trace(inst->dev, "[%d] %s -> %s\n", inst->id,
  353. vpu_codec_state_name(pre_state), vpu_codec_state_name(inst->state));
  354. if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
  355. vdec_handle_resolution_change(inst);
  356. return 0;
  357. }
  358. static void vdec_set_last_buffer_dequeued(struct vpu_inst *inst)
  359. {
  360. struct vdec_t *vdec = inst->priv;
  361. if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
  362. return;
  363. if (vdec->eos_received) {
  364. if (!vpu_set_last_buffer_dequeued(inst, true)) {
  365. vdec->eos_received--;
  366. vdec_update_state(inst, VPU_CODEC_STATE_DRAIN, 0);
  367. }
  368. }
  369. }
  370. static int vdec_querycap(struct file *file, void *fh, struct v4l2_capability *cap)
  371. {
  372. strscpy(cap->driver, "amphion-vpu", sizeof(cap->driver));
  373. strscpy(cap->card, "amphion vpu decoder", sizeof(cap->card));
  374. strscpy(cap->bus_info, "platform: amphion-vpu", sizeof(cap->bus_info));
  375. return 0;
  376. }
  377. static int vdec_enum_fmt(struct file *file, void *fh, struct v4l2_fmtdesc *f)
  378. {
  379. struct vpu_inst *inst = to_inst(file);
  380. struct vdec_t *vdec = inst->priv;
  381. const struct vpu_format *fmt;
  382. int ret = -EINVAL;
  383. vpu_inst_lock(inst);
  384. if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) {
  385. fmt = vpu_get_format(inst, f->type);
  386. if (f->index == 1)
  387. fmt = vpu_helper_find_sibling(inst, f->type, fmt->pixfmt);
  388. if (f->index > 1)
  389. fmt = NULL;
  390. } else {
  391. fmt = vpu_helper_enum_format(inst, f->type, f->index);
  392. }
  393. if (!fmt)
  394. goto exit;
  395. memset(f->reserved, 0, sizeof(f->reserved));
  396. f->pixelformat = fmt->pixfmt;
  397. f->flags = fmt->flags;
  398. ret = 0;
  399. exit:
  400. vpu_inst_unlock(inst);
  401. return ret;
  402. }
  403. static int vdec_g_fmt(struct file *file, void *fh, struct v4l2_format *f)
  404. {
  405. struct vpu_inst *inst = to_inst(file);
  406. struct vdec_t *vdec = inst->priv;
  407. struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
  408. struct vpu_format *cur_fmt;
  409. int i;
  410. vpu_inst_lock(inst);
  411. cur_fmt = vpu_get_format(inst, f->type);
  412. pixmp->pixelformat = cur_fmt->pixfmt;
  413. pixmp->num_planes = cur_fmt->mem_planes;
  414. pixmp->width = cur_fmt->width;
  415. pixmp->height = cur_fmt->height;
  416. pixmp->field = cur_fmt->field;
  417. pixmp->flags = cur_fmt->flags;
  418. for (i = 0; i < pixmp->num_planes; i++) {
  419. pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i];
  420. pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i);
  421. }
  422. f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries;
  423. f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars;
  424. f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs;
  425. f->fmt.pix_mp.quantization = vdec->codec_info.full_range;
  426. vpu_inst_unlock(inst);
  427. return 0;
  428. }
  429. static int vdec_try_fmt(struct file *file, void *fh, struct v4l2_format *f)
  430. {
  431. struct vpu_inst *inst = to_inst(file);
  432. struct vdec_t *vdec = inst->priv;
  433. struct vpu_format fmt;
  434. vpu_inst_lock(inst);
  435. if (V4L2_TYPE_IS_CAPTURE(f->type) && vdec->fixed_fmt) {
  436. struct vpu_format *cap_fmt = vpu_get_format(inst, f->type);
  437. if (!vpu_helper_match_format(inst, cap_fmt->type, cap_fmt->pixfmt,
  438. f->fmt.pix_mp.pixelformat))
  439. f->fmt.pix_mp.pixelformat = cap_fmt->pixfmt;
  440. }
  441. vpu_try_fmt_common(inst, f, &fmt);
  442. if (vdec->fixed_fmt) {
  443. f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries;
  444. f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars;
  445. f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs;
  446. f->fmt.pix_mp.quantization = vdec->codec_info.full_range;
  447. } else {
  448. f->fmt.pix_mp.colorspace = V4L2_COLORSPACE_DEFAULT;
  449. f->fmt.pix_mp.xfer_func = V4L2_XFER_FUNC_DEFAULT;
  450. f->fmt.pix_mp.ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
  451. f->fmt.pix_mp.quantization = V4L2_QUANTIZATION_DEFAULT;
  452. }
  453. vpu_inst_unlock(inst);
  454. return 0;
  455. }
  456. static int vdec_s_fmt_common(struct vpu_inst *inst, struct v4l2_format *f)
  457. {
  458. struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
  459. struct vpu_format fmt;
  460. struct vpu_format *cur_fmt;
  461. struct vb2_queue *q;
  462. struct vdec_t *vdec = inst->priv;
  463. int i;
  464. if (!inst->fh.m2m_ctx)
  465. return -EINVAL;
  466. q = v4l2_m2m_get_vq(inst->fh.m2m_ctx, f->type);
  467. if (vb2_is_busy(q))
  468. return -EBUSY;
  469. if (vpu_try_fmt_common(inst, f, &fmt))
  470. return -EINVAL;
  471. cur_fmt = vpu_get_format(inst, f->type);
  472. if (V4L2_TYPE_IS_OUTPUT(f->type) && inst->state != VPU_CODEC_STATE_DEINIT) {
  473. if (cur_fmt->pixfmt != fmt.pixfmt) {
  474. vdec->reset_codec = true;
  475. vdec->fixed_fmt = false;
  476. }
  477. }
  478. if (V4L2_TYPE_IS_OUTPUT(f->type) || !vdec->fixed_fmt) {
  479. memcpy(cur_fmt, &fmt, sizeof(*cur_fmt));
  480. } else {
  481. if (vpu_helper_match_format(inst, f->type, cur_fmt->pixfmt, pixmp->pixelformat)) {
  482. cur_fmt->pixfmt = fmt.pixfmt;
  483. cur_fmt->mem_planes = fmt.mem_planes;
  484. }
  485. pixmp->pixelformat = cur_fmt->pixfmt;
  486. pixmp->num_planes = cur_fmt->mem_planes;
  487. pixmp->width = cur_fmt->width;
  488. pixmp->height = cur_fmt->height;
  489. for (i = 0; i < pixmp->num_planes; i++) {
  490. pixmp->plane_fmt[i].bytesperline = cur_fmt->bytesperline[i];
  491. pixmp->plane_fmt[i].sizeimage = vpu_get_fmt_plane_size(cur_fmt, i);
  492. }
  493. pixmp->field = cur_fmt->field;
  494. }
  495. if (!vdec->fixed_fmt) {
  496. if (V4L2_TYPE_IS_OUTPUT(f->type)) {
  497. vdec->params.codec_format = cur_fmt->pixfmt;
  498. vdec->codec_info.color_primaries = f->fmt.pix_mp.colorspace;
  499. vdec->codec_info.transfer_chars = f->fmt.pix_mp.xfer_func;
  500. vdec->codec_info.matrix_coeffs = f->fmt.pix_mp.ycbcr_enc;
  501. vdec->codec_info.full_range = f->fmt.pix_mp.quantization;
  502. } else {
  503. vdec->params.output_format = cur_fmt->pixfmt;
  504. inst->crop.left = 0;
  505. inst->crop.top = 0;
  506. inst->crop.width = cur_fmt->width;
  507. inst->crop.height = cur_fmt->height;
  508. }
  509. }
  510. vpu_trace(inst->dev, "[%d] %c%c%c%c %dx%d\n", inst->id,
  511. f->fmt.pix_mp.pixelformat,
  512. f->fmt.pix_mp.pixelformat >> 8,
  513. f->fmt.pix_mp.pixelformat >> 16,
  514. f->fmt.pix_mp.pixelformat >> 24,
  515. f->fmt.pix_mp.width,
  516. f->fmt.pix_mp.height);
  517. return 0;
  518. }
  519. static int vdec_s_fmt(struct file *file, void *fh, struct v4l2_format *f)
  520. {
  521. struct vpu_inst *inst = to_inst(file);
  522. struct v4l2_pix_format_mplane *pixmp = &f->fmt.pix_mp;
  523. struct vdec_t *vdec = inst->priv;
  524. int ret = 0;
  525. vpu_inst_lock(inst);
  526. ret = vdec_s_fmt_common(inst, f);
  527. if (ret)
  528. goto exit;
  529. if (V4L2_TYPE_IS_OUTPUT(f->type) && !vdec->fixed_fmt) {
  530. struct v4l2_format fc;
  531. memset(&fc, 0, sizeof(fc));
  532. fc.type = inst->cap_format.type;
  533. fc.fmt.pix_mp.pixelformat = inst->cap_format.pixfmt;
  534. fc.fmt.pix_mp.width = pixmp->width;
  535. fc.fmt.pix_mp.height = pixmp->height;
  536. vdec_s_fmt_common(inst, &fc);
  537. }
  538. f->fmt.pix_mp.colorspace = vdec->codec_info.color_primaries;
  539. f->fmt.pix_mp.xfer_func = vdec->codec_info.transfer_chars;
  540. f->fmt.pix_mp.ycbcr_enc = vdec->codec_info.matrix_coeffs;
  541. f->fmt.pix_mp.quantization = vdec->codec_info.full_range;
  542. exit:
  543. vpu_inst_unlock(inst);
  544. return ret;
  545. }
  546. static int vdec_g_selection(struct file *file, void *fh, struct v4l2_selection *s)
  547. {
  548. struct vpu_inst *inst = to_inst(file);
  549. if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE)
  550. return -EINVAL;
  551. switch (s->target) {
  552. case V4L2_SEL_TGT_COMPOSE:
  553. case V4L2_SEL_TGT_COMPOSE_DEFAULT:
  554. case V4L2_SEL_TGT_COMPOSE_PADDED:
  555. s->r = inst->crop;
  556. break;
  557. case V4L2_SEL_TGT_COMPOSE_BOUNDS:
  558. s->r.left = 0;
  559. s->r.top = 0;
  560. s->r.width = inst->cap_format.width;
  561. s->r.height = inst->cap_format.height;
  562. break;
  563. default:
  564. return -EINVAL;
  565. }
  566. return 0;
  567. }
  568. static int vdec_drain(struct vpu_inst *inst)
  569. {
  570. struct vdec_t *vdec = inst->priv;
  571. if (!inst->fh.m2m_ctx)
  572. return 0;
  573. if (!vdec->drain)
  574. return 0;
  575. if (!vpu_is_source_empty(inst))
  576. return 0;
  577. if (!vdec->params.frame_count) {
  578. vpu_set_last_buffer_dequeued(inst, true);
  579. return 0;
  580. }
  581. vpu_iface_add_scode(inst, SCODE_PADDING_EOS);
  582. vdec->params.end_flag = 1;
  583. vpu_iface_set_decode_params(inst, &vdec->params, 1);
  584. vdec->drain = 0;
  585. vpu_trace(inst->dev, "[%d] frame_count = %d\n", inst->id, vdec->params.frame_count);
  586. return 0;
  587. }
  588. static int vdec_cmd_start(struct vpu_inst *inst)
  589. {
  590. struct vdec_t *vdec = inst->priv;
  591. switch (inst->state) {
  592. case VPU_CODEC_STATE_STARTED:
  593. case VPU_CODEC_STATE_DRAIN:
  594. case VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE:
  595. vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0);
  596. break;
  597. default:
  598. break;
  599. }
  600. vpu_process_capture_buffer(inst);
  601. if (vdec->eos_received)
  602. vdec_set_last_buffer_dequeued(inst);
  603. return 0;
  604. }
  605. static int vdec_cmd_stop(struct vpu_inst *inst)
  606. {
  607. struct vdec_t *vdec = inst->priv;
  608. vpu_trace(inst->dev, "[%d]\n", inst->id);
  609. if (inst->state == VPU_CODEC_STATE_DEINIT) {
  610. vpu_set_last_buffer_dequeued(inst, true);
  611. } else {
  612. vdec->drain = 1;
  613. vdec_drain(inst);
  614. }
  615. return 0;
  616. }
  617. static int vdec_decoder_cmd(struct file *file, void *fh, struct v4l2_decoder_cmd *cmd)
  618. {
  619. struct vpu_inst *inst = to_inst(file);
  620. int ret;
  621. ret = v4l2_m2m_ioctl_try_decoder_cmd(file, fh, cmd);
  622. if (ret)
  623. return ret;
  624. vpu_inst_lock(inst);
  625. switch (cmd->cmd) {
  626. case V4L2_DEC_CMD_START:
  627. vdec_cmd_start(inst);
  628. vb2_clear_last_buffer_dequeued(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx));
  629. break;
  630. case V4L2_DEC_CMD_STOP:
  631. vdec_cmd_stop(inst);
  632. break;
  633. default:
  634. break;
  635. }
  636. vpu_inst_unlock(inst);
  637. return 0;
  638. }
  639. static int vdec_subscribe_event(struct v4l2_fh *fh, const struct v4l2_event_subscription *sub)
  640. {
  641. switch (sub->type) {
  642. case V4L2_EVENT_EOS:
  643. return v4l2_event_subscribe(fh, sub, 0, NULL);
  644. case V4L2_EVENT_SOURCE_CHANGE:
  645. return v4l2_src_change_event_subscribe(fh, sub);
  646. case V4L2_EVENT_CTRL:
  647. return v4l2_ctrl_subscribe_event(fh, sub);
  648. default:
  649. return -EINVAL;
  650. }
  651. return 0;
  652. }
  653. static const struct v4l2_ioctl_ops vdec_ioctl_ops = {
  654. .vidioc_querycap = vdec_querycap,
  655. .vidioc_enum_fmt_vid_cap = vdec_enum_fmt,
  656. .vidioc_enum_fmt_vid_out = vdec_enum_fmt,
  657. .vidioc_g_fmt_vid_cap_mplane = vdec_g_fmt,
  658. .vidioc_g_fmt_vid_out_mplane = vdec_g_fmt,
  659. .vidioc_try_fmt_vid_cap_mplane = vdec_try_fmt,
  660. .vidioc_try_fmt_vid_out_mplane = vdec_try_fmt,
  661. .vidioc_s_fmt_vid_cap_mplane = vdec_s_fmt,
  662. .vidioc_s_fmt_vid_out_mplane = vdec_s_fmt,
  663. .vidioc_g_selection = vdec_g_selection,
  664. .vidioc_try_decoder_cmd = v4l2_m2m_ioctl_try_decoder_cmd,
  665. .vidioc_decoder_cmd = vdec_decoder_cmd,
  666. .vidioc_subscribe_event = vdec_subscribe_event,
  667. .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
  668. .vidioc_reqbufs = v4l2_m2m_ioctl_reqbufs,
  669. .vidioc_create_bufs = v4l2_m2m_ioctl_create_bufs,
  670. .vidioc_prepare_buf = v4l2_m2m_ioctl_prepare_buf,
  671. .vidioc_querybuf = v4l2_m2m_ioctl_querybuf,
  672. .vidioc_qbuf = v4l2_m2m_ioctl_qbuf,
  673. .vidioc_expbuf = v4l2_m2m_ioctl_expbuf,
  674. .vidioc_dqbuf = v4l2_m2m_ioctl_dqbuf,
  675. .vidioc_streamon = v4l2_m2m_ioctl_streamon,
  676. .vidioc_streamoff = v4l2_m2m_ioctl_streamoff,
  677. };
  678. static bool vdec_check_ready(struct vpu_inst *inst, unsigned int type)
  679. {
  680. struct vdec_t *vdec = inst->priv;
  681. if (V4L2_TYPE_IS_OUTPUT(type))
  682. return true;
  683. if (vdec->req_frame_count)
  684. return true;
  685. return false;
  686. }
  687. static struct vb2_v4l2_buffer *vdec_get_src_buffer(struct vpu_inst *inst, u32 count)
  688. {
  689. if (count > 1)
  690. vpu_skip_frame(inst, count - 1);
  691. return vpu_next_src_buf(inst);
  692. }
  693. static int vdec_frame_decoded(struct vpu_inst *inst, void *arg)
  694. {
  695. struct vdec_t *vdec = inst->priv;
  696. struct vpu_dec_pic_info *info = arg;
  697. struct vpu_vb2_buffer *vpu_buf;
  698. struct vb2_v4l2_buffer *vbuf;
  699. struct vb2_v4l2_buffer *src_buf;
  700. int ret = 0;
  701. if (!info || info->id >= vdec->slot_count)
  702. return -EINVAL;
  703. vpu_inst_lock(inst);
  704. vpu_buf = vdec->slots[info->id].curr;
  705. if (!vpu_buf) {
  706. dev_err(inst->dev, "[%d] decoded invalid frame[%d]\n", inst->id, info->id);
  707. ret = -EINVAL;
  708. goto exit;
  709. }
  710. vbuf = &vpu_buf->m2m_buf.vb;
  711. src_buf = vdec_get_src_buffer(inst, info->consumed_count);
  712. if (src_buf) {
  713. v4l2_m2m_buf_copy_metadata(src_buf, vbuf);
  714. if (info->consumed_count) {
  715. v4l2_m2m_src_buf_remove(inst->fh.m2m_ctx);
  716. vpu_set_buffer_state(src_buf, VPU_BUF_STATE_IDLE);
  717. v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
  718. } else {
  719. vpu_set_buffer_state(src_buf, VPU_BUF_STATE_DECODED);
  720. }
  721. }
  722. if (vpu_get_buffer_state(vbuf) == VPU_BUF_STATE_DECODED)
  723. dev_info(inst->dev, "[%d] buf[%d] has been decoded\n", inst->id, info->id);
  724. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_DECODED);
  725. vdec->slots[info->id].state = VPU_BUF_STATE_DECODED;
  726. vdec->decoded_frame_count++;
  727. if (vdec->params.display_delay_enable) {
  728. struct vpu_format *cur_fmt;
  729. cur_fmt = vpu_get_format(inst, inst->cap_format.type);
  730. vdec->slots[info->id].state = VPU_BUF_STATE_READY;
  731. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY);
  732. for (int i = 0; i < vbuf->vb2_buf.num_planes; i++)
  733. vb2_set_plane_payload(&vbuf->vb2_buf,
  734. i, vpu_get_fmt_plane_size(cur_fmt, i));
  735. vbuf->field = cur_fmt->field;
  736. vbuf->sequence = vdec->sequence++;
  737. dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp);
  738. v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE);
  739. vdec->display_frame_count++;
  740. }
  741. exit:
  742. vpu_inst_unlock(inst);
  743. return ret;
  744. }
  745. static struct vpu_vb2_buffer *vdec_find_buffer(struct vpu_inst *inst, u32 luma)
  746. {
  747. struct vdec_t *vdec = inst->priv;
  748. int i;
  749. for (i = 0; i < vdec->slot_count; i++) {
  750. if (!vdec->slots[i].curr)
  751. continue;
  752. if (luma == vdec->slots[i].addr)
  753. return vdec->slots[i].curr;
  754. }
  755. return NULL;
  756. }
  757. static void vdec_buf_done(struct vpu_inst *inst, struct vpu_frame_info *frame)
  758. {
  759. struct vdec_t *vdec = inst->priv;
  760. struct vpu_format *cur_fmt;
  761. struct vpu_vb2_buffer *vpu_buf;
  762. struct vb2_v4l2_buffer *vbuf;
  763. int i;
  764. if (!frame)
  765. return;
  766. vpu_inst_lock(inst);
  767. if (!vdec->params.display_delay_enable)
  768. vdec->sequence++;
  769. vpu_buf = vdec_find_buffer(inst, frame->luma);
  770. vpu_inst_unlock(inst);
  771. if (!vpu_buf) {
  772. dev_err(inst->dev, "[%d] can't find buffer, id = %d, addr = 0x%x\n",
  773. inst->id, frame->id, frame->luma);
  774. return;
  775. }
  776. if (frame->skipped) {
  777. dev_dbg(inst->dev, "[%d] frame skip\n", inst->id);
  778. return;
  779. }
  780. cur_fmt = vpu_get_format(inst, inst->cap_format.type);
  781. vbuf = &vpu_buf->m2m_buf.vb;
  782. if (vpu_buf->fs_id != frame->id)
  783. dev_err(inst->dev, "[%d] buffer id(%d(%d), %d) mismatch\n",
  784. inst->id, vpu_buf->fs_id, vbuf->vb2_buf.index, frame->id);
  785. if (vdec->params.display_delay_enable)
  786. return;
  787. if (vpu_get_buffer_state(vbuf) != VPU_BUF_STATE_DECODED)
  788. dev_err(inst->dev, "[%d] buffer(%d) ready without decoded\n", inst->id, frame->id);
  789. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_READY);
  790. for (i = 0; i < vbuf->vb2_buf.num_planes; i++)
  791. vb2_set_plane_payload(&vbuf->vb2_buf, i, vpu_get_fmt_plane_size(cur_fmt, i));
  792. vbuf->field = cur_fmt->field;
  793. vbuf->sequence = vdec->sequence;
  794. dev_dbg(inst->dev, "[%d][OUTPUT TS]%32lld\n", inst->id, vbuf->vb2_buf.timestamp);
  795. vpu_inst_lock(inst);
  796. vdec->slots[vpu_buf->fs_id].state = VPU_BUF_STATE_READY;
  797. vdec->display_frame_count++;
  798. vpu_inst_unlock(inst);
  799. v4l2_m2m_buf_done(vbuf, VB2_BUF_STATE_DONE);
  800. dev_dbg(inst->dev, "[%d] decoded : %d, display : %d, sequence : %d\n",
  801. inst->id, vdec->decoded_frame_count, vdec->display_frame_count, vdec->sequence);
  802. }
  803. static void vdec_stop_done(struct vpu_inst *inst)
  804. {
  805. struct vdec_t *vdec = inst->priv;
  806. vpu_inst_lock(inst);
  807. vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 0);
  808. vdec->seq_hdr_found = 0;
  809. vdec->req_frame_count = 0;
  810. vdec->reset_codec = false;
  811. vdec->fixed_fmt = false;
  812. vdec->params.end_flag = 0;
  813. vdec->drain = 0;
  814. vdec->params.frame_count = 0;
  815. vdec->decoded_frame_count = 0;
  816. vdec->display_frame_count = 0;
  817. vdec->sequence = 0;
  818. vdec->eos_received = 0;
  819. vdec->is_source_changed = false;
  820. vdec->source_change = 0;
  821. inst->total_input_count = 0;
  822. vpu_inst_unlock(inst);
  823. }
  824. static bool vdec_check_source_change(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr)
  825. {
  826. struct vdec_t *vdec = inst->priv;
  827. const struct vpu_format *sibling;
  828. if (!inst->fh.m2m_ctx)
  829. return false;
  830. if (vdec->reset_codec)
  831. return false;
  832. sibling = vpu_helper_find_sibling(inst, inst->cap_format.type, inst->cap_format.pixfmt);
  833. if (sibling && hdr->pixfmt == sibling->pixfmt)
  834. hdr->pixfmt = inst->cap_format.pixfmt;
  835. if (!vb2_is_streaming(v4l2_m2m_get_dst_vq(inst->fh.m2m_ctx)))
  836. return true;
  837. if (inst->cap_format.pixfmt != hdr->pixfmt)
  838. return true;
  839. if (inst->cap_format.width != hdr->decoded_width)
  840. return true;
  841. if (inst->cap_format.height != hdr->decoded_height)
  842. return true;
  843. if (vpu_get_num_buffers(inst, inst->cap_format.type) < inst->min_buffer_cap)
  844. return true;
  845. if (inst->crop.left != hdr->offset_x)
  846. return true;
  847. if (inst->crop.top != hdr->offset_y)
  848. return true;
  849. if (inst->crop.width != hdr->width)
  850. return true;
  851. if (inst->crop.height != hdr->height)
  852. return true;
  853. if (!hdr->progressive)
  854. return true;
  855. if (vdec->seq_hdr_found &&
  856. (hdr->color_primaries != vdec->codec_info.color_primaries ||
  857. hdr->transfer_chars != vdec->codec_info.transfer_chars ||
  858. hdr->matrix_coeffs != vdec->codec_info.matrix_coeffs ||
  859. hdr->full_range != vdec->codec_info.full_range))
  860. return true;
  861. return false;
  862. }
  863. static void vdec_init_fmt(struct vpu_inst *inst)
  864. {
  865. struct vdec_t *vdec = inst->priv;
  866. struct v4l2_format f;
  867. memset(&f, 0, sizeof(f));
  868. f.type = inst->cap_format.type;
  869. f.fmt.pix_mp.pixelformat = vdec->codec_info.pixfmt;
  870. f.fmt.pix_mp.width = vdec->codec_info.decoded_width;
  871. f.fmt.pix_mp.height = vdec->codec_info.decoded_height;
  872. if (vdec->codec_info.progressive)
  873. f.fmt.pix_mp.field = V4L2_FIELD_NONE;
  874. else
  875. f.fmt.pix_mp.field = V4L2_FIELD_SEQ_TB;
  876. vpu_try_fmt_common(inst, &f, &inst->cap_format);
  877. inst->out_format.width = vdec->codec_info.width;
  878. inst->out_format.height = vdec->codec_info.height;
  879. }
  880. static void vdec_init_crop(struct vpu_inst *inst)
  881. {
  882. struct vdec_t *vdec = inst->priv;
  883. inst->crop.left = vdec->codec_info.offset_x;
  884. inst->crop.top = vdec->codec_info.offset_y;
  885. inst->crop.width = vdec->codec_info.width;
  886. inst->crop.height = vdec->codec_info.height;
  887. }
  888. static void vdec_init_mbi(struct vpu_inst *inst)
  889. {
  890. struct vdec_t *vdec = inst->priv;
  891. vdec->mbi.size = vdec->codec_info.mbi_size;
  892. vdec->mbi.max_count = ARRAY_SIZE(vdec->mbi.buffer);
  893. scnprintf(vdec->mbi.name, sizeof(vdec->mbi.name), "mbi");
  894. vdec->mbi.type = MEM_RES_MBI;
  895. vdec->mbi.tag = vdec->seq_tag;
  896. }
  897. static void vdec_init_dcp(struct vpu_inst *inst)
  898. {
  899. struct vdec_t *vdec = inst->priv;
  900. vdec->dcp.size = vdec->codec_info.dcp_size;
  901. vdec->dcp.max_count = ARRAY_SIZE(vdec->dcp.buffer);
  902. scnprintf(vdec->dcp.name, sizeof(vdec->dcp.name), "dcp");
  903. vdec->dcp.type = MEM_RES_DCP;
  904. vdec->dcp.tag = vdec->seq_tag;
  905. }
  906. static void vdec_request_one_fs(struct vdec_fs_info *fs)
  907. {
  908. fs->req_count++;
  909. if (fs->req_count > fs->max_count)
  910. fs->req_count = fs->max_count;
  911. }
  912. static int vdec_alloc_fs_buffer(struct vpu_inst *inst, struct vdec_fs_info *fs)
  913. {
  914. struct vpu_buffer *buffer;
  915. if (!fs->size)
  916. return -EINVAL;
  917. if (fs->count >= fs->req_count)
  918. return -EINVAL;
  919. buffer = &fs->buffer[fs->count];
  920. if (buffer->virt && buffer->length >= fs->size)
  921. return 0;
  922. vpu_free_dma(buffer);
  923. buffer->length = fs->size;
  924. return vpu_alloc_dma(inst->core, buffer);
  925. }
  926. static void vdec_alloc_fs(struct vpu_inst *inst, struct vdec_fs_info *fs)
  927. {
  928. int ret;
  929. while (fs->count < fs->req_count) {
  930. ret = vdec_alloc_fs_buffer(inst, fs);
  931. if (ret)
  932. break;
  933. fs->count++;
  934. }
  935. }
  936. static void vdec_clear_fs(struct vdec_fs_info *fs)
  937. {
  938. u32 i;
  939. if (!fs)
  940. return;
  941. for (i = 0; i < ARRAY_SIZE(fs->buffer); i++)
  942. vpu_free_dma(&fs->buffer[i]);
  943. memset(fs, 0, sizeof(*fs));
  944. }
  945. static int vdec_response_fs(struct vpu_inst *inst, struct vdec_fs_info *fs)
  946. {
  947. struct vpu_fs_info info;
  948. int ret;
  949. if (fs->index >= fs->count)
  950. return 0;
  951. memset(&info, 0, sizeof(info));
  952. info.id = fs->index;
  953. info.type = fs->type;
  954. info.tag = fs->tag;
  955. info.luma_addr = fs->buffer[fs->index].phys;
  956. info.luma_size = fs->buffer[fs->index].length;
  957. ret = vpu_session_alloc_fs(inst, &info);
  958. if (ret)
  959. return ret;
  960. fs->index++;
  961. return 0;
  962. }
  963. static int vdec_response_frame_abnormal(struct vpu_inst *inst)
  964. {
  965. struct vdec_t *vdec = inst->priv;
  966. struct vpu_fs_info info;
  967. int ret;
  968. if (!vdec->req_frame_count)
  969. return 0;
  970. memset(&info, 0, sizeof(info));
  971. info.type = MEM_RES_FRAME;
  972. info.tag = vdec->seq_tag + 0xf0;
  973. ret = vpu_session_alloc_fs(inst, &info);
  974. if (ret)
  975. return ret;
  976. vdec->req_frame_count--;
  977. return 0;
  978. }
  979. static int vdec_response_frame(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf)
  980. {
  981. struct vdec_t *vdec = inst->priv;
  982. struct vpu_vb2_buffer *vpu_buf;
  983. struct vpu_fs_info info;
  984. int ret;
  985. if (inst->state != VPU_CODEC_STATE_ACTIVE)
  986. return -EINVAL;
  987. if (vdec->aborting)
  988. return -EINVAL;
  989. if (!vdec->req_frame_count)
  990. return -EINVAL;
  991. if (!vbuf)
  992. return -EINVAL;
  993. vpu_buf = to_vpu_vb2_buffer(vbuf);
  994. if (vpu_buf->fs_id < 0 || vpu_buf->fs_id >= vdec->slot_count) {
  995. dev_err(inst->dev, "invalid fs %d for v4l2 buffer %d\n",
  996. vpu_buf->fs_id, vbuf->vb2_buf.index);
  997. return -EINVAL;
  998. }
  999. if (vdec->slots[vpu_buf->fs_id].curr) {
  1000. if (vdec->slots[vpu_buf->fs_id].curr != vpu_buf) {
  1001. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_CHANGED);
  1002. vdec->slots[vpu_buf->fs_id].pend = vpu_buf;
  1003. } else {
  1004. vpu_set_buffer_state(vbuf, vdec->slots[vpu_buf->fs_id].state);
  1005. }
  1006. dev_err(inst->dev, "[%d] repeat alloc fs %d (v4l2 index %d)\n",
  1007. inst->id, vpu_buf->fs_id, vbuf->vb2_buf.index);
  1008. return -EAGAIN;
  1009. }
  1010. dev_dbg(inst->dev, "[%d] state = %s, alloc fs %d, tag = 0x%x\n",
  1011. inst->id, vpu_codec_state_name(inst->state), vbuf->vb2_buf.index, vdec->seq_tag);
  1012. memset(&info, 0, sizeof(info));
  1013. info.id = vpu_buf->fs_id;
  1014. info.type = MEM_RES_FRAME;
  1015. info.tag = vdec->seq_tag;
  1016. info.luma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 0);
  1017. info.luma_size = inst->cap_format.sizeimage[0];
  1018. if (vbuf->vb2_buf.num_planes > 1)
  1019. info.chroma_addr = vpu_get_vb_phy_addr(&vbuf->vb2_buf, 1);
  1020. else
  1021. info.chroma_addr = info.luma_addr + info.luma_size;
  1022. info.chromau_size = inst->cap_format.sizeimage[1];
  1023. info.bytesperline = inst->cap_format.bytesperline[0];
  1024. ret = vpu_session_alloc_fs(inst, &info);
  1025. if (ret)
  1026. return ret;
  1027. vpu_buf->luma = info.luma_addr;
  1028. vpu_buf->chroma_u = info.chroma_addr;
  1029. vpu_buf->chroma_v = 0;
  1030. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE);
  1031. vdec->slots[info.id].tag = info.tag;
  1032. vdec->slots[info.id].curr = vpu_buf;
  1033. vdec->slots[info.id].state = VPU_BUF_STATE_INUSE;
  1034. vdec->req_frame_count--;
  1035. return 0;
  1036. }
  1037. static void vdec_response_fs_request(struct vpu_inst *inst, bool force)
  1038. {
  1039. struct vdec_t *vdec = inst->priv;
  1040. int i;
  1041. int ret;
  1042. if (force) {
  1043. for (i = vdec->req_frame_count; i > 0; i--)
  1044. vdec_response_frame_abnormal(inst);
  1045. return;
  1046. }
  1047. for (i = vdec->req_frame_count; i > 0; i--) {
  1048. ret = vpu_process_capture_buffer(inst);
  1049. if (ret)
  1050. break;
  1051. if (vdec->eos_received)
  1052. break;
  1053. }
  1054. for (i = vdec->mbi.index; i < vdec->mbi.count; i++) {
  1055. if (vdec_response_fs(inst, &vdec->mbi))
  1056. break;
  1057. if (vdec->eos_received)
  1058. break;
  1059. }
  1060. for (i = vdec->dcp.index; i < vdec->dcp.count; i++) {
  1061. if (vdec_response_fs(inst, &vdec->dcp))
  1062. break;
  1063. if (vdec->eos_received)
  1064. break;
  1065. }
  1066. }
  1067. static void vdec_response_fs_release(struct vpu_inst *inst, u32 id, u32 tag)
  1068. {
  1069. struct vpu_fs_info info;
  1070. memset(&info, 0, sizeof(info));
  1071. info.id = id;
  1072. info.tag = tag;
  1073. vpu_session_release_fs(inst, &info);
  1074. }
  1075. static void vdec_recycle_buffer(struct vpu_inst *inst, struct vb2_v4l2_buffer *vbuf)
  1076. {
  1077. if (!inst->fh.m2m_ctx)
  1078. return;
  1079. if (vbuf->vb2_buf.state != VB2_BUF_STATE_ACTIVE)
  1080. return;
  1081. if (vpu_find_buf_by_idx(inst, vbuf->vb2_buf.type, vbuf->vb2_buf.index))
  1082. return;
  1083. v4l2_m2m_buf_queue(inst->fh.m2m_ctx, vbuf);
  1084. }
  1085. static void vdec_release_curr_frame_store(struct vpu_inst *inst, u32 id)
  1086. {
  1087. struct vdec_t *vdec = inst->priv;
  1088. struct vpu_vb2_buffer *vpu_buf;
  1089. struct vb2_v4l2_buffer *vbuf;
  1090. if (id >= vdec->slot_count)
  1091. return;
  1092. if (!vdec->slots[id].curr)
  1093. return;
  1094. vpu_buf = vdec->slots[id].curr;
  1095. vbuf = &vpu_buf->m2m_buf.vb;
  1096. vdec_response_fs_release(inst, id, vdec->slots[id].tag);
  1097. if (vpu_buf->fs_id == id) {
  1098. if (vpu_buf->state != VPU_BUF_STATE_READY)
  1099. vdec_recycle_buffer(inst, vbuf);
  1100. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_IDLE);
  1101. }
  1102. vdec->slots[id].curr = NULL;
  1103. vdec->slots[id].state = VPU_BUF_STATE_IDLE;
  1104. if (vdec->slots[id].pend) {
  1105. vpu_set_buffer_state(&vdec->slots[id].pend->m2m_buf.vb, VPU_BUF_STATE_IDLE);
  1106. vdec->slots[id].pend = NULL;
  1107. }
  1108. }
  1109. static void vdec_clear_slots(struct vpu_inst *inst)
  1110. {
  1111. struct vdec_t *vdec = inst->priv;
  1112. int i;
  1113. for (i = 0; i < vdec->slot_count; i++) {
  1114. if (!vdec->slots[i].curr)
  1115. continue;
  1116. vpu_trace(inst->dev, "clear slot %d\n", i);
  1117. vdec_release_curr_frame_store(inst, i);
  1118. }
  1119. }
  1120. static void vdec_update_v4l2_ctrl(struct vpu_inst *inst, u32 id, u32 val)
  1121. {
  1122. struct v4l2_ctrl *ctrl = v4l2_ctrl_find(&inst->ctrl_handler, id);
  1123. if (ctrl)
  1124. v4l2_ctrl_s_ctrl(ctrl, val);
  1125. }
  1126. static void vdec_update_v4l2_profile_level(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr)
  1127. {
  1128. switch (inst->out_format.pixfmt) {
  1129. case V4L2_PIX_FMT_H264:
  1130. case V4L2_PIX_FMT_H264_MVC:
  1131. vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_PROFILE,
  1132. vpu_get_h264_v4l2_profile(hdr));
  1133. vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_H264_LEVEL,
  1134. vpu_get_h264_v4l2_level(hdr));
  1135. break;
  1136. case V4L2_PIX_FMT_HEVC:
  1137. vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_PROFILE,
  1138. vpu_get_hevc_v4l2_profile(hdr));
  1139. vdec_update_v4l2_ctrl(inst, V4L2_CID_MPEG_VIDEO_HEVC_LEVEL,
  1140. vpu_get_hevc_v4l2_level(hdr));
  1141. break;
  1142. default:
  1143. return;
  1144. }
  1145. }
  1146. static void vdec_event_seq_hdr(struct vpu_inst *inst, struct vpu_dec_codec_info *hdr)
  1147. {
  1148. struct vdec_t *vdec = inst->priv;
  1149. vpu_inst_lock(inst);
  1150. vpu_trace(inst->dev,
  1151. "[%d] %d x %d, crop : (%d, %d) %d x %d, %d, %d, colorspace: %d, %d, %d, %d\n",
  1152. inst->id,
  1153. hdr->decoded_width,
  1154. hdr->decoded_height,
  1155. hdr->offset_x,
  1156. hdr->offset_y,
  1157. hdr->width,
  1158. hdr->height,
  1159. hdr->num_ref_frms,
  1160. hdr->num_dpb_frms,
  1161. hdr->color_primaries,
  1162. hdr->transfer_chars,
  1163. hdr->matrix_coeffs,
  1164. hdr->full_range);
  1165. inst->min_buffer_cap = hdr->num_ref_frms + hdr->num_dpb_frms;
  1166. vdec->is_source_changed = vdec_check_source_change(inst, hdr);
  1167. memcpy(&vdec->codec_info, hdr, sizeof(vdec->codec_info));
  1168. vdec_init_fmt(inst);
  1169. vdec_init_crop(inst);
  1170. vdec_init_mbi(inst);
  1171. vdec_init_dcp(inst);
  1172. vdec_update_v4l2_profile_level(inst, hdr);
  1173. if (!vdec->seq_hdr_found) {
  1174. vdec->seq_tag = vdec->codec_info.tag;
  1175. if (vdec->is_source_changed) {
  1176. vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0);
  1177. vdec->source_change++;
  1178. vdec_handle_resolution_change(inst);
  1179. vdec->is_source_changed = false;
  1180. }
  1181. }
  1182. if (vdec->seq_tag != vdec->codec_info.tag) {
  1183. vdec_response_fs_request(inst, true);
  1184. vpu_trace(inst->dev, "[%d] seq tag change: %d -> %d\n",
  1185. inst->id, vdec->seq_tag, vdec->codec_info.tag);
  1186. }
  1187. vdec->seq_hdr_found++;
  1188. vdec->fixed_fmt = true;
  1189. vpu_inst_unlock(inst);
  1190. }
  1191. static void vdec_event_resolution_change(struct vpu_inst *inst)
  1192. {
  1193. struct vdec_t *vdec = inst->priv;
  1194. vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n",
  1195. inst->id,
  1196. vdec->params.frame_count,
  1197. vdec->decoded_frame_count,
  1198. vdec->display_frame_count,
  1199. vdec->sequence);
  1200. vpu_inst_lock(inst);
  1201. vdec->seq_tag = vdec->codec_info.tag;
  1202. vdec_clear_fs(&vdec->mbi);
  1203. vdec_clear_fs(&vdec->dcp);
  1204. vdec_clear_slots(inst);
  1205. vdec_init_mbi(inst);
  1206. vdec_init_dcp(inst);
  1207. if (vdec->is_source_changed) {
  1208. vdec_update_state(inst, VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE, 0);
  1209. vdec->source_change++;
  1210. vdec_handle_resolution_change(inst);
  1211. vdec->is_source_changed = false;
  1212. }
  1213. vpu_inst_unlock(inst);
  1214. }
  1215. static void vdec_event_req_fs(struct vpu_inst *inst, struct vpu_fs_info *fs)
  1216. {
  1217. struct vdec_t *vdec = inst->priv;
  1218. if (!fs)
  1219. return;
  1220. vpu_inst_lock(inst);
  1221. switch (fs->type) {
  1222. case MEM_RES_FRAME:
  1223. vdec->req_frame_count++;
  1224. break;
  1225. case MEM_RES_MBI:
  1226. vdec_request_one_fs(&vdec->mbi);
  1227. break;
  1228. case MEM_RES_DCP:
  1229. vdec_request_one_fs(&vdec->dcp);
  1230. break;
  1231. default:
  1232. break;
  1233. }
  1234. vdec_alloc_fs(inst, &vdec->mbi);
  1235. vdec_alloc_fs(inst, &vdec->dcp);
  1236. vdec_response_fs_request(inst, false);
  1237. vpu_inst_unlock(inst);
  1238. }
  1239. static void vdec_evnet_rel_fs(struct vpu_inst *inst, struct vpu_fs_info *fs)
  1240. {
  1241. struct vdec_t *vdec = inst->priv;
  1242. if (!fs || fs->id >= vdec->slot_count)
  1243. return;
  1244. if (fs->type != MEM_RES_FRAME)
  1245. return;
  1246. if (fs->id >= vdec->slot_count) {
  1247. dev_err(inst->dev, "[%d] invalid fs(%d) to release\n", inst->id, fs->id);
  1248. return;
  1249. }
  1250. vpu_inst_lock(inst);
  1251. if (!vdec->slots[fs->id].curr) {
  1252. dev_dbg(inst->dev, "[%d] fs[%d] has bee released\n", inst->id, fs->id);
  1253. goto exit;
  1254. }
  1255. if (vdec->slots[fs->id].state == VPU_BUF_STATE_DECODED) {
  1256. dev_dbg(inst->dev, "[%d] frame skip\n", inst->id);
  1257. vdec->sequence++;
  1258. }
  1259. vdec_release_curr_frame_store(inst, fs->id);
  1260. vpu_process_capture_buffer(inst);
  1261. exit:
  1262. vpu_inst_unlock(inst);
  1263. }
  1264. static void vdec_event_eos(struct vpu_inst *inst)
  1265. {
  1266. struct vdec_t *vdec = inst->priv;
  1267. vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n",
  1268. inst->id,
  1269. vdec->params.frame_count,
  1270. vdec->decoded_frame_count,
  1271. vdec->display_frame_count,
  1272. vdec->sequence);
  1273. vpu_inst_lock(inst);
  1274. vdec->eos_received++;
  1275. vdec->fixed_fmt = false;
  1276. inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP;
  1277. vdec_set_last_buffer_dequeued(inst);
  1278. vpu_inst_unlock(inst);
  1279. }
  1280. static void vdec_event_notify(struct vpu_inst *inst, u32 event, void *data)
  1281. {
  1282. switch (event) {
  1283. case VPU_MSG_ID_SEQ_HDR_FOUND:
  1284. vdec_event_seq_hdr(inst, data);
  1285. break;
  1286. case VPU_MSG_ID_RES_CHANGE:
  1287. vdec_event_resolution_change(inst);
  1288. break;
  1289. case VPU_MSG_ID_FRAME_REQ:
  1290. vdec_event_req_fs(inst, data);
  1291. break;
  1292. case VPU_MSG_ID_FRAME_RELEASE:
  1293. vdec_evnet_rel_fs(inst, data);
  1294. break;
  1295. case VPU_MSG_ID_PIC_EOS:
  1296. vdec_event_eos(inst);
  1297. break;
  1298. default:
  1299. break;
  1300. }
  1301. }
  1302. static int vdec_process_output(struct vpu_inst *inst, struct vb2_buffer *vb)
  1303. {
  1304. struct vdec_t *vdec = inst->priv;
  1305. struct vb2_v4l2_buffer *vbuf;
  1306. struct vpu_rpc_buffer_desc desc;
  1307. u32 free_space;
  1308. int ret;
  1309. vbuf = to_vb2_v4l2_buffer(vb);
  1310. dev_dbg(inst->dev, "[%d] dec output [%d] %d : %ld\n",
  1311. inst->id, vbuf->sequence, vb->index, vb2_get_plane_payload(vb, 0));
  1312. if (inst->state == VPU_CODEC_STATE_DEINIT)
  1313. return -EINVAL;
  1314. if (vdec->reset_codec)
  1315. return -EINVAL;
  1316. if (inst->state == VPU_CODEC_STATE_STARTED)
  1317. vdec_update_state(inst, VPU_CODEC_STATE_ACTIVE, 0);
  1318. ret = vpu_iface_get_stream_buffer_desc(inst, &desc);
  1319. if (ret)
  1320. return ret;
  1321. free_space = vpu_helper_get_free_space(inst);
  1322. if (free_space < vb2_get_plane_payload(vb, 0) + 0x40000)
  1323. return -ENOMEM;
  1324. vpu_set_buffer_state(vbuf, VPU_BUF_STATE_INUSE);
  1325. ret = vpu_iface_input_frame(inst, vb);
  1326. if (ret < 0)
  1327. return -ENOMEM;
  1328. dev_dbg(inst->dev, "[%d][INPUT TS]%32lld\n", inst->id, vb->timestamp);
  1329. vdec->params.frame_count++;
  1330. if (vdec->drain)
  1331. vdec_drain(inst);
  1332. return 0;
  1333. }
  1334. static int vdec_process_capture(struct vpu_inst *inst, struct vb2_buffer *vb)
  1335. {
  1336. struct vdec_t *vdec = inst->priv;
  1337. struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
  1338. int ret;
  1339. if (inst->state == VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE)
  1340. return -EINVAL;
  1341. if (vdec->reset_codec)
  1342. return -EINVAL;
  1343. ret = vdec_response_frame(inst, vbuf);
  1344. if (ret)
  1345. return ret;
  1346. v4l2_m2m_dst_buf_remove_by_buf(inst->fh.m2m_ctx, vbuf);
  1347. return 0;
  1348. }
  1349. static void vdec_on_queue_empty(struct vpu_inst *inst, u32 type)
  1350. {
  1351. struct vdec_t *vdec = inst->priv;
  1352. if (V4L2_TYPE_IS_OUTPUT(type))
  1353. return;
  1354. vdec_handle_resolution_change(inst);
  1355. if (vdec->eos_received)
  1356. vdec_set_last_buffer_dequeued(inst);
  1357. }
  1358. static void vdec_abort(struct vpu_inst *inst)
  1359. {
  1360. struct vdec_t *vdec = inst->priv;
  1361. struct vpu_rpc_buffer_desc desc;
  1362. int ret;
  1363. vpu_trace(inst->dev, "[%d] state = %s\n", inst->id, vpu_codec_state_name(inst->state));
  1364. vdec->aborting = true;
  1365. vpu_iface_add_scode(inst, SCODE_PADDING_ABORT);
  1366. vdec->params.end_flag = 1;
  1367. vpu_iface_set_decode_params(inst, &vdec->params, 1);
  1368. vpu_session_abort(inst);
  1369. ret = vpu_iface_get_stream_buffer_desc(inst, &desc);
  1370. if (!ret)
  1371. vpu_iface_update_stream_buffer(inst, desc.rptr, 1);
  1372. vpu_session_rst_buf(inst);
  1373. vpu_trace(inst->dev, "[%d] input : %d, decoded : %d, display : %d, sequence : %d\n",
  1374. inst->id,
  1375. vdec->params.frame_count,
  1376. vdec->decoded_frame_count,
  1377. vdec->display_frame_count,
  1378. vdec->sequence);
  1379. if (!vdec->seq_hdr_found)
  1380. vdec->reset_codec = true;
  1381. vdec->params.end_flag = 0;
  1382. vdec->drain = 0;
  1383. vdec->params.frame_count = 0;
  1384. vdec->decoded_frame_count = 0;
  1385. vdec->display_frame_count = 0;
  1386. vdec->sequence = 0;
  1387. vdec->aborting = false;
  1388. inst->extra_size = 0;
  1389. }
  1390. static void vdec_stop(struct vpu_inst *inst, bool free)
  1391. {
  1392. struct vdec_t *vdec = inst->priv;
  1393. vdec_clear_slots(inst);
  1394. if (inst->state != VPU_CODEC_STATE_DEINIT)
  1395. vpu_session_stop(inst);
  1396. vdec_clear_fs(&vdec->mbi);
  1397. vdec_clear_fs(&vdec->dcp);
  1398. if (free) {
  1399. vpu_free_dma(&vdec->udata);
  1400. vpu_free_dma(&inst->stream_buffer);
  1401. }
  1402. vdec_update_state(inst, VPU_CODEC_STATE_DEINIT, 1);
  1403. vdec->reset_codec = false;
  1404. }
  1405. static void vdec_release(struct vpu_inst *inst)
  1406. {
  1407. if (inst->id != VPU_INST_NULL_ID)
  1408. vpu_trace(inst->dev, "[%d]\n", inst->id);
  1409. vdec_stop(inst, true);
  1410. }
  1411. static void vdec_cleanup(struct vpu_inst *inst)
  1412. {
  1413. struct vdec_t *vdec;
  1414. if (!inst)
  1415. return;
  1416. vdec = inst->priv;
  1417. if (vdec) {
  1418. kfree(vdec->slots);
  1419. vdec->slots = NULL;
  1420. vdec->slot_count = 0;
  1421. }
  1422. kfree(vdec);
  1423. inst->priv = NULL;
  1424. kfree(inst);
  1425. }
  1426. static void vdec_init_params(struct vdec_t *vdec)
  1427. {
  1428. vdec->params.frame_count = 0;
  1429. vdec->params.end_flag = 0;
  1430. }
  1431. static int vdec_start(struct vpu_inst *inst)
  1432. {
  1433. struct vdec_t *vdec = inst->priv;
  1434. int stream_buffer_size;
  1435. int ret;
  1436. if (inst->state != VPU_CODEC_STATE_DEINIT)
  1437. return 0;
  1438. vpu_trace(inst->dev, "[%d]\n", inst->id);
  1439. if (!vdec->udata.virt) {
  1440. vdec->udata.length = 0x1000;
  1441. ret = vpu_alloc_dma(inst->core, &vdec->udata);
  1442. if (ret) {
  1443. dev_err(inst->dev, "[%d] alloc udata fail\n", inst->id);
  1444. goto error;
  1445. }
  1446. }
  1447. if (!inst->stream_buffer.virt) {
  1448. stream_buffer_size = vpu_iface_get_stream_buffer_size(inst->core);
  1449. if (stream_buffer_size > 0) {
  1450. inst->stream_buffer.length = stream_buffer_size;
  1451. ret = vpu_alloc_dma(inst->core, &inst->stream_buffer);
  1452. if (ret) {
  1453. dev_err(inst->dev, "[%d] alloc stream buffer fail\n", inst->id);
  1454. goto error;
  1455. }
  1456. inst->use_stream_buffer = true;
  1457. }
  1458. }
  1459. if (inst->use_stream_buffer)
  1460. vpu_iface_config_stream_buffer(inst, &inst->stream_buffer);
  1461. vpu_iface_init_instance(inst);
  1462. vdec->params.udata.base = vdec->udata.phys;
  1463. vdec->params.udata.size = vdec->udata.length;
  1464. ret = vpu_iface_set_decode_params(inst, &vdec->params, 0);
  1465. if (ret) {
  1466. dev_err(inst->dev, "[%d] set decode params fail\n", inst->id);
  1467. goto error;
  1468. }
  1469. vdec_init_params(vdec);
  1470. ret = vpu_session_start(inst);
  1471. if (ret) {
  1472. dev_err(inst->dev, "[%d] start fail\n", inst->id);
  1473. goto error;
  1474. }
  1475. vdec_update_state(inst, VPU_CODEC_STATE_STARTED, 0);
  1476. return 0;
  1477. error:
  1478. vpu_free_dma(&vdec->udata);
  1479. vpu_free_dma(&inst->stream_buffer);
  1480. return ret;
  1481. }
  1482. static int vdec_start_session(struct vpu_inst *inst, u32 type)
  1483. {
  1484. struct vdec_t *vdec = inst->priv;
  1485. int ret = 0;
  1486. if (V4L2_TYPE_IS_OUTPUT(type)) {
  1487. if (vdec->reset_codec)
  1488. vdec_stop(inst, false);
  1489. if (inst->state == VPU_CODEC_STATE_DEINIT) {
  1490. ret = vdec_start(inst);
  1491. if (ret)
  1492. return ret;
  1493. }
  1494. }
  1495. if (V4L2_TYPE_IS_OUTPUT(type)) {
  1496. vdec_update_state(inst, vdec->state, 1);
  1497. vdec->eos_received = 0;
  1498. vpu_process_output_buffer(inst);
  1499. } else {
  1500. vdec_cmd_start(inst);
  1501. }
  1502. if (inst->state == VPU_CODEC_STATE_ACTIVE)
  1503. vdec_response_fs_request(inst, false);
  1504. return ret;
  1505. }
  1506. static int vdec_stop_session(struct vpu_inst *inst, u32 type)
  1507. {
  1508. struct vdec_t *vdec = inst->priv;
  1509. if (inst->state == VPU_CODEC_STATE_DEINIT)
  1510. return 0;
  1511. if (V4L2_TYPE_IS_OUTPUT(type)) {
  1512. vdec_update_state(inst, VPU_CODEC_STATE_SEEK, 0);
  1513. vdec->drain = 0;
  1514. vdec_abort(inst);
  1515. } else {
  1516. if (inst->state != VPU_CODEC_STATE_DYAMIC_RESOLUTION_CHANGE) {
  1517. if (vb2_is_streaming(v4l2_m2m_get_src_vq(inst->fh.m2m_ctx)))
  1518. vdec_abort(inst);
  1519. vdec->eos_received = 0;
  1520. }
  1521. vdec_clear_slots(inst);
  1522. }
  1523. return 0;
  1524. }
  1525. static int vdec_get_slot_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i)
  1526. {
  1527. struct vdec_t *vdec = inst->priv;
  1528. struct vpu_vb2_buffer *vpu_buf;
  1529. int num = -1;
  1530. vpu_inst_lock(inst);
  1531. if (i >= vdec->slot_count || !vdec->slots[i].addr)
  1532. goto exit;
  1533. vpu_buf = vdec->slots[i].curr;
  1534. num = scnprintf(str, size, "slot[%2d] :", i);
  1535. if (vpu_buf) {
  1536. num += scnprintf(str + num, size - num, " %2d",
  1537. vpu_buf->m2m_buf.vb.vb2_buf.index);
  1538. num += scnprintf(str + num, size - num, "; state = %d", vdec->slots[i].state);
  1539. } else {
  1540. num += scnprintf(str + num, size - num, " -1");
  1541. }
  1542. if (vdec->slots[i].pend)
  1543. num += scnprintf(str + num, size - num, "; %d",
  1544. vdec->slots[i].pend->m2m_buf.vb.vb2_buf.index);
  1545. num += scnprintf(str + num, size - num, "\n");
  1546. exit:
  1547. vpu_inst_unlock(inst);
  1548. return num;
  1549. }
  1550. static int vdec_get_debug_info(struct vpu_inst *inst, char *str, u32 size, u32 i)
  1551. {
  1552. struct vdec_t *vdec = inst->priv;
  1553. int num;
  1554. switch (i) {
  1555. case 0:
  1556. num = scnprintf(str, size,
  1557. "req_frame_count = %d\ninterlaced = %d\n",
  1558. vdec->req_frame_count,
  1559. vdec->codec_info.progressive ? 0 : 1);
  1560. break;
  1561. case 1:
  1562. num = scnprintf(str, size,
  1563. "mbi: size = 0x%x request = %d, alloc = %d, response = %d\n",
  1564. vdec->mbi.size,
  1565. vdec->mbi.req_count,
  1566. vdec->mbi.count,
  1567. vdec->mbi.index);
  1568. break;
  1569. case 2:
  1570. num = scnprintf(str, size,
  1571. "dcp: size = 0x%x request = %d, alloc = %d, response = %d\n",
  1572. vdec->dcp.size,
  1573. vdec->dcp.req_count,
  1574. vdec->dcp.count,
  1575. vdec->dcp.index);
  1576. break;
  1577. case 3:
  1578. num = scnprintf(str, size, "input_frame_count = %d\n", vdec->params.frame_count);
  1579. break;
  1580. case 4:
  1581. num = scnprintf(str, size, "decoded_frame_count = %d\n", vdec->decoded_frame_count);
  1582. break;
  1583. case 5:
  1584. num = scnprintf(str, size, "display_frame_count = %d\n", vdec->display_frame_count);
  1585. break;
  1586. case 6:
  1587. num = scnprintf(str, size, "sequence = %d\n", vdec->sequence);
  1588. break;
  1589. case 7:
  1590. num = scnprintf(str, size, "drain = %d, eos = %d, source_change = %d\n",
  1591. vdec->drain, vdec->eos_received, vdec->source_change);
  1592. break;
  1593. case 8:
  1594. num = scnprintf(str, size, "fps = %d/%d\n",
  1595. vdec->codec_info.frame_rate.numerator,
  1596. vdec->codec_info.frame_rate.denominator);
  1597. break;
  1598. case 9:
  1599. num = scnprintf(str, size, "colorspace: %d, %d, %d, %d (%d)\n",
  1600. vdec->codec_info.color_primaries,
  1601. vdec->codec_info.transfer_chars,
  1602. vdec->codec_info.matrix_coeffs,
  1603. vdec->codec_info.full_range,
  1604. vdec->codec_info.vui_present);
  1605. break;
  1606. default:
  1607. num = vdec_get_slot_debug_info(inst, str, size, i - 10);
  1608. break;
  1609. }
  1610. return num;
  1611. }
  1612. static struct vpu_inst_ops vdec_inst_ops = {
  1613. .ctrl_init = vdec_ctrl_init,
  1614. .check_ready = vdec_check_ready,
  1615. .buf_done = vdec_buf_done,
  1616. .get_one_frame = vdec_frame_decoded,
  1617. .stop_done = vdec_stop_done,
  1618. .event_notify = vdec_event_notify,
  1619. .release = vdec_release,
  1620. .cleanup = vdec_cleanup,
  1621. .start = vdec_start_session,
  1622. .stop = vdec_stop_session,
  1623. .process_output = vdec_process_output,
  1624. .process_capture = vdec_process_capture,
  1625. .on_queue_empty = vdec_on_queue_empty,
  1626. .get_debug_info = vdec_get_debug_info,
  1627. .wait_prepare = vpu_inst_unlock,
  1628. .wait_finish = vpu_inst_lock,
  1629. .attach_frame_store = vdec_attach_frame_store,
  1630. .reset_frame_store = vdec_reset_frame_store,
  1631. };
  1632. static void vdec_init(struct file *file)
  1633. {
  1634. struct vpu_inst *inst = to_inst(file);
  1635. struct v4l2_format f;
  1636. memset(&f, 0, sizeof(f));
  1637. f.type = V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE;
  1638. f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_H264;
  1639. f.fmt.pix_mp.width = 1280;
  1640. f.fmt.pix_mp.height = 720;
  1641. f.fmt.pix_mp.field = V4L2_FIELD_NONE;
  1642. vdec_s_fmt(file, &inst->fh, &f);
  1643. memset(&f, 0, sizeof(f));
  1644. f.type = V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE;
  1645. f.fmt.pix_mp.pixelformat = V4L2_PIX_FMT_NV12M_8L128;
  1646. f.fmt.pix_mp.width = 1280;
  1647. f.fmt.pix_mp.height = 720;
  1648. f.fmt.pix_mp.field = V4L2_FIELD_NONE;
  1649. vdec_s_fmt(file, &inst->fh, &f);
  1650. }
  1651. static int vdec_open(struct file *file)
  1652. {
  1653. struct vpu_inst *inst;
  1654. struct vdec_t *vdec;
  1655. int ret;
  1656. inst = kzalloc_obj(*inst);
  1657. if (!inst)
  1658. return -ENOMEM;
  1659. vdec = kzalloc_obj(*vdec);
  1660. if (!vdec) {
  1661. kfree(inst);
  1662. return -ENOMEM;
  1663. }
  1664. vdec->slots = kmalloc_objs(*vdec->slots, VDEC_SLOT_CNT_DFT,
  1665. GFP_KERNEL | __GFP_ZERO);
  1666. if (!vdec->slots) {
  1667. kfree(vdec);
  1668. kfree(inst);
  1669. return -ENOMEM;
  1670. }
  1671. vdec->slot_count = VDEC_SLOT_CNT_DFT;
  1672. inst->ops = &vdec_inst_ops;
  1673. inst->formats = vdec_formats;
  1674. inst->type = VPU_CORE_TYPE_DEC;
  1675. inst->priv = vdec;
  1676. ret = vpu_v4l2_open(file, inst);
  1677. if (ret)
  1678. return ret;
  1679. vdec->fixed_fmt = false;
  1680. vdec->state = VPU_CODEC_STATE_ACTIVE;
  1681. inst->min_buffer_cap = VDEC_MIN_BUFFER_CAP;
  1682. inst->min_buffer_out = VDEC_MIN_BUFFER_OUT;
  1683. vdec_init(file);
  1684. return 0;
  1685. }
  1686. static const struct v4l2_file_operations vdec_fops = {
  1687. .owner = THIS_MODULE,
  1688. .open = vdec_open,
  1689. .release = vpu_v4l2_close,
  1690. .unlocked_ioctl = video_ioctl2,
  1691. .poll = v4l2_m2m_fop_poll,
  1692. .mmap = v4l2_m2m_fop_mmap,
  1693. };
  1694. const struct v4l2_ioctl_ops *vdec_get_ioctl_ops(void)
  1695. {
  1696. return &vdec_ioctl_ops;
  1697. }
  1698. const struct v4l2_file_operations *vdec_get_fops(void)
  1699. {
  1700. return &vdec_fops;
  1701. }