ov6211.c 21 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. // Copyright (c) 2024-2025 Linaro Ltd
  3. #include <linux/clk.h>
  4. #include <linux/delay.h>
  5. #include <linux/gpio/consumer.h>
  6. #include <linux/i2c.h>
  7. #include <linux/module.h>
  8. #include <linux/pm_runtime.h>
  9. #include <linux/regulator/consumer.h>
  10. #include <linux/units.h>
  11. #include <media/v4l2-cci.h>
  12. #include <media/v4l2-ctrls.h>
  13. #include <media/v4l2-device.h>
  14. #include <media/v4l2-fwnode.h>
  15. #define OV6211_LINK_FREQ_480MHZ (480 * HZ_PER_MHZ)
  16. #define OV6211_MCLK_FREQ_24MHZ (24 * HZ_PER_MHZ)
  17. #define OV6211_REG_CHIP_ID CCI_REG16(0x300a)
  18. #define OV6211_CHIP_ID 0x6710
  19. #define OV6211_REG_MODE_SELECT CCI_REG8(0x0100)
  20. #define OV6211_MODE_STANDBY 0x00
  21. #define OV6211_MODE_STREAMING BIT(0)
  22. #define OV6211_REG_SOFTWARE_RST CCI_REG8(0x0103)
  23. #define OV6211_SOFTWARE_RST BIT(0)
  24. /* Exposure controls from sensor */
  25. #define OV6211_REG_EXPOSURE CCI_REG24(0x3500)
  26. #define OV6211_EXPOSURE_MIN 1
  27. #define OV6211_EXPOSURE_MAX_MARGIN 4
  28. #define OV6211_EXPOSURE_STEP 1
  29. #define OV6211_EXPOSURE_DEFAULT 210
  30. /* Analogue gain controls from sensor */
  31. #define OV6211_REG_ANALOGUE_GAIN CCI_REG16(0x350a)
  32. #define OV6211_ANALOGUE_GAIN_MIN 1
  33. #define OV6211_ANALOGUE_GAIN_MAX 0x3ff
  34. #define OV6211_ANALOGUE_GAIN_STEP 1
  35. #define OV6211_ANALOGUE_GAIN_DEFAULT 160
  36. /* Vertical timing size */
  37. #define OV6211_REG_VTS CCI_REG16(0x380e)
  38. #define OV6211_VTS_MAX 0xffff
  39. /* Test pattern */
  40. #define OV6211_REG_PRE_ISP CCI_REG8(0x5e00)
  41. #define OV6211_TEST_PATTERN_ENABLE BIT(7)
  42. #define to_ov6211(_sd) container_of(_sd, struct ov6211, sd)
  43. static const s64 ov6211_link_freq_menu[] = {
  44. OV6211_LINK_FREQ_480MHZ,
  45. };
  46. struct ov6211_reg_list {
  47. const struct cci_reg_sequence *regs;
  48. unsigned int num_regs;
  49. };
  50. struct ov6211_mode {
  51. u32 width; /* Frame width in pixels */
  52. u32 height; /* Frame height in pixels */
  53. u32 hts; /* Horizontal timing size */
  54. u32 vts; /* Default vertical timing size */
  55. u32 bpp; /* Bits per pixel */
  56. const struct ov6211_reg_list reg_list; /* Sensor register setting */
  57. };
  58. static const char * const ov6211_test_pattern_menu[] = {
  59. "Disabled",
  60. "Vertical Colour Bars",
  61. };
  62. static const char * const ov6211_supply_names[] = {
  63. "avdd", /* Analog power */
  64. "dovdd", /* Digital I/O power */
  65. "dvdd", /* Digital core power */
  66. };
  67. #define OV6211_NUM_SUPPLIES ARRAY_SIZE(ov6211_supply_names)
  68. struct ov6211 {
  69. struct device *dev;
  70. struct regmap *regmap;
  71. struct clk *xvclk;
  72. struct gpio_desc *reset_gpio;
  73. struct regulator_bulk_data supplies[OV6211_NUM_SUPPLIES];
  74. struct v4l2_subdev sd;
  75. struct media_pad pad;
  76. struct v4l2_ctrl *vblank;
  77. struct v4l2_ctrl *exposure;
  78. struct v4l2_ctrl_handler ctrl_handler;
  79. /* Saved register values */
  80. u64 pre_isp;
  81. };
  82. static const struct cci_reg_sequence ov6211_400x400_120fps_mode[] = {
  83. { CCI_REG8(0x3005), 0x00 },
  84. { CCI_REG8(0x3013), 0x12 },
  85. { CCI_REG8(0x3014), 0x04 },
  86. { CCI_REG8(0x3016), 0x10 },
  87. { CCI_REG8(0x3017), 0x00 },
  88. { CCI_REG8(0x3018), 0x00 },
  89. { CCI_REG8(0x301a), 0x00 },
  90. { CCI_REG8(0x301b), 0x00 },
  91. { CCI_REG8(0x301c), 0x00 },
  92. { CCI_REG8(0x3037), 0xf0 },
  93. { CCI_REG8(0x3080), 0x01 },
  94. { CCI_REG8(0x3081), 0x00 },
  95. { CCI_REG8(0x3082), 0x01 },
  96. { CCI_REG8(0x3098), 0x04 },
  97. { CCI_REG8(0x3099), 0x28 },
  98. { CCI_REG8(0x309a), 0x06 },
  99. { CCI_REG8(0x309b), 0x04 },
  100. { CCI_REG8(0x309c), 0x00 },
  101. { CCI_REG8(0x309d), 0x00 },
  102. { CCI_REG8(0x309e), 0x01 },
  103. { CCI_REG8(0x309f), 0x00 },
  104. { CCI_REG8(0x30b0), 0x08 },
  105. { CCI_REG8(0x30b1), 0x02 },
  106. { CCI_REG8(0x30b2), 0x00 },
  107. { CCI_REG8(0x30b3), 0x28 },
  108. { CCI_REG8(0x30b4), 0x02 },
  109. { CCI_REG8(0x30b5), 0x00 },
  110. { CCI_REG8(0x3106), 0xd9 },
  111. { CCI_REG8(0x3503), 0x07 },
  112. { CCI_REG8(0x3509), 0x10 },
  113. { CCI_REG8(0x3600), 0xfc },
  114. { CCI_REG8(0x3620), 0xb7 },
  115. { CCI_REG8(0x3621), 0x05 },
  116. { CCI_REG8(0x3626), 0x31 },
  117. { CCI_REG8(0x3627), 0x40 },
  118. { CCI_REG8(0x3632), 0xa3 },
  119. { CCI_REG8(0x3633), 0x34 },
  120. { CCI_REG8(0x3634), 0x40 },
  121. { CCI_REG8(0x3636), 0x00 },
  122. { CCI_REG8(0x3660), 0x80 },
  123. { CCI_REG8(0x3662), 0x03 },
  124. { CCI_REG8(0x3664), 0xf0 },
  125. { CCI_REG8(0x366a), 0x10 },
  126. { CCI_REG8(0x366b), 0x06 },
  127. { CCI_REG8(0x3680), 0xf4 },
  128. { CCI_REG8(0x3681), 0x50 },
  129. { CCI_REG8(0x3682), 0x00 },
  130. { CCI_REG8(0x3708), 0x20 },
  131. { CCI_REG8(0x3709), 0x40 },
  132. { CCI_REG8(0x370d), 0x03 },
  133. { CCI_REG8(0x373b), 0x02 },
  134. { CCI_REG8(0x373c), 0x08 },
  135. { CCI_REG8(0x3742), 0x00 },
  136. { CCI_REG8(0x3744), 0x16 },
  137. { CCI_REG8(0x3745), 0x08 },
  138. { CCI_REG8(0x3781), 0xfc },
  139. { CCI_REG8(0x3788), 0x00 },
  140. { CCI_REG8(0x3800), 0x00 },
  141. { CCI_REG8(0x3801), 0x04 },
  142. { CCI_REG8(0x3802), 0x00 },
  143. { CCI_REG8(0x3803), 0x04 },
  144. { CCI_REG8(0x3804), 0x01 },
  145. { CCI_REG8(0x3805), 0x9b },
  146. { CCI_REG8(0x3806), 0x01 },
  147. { CCI_REG8(0x3807), 0x9b },
  148. { CCI_REG8(0x3808), 0x01 }, /* output width */
  149. { CCI_REG8(0x3809), 0x90 },
  150. { CCI_REG8(0x380a), 0x01 }, /* output height */
  151. { CCI_REG8(0x380b), 0x90 },
  152. { CCI_REG8(0x380c), 0x05 }, /* horizontal timing size */
  153. { CCI_REG8(0x380d), 0xf2 },
  154. { CCI_REG8(0x3810), 0x00 },
  155. { CCI_REG8(0x3811), 0x04 },
  156. { CCI_REG8(0x3812), 0x00 },
  157. { CCI_REG8(0x3813), 0x04 },
  158. { CCI_REG8(0x3814), 0x11 },
  159. { CCI_REG8(0x3815), 0x11 },
  160. { CCI_REG8(0x3820), 0x00 },
  161. { CCI_REG8(0x3821), 0x00 },
  162. { CCI_REG8(0x382b), 0xfa },
  163. { CCI_REG8(0x382f), 0x04 },
  164. { CCI_REG8(0x3832), 0x00 },
  165. { CCI_REG8(0x3833), 0x05 },
  166. { CCI_REG8(0x3834), 0x00 },
  167. { CCI_REG8(0x3835), 0x05 },
  168. { CCI_REG8(0x3882), 0x04 },
  169. { CCI_REG8(0x3883), 0x00 },
  170. { CCI_REG8(0x38a4), 0x10 },
  171. { CCI_REG8(0x38a5), 0x00 },
  172. { CCI_REG8(0x38b1), 0x03 },
  173. { CCI_REG8(0x3b80), 0x00 },
  174. { CCI_REG8(0x3b81), 0xff },
  175. { CCI_REG8(0x3b82), 0x10 },
  176. { CCI_REG8(0x3b83), 0x00 },
  177. { CCI_REG8(0x3b84), 0x08 },
  178. { CCI_REG8(0x3b85), 0x00 },
  179. { CCI_REG8(0x3b86), 0x01 },
  180. { CCI_REG8(0x3b87), 0x00 },
  181. { CCI_REG8(0x3b88), 0x00 },
  182. { CCI_REG8(0x3b89), 0x00 },
  183. { CCI_REG8(0x3b8a), 0x00 },
  184. { CCI_REG8(0x3b8b), 0x05 },
  185. { CCI_REG8(0x3b8c), 0x00 },
  186. { CCI_REG8(0x3b8d), 0x00 },
  187. { CCI_REG8(0x3b8e), 0x01 },
  188. { CCI_REG8(0x3b8f), 0xb2 },
  189. { CCI_REG8(0x3b94), 0x05 },
  190. { CCI_REG8(0x3b95), 0xf2 },
  191. { CCI_REG8(0x3b96), 0xc0 },
  192. { CCI_REG8(0x4004), 0x04 },
  193. { CCI_REG8(0x404e), 0x01 },
  194. { CCI_REG8(0x4801), 0x0f },
  195. { CCI_REG8(0x4806), 0x0f },
  196. { CCI_REG8(0x4837), 0x43 },
  197. { CCI_REG8(0x5a08), 0x00 },
  198. { CCI_REG8(0x5a01), 0x00 },
  199. { CCI_REG8(0x5a03), 0x00 },
  200. { CCI_REG8(0x5a04), 0x10 },
  201. { CCI_REG8(0x5a05), 0xa0 },
  202. { CCI_REG8(0x5a06), 0x0c },
  203. { CCI_REG8(0x5a07), 0x78 },
  204. };
  205. static const struct ov6211_mode supported_modes[] = {
  206. {
  207. .width = 400,
  208. .height = 400,
  209. .hts = 1522,
  210. .vts = 438,
  211. .bpp = 8,
  212. .reg_list = {
  213. .regs = ov6211_400x400_120fps_mode,
  214. .num_regs = ARRAY_SIZE(ov6211_400x400_120fps_mode),
  215. },
  216. },
  217. };
  218. static int ov6211_set_test_pattern(struct ov6211 *ov6211, u32 pattern)
  219. {
  220. u64 val = ov6211->pre_isp;
  221. if (pattern)
  222. val |= OV6211_TEST_PATTERN_ENABLE;
  223. else
  224. val &= ~OV6211_TEST_PATTERN_ENABLE;
  225. return cci_write(ov6211->regmap, OV6211_REG_PRE_ISP, val, NULL);
  226. }
  227. static int ov6211_set_ctrl(struct v4l2_ctrl *ctrl)
  228. {
  229. struct ov6211 *ov6211 = container_of(ctrl->handler, struct ov6211,
  230. ctrl_handler);
  231. const struct ov6211_mode *mode = &supported_modes[0];
  232. s64 exposure_max;
  233. int ret;
  234. /* Propagate change of current control to all related controls */
  235. switch (ctrl->id) {
  236. case V4L2_CID_VBLANK:
  237. /* Update max exposure while meeting expected vblanking */
  238. exposure_max = ctrl->val + mode->height -
  239. OV6211_EXPOSURE_MAX_MARGIN;
  240. ret = __v4l2_ctrl_modify_range(ov6211->exposure,
  241. ov6211->exposure->minimum,
  242. exposure_max,
  243. ov6211->exposure->step,
  244. ov6211->exposure->default_value);
  245. if (ret)
  246. return ret;
  247. }
  248. /* V4L2 controls are applied, when sensor is powered up for streaming */
  249. if (!pm_runtime_get_if_active(ov6211->dev))
  250. return 0;
  251. switch (ctrl->id) {
  252. case V4L2_CID_ANALOGUE_GAIN:
  253. ret = cci_write(ov6211->regmap, OV6211_REG_ANALOGUE_GAIN,
  254. ctrl->val, NULL);
  255. break;
  256. case V4L2_CID_EXPOSURE:
  257. ret = cci_write(ov6211->regmap, OV6211_REG_EXPOSURE,
  258. ctrl->val << 4, NULL);
  259. break;
  260. case V4L2_CID_VBLANK:
  261. ret = cci_write(ov6211->regmap, OV6211_REG_VTS,
  262. ctrl->val + mode->height, NULL);
  263. break;
  264. case V4L2_CID_TEST_PATTERN:
  265. ret = ov6211_set_test_pattern(ov6211, ctrl->val);
  266. break;
  267. default:
  268. ret = -EINVAL;
  269. break;
  270. }
  271. pm_runtime_put(ov6211->dev);
  272. return ret;
  273. }
  274. static const struct v4l2_ctrl_ops ov6211_ctrl_ops = {
  275. .s_ctrl = ov6211_set_ctrl,
  276. };
  277. static int ov6211_init_controls(struct ov6211 *ov6211)
  278. {
  279. struct v4l2_ctrl_handler *ctrl_hdlr = &ov6211->ctrl_handler;
  280. const struct ov6211_mode *mode = &supported_modes[0];
  281. s64 exposure_max, pixel_rate, h_blank, v_blank;
  282. struct v4l2_fwnode_device_properties props;
  283. struct v4l2_ctrl *ctrl;
  284. int ret;
  285. v4l2_ctrl_handler_init(ctrl_hdlr, 9);
  286. ctrl = v4l2_ctrl_new_int_menu(ctrl_hdlr, &ov6211_ctrl_ops,
  287. V4L2_CID_LINK_FREQ,
  288. ARRAY_SIZE(ov6211_link_freq_menu) - 1,
  289. 0, ov6211_link_freq_menu);
  290. if (ctrl)
  291. ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  292. pixel_rate = ov6211_link_freq_menu[0] / mode->bpp;
  293. v4l2_ctrl_new_std(ctrl_hdlr, &ov6211_ctrl_ops, V4L2_CID_PIXEL_RATE,
  294. 0, pixel_rate, 1, pixel_rate);
  295. h_blank = mode->hts - mode->width;
  296. ctrl = v4l2_ctrl_new_std(ctrl_hdlr, &ov6211_ctrl_ops, V4L2_CID_HBLANK,
  297. h_blank, h_blank, 1, h_blank);
  298. if (ctrl)
  299. ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
  300. v_blank = mode->vts - mode->height;
  301. ov6211->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov6211_ctrl_ops,
  302. V4L2_CID_VBLANK, v_blank,
  303. OV6211_VTS_MAX - mode->height, 1,
  304. v_blank);
  305. v4l2_ctrl_new_std(ctrl_hdlr, &ov6211_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
  306. OV6211_ANALOGUE_GAIN_MIN, OV6211_ANALOGUE_GAIN_MAX,
  307. OV6211_ANALOGUE_GAIN_STEP,
  308. OV6211_ANALOGUE_GAIN_DEFAULT);
  309. exposure_max = mode->vts - OV6211_EXPOSURE_MAX_MARGIN;
  310. ov6211->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov6211_ctrl_ops,
  311. V4L2_CID_EXPOSURE,
  312. OV6211_EXPOSURE_MIN,
  313. exposure_max,
  314. OV6211_EXPOSURE_STEP,
  315. OV6211_EXPOSURE_DEFAULT);
  316. v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov6211_ctrl_ops,
  317. V4L2_CID_TEST_PATTERN,
  318. ARRAY_SIZE(ov6211_test_pattern_menu) - 1,
  319. 0, 0, ov6211_test_pattern_menu);
  320. if (ctrl_hdlr->error)
  321. return ctrl_hdlr->error;
  322. ret = v4l2_fwnode_device_parse(ov6211->dev, &props);
  323. if (ret)
  324. goto error_free_hdlr;
  325. ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov6211_ctrl_ops,
  326. &props);
  327. if (ret)
  328. goto error_free_hdlr;
  329. ov6211->sd.ctrl_handler = ctrl_hdlr;
  330. return 0;
  331. error_free_hdlr:
  332. v4l2_ctrl_handler_free(ctrl_hdlr);
  333. return ret;
  334. }
  335. static void ov6211_update_pad_format(const struct ov6211_mode *mode,
  336. struct v4l2_mbus_framefmt *fmt)
  337. {
  338. fmt->code = MEDIA_BUS_FMT_Y8_1X8;
  339. fmt->width = mode->width;
  340. fmt->height = mode->height;
  341. fmt->field = V4L2_FIELD_NONE;
  342. fmt->colorspace = V4L2_COLORSPACE_RAW;
  343. fmt->ycbcr_enc = V4L2_YCBCR_ENC_DEFAULT;
  344. fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
  345. fmt->xfer_func = V4L2_XFER_FUNC_NONE;
  346. }
  347. static int ov6211_enable_streams(struct v4l2_subdev *sd,
  348. struct v4l2_subdev_state *state, u32 pad,
  349. u64 streams_mask)
  350. {
  351. const struct ov6211_reg_list *reg_list = &supported_modes[0].reg_list;
  352. struct ov6211 *ov6211 = to_ov6211(sd);
  353. int ret;
  354. ret = pm_runtime_resume_and_get(ov6211->dev);
  355. if (ret)
  356. return ret;
  357. /* Skip a step of explicit entering into the standby mode */
  358. ret = cci_write(ov6211->regmap, OV6211_REG_SOFTWARE_RST,
  359. OV6211_SOFTWARE_RST, NULL);
  360. if (ret) {
  361. dev_err(ov6211->dev, "failed to software reset: %d\n", ret);
  362. goto error;
  363. }
  364. ret = cci_multi_reg_write(ov6211->regmap, reg_list->regs,
  365. reg_list->num_regs, NULL);
  366. if (ret) {
  367. dev_err(ov6211->dev, "failed to set mode: %d\n", ret);
  368. goto error;
  369. }
  370. ret = __v4l2_ctrl_handler_setup(ov6211->sd.ctrl_handler);
  371. if (ret)
  372. goto error;
  373. ret = cci_write(ov6211->regmap, OV6211_REG_MODE_SELECT,
  374. OV6211_MODE_STREAMING, NULL);
  375. if (ret) {
  376. dev_err(ov6211->dev, "failed to start streaming: %d\n", ret);
  377. goto error;
  378. }
  379. return 0;
  380. error:
  381. pm_runtime_put_autosuspend(ov6211->dev);
  382. return ret;
  383. }
  384. static int ov6211_disable_streams(struct v4l2_subdev *sd,
  385. struct v4l2_subdev_state *state, u32 pad,
  386. u64 streams_mask)
  387. {
  388. struct ov6211 *ov6211 = to_ov6211(sd);
  389. int ret;
  390. ret = cci_write(ov6211->regmap, OV6211_REG_MODE_SELECT,
  391. OV6211_MODE_STANDBY, NULL);
  392. if (ret)
  393. dev_err(ov6211->dev, "failed to stop streaming: %d\n", ret);
  394. pm_runtime_put_autosuspend(ov6211->dev);
  395. return ret;
  396. }
  397. static int ov6211_set_pad_format(struct v4l2_subdev *sd,
  398. struct v4l2_subdev_state *state,
  399. struct v4l2_subdev_format *fmt)
  400. {
  401. struct v4l2_mbus_framefmt *format;
  402. const struct ov6211_mode *mode;
  403. format = v4l2_subdev_state_get_format(state, 0);
  404. mode = v4l2_find_nearest_size(supported_modes,
  405. ARRAY_SIZE(supported_modes),
  406. width, height,
  407. fmt->format.width,
  408. fmt->format.height);
  409. ov6211_update_pad_format(mode, &fmt->format);
  410. *format = fmt->format;
  411. return 0;
  412. }
  413. static int ov6211_enum_mbus_code(struct v4l2_subdev *sd,
  414. struct v4l2_subdev_state *sd_state,
  415. struct v4l2_subdev_mbus_code_enum *code)
  416. {
  417. if (code->index > 0)
  418. return -EINVAL;
  419. code->code = MEDIA_BUS_FMT_Y8_1X8;
  420. return 0;
  421. }
  422. static int ov6211_enum_frame_size(struct v4l2_subdev *sd,
  423. struct v4l2_subdev_state *sd_state,
  424. struct v4l2_subdev_frame_size_enum *fse)
  425. {
  426. if (fse->index >= ARRAY_SIZE(supported_modes))
  427. return -EINVAL;
  428. if (fse->code != MEDIA_BUS_FMT_Y8_1X8)
  429. return -EINVAL;
  430. fse->min_width = supported_modes[fse->index].width;
  431. fse->max_width = fse->min_width;
  432. fse->min_height = supported_modes[fse->index].height;
  433. fse->max_height = fse->min_height;
  434. return 0;
  435. }
  436. static int ov6211_init_state(struct v4l2_subdev *sd,
  437. struct v4l2_subdev_state *state)
  438. {
  439. struct v4l2_subdev_format fmt = {
  440. .which = V4L2_SUBDEV_FORMAT_TRY,
  441. .pad = 0,
  442. .format = {
  443. .code = MEDIA_BUS_FMT_Y8_1X8,
  444. .width = supported_modes[0].width,
  445. .height = supported_modes[0].height,
  446. },
  447. };
  448. ov6211_set_pad_format(sd, state, &fmt);
  449. return 0;
  450. }
  451. static const struct v4l2_subdev_video_ops ov6211_video_ops = {
  452. .s_stream = v4l2_subdev_s_stream_helper,
  453. };
  454. static const struct v4l2_subdev_pad_ops ov6211_pad_ops = {
  455. .set_fmt = ov6211_set_pad_format,
  456. .get_fmt = v4l2_subdev_get_fmt,
  457. .enum_mbus_code = ov6211_enum_mbus_code,
  458. .enum_frame_size = ov6211_enum_frame_size,
  459. .enable_streams = ov6211_enable_streams,
  460. .disable_streams = ov6211_disable_streams,
  461. };
  462. static const struct v4l2_subdev_ops ov6211_subdev_ops = {
  463. .video = &ov6211_video_ops,
  464. .pad = &ov6211_pad_ops,
  465. };
  466. static const struct v4l2_subdev_internal_ops ov6211_internal_ops = {
  467. .init_state = ov6211_init_state,
  468. };
  469. static const struct media_entity_operations ov6211_subdev_entity_ops = {
  470. .link_validate = v4l2_subdev_link_validate,
  471. };
  472. static int ov6211_identify_sensor(struct ov6211 *ov6211)
  473. {
  474. u64 val;
  475. int ret;
  476. ret = cci_read(ov6211->regmap, OV6211_REG_CHIP_ID, &val, NULL);
  477. if (ret) {
  478. dev_err(ov6211->dev, "failed to read chip id: %d\n", ret);
  479. return ret;
  480. }
  481. if (val != OV6211_CHIP_ID) {
  482. dev_err(ov6211->dev, "chip id mismatch: %x!=%llx\n",
  483. OV6211_CHIP_ID, val);
  484. return -ENODEV;
  485. }
  486. ret = cci_read(ov6211->regmap, OV6211_REG_PRE_ISP,
  487. &ov6211->pre_isp, NULL);
  488. if (ret)
  489. dev_err(ov6211->dev, "failed to read pre_isp: %d\n", ret);
  490. return ret;
  491. }
  492. static int ov6211_check_hwcfg(struct ov6211 *ov6211)
  493. {
  494. struct fwnode_handle *fwnode = dev_fwnode(ov6211->dev), *ep;
  495. struct v4l2_fwnode_endpoint bus_cfg = {
  496. .bus_type = V4L2_MBUS_CSI2_DPHY,
  497. };
  498. unsigned long freq_bitmap;
  499. int ret;
  500. if (!fwnode)
  501. return -ENODEV;
  502. ep = fwnode_graph_get_next_endpoint(fwnode, NULL);
  503. if (!ep)
  504. return -EINVAL;
  505. ret = v4l2_fwnode_endpoint_alloc_parse(ep, &bus_cfg);
  506. fwnode_handle_put(ep);
  507. if (ret)
  508. return ret;
  509. ret = v4l2_link_freq_to_bitmap(ov6211->dev, bus_cfg.link_frequencies,
  510. bus_cfg.nr_of_link_frequencies,
  511. ov6211_link_freq_menu,
  512. ARRAY_SIZE(ov6211_link_freq_menu),
  513. &freq_bitmap);
  514. v4l2_fwnode_endpoint_free(&bus_cfg);
  515. return ret;
  516. }
  517. static int ov6211_power_on(struct device *dev)
  518. {
  519. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  520. struct ov6211 *ov6211 = to_ov6211(sd);
  521. int ret;
  522. ret = regulator_bulk_enable(OV6211_NUM_SUPPLIES, ov6211->supplies);
  523. if (ret)
  524. return ret;
  525. gpiod_set_value_cansleep(ov6211->reset_gpio, 0);
  526. usleep_range(10 * USEC_PER_MSEC, 15 * USEC_PER_MSEC);
  527. ret = clk_prepare_enable(ov6211->xvclk);
  528. if (ret)
  529. goto reset_gpio;
  530. return 0;
  531. reset_gpio:
  532. gpiod_set_value_cansleep(ov6211->reset_gpio, 1);
  533. regulator_bulk_disable(OV6211_NUM_SUPPLIES, ov6211->supplies);
  534. return ret;
  535. }
  536. static int ov6211_power_off(struct device *dev)
  537. {
  538. struct v4l2_subdev *sd = dev_get_drvdata(dev);
  539. struct ov6211 *ov6211 = to_ov6211(sd);
  540. clk_disable_unprepare(ov6211->xvclk);
  541. gpiod_set_value_cansleep(ov6211->reset_gpio, 1);
  542. regulator_bulk_disable(OV6211_NUM_SUPPLIES, ov6211->supplies);
  543. return 0;
  544. }
  545. static int ov6211_probe(struct i2c_client *client)
  546. {
  547. struct ov6211 *ov6211;
  548. unsigned long freq;
  549. unsigned int i;
  550. int ret;
  551. ov6211 = devm_kzalloc(&client->dev, sizeof(*ov6211), GFP_KERNEL);
  552. if (!ov6211)
  553. return -ENOMEM;
  554. ov6211->dev = &client->dev;
  555. v4l2_i2c_subdev_init(&ov6211->sd, client, &ov6211_subdev_ops);
  556. ov6211->regmap = devm_cci_regmap_init_i2c(client, 16);
  557. if (IS_ERR(ov6211->regmap))
  558. return dev_err_probe(ov6211->dev, PTR_ERR(ov6211->regmap),
  559. "failed to init CCI\n");
  560. ov6211->xvclk = devm_v4l2_sensor_clk_get(ov6211->dev, NULL);
  561. if (IS_ERR(ov6211->xvclk))
  562. return dev_err_probe(ov6211->dev, PTR_ERR(ov6211->xvclk),
  563. "failed to get XVCLK clock\n");
  564. freq = clk_get_rate(ov6211->xvclk);
  565. if (freq && freq != OV6211_MCLK_FREQ_24MHZ)
  566. return dev_err_probe(ov6211->dev, -EINVAL,
  567. "XVCLK clock frequency %lu is not supported\n",
  568. freq);
  569. ret = ov6211_check_hwcfg(ov6211);
  570. if (ret)
  571. return dev_err_probe(ov6211->dev, ret,
  572. "failed to check HW configuration\n");
  573. ov6211->reset_gpio = devm_gpiod_get_optional(ov6211->dev, "reset",
  574. GPIOD_OUT_HIGH);
  575. if (IS_ERR(ov6211->reset_gpio))
  576. return dev_err_probe(ov6211->dev, PTR_ERR(ov6211->reset_gpio),
  577. "cannot get reset GPIO\n");
  578. for (i = 0; i < OV6211_NUM_SUPPLIES; i++)
  579. ov6211->supplies[i].supply = ov6211_supply_names[i];
  580. ret = devm_regulator_bulk_get(ov6211->dev, OV6211_NUM_SUPPLIES,
  581. ov6211->supplies);
  582. if (ret)
  583. return dev_err_probe(ov6211->dev, ret,
  584. "failed to get supply regulators\n");
  585. /* The sensor must be powered on to read the CHIP_ID register */
  586. ret = ov6211_power_on(ov6211->dev);
  587. if (ret)
  588. return ret;
  589. ret = ov6211_identify_sensor(ov6211);
  590. if (ret) {
  591. dev_err_probe(ov6211->dev, ret, "failed to find sensor\n");
  592. goto power_off;
  593. }
  594. ret = ov6211_init_controls(ov6211);
  595. if (ret) {
  596. dev_err_probe(ov6211->dev, ret, "failed to init controls\n");
  597. goto power_off;
  598. }
  599. ov6211->sd.state_lock = ov6211->ctrl_handler.lock;
  600. ov6211->sd.internal_ops = &ov6211_internal_ops;
  601. ov6211->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  602. ov6211->sd.entity.ops = &ov6211_subdev_entity_ops;
  603. ov6211->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
  604. ov6211->pad.flags = MEDIA_PAD_FL_SOURCE;
  605. ret = media_entity_pads_init(&ov6211->sd.entity, 1, &ov6211->pad);
  606. if (ret) {
  607. dev_err_probe(ov6211->dev, ret,
  608. "failed to init media entity pads\n");
  609. goto v4l2_ctrl_handler_free;
  610. }
  611. ret = v4l2_subdev_init_finalize(&ov6211->sd);
  612. if (ret < 0) {
  613. dev_err_probe(ov6211->dev, ret,
  614. "failed to init media entity pads\n");
  615. goto media_entity_cleanup;
  616. }
  617. pm_runtime_set_active(ov6211->dev);
  618. pm_runtime_enable(ov6211->dev);
  619. ret = v4l2_async_register_subdev_sensor(&ov6211->sd);
  620. if (ret < 0) {
  621. dev_err_probe(ov6211->dev, ret,
  622. "failed to register V4L2 subdev\n");
  623. goto subdev_cleanup;
  624. }
  625. /* Enable runtime PM and turn off the device */
  626. pm_runtime_idle(ov6211->dev);
  627. pm_runtime_set_autosuspend_delay(ov6211->dev, 1000);
  628. pm_runtime_use_autosuspend(ov6211->dev);
  629. return 0;
  630. subdev_cleanup:
  631. v4l2_subdev_cleanup(&ov6211->sd);
  632. pm_runtime_disable(ov6211->dev);
  633. pm_runtime_set_suspended(ov6211->dev);
  634. media_entity_cleanup:
  635. media_entity_cleanup(&ov6211->sd.entity);
  636. v4l2_ctrl_handler_free:
  637. v4l2_ctrl_handler_free(ov6211->sd.ctrl_handler);
  638. power_off:
  639. ov6211_power_off(ov6211->dev);
  640. return ret;
  641. }
  642. static void ov6211_remove(struct i2c_client *client)
  643. {
  644. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  645. struct ov6211 *ov6211 = to_ov6211(sd);
  646. v4l2_async_unregister_subdev(sd);
  647. v4l2_subdev_cleanup(sd);
  648. media_entity_cleanup(&sd->entity);
  649. v4l2_ctrl_handler_free(sd->ctrl_handler);
  650. pm_runtime_disable(ov6211->dev);
  651. if (!pm_runtime_status_suspended(ov6211->dev)) {
  652. ov6211_power_off(ov6211->dev);
  653. pm_runtime_set_suspended(ov6211->dev);
  654. }
  655. }
  656. static const struct dev_pm_ops ov6211_pm_ops = {
  657. SET_RUNTIME_PM_OPS(ov6211_power_off, ov6211_power_on, NULL)
  658. };
  659. static const struct of_device_id ov6211_of_match[] = {
  660. { .compatible = "ovti,ov6211" },
  661. { /* sentinel */ }
  662. };
  663. MODULE_DEVICE_TABLE(of, ov6211_of_match);
  664. static struct i2c_driver ov6211_i2c_driver = {
  665. .driver = {
  666. .name = "ov6211",
  667. .pm = &ov6211_pm_ops,
  668. .of_match_table = ov6211_of_match,
  669. },
  670. .probe = ov6211_probe,
  671. .remove = ov6211_remove,
  672. };
  673. module_i2c_driver(ov6211_i2c_driver);
  674. MODULE_AUTHOR("Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>");
  675. MODULE_DESCRIPTION("OmniVision OV6211 sensor driver");
  676. MODULE_LICENSE("GPL");