mt9v011.c 15 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. //
  3. // mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor
  4. //
  5. // Copyright (c) 2009 Mauro Carvalho Chehab <mchehab@kernel.org>
  6. #include <linux/i2c.h>
  7. #include <linux/slab.h>
  8. #include <linux/videodev2.h>
  9. #include <linux/delay.h>
  10. #include <linux/module.h>
  11. #include <asm/div64.h>
  12. #include <media/v4l2-device.h>
  13. #include <media/v4l2-ctrls.h>
  14. #include <media/i2c/mt9v011.h>
  15. MODULE_DESCRIPTION("Micron mt9v011 sensor driver");
  16. MODULE_AUTHOR("Mauro Carvalho Chehab");
  17. MODULE_LICENSE("GPL v2");
  18. static int debug;
  19. module_param(debug, int, 0);
  20. MODULE_PARM_DESC(debug, "Debug level (0-2)");
  21. #define R00_MT9V011_CHIP_VERSION 0x00
  22. #define R01_MT9V011_ROWSTART 0x01
  23. #define R02_MT9V011_COLSTART 0x02
  24. #define R03_MT9V011_HEIGHT 0x03
  25. #define R04_MT9V011_WIDTH 0x04
  26. #define R05_MT9V011_HBLANK 0x05
  27. #define R06_MT9V011_VBLANK 0x06
  28. #define R07_MT9V011_OUT_CTRL 0x07
  29. #define R09_MT9V011_SHUTTER_WIDTH 0x09
  30. #define R0A_MT9V011_CLK_SPEED 0x0a
  31. #define R0B_MT9V011_RESTART 0x0b
  32. #define R0C_MT9V011_SHUTTER_DELAY 0x0c
  33. #define R0D_MT9V011_RESET 0x0d
  34. #define R1E_MT9V011_DIGITAL_ZOOM 0x1e
  35. #define R20_MT9V011_READ_MODE 0x20
  36. #define R2B_MT9V011_GREEN_1_GAIN 0x2b
  37. #define R2C_MT9V011_BLUE_GAIN 0x2c
  38. #define R2D_MT9V011_RED_GAIN 0x2d
  39. #define R2E_MT9V011_GREEN_2_GAIN 0x2e
  40. #define R35_MT9V011_GLOBAL_GAIN 0x35
  41. #define RF1_MT9V011_CHIP_ENABLE 0xf1
  42. #define MT9V011_VERSION 0x8232
  43. #define MT9V011_REV_B_VERSION 0x8243
  44. struct mt9v011 {
  45. struct v4l2_subdev sd;
  46. struct media_pad pad;
  47. struct v4l2_ctrl_handler ctrls;
  48. unsigned width, height;
  49. unsigned xtal;
  50. unsigned hflip:1;
  51. unsigned vflip:1;
  52. u16 global_gain, exposure;
  53. s16 red_bal, blue_bal;
  54. };
  55. static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd)
  56. {
  57. return container_of(sd, struct mt9v011, sd);
  58. }
  59. static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr)
  60. {
  61. struct i2c_client *c = v4l2_get_subdevdata(sd);
  62. __be16 buffer;
  63. int rc, val;
  64. rc = i2c_master_send(c, &addr, 1);
  65. if (rc != 1)
  66. v4l2_dbg(0, debug, sd,
  67. "i2c i/o error: rc == %d (should be 1)\n", rc);
  68. msleep(10);
  69. rc = i2c_master_recv(c, (char *)&buffer, 2);
  70. if (rc != 2)
  71. v4l2_dbg(0, debug, sd,
  72. "i2c i/o error: rc == %d (should be 2)\n", rc);
  73. val = be16_to_cpu(buffer);
  74. v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val);
  75. return val;
  76. }
  77. static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr,
  78. u16 value)
  79. {
  80. struct i2c_client *c = v4l2_get_subdevdata(sd);
  81. unsigned char buffer[3];
  82. int rc;
  83. buffer[0] = addr;
  84. buffer[1] = value >> 8;
  85. buffer[2] = value & 0xff;
  86. v4l2_dbg(2, debug, sd,
  87. "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value);
  88. rc = i2c_master_send(c, buffer, 3);
  89. if (rc != 3)
  90. v4l2_dbg(0, debug, sd,
  91. "i2c i/o error: rc == %d (should be 3)\n", rc);
  92. }
  93. struct i2c_reg_value {
  94. unsigned char reg;
  95. u16 value;
  96. };
  97. /*
  98. * Values used at the original driver
  99. * Some values are marked as Reserved at the datasheet
  100. */
  101. static const struct i2c_reg_value mt9v011_init_default[] = {
  102. { R0D_MT9V011_RESET, 0x0001 },
  103. { R0D_MT9V011_RESET, 0x0000 },
  104. { R0C_MT9V011_SHUTTER_DELAY, 0x0000 },
  105. { R09_MT9V011_SHUTTER_WIDTH, 0x1fc },
  106. { R0A_MT9V011_CLK_SPEED, 0x0000 },
  107. { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 },
  108. { R07_MT9V011_OUT_CTRL, 0x0002 }, /* chip enable */
  109. };
  110. static u16 calc_mt9v011_gain(s16 lineargain)
  111. {
  112. u16 digitalgain = 0;
  113. u16 analogmult = 0;
  114. u16 analoginit = 0;
  115. if (lineargain < 0)
  116. lineargain = 0;
  117. /* recommended minimum */
  118. lineargain += 0x0020;
  119. if (lineargain > 2047)
  120. lineargain = 2047;
  121. if (lineargain > 1023) {
  122. digitalgain = 3;
  123. analogmult = 3;
  124. analoginit = lineargain / 16;
  125. } else if (lineargain > 511) {
  126. digitalgain = 1;
  127. analogmult = 3;
  128. analoginit = lineargain / 8;
  129. } else if (lineargain > 255) {
  130. analogmult = 3;
  131. analoginit = lineargain / 4;
  132. } else if (lineargain > 127) {
  133. analogmult = 1;
  134. analoginit = lineargain / 2;
  135. } else
  136. analoginit = lineargain;
  137. return analoginit + (analogmult << 7) + (digitalgain << 9);
  138. }
  139. static void set_balance(struct v4l2_subdev *sd)
  140. {
  141. struct mt9v011 *core = to_mt9v011(sd);
  142. u16 green_gain, blue_gain, red_gain;
  143. u16 exposure;
  144. s16 bal;
  145. exposure = core->exposure;
  146. green_gain = calc_mt9v011_gain(core->global_gain);
  147. bal = core->global_gain;
  148. bal += (core->blue_bal * core->global_gain / (1 << 7));
  149. blue_gain = calc_mt9v011_gain(bal);
  150. bal = core->global_gain;
  151. bal += (core->red_bal * core->global_gain / (1 << 7));
  152. red_gain = calc_mt9v011_gain(bal);
  153. mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green_gain);
  154. mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green_gain);
  155. mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain);
  156. mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain);
  157. mt9v011_write(sd, R09_MT9V011_SHUTTER_WIDTH, exposure);
  158. }
  159. static void calc_fps(struct v4l2_subdev *sd, u32 *numerator, u32 *denominator)
  160. {
  161. struct mt9v011 *core = to_mt9v011(sd);
  162. unsigned height, width, hblank, vblank, speed;
  163. unsigned row_time, t_time;
  164. u64 frames_per_ms;
  165. unsigned tmp;
  166. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  167. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  168. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  169. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  170. speed = mt9v011_read(sd, R0A_MT9V011_CLK_SPEED);
  171. row_time = (width + 113 + hblank) * (speed + 2);
  172. t_time = row_time * (height + vblank + 1);
  173. frames_per_ms = core->xtal * 1000l;
  174. do_div(frames_per_ms, t_time);
  175. tmp = frames_per_ms;
  176. v4l2_dbg(1, debug, sd, "Programmed to %u.%03u fps (%d pixel clcks)\n",
  177. tmp / 1000, tmp % 1000, t_time);
  178. if (numerator && denominator) {
  179. *numerator = 1000;
  180. *denominator = (u32)frames_per_ms;
  181. }
  182. }
  183. static u16 calc_speed(struct v4l2_subdev *sd, u32 numerator, u32 denominator)
  184. {
  185. struct mt9v011 *core = to_mt9v011(sd);
  186. unsigned height, width, hblank, vblank;
  187. unsigned row_time, line_time;
  188. u64 t_time, speed;
  189. /* Avoid bogus calculus */
  190. if (!numerator || !denominator)
  191. return 0;
  192. height = mt9v011_read(sd, R03_MT9V011_HEIGHT);
  193. width = mt9v011_read(sd, R04_MT9V011_WIDTH);
  194. hblank = mt9v011_read(sd, R05_MT9V011_HBLANK);
  195. vblank = mt9v011_read(sd, R06_MT9V011_VBLANK);
  196. row_time = width + 113 + hblank;
  197. line_time = height + vblank + 1;
  198. t_time = core->xtal * ((u64)numerator);
  199. /* round to the closest value */
  200. t_time += denominator / 2;
  201. do_div(t_time, denominator);
  202. speed = t_time;
  203. do_div(speed, row_time * line_time);
  204. /* Avoid having a negative value for speed */
  205. if (speed < 2)
  206. speed = 0;
  207. else
  208. speed -= 2;
  209. /* Avoid speed overflow */
  210. if (speed > 15)
  211. return 15;
  212. return (u16)speed;
  213. }
  214. static void set_res(struct v4l2_subdev *sd)
  215. {
  216. struct mt9v011 *core = to_mt9v011(sd);
  217. unsigned vstart, hstart;
  218. /*
  219. * The mt9v011 doesn't have scaling. So, in order to select the desired
  220. * resolution, we're cropping at the middle of the sensor.
  221. * hblank and vblank should be adjusted, in order to warrant that
  222. * we'll preserve the line timings for 30 fps, no matter what resolution
  223. * is selected.
  224. * NOTE: datasheet says that width (and height) should be filled with
  225. * width-1. However, this doesn't work, since one pixel per line will
  226. * be missing.
  227. */
  228. hstart = 20 + (640 - core->width) / 2;
  229. mt9v011_write(sd, R02_MT9V011_COLSTART, hstart);
  230. mt9v011_write(sd, R04_MT9V011_WIDTH, core->width);
  231. mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width);
  232. vstart = 8 + (480 - core->height) / 2;
  233. mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart);
  234. mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height);
  235. mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height);
  236. calc_fps(sd, NULL, NULL);
  237. };
  238. static void set_read_mode(struct v4l2_subdev *sd)
  239. {
  240. struct mt9v011 *core = to_mt9v011(sd);
  241. unsigned mode = 0x1000;
  242. if (core->hflip)
  243. mode |= 0x4000;
  244. if (core->vflip)
  245. mode |= 0x8000;
  246. mt9v011_write(sd, R20_MT9V011_READ_MODE, mode);
  247. }
  248. static int mt9v011_reset(struct v4l2_subdev *sd, u32 val)
  249. {
  250. int i;
  251. for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++)
  252. mt9v011_write(sd, mt9v011_init_default[i].reg,
  253. mt9v011_init_default[i].value);
  254. set_balance(sd);
  255. set_res(sd);
  256. set_read_mode(sd);
  257. return 0;
  258. }
  259. static int mt9v011_enum_mbus_code(struct v4l2_subdev *sd,
  260. struct v4l2_subdev_state *sd_state,
  261. struct v4l2_subdev_mbus_code_enum *code)
  262. {
  263. if (code->pad || code->index > 0)
  264. return -EINVAL;
  265. code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
  266. return 0;
  267. }
  268. static int mt9v011_set_fmt(struct v4l2_subdev *sd,
  269. struct v4l2_subdev_state *sd_state,
  270. struct v4l2_subdev_format *format)
  271. {
  272. struct v4l2_mbus_framefmt *fmt = &format->format;
  273. struct mt9v011 *core = to_mt9v011(sd);
  274. if (format->pad || fmt->code != MEDIA_BUS_FMT_SGRBG8_1X8)
  275. return -EINVAL;
  276. v4l_bound_align_image(&fmt->width, 48, 639, 1,
  277. &fmt->height, 32, 480, 1, 0);
  278. fmt->field = V4L2_FIELD_NONE;
  279. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  280. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
  281. core->width = fmt->width;
  282. core->height = fmt->height;
  283. set_res(sd);
  284. } else {
  285. *v4l2_subdev_state_get_format(sd_state, 0) = *fmt;
  286. }
  287. return 0;
  288. }
  289. static int mt9v011_get_frame_interval(struct v4l2_subdev *sd,
  290. struct v4l2_subdev_state *sd_state,
  291. struct v4l2_subdev_frame_interval *ival)
  292. {
  293. /*
  294. * FIXME: Implement support for V4L2_SUBDEV_FORMAT_TRY, using the V4L2
  295. * subdev active state API.
  296. */
  297. if (ival->which != V4L2_SUBDEV_FORMAT_ACTIVE)
  298. return -EINVAL;
  299. calc_fps(sd,
  300. &ival->interval.numerator,
  301. &ival->interval.denominator);
  302. return 0;
  303. }
  304. static int mt9v011_set_frame_interval(struct v4l2_subdev *sd,
  305. struct v4l2_subdev_state *sd_state,
  306. struct v4l2_subdev_frame_interval *ival)
  307. {
  308. struct v4l2_fract *tpf = &ival->interval;
  309. u16 speed;
  310. /*
  311. * FIXME: Implement support for V4L2_SUBDEV_FORMAT_TRY, using the V4L2
  312. * subdev active state API.
  313. */
  314. if (ival->which != V4L2_SUBDEV_FORMAT_ACTIVE)
  315. return -EINVAL;
  316. speed = calc_speed(sd, tpf->numerator, tpf->denominator);
  317. mt9v011_write(sd, R0A_MT9V011_CLK_SPEED, speed);
  318. v4l2_dbg(1, debug, sd, "Setting speed to %d\n", speed);
  319. /* Recalculate and update fps info */
  320. calc_fps(sd, &tpf->numerator, &tpf->denominator);
  321. return 0;
  322. }
  323. #ifdef CONFIG_VIDEO_ADV_DEBUG
  324. static int mt9v011_g_register(struct v4l2_subdev *sd,
  325. struct v4l2_dbg_register *reg)
  326. {
  327. reg->val = mt9v011_read(sd, reg->reg & 0xff);
  328. reg->size = 2;
  329. return 0;
  330. }
  331. static int mt9v011_s_register(struct v4l2_subdev *sd,
  332. const struct v4l2_dbg_register *reg)
  333. {
  334. mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff);
  335. return 0;
  336. }
  337. #endif
  338. static int mt9v011_s_ctrl(struct v4l2_ctrl *ctrl)
  339. {
  340. struct mt9v011 *core =
  341. container_of(ctrl->handler, struct mt9v011, ctrls);
  342. struct v4l2_subdev *sd = &core->sd;
  343. switch (ctrl->id) {
  344. case V4L2_CID_GAIN:
  345. core->global_gain = ctrl->val;
  346. break;
  347. case V4L2_CID_EXPOSURE:
  348. core->exposure = ctrl->val;
  349. break;
  350. case V4L2_CID_RED_BALANCE:
  351. core->red_bal = ctrl->val;
  352. break;
  353. case V4L2_CID_BLUE_BALANCE:
  354. core->blue_bal = ctrl->val;
  355. break;
  356. case V4L2_CID_HFLIP:
  357. core->hflip = ctrl->val;
  358. set_read_mode(sd);
  359. return 0;
  360. case V4L2_CID_VFLIP:
  361. core->vflip = ctrl->val;
  362. set_read_mode(sd);
  363. return 0;
  364. default:
  365. return -EINVAL;
  366. }
  367. set_balance(sd);
  368. return 0;
  369. }
  370. static const struct v4l2_ctrl_ops mt9v011_ctrl_ops = {
  371. .s_ctrl = mt9v011_s_ctrl,
  372. };
  373. static const struct v4l2_subdev_core_ops mt9v011_core_ops = {
  374. .reset = mt9v011_reset,
  375. #ifdef CONFIG_VIDEO_ADV_DEBUG
  376. .g_register = mt9v011_g_register,
  377. .s_register = mt9v011_s_register,
  378. #endif
  379. };
  380. static const struct v4l2_subdev_pad_ops mt9v011_pad_ops = {
  381. .enum_mbus_code = mt9v011_enum_mbus_code,
  382. .set_fmt = mt9v011_set_fmt,
  383. .get_frame_interval = mt9v011_get_frame_interval,
  384. .set_frame_interval = mt9v011_set_frame_interval,
  385. };
  386. static const struct v4l2_subdev_ops mt9v011_ops = {
  387. .core = &mt9v011_core_ops,
  388. .pad = &mt9v011_pad_ops,
  389. };
  390. /****************************************************************************
  391. I2C Client & Driver
  392. ****************************************************************************/
  393. static int mt9v011_probe(struct i2c_client *c)
  394. {
  395. u16 version;
  396. struct mt9v011 *core;
  397. struct v4l2_subdev *sd;
  398. int ret;
  399. /* Check if the adapter supports the needed features */
  400. if (!i2c_check_functionality(c->adapter,
  401. I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
  402. return -EIO;
  403. core = devm_kzalloc(&c->dev, sizeof(struct mt9v011), GFP_KERNEL);
  404. if (!core)
  405. return -ENOMEM;
  406. sd = &core->sd;
  407. v4l2_i2c_subdev_init(sd, c, &mt9v011_ops);
  408. core->pad.flags = MEDIA_PAD_FL_SOURCE;
  409. sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
  410. ret = media_entity_pads_init(&sd->entity, 1, &core->pad);
  411. if (ret < 0)
  412. return ret;
  413. /* Check if the sensor is really a MT9V011 */
  414. version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION);
  415. if ((version != MT9V011_VERSION) &&
  416. (version != MT9V011_REV_B_VERSION)) {
  417. v4l2_info(sd, "*** unknown micron chip detected (0x%04x).\n",
  418. version);
  419. return -EINVAL;
  420. }
  421. v4l2_ctrl_handler_init(&core->ctrls, 5);
  422. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  423. V4L2_CID_GAIN, 0, (1 << 12) - 1 - 0x20, 1, 0x20);
  424. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  425. V4L2_CID_EXPOSURE, 0, 2047, 1, 0x01fc);
  426. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  427. V4L2_CID_RED_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  428. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  429. V4L2_CID_BLUE_BALANCE, -(1 << 9), (1 << 9) - 1, 1, 0);
  430. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  431. V4L2_CID_HFLIP, 0, 1, 1, 0);
  432. v4l2_ctrl_new_std(&core->ctrls, &mt9v011_ctrl_ops,
  433. V4L2_CID_VFLIP, 0, 1, 1, 0);
  434. if (core->ctrls.error) {
  435. int ret = core->ctrls.error;
  436. v4l2_err(sd, "control initialization error %d\n", ret);
  437. v4l2_ctrl_handler_free(&core->ctrls);
  438. return ret;
  439. }
  440. core->sd.ctrl_handler = &core->ctrls;
  441. core->global_gain = 0x0024;
  442. core->exposure = 0x01fc;
  443. core->width = 640;
  444. core->height = 480;
  445. core->xtal = 27000000; /* Hz */
  446. if (c->dev.platform_data) {
  447. struct mt9v011_platform_data *pdata = c->dev.platform_data;
  448. core->xtal = pdata->xtal;
  449. v4l2_dbg(1, debug, sd, "xtal set to %d.%03d MHz\n",
  450. core->xtal / 1000000, (core->xtal / 1000) % 1000);
  451. }
  452. v4l_info(c, "chip found @ 0x%02x (%s - chip version 0x%04x)\n",
  453. c->addr << 1, c->adapter->name, version);
  454. return 0;
  455. }
  456. static void mt9v011_remove(struct i2c_client *c)
  457. {
  458. struct v4l2_subdev *sd = i2c_get_clientdata(c);
  459. struct mt9v011 *core = to_mt9v011(sd);
  460. v4l2_dbg(1, debug, sd,
  461. "mt9v011.c: removing mt9v011 adapter on address 0x%x\n",
  462. c->addr << 1);
  463. v4l2_device_unregister_subdev(sd);
  464. v4l2_ctrl_handler_free(&core->ctrls);
  465. }
  466. /* ----------------------------------------------------------------------- */
  467. static const struct i2c_device_id mt9v011_id[] = {
  468. { "mt9v011" },
  469. { }
  470. };
  471. MODULE_DEVICE_TABLE(i2c, mt9v011_id);
  472. static struct i2c_driver mt9v011_driver = {
  473. .driver = {
  474. .name = "mt9v011",
  475. },
  476. .probe = mt9v011_probe,
  477. .remove = mt9v011_remove,
  478. .id_table = mt9v011_id,
  479. };
  480. module_i2c_driver(mt9v011_driver);