ds90ub913.c 23 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958
  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for the Texas Instruments DS90UB913 video serializer
  4. *
  5. * Based on a driver from Luca Ceresoli <luca@lucaceresoli.net>
  6. *
  7. * Copyright (c) 2019 Luca Ceresoli <luca@lucaceresoli.net>
  8. * Copyright (c) 2023 Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>
  9. */
  10. #include <linux/bitfield.h>
  11. #include <linux/clk-provider.h>
  12. #include <linux/clk.h>
  13. #include <linux/delay.h>
  14. #include <linux/gpio/driver.h>
  15. #include <linux/i2c-atr.h>
  16. #include <linux/i2c.h>
  17. #include <linux/kernel.h>
  18. #include <linux/module.h>
  19. #include <linux/property.h>
  20. #include <linux/regmap.h>
  21. #include <media/i2c/ds90ub9xx.h>
  22. #include <media/v4l2-fwnode.h>
  23. #include <media/v4l2-mediabus.h>
  24. #include <media/v4l2-subdev.h>
  25. #define UB913_PAD_SINK 0
  26. #define UB913_PAD_SOURCE 1
  27. /*
  28. * UB913 has 4 gpios, but gpios 3 and 4 are reserved for external oscillator
  29. * mode. Thus we only support 2 gpios for now.
  30. */
  31. #define UB913_NUM_GPIOS 2
  32. #define UB913_REG_RESET_CTL 0x01
  33. #define UB913_REG_RESET_CTL_DIGITAL_RESET_1 BIT(1)
  34. #define UB913_REG_RESET_CTL_DIGITAL_RESET_0 BIT(0)
  35. #define UB913_REG_GENERAL_CFG 0x03
  36. #define UB913_REG_GENERAL_CFG_CRC_ERR_RESET BIT(5)
  37. #define UB913_REG_GENERAL_CFG_PCLK_RISING BIT(0)
  38. #define UB913_REG_MODE_SEL 0x05
  39. #define UB913_REG_MODE_SEL_MODE_OVERRIDE BIT(5)
  40. #define UB913_REG_MODE_SEL_MODE_UP_TO_DATE BIT(4)
  41. #define UB913_REG_MODE_SEL_MODE_MASK GENMASK(3, 0)
  42. #define UB913_REG_CRC_ERRORS_LSB 0x0a
  43. #define UB913_REG_CRC_ERRORS_MSB 0x0b
  44. #define UB913_REG_GENERAL_STATUS 0x0c
  45. #define UB913_REG_GPIO_CFG(n) (0x0d + (n))
  46. #define UB913_REG_GPIO_CFG_ENABLE(n) BIT(0 + (n) * 4)
  47. #define UB913_REG_GPIO_CFG_DIR_INPUT(n) BIT(1 + (n) * 4)
  48. #define UB913_REG_GPIO_CFG_REMOTE_EN(n) BIT(2 + (n) * 4)
  49. #define UB913_REG_GPIO_CFG_OUT_VAL(n) BIT(3 + (n) * 4)
  50. #define UB913_REG_GPIO_CFG_MASK(n) (0xf << ((n) * 4))
  51. #define UB913_REG_SCL_HIGH_TIME 0x11
  52. #define UB913_REG_SCL_LOW_TIME 0x12
  53. #define UB913_REG_PLL_OVR 0x35
  54. struct ub913_data {
  55. struct i2c_client *client;
  56. struct regmap *regmap;
  57. struct clk *clkin;
  58. struct gpio_chip gpio_chip;
  59. struct v4l2_subdev sd;
  60. struct media_pad pads[2];
  61. struct v4l2_async_notifier notifier;
  62. struct v4l2_subdev *source_sd;
  63. u16 source_sd_pad;
  64. u64 enabled_source_streams;
  65. struct clk_hw *clkout_clk_hw;
  66. struct ds90ub9xx_platform_data *plat_data;
  67. bool pclk_polarity_rising;
  68. };
  69. static inline struct ub913_data *sd_to_ub913(struct v4l2_subdev *sd)
  70. {
  71. return container_of(sd, struct ub913_data, sd);
  72. }
  73. struct ub913_format_info {
  74. u32 incode;
  75. u32 outcode;
  76. };
  77. static const struct ub913_format_info ub913_formats[] = {
  78. /* Only RAW10 with 8-bit payload is supported at the moment */
  79. { .incode = MEDIA_BUS_FMT_YUYV8_2X8, .outcode = MEDIA_BUS_FMT_YUYV8_1X16 },
  80. { .incode = MEDIA_BUS_FMT_UYVY8_2X8, .outcode = MEDIA_BUS_FMT_UYVY8_1X16 },
  81. { .incode = MEDIA_BUS_FMT_VYUY8_2X8, .outcode = MEDIA_BUS_FMT_VYUY8_1X16 },
  82. { .incode = MEDIA_BUS_FMT_YVYU8_2X8, .outcode = MEDIA_BUS_FMT_YVYU8_1X16 },
  83. };
  84. static const struct ub913_format_info *ub913_find_format(u32 incode)
  85. {
  86. unsigned int i;
  87. for (i = 0; i < ARRAY_SIZE(ub913_formats); i++) {
  88. if (ub913_formats[i].incode == incode)
  89. return &ub913_formats[i];
  90. }
  91. return NULL;
  92. }
  93. static int ub913_read(const struct ub913_data *priv, u8 reg, u8 *val,
  94. int *err)
  95. {
  96. unsigned int v;
  97. int ret;
  98. if (err && *err)
  99. return *err;
  100. ret = regmap_read(priv->regmap, reg, &v);
  101. if (ret) {
  102. dev_err(&priv->client->dev,
  103. "Cannot read register 0x%02x: %d!\n", reg, ret);
  104. goto out;
  105. }
  106. *val = v;
  107. out:
  108. if (ret && err)
  109. *err = ret;
  110. return ret;
  111. }
  112. static int ub913_write(const struct ub913_data *priv, u8 reg, u8 val,
  113. int *err)
  114. {
  115. int ret;
  116. if (err && *err)
  117. return *err;
  118. ret = regmap_write(priv->regmap, reg, val);
  119. if (ret < 0)
  120. dev_err(&priv->client->dev,
  121. "Cannot write register 0x%02x: %d!\n", reg, ret);
  122. if (ret && err)
  123. *err = ret;
  124. return ret;
  125. }
  126. static int ub913_update_bits(const struct ub913_data *priv, u8 reg, u8 mask,
  127. u8 val, int *err)
  128. {
  129. int ret;
  130. if (err && *err)
  131. return *err;
  132. ret = regmap_update_bits(priv->regmap, reg, mask, val);
  133. if (ret < 0)
  134. dev_err(&priv->client->dev,
  135. "Cannot update register 0x%02x %d!\n", reg, ret);
  136. if (ret && err)
  137. *err = ret;
  138. return ret;
  139. }
  140. /*
  141. * GPIO chip
  142. */
  143. static int ub913_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)
  144. {
  145. return GPIO_LINE_DIRECTION_OUT;
  146. }
  147. static int ub913_gpio_direction_out(struct gpio_chip *gc, unsigned int offset,
  148. int value)
  149. {
  150. struct ub913_data *priv = gpiochip_get_data(gc);
  151. unsigned int reg_idx = offset / 2;
  152. unsigned int field_idx = offset % 2;
  153. return regmap_update_bits(priv->regmap, UB913_REG_GPIO_CFG(reg_idx),
  154. UB913_REG_GPIO_CFG_MASK(field_idx),
  155. UB913_REG_GPIO_CFG_ENABLE(field_idx) |
  156. (value ? UB913_REG_GPIO_CFG_OUT_VAL(field_idx) :
  157. 0));
  158. }
  159. static int ub913_gpio_set(struct gpio_chip *gc, unsigned int offset, int value)
  160. {
  161. return ub913_gpio_direction_out(gc, offset, value);
  162. }
  163. static int ub913_gpio_of_xlate(struct gpio_chip *gc,
  164. const struct of_phandle_args *gpiospec,
  165. u32 *flags)
  166. {
  167. if (flags)
  168. *flags = gpiospec->args[1];
  169. return gpiospec->args[0];
  170. }
  171. static int ub913_gpiochip_probe(struct ub913_data *priv)
  172. {
  173. struct device *dev = &priv->client->dev;
  174. struct gpio_chip *gc = &priv->gpio_chip;
  175. int ret;
  176. /* Initialize GPIOs 0 and 1 to local control, tri-state */
  177. ub913_write(priv, UB913_REG_GPIO_CFG(0), 0, NULL);
  178. gc->label = dev_name(dev);
  179. gc->parent = dev;
  180. gc->owner = THIS_MODULE;
  181. gc->base = -1;
  182. gc->can_sleep = true;
  183. gc->ngpio = UB913_NUM_GPIOS;
  184. gc->get_direction = ub913_gpio_get_direction;
  185. gc->direction_output = ub913_gpio_direction_out;
  186. gc->set = ub913_gpio_set;
  187. gc->of_xlate = ub913_gpio_of_xlate;
  188. gc->of_gpio_n_cells = 2;
  189. ret = gpiochip_add_data(gc, priv);
  190. if (ret) {
  191. dev_err(dev, "Failed to add GPIOs: %d\n", ret);
  192. return ret;
  193. }
  194. return 0;
  195. }
  196. static void ub913_gpiochip_remove(struct ub913_data *priv)
  197. {
  198. gpiochip_remove(&priv->gpio_chip);
  199. }
  200. static const struct regmap_config ub913_regmap_config = {
  201. .name = "ds90ub913",
  202. .reg_bits = 8,
  203. .val_bits = 8,
  204. .reg_format_endian = REGMAP_ENDIAN_DEFAULT,
  205. .val_format_endian = REGMAP_ENDIAN_DEFAULT,
  206. };
  207. /*
  208. * V4L2
  209. */
  210. static int ub913_enable_streams(struct v4l2_subdev *sd,
  211. struct v4l2_subdev_state *state, u32 pad,
  212. u64 streams_mask)
  213. {
  214. struct ub913_data *priv = sd_to_ub913(sd);
  215. u64 sink_streams;
  216. int ret;
  217. sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE,
  218. UB913_PAD_SINK,
  219. &streams_mask);
  220. ret = v4l2_subdev_enable_streams(priv->source_sd, priv->source_sd_pad,
  221. sink_streams);
  222. if (ret)
  223. return ret;
  224. priv->enabled_source_streams |= streams_mask;
  225. return 0;
  226. }
  227. static int ub913_disable_streams(struct v4l2_subdev *sd,
  228. struct v4l2_subdev_state *state, u32 pad,
  229. u64 streams_mask)
  230. {
  231. struct ub913_data *priv = sd_to_ub913(sd);
  232. u64 sink_streams;
  233. int ret;
  234. sink_streams = v4l2_subdev_state_xlate_streams(state, UB913_PAD_SOURCE,
  235. UB913_PAD_SINK,
  236. &streams_mask);
  237. ret = v4l2_subdev_disable_streams(priv->source_sd, priv->source_sd_pad,
  238. sink_streams);
  239. if (ret)
  240. return ret;
  241. priv->enabled_source_streams &= ~streams_mask;
  242. return 0;
  243. }
  244. static int _ub913_set_routing(struct v4l2_subdev *sd,
  245. struct v4l2_subdev_state *state,
  246. struct v4l2_subdev_krouting *routing)
  247. {
  248. static const struct v4l2_mbus_framefmt in_format = {
  249. .width = 640,
  250. .height = 480,
  251. .code = MEDIA_BUS_FMT_UYVY8_2X8,
  252. .field = V4L2_FIELD_NONE,
  253. .colorspace = V4L2_COLORSPACE_SRGB,
  254. .ycbcr_enc = V4L2_YCBCR_ENC_601,
  255. .quantization = V4L2_QUANTIZATION_LIM_RANGE,
  256. .xfer_func = V4L2_XFER_FUNC_SRGB,
  257. };
  258. static const struct v4l2_mbus_framefmt out_format = {
  259. .width = 640,
  260. .height = 480,
  261. .code = MEDIA_BUS_FMT_UYVY8_1X16,
  262. .field = V4L2_FIELD_NONE,
  263. .colorspace = V4L2_COLORSPACE_SRGB,
  264. .ycbcr_enc = V4L2_YCBCR_ENC_601,
  265. .quantization = V4L2_QUANTIZATION_LIM_RANGE,
  266. .xfer_func = V4L2_XFER_FUNC_SRGB,
  267. };
  268. struct v4l2_subdev_route *route;
  269. int ret;
  270. ret = v4l2_subdev_routing_validate(sd, routing,
  271. V4L2_SUBDEV_ROUTING_ONLY_1_TO_1);
  272. if (ret)
  273. return ret;
  274. ret = v4l2_subdev_set_routing(sd, state, routing);
  275. if (ret)
  276. return ret;
  277. for_each_active_route(&state->routing, route) {
  278. struct v4l2_mbus_framefmt *fmt;
  279. fmt = v4l2_subdev_state_get_format(state, route->sink_pad,
  280. route->sink_stream);
  281. *fmt = in_format;
  282. fmt = v4l2_subdev_state_get_format(state, route->source_pad,
  283. route->source_stream);
  284. *fmt = out_format;
  285. }
  286. return 0;
  287. }
  288. static int ub913_set_routing(struct v4l2_subdev *sd,
  289. struct v4l2_subdev_state *state,
  290. enum v4l2_subdev_format_whence which,
  291. struct v4l2_subdev_krouting *routing)
  292. {
  293. struct ub913_data *priv = sd_to_ub913(sd);
  294. if (which == V4L2_SUBDEV_FORMAT_ACTIVE && priv->enabled_source_streams)
  295. return -EBUSY;
  296. return _ub913_set_routing(sd, state, routing);
  297. }
  298. static int ub913_get_frame_desc(struct v4l2_subdev *sd, unsigned int pad,
  299. struct v4l2_mbus_frame_desc *fd)
  300. {
  301. struct ub913_data *priv = sd_to_ub913(sd);
  302. const struct v4l2_subdev_krouting *routing;
  303. struct v4l2_mbus_frame_desc source_fd;
  304. struct v4l2_subdev_route *route;
  305. struct v4l2_subdev_state *state;
  306. int ret;
  307. if (pad != UB913_PAD_SOURCE)
  308. return -EINVAL;
  309. ret = v4l2_subdev_call(priv->source_sd, pad, get_frame_desc,
  310. priv->source_sd_pad, &source_fd);
  311. if (ret)
  312. return ret;
  313. fd->type = V4L2_MBUS_FRAME_DESC_TYPE_PARALLEL;
  314. state = v4l2_subdev_lock_and_get_active_state(sd);
  315. routing = &state->routing;
  316. for_each_active_route(routing, route) {
  317. unsigned int i;
  318. if (route->source_pad != pad)
  319. continue;
  320. for (i = 0; i < source_fd.num_entries; i++) {
  321. if (source_fd.entry[i].stream == route->sink_stream)
  322. break;
  323. }
  324. if (i == source_fd.num_entries) {
  325. dev_err(&priv->client->dev,
  326. "Failed to find stream from source frame desc\n");
  327. ret = -EPIPE;
  328. goto out_unlock;
  329. }
  330. fd->entry[fd->num_entries].stream = route->source_stream;
  331. fd->entry[fd->num_entries].flags = source_fd.entry[i].flags;
  332. fd->entry[fd->num_entries].length = source_fd.entry[i].length;
  333. fd->entry[fd->num_entries].pixelcode =
  334. source_fd.entry[i].pixelcode;
  335. fd->num_entries++;
  336. }
  337. out_unlock:
  338. v4l2_subdev_unlock_state(state);
  339. return ret;
  340. }
  341. static int ub913_set_fmt(struct v4l2_subdev *sd,
  342. struct v4l2_subdev_state *state,
  343. struct v4l2_subdev_format *format)
  344. {
  345. struct ub913_data *priv = sd_to_ub913(sd);
  346. struct v4l2_mbus_framefmt *fmt;
  347. const struct ub913_format_info *finfo;
  348. if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE &&
  349. priv->enabled_source_streams)
  350. return -EBUSY;
  351. /* Source format is fully defined by the sink format, so not settable */
  352. if (format->pad == UB913_PAD_SOURCE)
  353. return v4l2_subdev_get_fmt(sd, state, format);
  354. finfo = ub913_find_format(format->format.code);
  355. if (!finfo) {
  356. finfo = &ub913_formats[0];
  357. format->format.code = finfo->incode;
  358. }
  359. /* Set sink format */
  360. fmt = v4l2_subdev_state_get_format(state, format->pad, format->stream);
  361. if (!fmt)
  362. return -EINVAL;
  363. *fmt = format->format;
  364. /* Propagate to source format, and adjust the mbus code */
  365. fmt = v4l2_subdev_state_get_opposite_stream_format(state, format->pad,
  366. format->stream);
  367. if (!fmt)
  368. return -EINVAL;
  369. *fmt = format->format;
  370. fmt->code = finfo->outcode;
  371. return 0;
  372. }
  373. static int ub913_init_state(struct v4l2_subdev *sd,
  374. struct v4l2_subdev_state *state)
  375. {
  376. struct v4l2_subdev_route routes[] = {
  377. {
  378. .sink_pad = UB913_PAD_SINK,
  379. .sink_stream = 0,
  380. .source_pad = UB913_PAD_SOURCE,
  381. .source_stream = 0,
  382. .flags = V4L2_SUBDEV_ROUTE_FL_ACTIVE,
  383. },
  384. };
  385. struct v4l2_subdev_krouting routing = {
  386. .num_routes = ARRAY_SIZE(routes),
  387. .routes = routes,
  388. };
  389. return _ub913_set_routing(sd, state, &routing);
  390. }
  391. static int ub913_log_status(struct v4l2_subdev *sd)
  392. {
  393. struct ub913_data *priv = sd_to_ub913(sd);
  394. struct device *dev = &priv->client->dev;
  395. u8 v, v1, v2;
  396. int ret;
  397. ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL);
  398. if (ret)
  399. return ret;
  400. dev_info(dev, "MODE_SEL %#02x\n", v);
  401. ub913_read(priv, UB913_REG_CRC_ERRORS_LSB, &v1, &ret);
  402. ub913_read(priv, UB913_REG_CRC_ERRORS_MSB, &v2, &ret);
  403. if (ret)
  404. return ret;
  405. dev_info(dev, "CRC errors %u\n", v1 | (v2 << 8));
  406. /* clear CRC errors */
  407. ub913_read(priv, UB913_REG_GENERAL_CFG, &v, &ret);
  408. ub913_write(priv, UB913_REG_GENERAL_CFG,
  409. v | UB913_REG_GENERAL_CFG_CRC_ERR_RESET, &ret);
  410. ub913_write(priv, UB913_REG_GENERAL_CFG, v, &ret);
  411. if (ret)
  412. return ret;
  413. ret = ub913_read(priv, UB913_REG_GENERAL_STATUS, &v, NULL);
  414. if (ret)
  415. return ret;
  416. dev_info(dev, "GENERAL_STATUS %#02x\n", v);
  417. ret = ub913_read(priv, UB913_REG_PLL_OVR, &v, NULL);
  418. if (ret)
  419. return ret;
  420. dev_info(dev, "PLL_OVR %#02x\n", v);
  421. return 0;
  422. }
  423. static const struct v4l2_subdev_core_ops ub913_subdev_core_ops = {
  424. .log_status = ub913_log_status,
  425. };
  426. static const struct v4l2_subdev_pad_ops ub913_pad_ops = {
  427. .enable_streams = ub913_enable_streams,
  428. .disable_streams = ub913_disable_streams,
  429. .set_routing = ub913_set_routing,
  430. .get_frame_desc = ub913_get_frame_desc,
  431. .get_fmt = v4l2_subdev_get_fmt,
  432. .set_fmt = ub913_set_fmt,
  433. };
  434. static const struct v4l2_subdev_ops ub913_subdev_ops = {
  435. .core = &ub913_subdev_core_ops,
  436. .pad = &ub913_pad_ops,
  437. };
  438. static const struct v4l2_subdev_internal_ops ub913_internal_ops = {
  439. .init_state = ub913_init_state,
  440. };
  441. static const struct media_entity_operations ub913_entity_ops = {
  442. .link_validate = v4l2_subdev_link_validate,
  443. };
  444. static int ub913_notify_bound(struct v4l2_async_notifier *notifier,
  445. struct v4l2_subdev *source_subdev,
  446. struct v4l2_async_connection *asd)
  447. {
  448. struct ub913_data *priv = sd_to_ub913(notifier->sd);
  449. struct device *dev = &priv->client->dev;
  450. int ret;
  451. ret = media_entity_get_fwnode_pad(&source_subdev->entity,
  452. source_subdev->fwnode,
  453. MEDIA_PAD_FL_SOURCE);
  454. if (ret < 0) {
  455. dev_err(dev, "Failed to find pad for %s\n",
  456. source_subdev->name);
  457. return ret;
  458. }
  459. priv->source_sd = source_subdev;
  460. priv->source_sd_pad = ret;
  461. ret = media_create_pad_link(&source_subdev->entity, priv->source_sd_pad,
  462. &priv->sd.entity, UB913_PAD_SINK,
  463. MEDIA_LNK_FL_ENABLED |
  464. MEDIA_LNK_FL_IMMUTABLE);
  465. if (ret) {
  466. dev_err(dev, "Unable to link %s:%u -> %s:0\n",
  467. source_subdev->name, priv->source_sd_pad,
  468. priv->sd.name);
  469. return ret;
  470. }
  471. return 0;
  472. }
  473. static const struct v4l2_async_notifier_operations ub913_notify_ops = {
  474. .bound = ub913_notify_bound,
  475. };
  476. static int ub913_v4l2_notifier_register(struct ub913_data *priv)
  477. {
  478. struct device *dev = &priv->client->dev;
  479. struct v4l2_async_connection *asd;
  480. struct fwnode_handle *ep_fwnode;
  481. int ret;
  482. ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
  483. UB913_PAD_SINK, 0, 0);
  484. if (!ep_fwnode) {
  485. dev_err(dev, "No graph endpoint\n");
  486. return -ENODEV;
  487. }
  488. v4l2_async_subdev_nf_init(&priv->notifier, &priv->sd);
  489. asd = v4l2_async_nf_add_fwnode_remote(&priv->notifier, ep_fwnode,
  490. struct v4l2_async_connection);
  491. fwnode_handle_put(ep_fwnode);
  492. if (IS_ERR(asd)) {
  493. dev_err(dev, "Failed to add subdev: %pe", asd);
  494. v4l2_async_nf_cleanup(&priv->notifier);
  495. return PTR_ERR(asd);
  496. }
  497. priv->notifier.ops = &ub913_notify_ops;
  498. ret = v4l2_async_nf_register(&priv->notifier);
  499. if (ret) {
  500. dev_err(dev, "Failed to register subdev_notifier");
  501. v4l2_async_nf_cleanup(&priv->notifier);
  502. return ret;
  503. }
  504. return 0;
  505. }
  506. static void ub913_v4l2_nf_unregister(struct ub913_data *priv)
  507. {
  508. v4l2_async_nf_unregister(&priv->notifier);
  509. v4l2_async_nf_cleanup(&priv->notifier);
  510. }
  511. static int ub913_register_clkout(struct ub913_data *priv)
  512. {
  513. struct device *dev = &priv->client->dev;
  514. const char *name;
  515. int ret;
  516. name = kasprintf(GFP_KERNEL, "ds90ub913.%s.clk_out", dev_name(dev));
  517. if (!name)
  518. return -ENOMEM;
  519. priv->clkout_clk_hw = devm_clk_hw_register_fixed_factor(dev, name,
  520. __clk_get_name(priv->clkin), 0, 1, 2);
  521. kfree(name);
  522. if (IS_ERR(priv->clkout_clk_hw))
  523. return dev_err_probe(dev, PTR_ERR(priv->clkout_clk_hw),
  524. "Cannot register clkout hw\n");
  525. ret = devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
  526. priv->clkout_clk_hw);
  527. if (ret)
  528. return dev_err_probe(dev, ret,
  529. "Cannot add OF clock provider\n");
  530. return 0;
  531. }
  532. static int ub913_i2c_master_init(struct ub913_data *priv)
  533. {
  534. /* i2c fast mode */
  535. u32 scl_high = 600 + 300; /* high period + rise time, ns */
  536. u32 scl_low = 1300 + 300; /* low period + fall time, ns */
  537. unsigned long ref;
  538. int ret;
  539. ref = clk_get_rate(priv->clkin) / 2;
  540. scl_high = div64_u64((u64)scl_high * ref, 1000000000);
  541. scl_low = div64_u64((u64)scl_low * ref, 1000000000);
  542. ret = ub913_write(priv, UB913_REG_SCL_HIGH_TIME, scl_high, NULL);
  543. if (ret)
  544. return ret;
  545. ret = ub913_write(priv, UB913_REG_SCL_LOW_TIME, scl_low, NULL);
  546. if (ret)
  547. return ret;
  548. return 0;
  549. }
  550. static int ub913_add_i2c_adapter(struct ub913_data *priv)
  551. {
  552. struct device *dev = &priv->client->dev;
  553. struct i2c_atr_adap_desc desc = { };
  554. struct fwnode_handle *i2c_handle;
  555. int ret;
  556. i2c_handle = device_get_named_child_node(dev, "i2c");
  557. if (!i2c_handle)
  558. return 0;
  559. desc.chan_id = priv->plat_data->port;
  560. desc.parent = dev;
  561. desc.bus_handle = i2c_handle;
  562. desc.num_aliases = 0;
  563. ret = i2c_atr_add_adapter(priv->plat_data->atr, &desc);
  564. fwnode_handle_put(i2c_handle);
  565. if (ret)
  566. return ret;
  567. return 0;
  568. }
  569. static int ub913_parse_dt(struct ub913_data *priv)
  570. {
  571. struct device *dev = &priv->client->dev;
  572. struct v4l2_fwnode_endpoint vep = {
  573. .bus_type = V4L2_MBUS_PARALLEL,
  574. };
  575. struct fwnode_handle *ep_fwnode;
  576. int ret;
  577. ep_fwnode = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev),
  578. UB913_PAD_SINK, 0, 0);
  579. if (!ep_fwnode)
  580. return dev_err_probe(dev, -ENOENT, "No sink endpoint\n");
  581. ret = v4l2_fwnode_endpoint_parse(ep_fwnode, &vep);
  582. fwnode_handle_put(ep_fwnode);
  583. if (ret)
  584. return dev_err_probe(dev, ret,
  585. "failed to parse sink endpoint data\n");
  586. if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
  587. priv->pclk_polarity_rising = true;
  588. else if (vep.bus.parallel.flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
  589. priv->pclk_polarity_rising = false;
  590. else
  591. return dev_err_probe(dev, -EINVAL,
  592. "bad value for 'pclk-sample'\n");
  593. return 0;
  594. }
  595. static int ub913_hw_init(struct ub913_data *priv)
  596. {
  597. struct device *dev = &priv->client->dev;
  598. bool mode_override;
  599. u8 mode;
  600. int ret;
  601. u8 v;
  602. ret = ub913_read(priv, UB913_REG_MODE_SEL, &v, NULL);
  603. if (ret)
  604. return ret;
  605. if (!(v & UB913_REG_MODE_SEL_MODE_UP_TO_DATE))
  606. return dev_err_probe(dev, -ENODEV,
  607. "Mode value not stabilized\n");
  608. mode_override = v & UB913_REG_MODE_SEL_MODE_OVERRIDE;
  609. mode = v & UB913_REG_MODE_SEL_MODE_MASK;
  610. dev_dbg(dev, "mode from %s: %#x\n",
  611. mode_override ? "reg" : "deserializer", mode);
  612. ret = ub913_i2c_master_init(priv);
  613. if (ret)
  614. return dev_err_probe(dev, ret, "i2c master init failed\n");
  615. ret = ub913_update_bits(priv, UB913_REG_GENERAL_CFG,
  616. UB913_REG_GENERAL_CFG_PCLK_RISING,
  617. FIELD_PREP(UB913_REG_GENERAL_CFG_PCLK_RISING,
  618. priv->pclk_polarity_rising), NULL);
  619. if (ret)
  620. return ret;
  621. return 0;
  622. }
  623. static int ub913_subdev_init(struct ub913_data *priv)
  624. {
  625. struct device *dev = &priv->client->dev;
  626. int ret;
  627. v4l2_i2c_subdev_init(&priv->sd, priv->client, &ub913_subdev_ops);
  628. priv->sd.internal_ops = &ub913_internal_ops;
  629. priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_STREAMS;
  630. priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
  631. priv->sd.entity.ops = &ub913_entity_ops;
  632. priv->pads[0].flags = MEDIA_PAD_FL_SINK;
  633. priv->pads[1].flags = MEDIA_PAD_FL_SOURCE;
  634. ret = media_entity_pads_init(&priv->sd.entity, 2, priv->pads);
  635. if (ret)
  636. return dev_err_probe(dev, ret, "Failed to init pads\n");
  637. ret = v4l2_subdev_init_finalize(&priv->sd);
  638. if (ret)
  639. goto err_entity_cleanup;
  640. ret = ub913_v4l2_notifier_register(priv);
  641. if (ret) {
  642. dev_err_probe(dev, ret,
  643. "v4l2 subdev notifier register failed\n");
  644. goto err_subdev_cleanup;
  645. }
  646. ret = v4l2_async_register_subdev(&priv->sd);
  647. if (ret) {
  648. dev_err_probe(dev, ret, "v4l2_async_register_subdev error\n");
  649. goto err_unreg_notif;
  650. }
  651. return 0;
  652. err_unreg_notif:
  653. ub913_v4l2_nf_unregister(priv);
  654. err_subdev_cleanup:
  655. v4l2_subdev_cleanup(&priv->sd);
  656. err_entity_cleanup:
  657. media_entity_cleanup(&priv->sd.entity);
  658. return ret;
  659. }
  660. static void ub913_subdev_uninit(struct ub913_data *priv)
  661. {
  662. v4l2_async_unregister_subdev(&priv->sd);
  663. ub913_v4l2_nf_unregister(priv);
  664. v4l2_subdev_cleanup(&priv->sd);
  665. media_entity_cleanup(&priv->sd.entity);
  666. }
  667. static int ub913_probe(struct i2c_client *client)
  668. {
  669. struct device *dev = &client->dev;
  670. struct ub913_data *priv;
  671. int ret;
  672. priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
  673. if (!priv)
  674. return -ENOMEM;
  675. priv->client = client;
  676. priv->plat_data = dev_get_platdata(&client->dev);
  677. if (!priv->plat_data)
  678. return dev_err_probe(dev, -ENODEV, "Platform data missing\n");
  679. priv->regmap = devm_regmap_init_i2c(client, &ub913_regmap_config);
  680. if (IS_ERR(priv->regmap))
  681. return dev_err_probe(dev, PTR_ERR(priv->regmap),
  682. "Failed to init regmap\n");
  683. /*
  684. * ub913 can also work without ext clock, but that is not supported by
  685. * the driver yet.
  686. */
  687. priv->clkin = devm_clk_get(dev, "clkin");
  688. if (IS_ERR(priv->clkin))
  689. return dev_err_probe(dev, PTR_ERR(priv->clkin),
  690. "Cannot get CLKIN\n");
  691. ret = ub913_parse_dt(priv);
  692. if (ret)
  693. return ret;
  694. ret = ub913_hw_init(priv);
  695. if (ret)
  696. return ret;
  697. ret = ub913_gpiochip_probe(priv);
  698. if (ret)
  699. return dev_err_probe(dev, ret, "Failed to init gpiochip\n");
  700. ret = ub913_register_clkout(priv);
  701. if (ret) {
  702. dev_err_probe(dev, ret, "Failed to register clkout\n");
  703. goto err_gpiochip_remove;
  704. }
  705. ret = ub913_subdev_init(priv);
  706. if (ret)
  707. goto err_gpiochip_remove;
  708. ret = ub913_add_i2c_adapter(priv);
  709. if (ret) {
  710. dev_err_probe(dev, ret, "failed to add remote i2c adapter\n");
  711. goto err_subdev_uninit;
  712. }
  713. return 0;
  714. err_subdev_uninit:
  715. ub913_subdev_uninit(priv);
  716. err_gpiochip_remove:
  717. ub913_gpiochip_remove(priv);
  718. return ret;
  719. }
  720. static void ub913_remove(struct i2c_client *client)
  721. {
  722. struct v4l2_subdev *sd = i2c_get_clientdata(client);
  723. struct ub913_data *priv = sd_to_ub913(sd);
  724. i2c_atr_del_adapter(priv->plat_data->atr, priv->plat_data->port);
  725. ub913_subdev_uninit(priv);
  726. ub913_gpiochip_remove(priv);
  727. }
  728. static const struct i2c_device_id ub913_id[] = {
  729. { "ds90ub913a-q1" },
  730. {}
  731. };
  732. MODULE_DEVICE_TABLE(i2c, ub913_id);
  733. static const struct of_device_id ub913_dt_ids[] = {
  734. { .compatible = "ti,ds90ub913a-q1" },
  735. {}
  736. };
  737. MODULE_DEVICE_TABLE(of, ub913_dt_ids);
  738. static struct i2c_driver ds90ub913_driver = {
  739. .probe = ub913_probe,
  740. .remove = ub913_remove,
  741. .id_table = ub913_id,
  742. .driver = {
  743. .name = "ds90ub913a",
  744. .of_match_table = ub913_dt_ids,
  745. },
  746. };
  747. module_i2c_driver(ds90ub913_driver);
  748. MODULE_LICENSE("GPL");
  749. MODULE_DESCRIPTION("Texas Instruments DS90UB913 FPD-Link III Serializer Driver");
  750. MODULE_AUTHOR("Luca Ceresoli <luca@lucaceresoli.net>");
  751. MODULE_AUTHOR("Tomi Valkeinen <tomi.valkeinen@ideasonboard.com>");
  752. MODULE_IMPORT_NS("I2C_ATR");