stv090x.c 138 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124112511261127112811291130113111321133113411351136113711381139114011411142114311441145114611471148114911501151115211531154115511561157115811591160116111621163116411651166116711681169117011711172117311741175117611771178117911801181118211831184118511861187118811891190119111921193119411951196119711981199120012011202120312041205120612071208120912101211121212131214121512161217121812191220122112221223122412251226122712281229123012311232123312341235123612371238123912401241124212431244124512461247124812491250125112521253125412551256125712581259126012611262126312641265126612671268126912701271127212731274127512761277127812791280128112821283128412851286128712881289129012911292129312941295129612971298129913001301130213031304130513061307130813091310131113121313131413151316131713181319132013211322132313241325132613271328132913301331133213331334133513361337133813391340134113421343134413451346134713481349135013511352135313541355135613571358135913601361136213631364136513661367136813691370137113721373137413751376137713781379138013811382138313841385138613871388138913901391139213931394139513961397139813991400140114021403140414051406140714081409141014111412141314141415141614171418141914201421142214231424142514261427142814291430143114321433143414351436143714381439144014411442144314441445144614471448144914501451145214531454145514561457145814591460146114621463146414651466146714681469147014711472147314741475147614771478147914801481148214831484148514861487148814891490149114921493149414951496149714981499150015011502150315041505150615071508150915101511151215131514151515161517151815191520152115221523152415251526152715281529153015311532153315341535153615371538153915401541154215431544154515461547154815491550155115521553155415551556155715581559156015611562156315641565156615671568156915701571157215731574157515761577157815791580158115821583158415851586158715881589159015911592159315941595159615971598159916001601160216031604160516061607160816091610161116121613161416151616161716181619162016211622162316241625162616271628162916301631163216331634163516361637163816391640164116421643164416451646164716481649165016511652165316541655165616571658165916601661166216631664166516661667166816691670167116721673167416751676167716781679168016811682168316841685168616871688168916901691169216931694169516961697169816991700170117021703170417051706170717081709171017111712171317141715171617171718171917201721172217231724172517261727172817291730173117321733173417351736173717381739174017411742174317441745174617471748174917501751175217531754175517561757175817591760176117621763176417651766176717681769177017711772177317741775177617771778177917801781178217831784178517861787178817891790179117921793179417951796179717981799180018011802180318041805180618071808180918101811181218131814181518161817181818191820182118221823182418251826182718281829183018311832183318341835183618371838183918401841184218431844184518461847184818491850185118521853185418551856185718581859186018611862186318641865186618671868186918701871187218731874187518761877187818791880188118821883188418851886188718881889189018911892189318941895189618971898189919001901190219031904190519061907190819091910191119121913191419151916191719181919192019211922192319241925192619271928192919301931193219331934193519361937193819391940194119421943194419451946194719481949195019511952195319541955195619571958195919601961196219631964196519661967196819691970197119721973197419751976197719781979198019811982198319841985198619871988198919901991199219931994199519961997199819992000200120022003200420052006200720082009201020112012201320142015201620172018201920202021202220232024202520262027202820292030203120322033203420352036203720382039204020412042204320442045204620472048204920502051205220532054205520562057205820592060206120622063206420652066206720682069207020712072207320742075207620772078207920802081208220832084208520862087208820892090209120922093209420952096209720982099210021012102210321042105210621072108210921102111211221132114211521162117211821192120212121222123212421252126212721282129213021312132213321342135213621372138213921402141214221432144214521462147214821492150215121522153215421552156215721582159216021612162216321642165216621672168216921702171217221732174217521762177217821792180218121822183218421852186218721882189219021912192219321942195219621972198219922002201220222032204220522062207220822092210221122122213221422152216221722182219222022212222222322242225222622272228222922302231223222332234223522362237223822392240224122422243224422452246224722482249225022512252225322542255225622572258225922602261226222632264226522662267226822692270227122722273227422752276227722782279228022812282228322842285228622872288228922902291229222932294229522962297229822992300230123022303230423052306230723082309231023112312231323142315231623172318231923202321232223232324232523262327232823292330233123322333233423352336233723382339234023412342234323442345234623472348234923502351235223532354235523562357235823592360236123622363236423652366236723682369237023712372237323742375237623772378237923802381238223832384238523862387238823892390239123922393239423952396239723982399240024012402240324042405240624072408240924102411241224132414241524162417241824192420242124222423242424252426242724282429243024312432243324342435243624372438243924402441244224432444244524462447244824492450245124522453245424552456245724582459246024612462246324642465246624672468246924702471247224732474247524762477247824792480248124822483248424852486248724882489249024912492249324942495249624972498249925002501250225032504250525062507250825092510251125122513251425152516251725182519252025212522252325242525252625272528252925302531253225332534253525362537253825392540254125422543254425452546254725482549255025512552255325542555255625572558255925602561256225632564256525662567256825692570257125722573257425752576257725782579258025812582258325842585258625872588258925902591259225932594259525962597259825992600260126022603260426052606260726082609261026112612261326142615261626172618261926202621262226232624262526262627262826292630263126322633263426352636263726382639264026412642264326442645264626472648264926502651265226532654265526562657265826592660266126622663266426652666266726682669267026712672267326742675267626772678267926802681268226832684268526862687268826892690269126922693269426952696269726982699270027012702270327042705270627072708270927102711271227132714271527162717271827192720272127222723272427252726272727282729273027312732273327342735273627372738273927402741274227432744274527462747274827492750275127522753275427552756275727582759276027612762276327642765276627672768276927702771277227732774277527762777277827792780278127822783278427852786278727882789279027912792279327942795279627972798279928002801280228032804280528062807280828092810281128122813281428152816281728182819282028212822282328242825282628272828282928302831283228332834283528362837283828392840284128422843284428452846284728482849285028512852285328542855285628572858285928602861286228632864286528662867286828692870287128722873287428752876287728782879288028812882288328842885288628872888288928902891289228932894289528962897289828992900290129022903290429052906290729082909291029112912291329142915291629172918291929202921292229232924292529262927292829292930293129322933293429352936293729382939294029412942294329442945294629472948294929502951295229532954295529562957295829592960296129622963296429652966296729682969297029712972297329742975297629772978297929802981298229832984298529862987298829892990299129922993299429952996299729982999300030013002300330043005300630073008300930103011301230133014301530163017301830193020302130223023302430253026302730283029303030313032303330343035303630373038303930403041304230433044304530463047304830493050305130523053305430553056305730583059306030613062306330643065306630673068306930703071307230733074307530763077307830793080308130823083308430853086308730883089309030913092309330943095309630973098309931003101310231033104310531063107310831093110311131123113311431153116311731183119312031213122312331243125312631273128312931303131313231333134313531363137313831393140314131423143314431453146314731483149315031513152315331543155315631573158315931603161316231633164316531663167316831693170317131723173317431753176317731783179318031813182318331843185318631873188318931903191319231933194319531963197319831993200320132023203320432053206320732083209321032113212321332143215321632173218321932203221322232233224322532263227322832293230323132323233323432353236323732383239324032413242324332443245324632473248324932503251325232533254325532563257325832593260326132623263326432653266326732683269327032713272327332743275327632773278327932803281328232833284328532863287328832893290329132923293329432953296329732983299330033013302330333043305330633073308330933103311331233133314331533163317331833193320332133223323332433253326332733283329333033313332333333343335333633373338333933403341334233433344334533463347334833493350335133523353335433553356335733583359336033613362336333643365336633673368336933703371337233733374337533763377337833793380338133823383338433853386338733883389339033913392339333943395339633973398339934003401340234033404340534063407340834093410341134123413341434153416341734183419342034213422342334243425342634273428342934303431343234333434343534363437343834393440344134423443344434453446344734483449345034513452345334543455345634573458345934603461346234633464346534663467346834693470347134723473347434753476347734783479348034813482348334843485348634873488348934903491349234933494349534963497349834993500350135023503350435053506350735083509351035113512351335143515351635173518351935203521352235233524352535263527352835293530353135323533353435353536353735383539354035413542354335443545354635473548354935503551355235533554355535563557355835593560356135623563356435653566356735683569357035713572357335743575357635773578357935803581358235833584358535863587358835893590359135923593359435953596359735983599360036013602360336043605360636073608360936103611361236133614361536163617361836193620362136223623362436253626362736283629363036313632363336343635363636373638363936403641364236433644364536463647364836493650365136523653365436553656365736583659366036613662366336643665366636673668366936703671367236733674367536763677367836793680368136823683368436853686368736883689369036913692369336943695369636973698369937003701370237033704370537063707370837093710371137123713371437153716371737183719372037213722372337243725372637273728372937303731373237333734373537363737373837393740374137423743374437453746374737483749375037513752375337543755375637573758375937603761376237633764376537663767376837693770377137723773377437753776377737783779378037813782378337843785378637873788378937903791379237933794379537963797379837993800380138023803380438053806380738083809381038113812381338143815381638173818381938203821382238233824382538263827382838293830383138323833383438353836383738383839384038413842384338443845384638473848384938503851385238533854385538563857385838593860386138623863386438653866386738683869387038713872387338743875387638773878387938803881388238833884388538863887388838893890389138923893389438953896389738983899390039013902390339043905390639073908390939103911391239133914391539163917391839193920392139223923392439253926392739283929393039313932393339343935393639373938393939403941394239433944394539463947394839493950395139523953395439553956395739583959396039613962396339643965396639673968396939703971397239733974397539763977397839793980398139823983398439853986398739883989399039913992399339943995399639973998399940004001400240034004400540064007400840094010401140124013401440154016401740184019402040214022402340244025402640274028402940304031403240334034403540364037403840394040404140424043404440454046404740484049405040514052405340544055405640574058405940604061406240634064406540664067406840694070407140724073407440754076407740784079408040814082408340844085408640874088408940904091409240934094409540964097409840994100410141024103410441054106410741084109411041114112411341144115411641174118411941204121412241234124412541264127412841294130413141324133413441354136413741384139414041414142414341444145414641474148414941504151415241534154415541564157415841594160416141624163416441654166416741684169417041714172417341744175417641774178417941804181418241834184418541864187418841894190419141924193419441954196419741984199420042014202420342044205420642074208420942104211421242134214421542164217421842194220422142224223422442254226422742284229423042314232423342344235423642374238423942404241424242434244424542464247424842494250425142524253425442554256425742584259426042614262426342644265426642674268426942704271427242734274427542764277427842794280428142824283428442854286428742884289429042914292429342944295429642974298429943004301430243034304430543064307430843094310431143124313431443154316431743184319432043214322432343244325432643274328432943304331433243334334433543364337433843394340434143424343434443454346434743484349435043514352435343544355435643574358435943604361436243634364436543664367436843694370437143724373437443754376437743784379438043814382438343844385438643874388438943904391439243934394439543964397439843994400440144024403440444054406440744084409441044114412441344144415441644174418441944204421442244234424442544264427442844294430443144324433443444354436443744384439444044414442444344444445444644474448444944504451445244534454445544564457445844594460446144624463446444654466446744684469447044714472447344744475447644774478447944804481448244834484448544864487448844894490449144924493449444954496449744984499450045014502450345044505450645074508450945104511451245134514451545164517451845194520452145224523452445254526452745284529453045314532453345344535453645374538453945404541454245434544454545464547454845494550455145524553455445554556455745584559456045614562456345644565456645674568456945704571457245734574457545764577457845794580458145824583458445854586458745884589459045914592459345944595459645974598459946004601460246034604460546064607460846094610461146124613461446154616461746184619462046214622462346244625462646274628462946304631463246334634463546364637463846394640464146424643464446454646464746484649465046514652465346544655465646574658465946604661466246634664466546664667466846694670467146724673467446754676467746784679468046814682468346844685468646874688468946904691469246934694469546964697469846994700470147024703470447054706470747084709471047114712471347144715471647174718471947204721472247234724472547264727472847294730473147324733473447354736473747384739474047414742474347444745474647474748474947504751475247534754475547564757475847594760476147624763476447654766476747684769477047714772477347744775477647774778477947804781478247834784478547864787478847894790479147924793479447954796479747984799480048014802480348044805480648074808480948104811481248134814481548164817481848194820482148224823482448254826482748284829483048314832483348344835483648374838483948404841484248434844484548464847484848494850485148524853485448554856485748584859486048614862486348644865486648674868486948704871487248734874487548764877487848794880488148824883488448854886488748884889489048914892489348944895489648974898489949004901490249034904490549064907490849094910491149124913491449154916491749184919492049214922492349244925492649274928492949304931493249334934493549364937493849394940494149424943494449454946494749484949495049514952495349544955495649574958495949604961496249634964496549664967496849694970497149724973497449754976497749784979498049814982498349844985498649874988498949904991499249934994499549964997499849995000500150025003500450055006500750085009501050115012501350145015501650175018501950205021502250235024502550265027502850295030503150325033503450355036503750385039504050415042504350445045504650475048504950505051505250535054505550565057505850595060506150625063506450655066506750685069507050715072507350745075507650775078507950805081508250835084508550865087508850895090509150925093509450955096509750985099510051015102
  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. STV0900/0903 Multistandard Broadcast Frontend driver
  4. Copyright (C) Manu Abraham <abraham.manu@gmail.com>
  5. Copyright (C) ST Microelectronics
  6. */
  7. #include <linux/init.h>
  8. #include <linux/kernel.h>
  9. #include <linux/module.h>
  10. #include <linux/string.h>
  11. #include <linux/slab.h>
  12. #include <linux/mutex.h>
  13. #include <linux/dvb/frontend.h>
  14. #include <media/dvb_frontend.h>
  15. #include "stv6110x.h" /* for demodulator internal modes */
  16. #include "stv090x_reg.h"
  17. #include "stv090x.h"
  18. #include "stv090x_priv.h"
  19. /* Max transfer size done by I2C transfer functions */
  20. #define MAX_XFER_SIZE 64
  21. static unsigned int verbose;
  22. module_param(verbose, int, 0644);
  23. /* internal params node */
  24. struct stv090x_dev {
  25. /* pointer for internal params, one for each pair of demods */
  26. struct stv090x_internal *internal;
  27. struct stv090x_dev *next_dev;
  28. };
  29. /* first internal params */
  30. static struct stv090x_dev *stv090x_first_dev;
  31. /* find chip by i2c adapter and i2c address */
  32. static struct stv090x_dev *find_dev(struct i2c_adapter *i2c_adap,
  33. u8 i2c_addr)
  34. {
  35. struct stv090x_dev *temp_dev = stv090x_first_dev;
  36. /*
  37. Search of the last stv0900 chip or
  38. find it by i2c adapter and i2c address */
  39. while ((temp_dev != NULL) &&
  40. ((temp_dev->internal->i2c_adap != i2c_adap) ||
  41. (temp_dev->internal->i2c_addr != i2c_addr))) {
  42. temp_dev = temp_dev->next_dev;
  43. }
  44. return temp_dev;
  45. }
  46. /* deallocating chip */
  47. static void remove_dev(struct stv090x_internal *internal)
  48. {
  49. struct stv090x_dev *prev_dev = stv090x_first_dev;
  50. struct stv090x_dev *del_dev = find_dev(internal->i2c_adap,
  51. internal->i2c_addr);
  52. if (del_dev != NULL) {
  53. if (del_dev == stv090x_first_dev) {
  54. stv090x_first_dev = del_dev->next_dev;
  55. } else {
  56. while (prev_dev->next_dev != del_dev)
  57. prev_dev = prev_dev->next_dev;
  58. prev_dev->next_dev = del_dev->next_dev;
  59. }
  60. kfree(del_dev);
  61. }
  62. }
  63. /* allocating new chip */
  64. static struct stv090x_dev *append_internal(struct stv090x_internal *internal)
  65. {
  66. struct stv090x_dev *new_dev;
  67. struct stv090x_dev *temp_dev;
  68. new_dev = kmalloc_obj(struct stv090x_dev);
  69. if (new_dev != NULL) {
  70. new_dev->internal = internal;
  71. new_dev->next_dev = NULL;
  72. /* append to list */
  73. if (stv090x_first_dev == NULL) {
  74. stv090x_first_dev = new_dev;
  75. } else {
  76. temp_dev = stv090x_first_dev;
  77. while (temp_dev->next_dev != NULL)
  78. temp_dev = temp_dev->next_dev;
  79. temp_dev->next_dev = new_dev;
  80. }
  81. }
  82. return new_dev;
  83. }
  84. /* DVBS1 and DSS C/N Lookup table */
  85. static const struct stv090x_tab stv090x_s1cn_tab[] = {
  86. { 0, 8917 }, /* 0.0dB */
  87. { 5, 8801 }, /* 0.5dB */
  88. { 10, 8667 }, /* 1.0dB */
  89. { 15, 8522 }, /* 1.5dB */
  90. { 20, 8355 }, /* 2.0dB */
  91. { 25, 8175 }, /* 2.5dB */
  92. { 30, 7979 }, /* 3.0dB */
  93. { 35, 7763 }, /* 3.5dB */
  94. { 40, 7530 }, /* 4.0dB */
  95. { 45, 7282 }, /* 4.5dB */
  96. { 50, 7026 }, /* 5.0dB */
  97. { 55, 6781 }, /* 5.5dB */
  98. { 60, 6514 }, /* 6.0dB */
  99. { 65, 6241 }, /* 6.5dB */
  100. { 70, 5965 }, /* 7.0dB */
  101. { 75, 5690 }, /* 7.5dB */
  102. { 80, 5424 }, /* 8.0dB */
  103. { 85, 5161 }, /* 8.5dB */
  104. { 90, 4902 }, /* 9.0dB */
  105. { 95, 4654 }, /* 9.5dB */
  106. { 100, 4417 }, /* 10.0dB */
  107. { 105, 4186 }, /* 10.5dB */
  108. { 110, 3968 }, /* 11.0dB */
  109. { 115, 3757 }, /* 11.5dB */
  110. { 120, 3558 }, /* 12.0dB */
  111. { 125, 3366 }, /* 12.5dB */
  112. { 130, 3185 }, /* 13.0dB */
  113. { 135, 3012 }, /* 13.5dB */
  114. { 140, 2850 }, /* 14.0dB */
  115. { 145, 2698 }, /* 14.5dB */
  116. { 150, 2550 }, /* 15.0dB */
  117. { 160, 2283 }, /* 16.0dB */
  118. { 170, 2042 }, /* 17.0dB */
  119. { 180, 1827 }, /* 18.0dB */
  120. { 190, 1636 }, /* 19.0dB */
  121. { 200, 1466 }, /* 20.0dB */
  122. { 210, 1315 }, /* 21.0dB */
  123. { 220, 1181 }, /* 22.0dB */
  124. { 230, 1064 }, /* 23.0dB */
  125. { 240, 960 }, /* 24.0dB */
  126. { 250, 869 }, /* 25.0dB */
  127. { 260, 792 }, /* 26.0dB */
  128. { 270, 724 }, /* 27.0dB */
  129. { 280, 665 }, /* 28.0dB */
  130. { 290, 616 }, /* 29.0dB */
  131. { 300, 573 }, /* 30.0dB */
  132. { 310, 537 }, /* 31.0dB */
  133. { 320, 507 }, /* 32.0dB */
  134. { 330, 483 }, /* 33.0dB */
  135. { 400, 398 }, /* 40.0dB */
  136. { 450, 381 }, /* 45.0dB */
  137. { 500, 377 } /* 50.0dB */
  138. };
  139. /* DVBS2 C/N Lookup table */
  140. static const struct stv090x_tab stv090x_s2cn_tab[] = {
  141. { -30, 13348 }, /* -3.0dB */
  142. { -20, 12640 }, /* -2d.0B */
  143. { -10, 11883 }, /* -1.0dB */
  144. { 0, 11101 }, /* -0.0dB */
  145. { 5, 10718 }, /* 0.5dB */
  146. { 10, 10339 }, /* 1.0dB */
  147. { 15, 9947 }, /* 1.5dB */
  148. { 20, 9552 }, /* 2.0dB */
  149. { 25, 9183 }, /* 2.5dB */
  150. { 30, 8799 }, /* 3.0dB */
  151. { 35, 8422 }, /* 3.5dB */
  152. { 40, 8062 }, /* 4.0dB */
  153. { 45, 7707 }, /* 4.5dB */
  154. { 50, 7353 }, /* 5.0dB */
  155. { 55, 7025 }, /* 5.5dB */
  156. { 60, 6684 }, /* 6.0dB */
  157. { 65, 6331 }, /* 6.5dB */
  158. { 70, 6036 }, /* 7.0dB */
  159. { 75, 5727 }, /* 7.5dB */
  160. { 80, 5437 }, /* 8.0dB */
  161. { 85, 5164 }, /* 8.5dB */
  162. { 90, 4902 }, /* 9.0dB */
  163. { 95, 4653 }, /* 9.5dB */
  164. { 100, 4408 }, /* 10.0dB */
  165. { 105, 4187 }, /* 10.5dB */
  166. { 110, 3961 }, /* 11.0dB */
  167. { 115, 3751 }, /* 11.5dB */
  168. { 120, 3558 }, /* 12.0dB */
  169. { 125, 3368 }, /* 12.5dB */
  170. { 130, 3191 }, /* 13.0dB */
  171. { 135, 3017 }, /* 13.5dB */
  172. { 140, 2862 }, /* 14.0dB */
  173. { 145, 2710 }, /* 14.5dB */
  174. { 150, 2565 }, /* 15.0dB */
  175. { 160, 2300 }, /* 16.0dB */
  176. { 170, 2058 }, /* 17.0dB */
  177. { 180, 1849 }, /* 18.0dB */
  178. { 190, 1663 }, /* 19.0dB */
  179. { 200, 1495 }, /* 20.0dB */
  180. { 210, 1349 }, /* 21.0dB */
  181. { 220, 1222 }, /* 22.0dB */
  182. { 230, 1110 }, /* 23.0dB */
  183. { 240, 1011 }, /* 24.0dB */
  184. { 250, 925 }, /* 25.0dB */
  185. { 260, 853 }, /* 26.0dB */
  186. { 270, 789 }, /* 27.0dB */
  187. { 280, 734 }, /* 28.0dB */
  188. { 290, 690 }, /* 29.0dB */
  189. { 300, 650 }, /* 30.0dB */
  190. { 310, 619 }, /* 31.0dB */
  191. { 320, 593 }, /* 32.0dB */
  192. { 330, 571 }, /* 33.0dB */
  193. { 400, 498 }, /* 40.0dB */
  194. { 450, 484 }, /* 45.0dB */
  195. { 500, 481 } /* 50.0dB */
  196. };
  197. /* RF level C/N lookup table */
  198. static const struct stv090x_tab stv090x_rf_tab[] = {
  199. { -5, 0xcaa1 }, /* -5dBm */
  200. { -10, 0xc229 }, /* -10dBm */
  201. { -15, 0xbb08 }, /* -15dBm */
  202. { -20, 0xb4bc }, /* -20dBm */
  203. { -25, 0xad5a }, /* -25dBm */
  204. { -30, 0xa298 }, /* -30dBm */
  205. { -35, 0x98a8 }, /* -35dBm */
  206. { -40, 0x8389 }, /* -40dBm */
  207. { -45, 0x59be }, /* -45dBm */
  208. { -50, 0x3a14 }, /* -50dBm */
  209. { -55, 0x2d11 }, /* -55dBm */
  210. { -60, 0x210d }, /* -60dBm */
  211. { -65, 0xa14f }, /* -65dBm */
  212. { -70, 0x07aa } /* -70dBm */
  213. };
  214. static struct stv090x_reg stv0900_initval[] = {
  215. { STV090x_OUTCFG, 0x00 },
  216. { STV090x_MODECFG, 0xff },
  217. { STV090x_AGCRF1CFG, 0x11 },
  218. { STV090x_AGCRF2CFG, 0x13 },
  219. { STV090x_TSGENERAL1X, 0x14 },
  220. { STV090x_TSTTNR2, 0x21 },
  221. { STV090x_TSTTNR4, 0x21 },
  222. { STV090x_P2_DISTXCTL, 0x22 },
  223. { STV090x_P2_F22TX, 0xc0 },
  224. { STV090x_P2_F22RX, 0xc0 },
  225. { STV090x_P2_DISRXCTL, 0x00 },
  226. { STV090x_P2_DMDCFGMD, 0xF9 },
  227. { STV090x_P2_DEMOD, 0x08 },
  228. { STV090x_P2_DMDCFG3, 0xc4 },
  229. { STV090x_P2_CARFREQ, 0xed },
  230. { STV090x_P2_LDT, 0xd0 },
  231. { STV090x_P2_LDT2, 0xb8 },
  232. { STV090x_P2_TMGCFG, 0xd2 },
  233. { STV090x_P2_TMGTHRISE, 0x20 },
  234. { STV090x_P1_TMGCFG, 0xd2 },
  235. { STV090x_P2_TMGTHFALL, 0x00 },
  236. { STV090x_P2_FECSPY, 0x88 },
  237. { STV090x_P2_FSPYDATA, 0x3a },
  238. { STV090x_P2_FBERCPT4, 0x00 },
  239. { STV090x_P2_FSPYBER, 0x10 },
  240. { STV090x_P2_ERRCTRL1, 0x35 },
  241. { STV090x_P2_ERRCTRL2, 0xc1 },
  242. { STV090x_P2_CFRICFG, 0xf8 },
  243. { STV090x_P2_NOSCFG, 0x1c },
  244. { STV090x_P2_DMDTOM, 0x20 },
  245. { STV090x_P2_CORRELMANT, 0x70 },
  246. { STV090x_P2_CORRELABS, 0x88 },
  247. { STV090x_P2_AGC2O, 0x5b },
  248. { STV090x_P2_AGC2REF, 0x38 },
  249. { STV090x_P2_CARCFG, 0xe4 },
  250. { STV090x_P2_ACLC, 0x1A },
  251. { STV090x_P2_BCLC, 0x09 },
  252. { STV090x_P2_CARHDR, 0x08 },
  253. { STV090x_P2_KREFTMG, 0xc1 },
  254. { STV090x_P2_SFRUPRATIO, 0xf0 },
  255. { STV090x_P2_SFRLOWRATIO, 0x70 },
  256. { STV090x_P2_SFRSTEP, 0x58 },
  257. { STV090x_P2_TMGCFG2, 0x01 },
  258. { STV090x_P2_CAR2CFG, 0x26 },
  259. { STV090x_P2_BCLC2S2Q, 0x86 },
  260. { STV090x_P2_BCLC2S28, 0x86 },
  261. { STV090x_P2_SMAPCOEF7, 0x77 },
  262. { STV090x_P2_SMAPCOEF6, 0x85 },
  263. { STV090x_P2_SMAPCOEF5, 0x77 },
  264. { STV090x_P2_TSCFGL, 0x20 },
  265. { STV090x_P2_DMDCFG2, 0x3b },
  266. { STV090x_P2_MODCODLST0, 0xff },
  267. { STV090x_P2_MODCODLST1, 0xff },
  268. { STV090x_P2_MODCODLST2, 0xff },
  269. { STV090x_P2_MODCODLST3, 0xff },
  270. { STV090x_P2_MODCODLST4, 0xff },
  271. { STV090x_P2_MODCODLST5, 0xff },
  272. { STV090x_P2_MODCODLST6, 0xff },
  273. { STV090x_P2_MODCODLST7, 0xcc },
  274. { STV090x_P2_MODCODLST8, 0xcc },
  275. { STV090x_P2_MODCODLST9, 0xcc },
  276. { STV090x_P2_MODCODLSTA, 0xcc },
  277. { STV090x_P2_MODCODLSTB, 0xcc },
  278. { STV090x_P2_MODCODLSTC, 0xcc },
  279. { STV090x_P2_MODCODLSTD, 0xcc },
  280. { STV090x_P2_MODCODLSTE, 0xcc },
  281. { STV090x_P2_MODCODLSTF, 0xcf },
  282. { STV090x_P1_DISTXCTL, 0x22 },
  283. { STV090x_P1_F22TX, 0xc0 },
  284. { STV090x_P1_F22RX, 0xc0 },
  285. { STV090x_P1_DISRXCTL, 0x00 },
  286. { STV090x_P1_DMDCFGMD, 0xf9 },
  287. { STV090x_P1_DEMOD, 0x08 },
  288. { STV090x_P1_DMDCFG3, 0xc4 },
  289. { STV090x_P1_DMDTOM, 0x20 },
  290. { STV090x_P1_CARFREQ, 0xed },
  291. { STV090x_P1_LDT, 0xd0 },
  292. { STV090x_P1_LDT2, 0xb8 },
  293. { STV090x_P1_TMGCFG, 0xd2 },
  294. { STV090x_P1_TMGTHRISE, 0x20 },
  295. { STV090x_P1_TMGTHFALL, 0x00 },
  296. { STV090x_P1_SFRUPRATIO, 0xf0 },
  297. { STV090x_P1_SFRLOWRATIO, 0x70 },
  298. { STV090x_P1_TSCFGL, 0x20 },
  299. { STV090x_P1_FECSPY, 0x88 },
  300. { STV090x_P1_FSPYDATA, 0x3a },
  301. { STV090x_P1_FBERCPT4, 0x00 },
  302. { STV090x_P1_FSPYBER, 0x10 },
  303. { STV090x_P1_ERRCTRL1, 0x35 },
  304. { STV090x_P1_ERRCTRL2, 0xc1 },
  305. { STV090x_P1_CFRICFG, 0xf8 },
  306. { STV090x_P1_NOSCFG, 0x1c },
  307. { STV090x_P1_CORRELMANT, 0x70 },
  308. { STV090x_P1_CORRELABS, 0x88 },
  309. { STV090x_P1_AGC2O, 0x5b },
  310. { STV090x_P1_AGC2REF, 0x38 },
  311. { STV090x_P1_CARCFG, 0xe4 },
  312. { STV090x_P1_ACLC, 0x1A },
  313. { STV090x_P1_BCLC, 0x09 },
  314. { STV090x_P1_CARHDR, 0x08 },
  315. { STV090x_P1_KREFTMG, 0xc1 },
  316. { STV090x_P1_SFRSTEP, 0x58 },
  317. { STV090x_P1_TMGCFG2, 0x01 },
  318. { STV090x_P1_CAR2CFG, 0x26 },
  319. { STV090x_P1_BCLC2S2Q, 0x86 },
  320. { STV090x_P1_BCLC2S28, 0x86 },
  321. { STV090x_P1_SMAPCOEF7, 0x77 },
  322. { STV090x_P1_SMAPCOEF6, 0x85 },
  323. { STV090x_P1_SMAPCOEF5, 0x77 },
  324. { STV090x_P1_DMDCFG2, 0x3b },
  325. { STV090x_P1_MODCODLST0, 0xff },
  326. { STV090x_P1_MODCODLST1, 0xff },
  327. { STV090x_P1_MODCODLST2, 0xff },
  328. { STV090x_P1_MODCODLST3, 0xff },
  329. { STV090x_P1_MODCODLST4, 0xff },
  330. { STV090x_P1_MODCODLST5, 0xff },
  331. { STV090x_P1_MODCODLST6, 0xff },
  332. { STV090x_P1_MODCODLST7, 0xcc },
  333. { STV090x_P1_MODCODLST8, 0xcc },
  334. { STV090x_P1_MODCODLST9, 0xcc },
  335. { STV090x_P1_MODCODLSTA, 0xcc },
  336. { STV090x_P1_MODCODLSTB, 0xcc },
  337. { STV090x_P1_MODCODLSTC, 0xcc },
  338. { STV090x_P1_MODCODLSTD, 0xcc },
  339. { STV090x_P1_MODCODLSTE, 0xcc },
  340. { STV090x_P1_MODCODLSTF, 0xcf },
  341. { STV090x_GENCFG, 0x1d },
  342. { STV090x_NBITER_NF4, 0x37 },
  343. { STV090x_NBITER_NF5, 0x29 },
  344. { STV090x_NBITER_NF6, 0x37 },
  345. { STV090x_NBITER_NF7, 0x33 },
  346. { STV090x_NBITER_NF8, 0x31 },
  347. { STV090x_NBITER_NF9, 0x2f },
  348. { STV090x_NBITER_NF10, 0x39 },
  349. { STV090x_NBITER_NF11, 0x3a },
  350. { STV090x_NBITER_NF12, 0x29 },
  351. { STV090x_NBITER_NF13, 0x37 },
  352. { STV090x_NBITER_NF14, 0x33 },
  353. { STV090x_NBITER_NF15, 0x2f },
  354. { STV090x_NBITER_NF16, 0x39 },
  355. { STV090x_NBITER_NF17, 0x3a },
  356. { STV090x_NBITERNOERR, 0x04 },
  357. { STV090x_GAINLLR_NF4, 0x0C },
  358. { STV090x_GAINLLR_NF5, 0x0F },
  359. { STV090x_GAINLLR_NF6, 0x11 },
  360. { STV090x_GAINLLR_NF7, 0x14 },
  361. { STV090x_GAINLLR_NF8, 0x17 },
  362. { STV090x_GAINLLR_NF9, 0x19 },
  363. { STV090x_GAINLLR_NF10, 0x20 },
  364. { STV090x_GAINLLR_NF11, 0x21 },
  365. { STV090x_GAINLLR_NF12, 0x0D },
  366. { STV090x_GAINLLR_NF13, 0x0F },
  367. { STV090x_GAINLLR_NF14, 0x13 },
  368. { STV090x_GAINLLR_NF15, 0x1A },
  369. { STV090x_GAINLLR_NF16, 0x1F },
  370. { STV090x_GAINLLR_NF17, 0x21 },
  371. { STV090x_RCCFGH, 0x20 },
  372. { STV090x_P1_FECM, 0x01 }, /* disable DSS modes */
  373. { STV090x_P2_FECM, 0x01 }, /* disable DSS modes */
  374. { STV090x_P1_PRVIT, 0x2F }, /* disable PR 6/7 */
  375. { STV090x_P2_PRVIT, 0x2F }, /* disable PR 6/7 */
  376. };
  377. static struct stv090x_reg stv0903_initval[] = {
  378. { STV090x_OUTCFG, 0x00 },
  379. { STV090x_AGCRF1CFG, 0x11 },
  380. { STV090x_STOPCLK1, 0x48 },
  381. { STV090x_STOPCLK2, 0x14 },
  382. { STV090x_TSTTNR1, 0x27 },
  383. { STV090x_TSTTNR2, 0x21 },
  384. { STV090x_P1_DISTXCTL, 0x22 },
  385. { STV090x_P1_F22TX, 0xc0 },
  386. { STV090x_P1_F22RX, 0xc0 },
  387. { STV090x_P1_DISRXCTL, 0x00 },
  388. { STV090x_P1_DMDCFGMD, 0xF9 },
  389. { STV090x_P1_DEMOD, 0x08 },
  390. { STV090x_P1_DMDCFG3, 0xc4 },
  391. { STV090x_P1_CARFREQ, 0xed },
  392. { STV090x_P1_TNRCFG2, 0x82 },
  393. { STV090x_P1_LDT, 0xd0 },
  394. { STV090x_P1_LDT2, 0xb8 },
  395. { STV090x_P1_TMGCFG, 0xd2 },
  396. { STV090x_P1_TMGTHRISE, 0x20 },
  397. { STV090x_P1_TMGTHFALL, 0x00 },
  398. { STV090x_P1_SFRUPRATIO, 0xf0 },
  399. { STV090x_P1_SFRLOWRATIO, 0x70 },
  400. { STV090x_P1_TSCFGL, 0x20 },
  401. { STV090x_P1_FECSPY, 0x88 },
  402. { STV090x_P1_FSPYDATA, 0x3a },
  403. { STV090x_P1_FBERCPT4, 0x00 },
  404. { STV090x_P1_FSPYBER, 0x10 },
  405. { STV090x_P1_ERRCTRL1, 0x35 },
  406. { STV090x_P1_ERRCTRL2, 0xc1 },
  407. { STV090x_P1_CFRICFG, 0xf8 },
  408. { STV090x_P1_NOSCFG, 0x1c },
  409. { STV090x_P1_DMDTOM, 0x20 },
  410. { STV090x_P1_CORRELMANT, 0x70 },
  411. { STV090x_P1_CORRELABS, 0x88 },
  412. { STV090x_P1_AGC2O, 0x5b },
  413. { STV090x_P1_AGC2REF, 0x38 },
  414. { STV090x_P1_CARCFG, 0xe4 },
  415. { STV090x_P1_ACLC, 0x1A },
  416. { STV090x_P1_BCLC, 0x09 },
  417. { STV090x_P1_CARHDR, 0x08 },
  418. { STV090x_P1_KREFTMG, 0xc1 },
  419. { STV090x_P1_SFRSTEP, 0x58 },
  420. { STV090x_P1_TMGCFG2, 0x01 },
  421. { STV090x_P1_CAR2CFG, 0x26 },
  422. { STV090x_P1_BCLC2S2Q, 0x86 },
  423. { STV090x_P1_BCLC2S28, 0x86 },
  424. { STV090x_P1_SMAPCOEF7, 0x77 },
  425. { STV090x_P1_SMAPCOEF6, 0x85 },
  426. { STV090x_P1_SMAPCOEF5, 0x77 },
  427. { STV090x_P1_DMDCFG2, 0x3b },
  428. { STV090x_P1_MODCODLST0, 0xff },
  429. { STV090x_P1_MODCODLST1, 0xff },
  430. { STV090x_P1_MODCODLST2, 0xff },
  431. { STV090x_P1_MODCODLST3, 0xff },
  432. { STV090x_P1_MODCODLST4, 0xff },
  433. { STV090x_P1_MODCODLST5, 0xff },
  434. { STV090x_P1_MODCODLST6, 0xff },
  435. { STV090x_P1_MODCODLST7, 0xcc },
  436. { STV090x_P1_MODCODLST8, 0xcc },
  437. { STV090x_P1_MODCODLST9, 0xcc },
  438. { STV090x_P1_MODCODLSTA, 0xcc },
  439. { STV090x_P1_MODCODLSTB, 0xcc },
  440. { STV090x_P1_MODCODLSTC, 0xcc },
  441. { STV090x_P1_MODCODLSTD, 0xcc },
  442. { STV090x_P1_MODCODLSTE, 0xcc },
  443. { STV090x_P1_MODCODLSTF, 0xcf },
  444. { STV090x_GENCFG, 0x1c },
  445. { STV090x_NBITER_NF4, 0x37 },
  446. { STV090x_NBITER_NF5, 0x29 },
  447. { STV090x_NBITER_NF6, 0x37 },
  448. { STV090x_NBITER_NF7, 0x33 },
  449. { STV090x_NBITER_NF8, 0x31 },
  450. { STV090x_NBITER_NF9, 0x2f },
  451. { STV090x_NBITER_NF10, 0x39 },
  452. { STV090x_NBITER_NF11, 0x3a },
  453. { STV090x_NBITER_NF12, 0x29 },
  454. { STV090x_NBITER_NF13, 0x37 },
  455. { STV090x_NBITER_NF14, 0x33 },
  456. { STV090x_NBITER_NF15, 0x2f },
  457. { STV090x_NBITER_NF16, 0x39 },
  458. { STV090x_NBITER_NF17, 0x3a },
  459. { STV090x_NBITERNOERR, 0x04 },
  460. { STV090x_GAINLLR_NF4, 0x0C },
  461. { STV090x_GAINLLR_NF5, 0x0F },
  462. { STV090x_GAINLLR_NF6, 0x11 },
  463. { STV090x_GAINLLR_NF7, 0x14 },
  464. { STV090x_GAINLLR_NF8, 0x17 },
  465. { STV090x_GAINLLR_NF9, 0x19 },
  466. { STV090x_GAINLLR_NF10, 0x20 },
  467. { STV090x_GAINLLR_NF11, 0x21 },
  468. { STV090x_GAINLLR_NF12, 0x0D },
  469. { STV090x_GAINLLR_NF13, 0x0F },
  470. { STV090x_GAINLLR_NF14, 0x13 },
  471. { STV090x_GAINLLR_NF15, 0x1A },
  472. { STV090x_GAINLLR_NF16, 0x1F },
  473. { STV090x_GAINLLR_NF17, 0x21 },
  474. { STV090x_RCCFGH, 0x20 },
  475. { STV090x_P1_FECM, 0x01 }, /*disable the DSS mode */
  476. { STV090x_P1_PRVIT, 0x2f } /*disable puncture rate 6/7*/
  477. };
  478. static struct stv090x_reg stv0900_cut20_val[] = {
  479. { STV090x_P2_DMDCFG3, 0xe8 },
  480. { STV090x_P2_DMDCFG4, 0x10 },
  481. { STV090x_P2_CARFREQ, 0x38 },
  482. { STV090x_P2_CARHDR, 0x20 },
  483. { STV090x_P2_KREFTMG, 0x5a },
  484. { STV090x_P2_SMAPCOEF7, 0x06 },
  485. { STV090x_P2_SMAPCOEF6, 0x00 },
  486. { STV090x_P2_SMAPCOEF5, 0x04 },
  487. { STV090x_P2_NOSCFG, 0x0c },
  488. { STV090x_P1_DMDCFG3, 0xe8 },
  489. { STV090x_P1_DMDCFG4, 0x10 },
  490. { STV090x_P1_CARFREQ, 0x38 },
  491. { STV090x_P1_CARHDR, 0x20 },
  492. { STV090x_P1_KREFTMG, 0x5a },
  493. { STV090x_P1_SMAPCOEF7, 0x06 },
  494. { STV090x_P1_SMAPCOEF6, 0x00 },
  495. { STV090x_P1_SMAPCOEF5, 0x04 },
  496. { STV090x_P1_NOSCFG, 0x0c },
  497. { STV090x_GAINLLR_NF4, 0x21 },
  498. { STV090x_GAINLLR_NF5, 0x21 },
  499. { STV090x_GAINLLR_NF6, 0x20 },
  500. { STV090x_GAINLLR_NF7, 0x1F },
  501. { STV090x_GAINLLR_NF8, 0x1E },
  502. { STV090x_GAINLLR_NF9, 0x1E },
  503. { STV090x_GAINLLR_NF10, 0x1D },
  504. { STV090x_GAINLLR_NF11, 0x1B },
  505. { STV090x_GAINLLR_NF12, 0x20 },
  506. { STV090x_GAINLLR_NF13, 0x20 },
  507. { STV090x_GAINLLR_NF14, 0x20 },
  508. { STV090x_GAINLLR_NF15, 0x20 },
  509. { STV090x_GAINLLR_NF16, 0x20 },
  510. { STV090x_GAINLLR_NF17, 0x21 },
  511. };
  512. static struct stv090x_reg stv0903_cut20_val[] = {
  513. { STV090x_P1_DMDCFG3, 0xe8 },
  514. { STV090x_P1_DMDCFG4, 0x10 },
  515. { STV090x_P1_CARFREQ, 0x38 },
  516. { STV090x_P1_CARHDR, 0x20 },
  517. { STV090x_P1_KREFTMG, 0x5a },
  518. { STV090x_P1_SMAPCOEF7, 0x06 },
  519. { STV090x_P1_SMAPCOEF6, 0x00 },
  520. { STV090x_P1_SMAPCOEF5, 0x04 },
  521. { STV090x_P1_NOSCFG, 0x0c },
  522. { STV090x_GAINLLR_NF4, 0x21 },
  523. { STV090x_GAINLLR_NF5, 0x21 },
  524. { STV090x_GAINLLR_NF6, 0x20 },
  525. { STV090x_GAINLLR_NF7, 0x1F },
  526. { STV090x_GAINLLR_NF8, 0x1E },
  527. { STV090x_GAINLLR_NF9, 0x1E },
  528. { STV090x_GAINLLR_NF10, 0x1D },
  529. { STV090x_GAINLLR_NF11, 0x1B },
  530. { STV090x_GAINLLR_NF12, 0x20 },
  531. { STV090x_GAINLLR_NF13, 0x20 },
  532. { STV090x_GAINLLR_NF14, 0x20 },
  533. { STV090x_GAINLLR_NF15, 0x20 },
  534. { STV090x_GAINLLR_NF16, 0x20 },
  535. { STV090x_GAINLLR_NF17, 0x21 }
  536. };
  537. /* Cut 2.0 Long Frame Tracking CR loop */
  538. static struct stv090x_long_frame_crloop stv090x_s2_crl_cut20[] = {
  539. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  540. { STV090x_QPSK_12, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x1e },
  541. { STV090x_QPSK_35, 0x2f, 0x3f, 0x2e, 0x2f, 0x3d, 0x0f, 0x0e, 0x2e, 0x3d, 0x0e },
  542. { STV090x_QPSK_23, 0x2f, 0x3f, 0x2e, 0x2f, 0x0e, 0x0f, 0x0e, 0x1e, 0x3d, 0x3d },
  543. { STV090x_QPSK_34, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  544. { STV090x_QPSK_45, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  545. { STV090x_QPSK_56, 0x3f, 0x3f, 0x3e, 0x1f, 0x0e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  546. { STV090x_QPSK_89, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  547. { STV090x_QPSK_910, 0x3f, 0x3f, 0x3e, 0x1f, 0x1e, 0x3e, 0x0e, 0x1e, 0x3d, 0x3d },
  548. { STV090x_8PSK_35, 0x3c, 0x3e, 0x1c, 0x2e, 0x0c, 0x1e, 0x2b, 0x2d, 0x1b, 0x1d },
  549. { STV090x_8PSK_23, 0x1d, 0x3e, 0x3c, 0x2e, 0x2c, 0x1e, 0x0c, 0x2d, 0x2b, 0x1d },
  550. { STV090x_8PSK_34, 0x0e, 0x3e, 0x3d, 0x2e, 0x0d, 0x1e, 0x2c, 0x2d, 0x0c, 0x1d },
  551. { STV090x_8PSK_56, 0x2e, 0x3e, 0x1e, 0x2e, 0x2d, 0x1e, 0x3c, 0x2d, 0x2c, 0x1d },
  552. { STV090x_8PSK_89, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x0d, 0x2d, 0x3c, 0x1d },
  553. { STV090x_8PSK_910, 0x3e, 0x3e, 0x1e, 0x2e, 0x3d, 0x1e, 0x1d, 0x2d, 0x0d, 0x1d }
  554. };
  555. /* Cut 3.0 Long Frame Tracking CR loop */
  556. static struct stv090x_long_frame_crloop stv090x_s2_crl_cut30[] = {
  557. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  558. { STV090x_QPSK_12, 0x3c, 0x2c, 0x0c, 0x2c, 0x1b, 0x2c, 0x1b, 0x1c, 0x0b, 0x3b },
  559. { STV090x_QPSK_35, 0x0d, 0x0d, 0x0c, 0x0d, 0x1b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
  560. { STV090x_QPSK_23, 0x1d, 0x0d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
  561. { STV090x_QPSK_34, 0x1d, 0x1d, 0x0c, 0x1d, 0x2b, 0x3c, 0x1b, 0x1c, 0x0b, 0x3b },
  562. { STV090x_QPSK_45, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  563. { STV090x_QPSK_56, 0x2d, 0x1d, 0x1c, 0x1d, 0x2b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  564. { STV090x_QPSK_89, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  565. { STV090x_QPSK_910, 0x3d, 0x2d, 0x1c, 0x1d, 0x3b, 0x3c, 0x2b, 0x0c, 0x1b, 0x3b },
  566. { STV090x_8PSK_35, 0x39, 0x29, 0x39, 0x19, 0x19, 0x19, 0x19, 0x19, 0x09, 0x19 },
  567. { STV090x_8PSK_23, 0x2a, 0x39, 0x1a, 0x0a, 0x39, 0x0a, 0x29, 0x39, 0x29, 0x0a },
  568. { STV090x_8PSK_34, 0x2b, 0x3a, 0x1b, 0x1b, 0x3a, 0x1b, 0x1a, 0x0b, 0x1a, 0x3a },
  569. { STV090x_8PSK_56, 0x0c, 0x1b, 0x3b, 0x3b, 0x1b, 0x3b, 0x3a, 0x3b, 0x3a, 0x1b },
  570. { STV090x_8PSK_89, 0x0d, 0x3c, 0x2c, 0x2c, 0x2b, 0x0c, 0x0b, 0x3b, 0x0b, 0x1b },
  571. { STV090x_8PSK_910, 0x0d, 0x0d, 0x2c, 0x3c, 0x3b, 0x1c, 0x0b, 0x3b, 0x0b, 0x1b }
  572. };
  573. /* Cut 2.0 Long Frame Tracking CR Loop */
  574. static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut20[] = {
  575. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  576. { STV090x_16APSK_23, 0x0c, 0x0c, 0x0c, 0x0c, 0x1d, 0x0c, 0x3c, 0x0c, 0x2c, 0x0c },
  577. { STV090x_16APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0e, 0x0c, 0x2d, 0x0c, 0x1d, 0x0c },
  578. { STV090x_16APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
  579. { STV090x_16APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x1e, 0x0c, 0x3d, 0x0c, 0x2d, 0x0c },
  580. { STV090x_16APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
  581. { STV090x_16APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x2e, 0x0c, 0x0e, 0x0c, 0x3d, 0x0c },
  582. { STV090x_32APSK_34, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  583. { STV090x_32APSK_45, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  584. { STV090x_32APSK_56, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  585. { STV090x_32APSK_89, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c },
  586. { STV090x_32APSK_910, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c, 0x0c }
  587. };
  588. /* Cut 3.0 Long Frame Tracking CR Loop */
  589. static struct stv090x_long_frame_crloop stv090x_s2_apsk_crl_cut30[] = {
  590. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  591. { STV090x_16APSK_23, 0x0a, 0x0a, 0x0a, 0x0a, 0x1a, 0x0a, 0x3a, 0x0a, 0x2a, 0x0a },
  592. { STV090x_16APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0b, 0x0a, 0x3b, 0x0a, 0x1b, 0x0a },
  593. { STV090x_16APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
  594. { STV090x_16APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x1b, 0x0a, 0x3b, 0x0a, 0x2b, 0x0a },
  595. { STV090x_16APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
  596. { STV090x_16APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x2b, 0x0a, 0x0c, 0x0a, 0x3b, 0x0a },
  597. { STV090x_32APSK_34, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  598. { STV090x_32APSK_45, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  599. { STV090x_32APSK_56, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  600. { STV090x_32APSK_89, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a },
  601. { STV090x_32APSK_910, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a, 0x0a }
  602. };
  603. static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut20[] = {
  604. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  605. { STV090x_QPSK_14, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x2d, 0x1f, 0x3d, 0x3e },
  606. { STV090x_QPSK_13, 0x0f, 0x3f, 0x0e, 0x3f, 0x2d, 0x2f, 0x3d, 0x0f, 0x3d, 0x2e },
  607. { STV090x_QPSK_25, 0x1f, 0x3f, 0x1e, 0x3f, 0x3d, 0x1f, 0x3d, 0x3e, 0x3d, 0x2e }
  608. };
  609. static struct stv090x_long_frame_crloop stv090x_s2_lowqpsk_crl_cut30[] = {
  610. /* MODCOD 2MPon 2MPoff 5MPon 5MPoff 10MPon 10MPoff 20MPon 20MPoff 30MPon 30MPoff */
  611. { STV090x_QPSK_14, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x2a, 0x1c, 0x3a, 0x3b },
  612. { STV090x_QPSK_13, 0x0c, 0x3c, 0x0b, 0x3c, 0x2a, 0x2c, 0x3a, 0x0c, 0x3a, 0x2b },
  613. { STV090x_QPSK_25, 0x1c, 0x3c, 0x1b, 0x3c, 0x3a, 0x1c, 0x3a, 0x3b, 0x3a, 0x2b }
  614. };
  615. /* Cut 2.0 Short Frame Tracking CR Loop */
  616. static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut20[] = {
  617. /* MODCOD 2M 5M 10M 20M 30M */
  618. { STV090x_QPSK, 0x2f, 0x2e, 0x0e, 0x0e, 0x3d },
  619. { STV090x_8PSK, 0x3e, 0x0e, 0x2d, 0x0d, 0x3c },
  620. { STV090x_16APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d },
  621. { STV090x_32APSK, 0x1e, 0x1e, 0x1e, 0x3d, 0x2d }
  622. };
  623. /* Cut 3.0 Short Frame Tracking CR Loop */
  624. static struct stv090x_short_frame_crloop stv090x_s2_short_crl_cut30[] = {
  625. /* MODCOD 2M 5M 10M 20M 30M */
  626. { STV090x_QPSK, 0x2C, 0x2B, 0x0B, 0x0B, 0x3A },
  627. { STV090x_8PSK, 0x3B, 0x0B, 0x2A, 0x0A, 0x39 },
  628. { STV090x_16APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A },
  629. { STV090x_32APSK, 0x1B, 0x1B, 0x1B, 0x3A, 0x2A }
  630. };
  631. static inline s32 comp2(s32 __x, s32 __width)
  632. {
  633. if (__width == 32)
  634. return __x;
  635. else
  636. return (__x >= (1 << (__width - 1))) ? (__x - (1 << __width)) : __x;
  637. }
  638. static int stv090x_read_reg(struct stv090x_state *state, unsigned int reg)
  639. {
  640. const struct stv090x_config *config = state->config;
  641. int ret;
  642. u8 b0[] = { reg >> 8, reg & 0xff };
  643. u8 buf;
  644. struct i2c_msg msg[] = {
  645. { .addr = config->address, .flags = 0, .buf = b0, .len = 2 },
  646. { .addr = config->address, .flags = I2C_M_RD, .buf = &buf, .len = 1 }
  647. };
  648. ret = i2c_transfer(state->i2c, msg, 2);
  649. if (ret != 2) {
  650. if (ret != -ERESTARTSYS)
  651. dprintk(FE_ERROR, 1,
  652. "Read error, Reg=[0x%02x], Status=%d",
  653. reg, ret);
  654. return ret < 0 ? ret : -EREMOTEIO;
  655. }
  656. if (unlikely(*state->verbose >= FE_DEBUGREG))
  657. dprintk(FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
  658. reg, buf);
  659. return (unsigned int) buf;
  660. }
  661. static int stv090x_write_regs(struct stv090x_state *state, unsigned int reg, u8 *data, u32 count)
  662. {
  663. const struct stv090x_config *config = state->config;
  664. int ret;
  665. u8 buf[MAX_XFER_SIZE];
  666. struct i2c_msg i2c_msg = { .addr = config->address, .flags = 0, .buf = buf, .len = 2 + count };
  667. if (2 + count > sizeof(buf)) {
  668. printk(KERN_WARNING
  669. "%s: i2c wr reg=%04x: len=%d is too big!\n",
  670. KBUILD_MODNAME, reg, count);
  671. return -EINVAL;
  672. }
  673. buf[0] = reg >> 8;
  674. buf[1] = reg & 0xff;
  675. memcpy(&buf[2], data, count);
  676. dprintk(FE_DEBUGREG, 1, "%s [0x%04x]: %*ph",
  677. __func__, reg, count, data);
  678. ret = i2c_transfer(state->i2c, &i2c_msg, 1);
  679. if (ret != 1) {
  680. if (ret != -ERESTARTSYS)
  681. dprintk(FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
  682. reg, data[0], count, ret);
  683. return ret < 0 ? ret : -EREMOTEIO;
  684. }
  685. return 0;
  686. }
  687. static int stv090x_write_reg(struct stv090x_state *state, unsigned int reg, u8 data)
  688. {
  689. u8 tmp = data; /* see gcc.gnu.org/bugzilla/show_bug.cgi?id=81715 */
  690. return stv090x_write_regs(state, reg, &tmp, 1);
  691. }
  692. static inline void stv090x_tuner_i2c_lock(struct stv090x_state *state)
  693. {
  694. if (state->config->tuner_i2c_lock)
  695. state->config->tuner_i2c_lock(&state->frontend, 1);
  696. else
  697. mutex_lock(&state->internal->tuner_lock);
  698. }
  699. static inline void stv090x_tuner_i2c_unlock(struct stv090x_state *state)
  700. {
  701. if (state->config->tuner_i2c_lock)
  702. state->config->tuner_i2c_lock(&state->frontend, 0);
  703. else
  704. mutex_unlock(&state->internal->tuner_lock);
  705. }
  706. static int stv090x_i2c_gate_ctrl(struct stv090x_state *state, int enable)
  707. {
  708. u32 reg;
  709. /*
  710. * NOTE! A lock is used as a FSM to control the state in which
  711. * access is serialized between two tuners on the same demod.
  712. * This has nothing to do with a lock to protect a critical section
  713. * which may in some other cases be confused with protecting I/O
  714. * access to the demodulator gate.
  715. * In case of any error, the lock is unlocked and exit within the
  716. * relevant operations themselves.
  717. */
  718. if (enable)
  719. stv090x_tuner_i2c_lock(state);
  720. reg = STV090x_READ_DEMOD(state, I2CRPT);
  721. if (enable) {
  722. dprintk(FE_DEBUG, 1, "Enable Gate");
  723. STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 1);
  724. if (STV090x_WRITE_DEMOD(state, I2CRPT, reg) < 0)
  725. goto err;
  726. } else {
  727. dprintk(FE_DEBUG, 1, "Disable Gate");
  728. STV090x_SETFIELD_Px(reg, I2CT_ON_FIELD, 0);
  729. if ((STV090x_WRITE_DEMOD(state, I2CRPT, reg)) < 0)
  730. goto err;
  731. }
  732. if (!enable)
  733. stv090x_tuner_i2c_unlock(state);
  734. return 0;
  735. err:
  736. dprintk(FE_ERROR, 1, "I/O error");
  737. stv090x_tuner_i2c_unlock(state);
  738. return -1;
  739. }
  740. static void stv090x_get_lock_tmg(struct stv090x_state *state)
  741. {
  742. switch (state->algo) {
  743. case STV090x_BLIND_SEARCH:
  744. dprintk(FE_DEBUG, 1, "Blind Search");
  745. if (state->srate <= 1500000) { /*10Msps< SR <=15Msps*/
  746. state->DemodTimeout = 1500;
  747. state->FecTimeout = 400;
  748. } else if (state->srate <= 5000000) { /*10Msps< SR <=15Msps*/
  749. state->DemodTimeout = 1000;
  750. state->FecTimeout = 300;
  751. } else { /*SR >20Msps*/
  752. state->DemodTimeout = 700;
  753. state->FecTimeout = 100;
  754. }
  755. break;
  756. case STV090x_COLD_SEARCH:
  757. case STV090x_WARM_SEARCH:
  758. default:
  759. dprintk(FE_DEBUG, 1, "Normal Search");
  760. if (state->srate <= 1000000) { /*SR <=1Msps*/
  761. state->DemodTimeout = 4500;
  762. state->FecTimeout = 1700;
  763. } else if (state->srate <= 2000000) { /*1Msps < SR <= 2Msps */
  764. state->DemodTimeout = 2500;
  765. state->FecTimeout = 1100;
  766. } else if (state->srate <= 5000000) { /*2Msps < SR <= 5Msps */
  767. state->DemodTimeout = 1000;
  768. state->FecTimeout = 550;
  769. } else if (state->srate <= 10000000) { /*5Msps < SR <= 10Msps */
  770. state->DemodTimeout = 700;
  771. state->FecTimeout = 250;
  772. } else if (state->srate <= 20000000) { /*10Msps < SR <= 20Msps */
  773. state->DemodTimeout = 400;
  774. state->FecTimeout = 130;
  775. } else { /*SR >20Msps*/
  776. state->DemodTimeout = 300;
  777. state->FecTimeout = 100;
  778. }
  779. break;
  780. }
  781. if (state->algo == STV090x_WARM_SEARCH)
  782. state->DemodTimeout /= 2;
  783. }
  784. static int stv090x_set_srate(struct stv090x_state *state, u32 srate)
  785. {
  786. u32 sym;
  787. if (srate > 60000000) {
  788. sym = (srate << 4); /* SR * 2^16 / master_clk */
  789. sym /= (state->internal->mclk >> 12);
  790. } else if (srate > 6000000) {
  791. sym = (srate << 6);
  792. sym /= (state->internal->mclk >> 10);
  793. } else {
  794. sym = (srate << 9);
  795. sym /= (state->internal->mclk >> 7);
  796. }
  797. if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0x7f) < 0) /* MSB */
  798. goto err;
  799. if (STV090x_WRITE_DEMOD(state, SFRINIT0, (sym & 0xff)) < 0) /* LSB */
  800. goto err;
  801. return 0;
  802. err:
  803. dprintk(FE_ERROR, 1, "I/O error");
  804. return -1;
  805. }
  806. static int stv090x_set_max_srate(struct stv090x_state *state, u32 clk, u32 srate)
  807. {
  808. u32 sym;
  809. srate = 105 * (srate / 100);
  810. if (srate > 60000000) {
  811. sym = (srate << 4); /* SR * 2^16 / master_clk */
  812. sym /= (state->internal->mclk >> 12);
  813. } else if (srate > 6000000) {
  814. sym = (srate << 6);
  815. sym /= (state->internal->mclk >> 10);
  816. } else {
  817. sym = (srate << 9);
  818. sym /= (state->internal->mclk >> 7);
  819. }
  820. if (sym < 0x7fff) {
  821. if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0) /* MSB */
  822. goto err;
  823. if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0) /* LSB */
  824. goto err;
  825. } else {
  826. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x7f) < 0) /* MSB */
  827. goto err;
  828. if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xff) < 0) /* LSB */
  829. goto err;
  830. }
  831. return 0;
  832. err:
  833. dprintk(FE_ERROR, 1, "I/O error");
  834. return -1;
  835. }
  836. static int stv090x_set_min_srate(struct stv090x_state *state, u32 clk, u32 srate)
  837. {
  838. u32 sym;
  839. srate = 95 * (srate / 100);
  840. if (srate > 60000000) {
  841. sym = (srate << 4); /* SR * 2^16 / master_clk */
  842. sym /= (state->internal->mclk >> 12);
  843. } else if (srate > 6000000) {
  844. sym = (srate << 6);
  845. sym /= (state->internal->mclk >> 10);
  846. } else {
  847. sym = (srate << 9);
  848. sym /= (state->internal->mclk >> 7);
  849. }
  850. if (STV090x_WRITE_DEMOD(state, SFRLOW1, ((sym >> 8) & 0x7f)) < 0) /* MSB */
  851. goto err;
  852. if (STV090x_WRITE_DEMOD(state, SFRLOW0, (sym & 0xff)) < 0) /* LSB */
  853. goto err;
  854. return 0;
  855. err:
  856. dprintk(FE_ERROR, 1, "I/O error");
  857. return -1;
  858. }
  859. static u32 stv090x_car_width(u32 srate, enum stv090x_rolloff rolloff)
  860. {
  861. u32 ro;
  862. switch (rolloff) {
  863. case STV090x_RO_20:
  864. ro = 20;
  865. break;
  866. case STV090x_RO_25:
  867. ro = 25;
  868. break;
  869. case STV090x_RO_35:
  870. default:
  871. ro = 35;
  872. break;
  873. }
  874. return srate + (srate * ro) / 100;
  875. }
  876. static int stv090x_set_vit_thacq(struct stv090x_state *state)
  877. {
  878. if (STV090x_WRITE_DEMOD(state, VTH12, 0x96) < 0)
  879. goto err;
  880. if (STV090x_WRITE_DEMOD(state, VTH23, 0x64) < 0)
  881. goto err;
  882. if (STV090x_WRITE_DEMOD(state, VTH34, 0x36) < 0)
  883. goto err;
  884. if (STV090x_WRITE_DEMOD(state, VTH56, 0x23) < 0)
  885. goto err;
  886. if (STV090x_WRITE_DEMOD(state, VTH67, 0x1e) < 0)
  887. goto err;
  888. if (STV090x_WRITE_DEMOD(state, VTH78, 0x19) < 0)
  889. goto err;
  890. return 0;
  891. err:
  892. dprintk(FE_ERROR, 1, "I/O error");
  893. return -1;
  894. }
  895. static int stv090x_set_vit_thtracq(struct stv090x_state *state)
  896. {
  897. if (STV090x_WRITE_DEMOD(state, VTH12, 0xd0) < 0)
  898. goto err;
  899. if (STV090x_WRITE_DEMOD(state, VTH23, 0x7d) < 0)
  900. goto err;
  901. if (STV090x_WRITE_DEMOD(state, VTH34, 0x53) < 0)
  902. goto err;
  903. if (STV090x_WRITE_DEMOD(state, VTH56, 0x2f) < 0)
  904. goto err;
  905. if (STV090x_WRITE_DEMOD(state, VTH67, 0x24) < 0)
  906. goto err;
  907. if (STV090x_WRITE_DEMOD(state, VTH78, 0x1f) < 0)
  908. goto err;
  909. return 0;
  910. err:
  911. dprintk(FE_ERROR, 1, "I/O error");
  912. return -1;
  913. }
  914. static int stv090x_set_viterbi(struct stv090x_state *state)
  915. {
  916. switch (state->search_mode) {
  917. case STV090x_SEARCH_AUTO:
  918. if (STV090x_WRITE_DEMOD(state, FECM, 0x10) < 0) /* DVB-S and DVB-S2 */
  919. goto err;
  920. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x3f) < 0) /* all puncture rate */
  921. goto err;
  922. break;
  923. case STV090x_SEARCH_DVBS1:
  924. if (STV090x_WRITE_DEMOD(state, FECM, 0x00) < 0) /* disable DSS */
  925. goto err;
  926. switch (state->fec) {
  927. case STV090x_PR12:
  928. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
  929. goto err;
  930. break;
  931. case STV090x_PR23:
  932. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
  933. goto err;
  934. break;
  935. case STV090x_PR34:
  936. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x04) < 0)
  937. goto err;
  938. break;
  939. case STV090x_PR56:
  940. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x08) < 0)
  941. goto err;
  942. break;
  943. case STV090x_PR78:
  944. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x20) < 0)
  945. goto err;
  946. break;
  947. default:
  948. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x2f) < 0) /* all */
  949. goto err;
  950. break;
  951. }
  952. break;
  953. case STV090x_SEARCH_DSS:
  954. if (STV090x_WRITE_DEMOD(state, FECM, 0x80) < 0)
  955. goto err;
  956. switch (state->fec) {
  957. case STV090x_PR12:
  958. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x01) < 0)
  959. goto err;
  960. break;
  961. case STV090x_PR23:
  962. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x02) < 0)
  963. goto err;
  964. break;
  965. case STV090x_PR67:
  966. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x10) < 0)
  967. goto err;
  968. break;
  969. default:
  970. if (STV090x_WRITE_DEMOD(state, PRVIT, 0x13) < 0) /* 1/2, 2/3, 6/7 */
  971. goto err;
  972. break;
  973. }
  974. break;
  975. default:
  976. break;
  977. }
  978. return 0;
  979. err:
  980. dprintk(FE_ERROR, 1, "I/O error");
  981. return -1;
  982. }
  983. static int stv090x_stop_modcod(struct stv090x_state *state)
  984. {
  985. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  986. goto err;
  987. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
  988. goto err;
  989. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
  990. goto err;
  991. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
  992. goto err;
  993. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
  994. goto err;
  995. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
  996. goto err;
  997. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
  998. goto err;
  999. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xff) < 0)
  1000. goto err;
  1001. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xff) < 0)
  1002. goto err;
  1003. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xff) < 0)
  1004. goto err;
  1005. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xff) < 0)
  1006. goto err;
  1007. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xff) < 0)
  1008. goto err;
  1009. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xff) < 0)
  1010. goto err;
  1011. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xff) < 0)
  1012. goto err;
  1013. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
  1014. goto err;
  1015. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xff) < 0)
  1016. goto err;
  1017. return 0;
  1018. err:
  1019. dprintk(FE_ERROR, 1, "I/O error");
  1020. return -1;
  1021. }
  1022. static int stv090x_activate_modcod(struct stv090x_state *state)
  1023. {
  1024. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  1025. goto err;
  1026. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xfc) < 0)
  1027. goto err;
  1028. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xcc) < 0)
  1029. goto err;
  1030. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xcc) < 0)
  1031. goto err;
  1032. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xcc) < 0)
  1033. goto err;
  1034. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xcc) < 0)
  1035. goto err;
  1036. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xcc) < 0)
  1037. goto err;
  1038. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
  1039. goto err;
  1040. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
  1041. goto err;
  1042. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
  1043. goto err;
  1044. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
  1045. goto err;
  1046. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
  1047. goto err;
  1048. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
  1049. goto err;
  1050. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
  1051. goto err;
  1052. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xcc) < 0)
  1053. goto err;
  1054. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
  1055. goto err;
  1056. return 0;
  1057. err:
  1058. dprintk(FE_ERROR, 1, "I/O error");
  1059. return -1;
  1060. }
  1061. static int stv090x_activate_modcod_single(struct stv090x_state *state)
  1062. {
  1063. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  1064. goto err;
  1065. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xf0) < 0)
  1066. goto err;
  1067. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0x00) < 0)
  1068. goto err;
  1069. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0x00) < 0)
  1070. goto err;
  1071. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0x00) < 0)
  1072. goto err;
  1073. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0x00) < 0)
  1074. goto err;
  1075. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0x00) < 0)
  1076. goto err;
  1077. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0x00) < 0)
  1078. goto err;
  1079. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0x00) < 0)
  1080. goto err;
  1081. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0x00) < 0)
  1082. goto err;
  1083. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0x00) < 0)
  1084. goto err;
  1085. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0x00) < 0)
  1086. goto err;
  1087. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0x00) < 0)
  1088. goto err;
  1089. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0x00) < 0)
  1090. goto err;
  1091. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0x00) < 0)
  1092. goto err;
  1093. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0x0f) < 0)
  1094. goto err;
  1095. return 0;
  1096. err:
  1097. dprintk(FE_ERROR, 1, "I/O error");
  1098. return -1;
  1099. }
  1100. static int stv090x_vitclk_ctl(struct stv090x_state *state, int enable)
  1101. {
  1102. u32 reg;
  1103. switch (state->demod) {
  1104. case STV090x_DEMODULATOR_0:
  1105. mutex_lock(&state->internal->demod_lock);
  1106. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  1107. STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, enable);
  1108. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  1109. goto err;
  1110. mutex_unlock(&state->internal->demod_lock);
  1111. break;
  1112. case STV090x_DEMODULATOR_1:
  1113. mutex_lock(&state->internal->demod_lock);
  1114. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  1115. STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, enable);
  1116. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  1117. goto err;
  1118. mutex_unlock(&state->internal->demod_lock);
  1119. break;
  1120. default:
  1121. dprintk(FE_ERROR, 1, "Wrong demodulator!");
  1122. break;
  1123. }
  1124. return 0;
  1125. err:
  1126. mutex_unlock(&state->internal->demod_lock);
  1127. dprintk(FE_ERROR, 1, "I/O error");
  1128. return -1;
  1129. }
  1130. static int stv090x_dvbs_track_crl(struct stv090x_state *state)
  1131. {
  1132. if (state->internal->dev_ver >= 0x30) {
  1133. /* Set ACLC BCLC optimised value vs SR */
  1134. if (state->srate >= 15000000) {
  1135. if (STV090x_WRITE_DEMOD(state, ACLC, 0x2b) < 0)
  1136. goto err;
  1137. if (STV090x_WRITE_DEMOD(state, BCLC, 0x1a) < 0)
  1138. goto err;
  1139. } else if ((state->srate >= 7000000) && (15000000 > state->srate)) {
  1140. if (STV090x_WRITE_DEMOD(state, ACLC, 0x0c) < 0)
  1141. goto err;
  1142. if (STV090x_WRITE_DEMOD(state, BCLC, 0x1b) < 0)
  1143. goto err;
  1144. } else if (state->srate < 7000000) {
  1145. if (STV090x_WRITE_DEMOD(state, ACLC, 0x2c) < 0)
  1146. goto err;
  1147. if (STV090x_WRITE_DEMOD(state, BCLC, 0x1c) < 0)
  1148. goto err;
  1149. }
  1150. } else {
  1151. /* Cut 2.0 */
  1152. if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0)
  1153. goto err;
  1154. if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
  1155. goto err;
  1156. }
  1157. return 0;
  1158. err:
  1159. dprintk(FE_ERROR, 1, "I/O error");
  1160. return -1;
  1161. }
  1162. static int stv090x_delivery_search(struct stv090x_state *state)
  1163. {
  1164. u32 reg;
  1165. switch (state->search_mode) {
  1166. case STV090x_SEARCH_DVBS1:
  1167. case STV090x_SEARCH_DSS:
  1168. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1169. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  1170. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  1171. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1172. goto err;
  1173. /* Activate Viterbi decoder in legacy search,
  1174. * do not use FRESVIT1, might impact VITERBI2
  1175. */
  1176. if (stv090x_vitclk_ctl(state, 0) < 0)
  1177. goto err;
  1178. if (stv090x_dvbs_track_crl(state) < 0)
  1179. goto err;
  1180. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x22) < 0) /* disable DVB-S2 */
  1181. goto err;
  1182. if (stv090x_set_vit_thacq(state) < 0)
  1183. goto err;
  1184. if (stv090x_set_viterbi(state) < 0)
  1185. goto err;
  1186. break;
  1187. case STV090x_SEARCH_DVBS2:
  1188. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1189. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
  1190. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  1191. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1192. goto err;
  1193. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  1194. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  1195. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1196. goto err;
  1197. if (stv090x_vitclk_ctl(state, 1) < 0)
  1198. goto err;
  1199. if (STV090x_WRITE_DEMOD(state, ACLC, 0x1a) < 0) /* stop DVB-S CR loop */
  1200. goto err;
  1201. if (STV090x_WRITE_DEMOD(state, BCLC, 0x09) < 0)
  1202. goto err;
  1203. if (state->internal->dev_ver <= 0x20) {
  1204. /* enable S2 carrier loop */
  1205. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
  1206. goto err;
  1207. } else {
  1208. /* > Cut 3: Stop carrier 3 */
  1209. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
  1210. goto err;
  1211. }
  1212. if (state->demod_mode != STV090x_SINGLE) {
  1213. /* Cut 2: enable link during search */
  1214. if (stv090x_activate_modcod(state) < 0)
  1215. goto err;
  1216. } else {
  1217. /* Single demodulator
  1218. * Authorize SHORT and LONG frames,
  1219. * QPSK, 8PSK, 16APSK and 32APSK
  1220. */
  1221. if (stv090x_activate_modcod_single(state) < 0)
  1222. goto err;
  1223. }
  1224. if (stv090x_set_vit_thtracq(state) < 0)
  1225. goto err;
  1226. break;
  1227. case STV090x_SEARCH_AUTO:
  1228. default:
  1229. /* enable DVB-S2 and DVB-S2 in Auto MODE */
  1230. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1231. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
  1232. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  1233. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1234. goto err;
  1235. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  1236. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  1237. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1238. goto err;
  1239. if (stv090x_vitclk_ctl(state, 0) < 0)
  1240. goto err;
  1241. if (stv090x_dvbs_track_crl(state) < 0)
  1242. goto err;
  1243. if (state->internal->dev_ver <= 0x20) {
  1244. /* enable S2 carrier loop */
  1245. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x26) < 0)
  1246. goto err;
  1247. } else {
  1248. /* > Cut 3: Stop carrier 3 */
  1249. if (STV090x_WRITE_DEMOD(state, CAR2CFG, 0x66) < 0)
  1250. goto err;
  1251. }
  1252. if (state->demod_mode != STV090x_SINGLE) {
  1253. /* Cut 2: enable link during search */
  1254. if (stv090x_activate_modcod(state) < 0)
  1255. goto err;
  1256. } else {
  1257. /* Single demodulator
  1258. * Authorize SHORT and LONG frames,
  1259. * QPSK, 8PSK, 16APSK and 32APSK
  1260. */
  1261. if (stv090x_activate_modcod_single(state) < 0)
  1262. goto err;
  1263. }
  1264. if (stv090x_set_vit_thacq(state) < 0)
  1265. goto err;
  1266. if (stv090x_set_viterbi(state) < 0)
  1267. goto err;
  1268. break;
  1269. }
  1270. return 0;
  1271. err:
  1272. dprintk(FE_ERROR, 1, "I/O error");
  1273. return -1;
  1274. }
  1275. static int stv090x_start_search(struct stv090x_state *state)
  1276. {
  1277. u32 reg, freq_abs;
  1278. s16 freq;
  1279. /* Reset demodulator */
  1280. reg = STV090x_READ_DEMOD(state, DMDISTATE);
  1281. STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f);
  1282. if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
  1283. goto err;
  1284. if (state->internal->dev_ver <= 0x20) {
  1285. if (state->srate <= 5000000) {
  1286. if (STV090x_WRITE_DEMOD(state, CARCFG, 0x44) < 0)
  1287. goto err;
  1288. if (STV090x_WRITE_DEMOD(state, CFRUP1, 0x0f) < 0)
  1289. goto err;
  1290. if (STV090x_WRITE_DEMOD(state, CFRUP0, 0xff) < 0)
  1291. goto err;
  1292. if (STV090x_WRITE_DEMOD(state, CFRLOW1, 0xf0) < 0)
  1293. goto err;
  1294. if (STV090x_WRITE_DEMOD(state, CFRLOW0, 0x00) < 0)
  1295. goto err;
  1296. /*enlarge the timing bandwidth for Low SR*/
  1297. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0)
  1298. goto err;
  1299. } else {
  1300. /* If the symbol rate is >5 Msps
  1301. Set The carrier search up and low to auto mode */
  1302. if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
  1303. goto err;
  1304. /*reduce the timing bandwidth for high SR*/
  1305. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
  1306. goto err;
  1307. }
  1308. } else {
  1309. /* >= Cut 3 */
  1310. if (state->srate <= 5000000) {
  1311. /* enlarge the timing bandwidth for Low SR */
  1312. STV090x_WRITE_DEMOD(state, RTCS2, 0x68);
  1313. } else {
  1314. /* reduce timing bandwidth for high SR */
  1315. STV090x_WRITE_DEMOD(state, RTCS2, 0x44);
  1316. }
  1317. /* Set CFR min and max to manual mode */
  1318. STV090x_WRITE_DEMOD(state, CARCFG, 0x46);
  1319. if (state->algo == STV090x_WARM_SEARCH) {
  1320. /* WARM Start
  1321. * CFR min = -1MHz,
  1322. * CFR max = +1MHz
  1323. */
  1324. freq_abs = 1000 << 16;
  1325. freq_abs /= (state->internal->mclk / 1000);
  1326. freq = (s16) freq_abs;
  1327. } else {
  1328. /* COLD Start
  1329. * CFR min =- (SearchRange / 2 + 600KHz)
  1330. * CFR max = +(SearchRange / 2 + 600KHz)
  1331. * (600KHz for the tuner step size)
  1332. */
  1333. freq_abs = (state->search_range / 2000) + 600;
  1334. freq_abs = freq_abs << 16;
  1335. freq_abs /= (state->internal->mclk / 1000);
  1336. freq = (s16) freq_abs;
  1337. }
  1338. if (STV090x_WRITE_DEMOD(state, CFRUP1, MSB(freq)) < 0)
  1339. goto err;
  1340. if (STV090x_WRITE_DEMOD(state, CFRUP0, LSB(freq)) < 0)
  1341. goto err;
  1342. freq *= -1;
  1343. if (STV090x_WRITE_DEMOD(state, CFRLOW1, MSB(freq)) < 0)
  1344. goto err;
  1345. if (STV090x_WRITE_DEMOD(state, CFRLOW0, LSB(freq)) < 0)
  1346. goto err;
  1347. }
  1348. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0) < 0)
  1349. goto err;
  1350. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0) < 0)
  1351. goto err;
  1352. if (state->internal->dev_ver >= 0x20) {
  1353. if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
  1354. goto err;
  1355. if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
  1356. goto err;
  1357. if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
  1358. (state->search_mode == STV090x_SEARCH_DSS) ||
  1359. (state->search_mode == STV090x_SEARCH_AUTO)) {
  1360. if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
  1361. goto err;
  1362. if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0)
  1363. goto err;
  1364. }
  1365. }
  1366. if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00) < 0)
  1367. goto err;
  1368. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xe0) < 0)
  1369. goto err;
  1370. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xc0) < 0)
  1371. goto err;
  1372. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1373. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
  1374. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
  1375. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1376. goto err;
  1377. reg = STV090x_READ_DEMOD(state, DMDCFG2);
  1378. STV090x_SETFIELD_Px(reg, S1S2_SEQUENTIAL_FIELD, 0x0);
  1379. if (STV090x_WRITE_DEMOD(state, DMDCFG2, reg) < 0)
  1380. goto err;
  1381. if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0)
  1382. goto err;
  1383. if (state->internal->dev_ver >= 0x20) {
  1384. /*Frequency offset detector setting*/
  1385. if (state->srate < 2000000) {
  1386. if (state->internal->dev_ver <= 0x20) {
  1387. /* Cut 2 */
  1388. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x39) < 0)
  1389. goto err;
  1390. } else {
  1391. /* Cut 3 */
  1392. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x89) < 0)
  1393. goto err;
  1394. }
  1395. if (STV090x_WRITE_DEMOD(state, CARHDR, 0x40) < 0)
  1396. goto err;
  1397. } else if (state->srate < 10000000) {
  1398. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4c) < 0)
  1399. goto err;
  1400. if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
  1401. goto err;
  1402. } else {
  1403. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x4b) < 0)
  1404. goto err;
  1405. if (STV090x_WRITE_DEMOD(state, CARHDR, 0x20) < 0)
  1406. goto err;
  1407. }
  1408. } else {
  1409. if (state->srate < 10000000) {
  1410. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xef) < 0)
  1411. goto err;
  1412. } else {
  1413. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0xed) < 0)
  1414. goto err;
  1415. }
  1416. }
  1417. switch (state->algo) {
  1418. case STV090x_WARM_SEARCH:
  1419. /* The symbol rate and the exact
  1420. * carrier Frequency are known
  1421. */
  1422. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1423. goto err;
  1424. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  1425. goto err;
  1426. break;
  1427. case STV090x_COLD_SEARCH:
  1428. /* The symbol rate is known */
  1429. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1430. goto err;
  1431. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
  1432. goto err;
  1433. break;
  1434. default:
  1435. break;
  1436. }
  1437. return 0;
  1438. err:
  1439. dprintk(FE_ERROR, 1, "I/O error");
  1440. return -1;
  1441. }
  1442. static int stv090x_get_agc2_min_level(struct stv090x_state *state)
  1443. {
  1444. u32 agc2_min = 0xffff, agc2 = 0, freq_init, freq_step, reg;
  1445. s32 i, j, steps, dir;
  1446. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  1447. goto err;
  1448. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1449. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0);
  1450. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
  1451. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1452. goto err;
  1453. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0) /* SR = 65 Msps Max */
  1454. goto err;
  1455. if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
  1456. goto err;
  1457. if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0) /* SR= 400 ksps Min */
  1458. goto err;
  1459. if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
  1460. goto err;
  1461. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0) /* stop acq @ coarse carrier state */
  1462. goto err;
  1463. if (stv090x_set_srate(state, 1000000) < 0)
  1464. goto err;
  1465. steps = state->search_range / 1000000;
  1466. if (steps <= 0)
  1467. steps = 1;
  1468. dir = 1;
  1469. freq_step = (1000000 * 256) / (state->internal->mclk / 256);
  1470. freq_init = 0;
  1471. for (i = 0; i < steps; i++) {
  1472. if (dir > 0)
  1473. freq_init = freq_init + (freq_step * i);
  1474. else
  1475. freq_init = freq_init - (freq_step * i);
  1476. dir *= -1;
  1477. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod RESET */
  1478. goto err;
  1479. if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_init >> 8) & 0xff) < 0)
  1480. goto err;
  1481. if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_init & 0xff) < 0)
  1482. goto err;
  1483. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x58) < 0) /* Demod RESET */
  1484. goto err;
  1485. msleep(10);
  1486. agc2 = 0;
  1487. for (j = 0; j < 10; j++) {
  1488. agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
  1489. STV090x_READ_DEMOD(state, AGC2I0);
  1490. }
  1491. agc2 /= 10;
  1492. if (agc2 < agc2_min)
  1493. agc2_min = agc2;
  1494. }
  1495. return agc2_min;
  1496. err:
  1497. dprintk(FE_ERROR, 1, "I/O error");
  1498. return -1;
  1499. }
  1500. static u32 stv090x_get_srate(struct stv090x_state *state, u32 clk)
  1501. {
  1502. u8 r3, r2, r1, r0;
  1503. s32 srate, int_1, int_2, tmp_1, tmp_2;
  1504. r3 = STV090x_READ_DEMOD(state, SFR3);
  1505. r2 = STV090x_READ_DEMOD(state, SFR2);
  1506. r1 = STV090x_READ_DEMOD(state, SFR1);
  1507. r0 = STV090x_READ_DEMOD(state, SFR0);
  1508. srate = ((r3 << 24) | (r2 << 16) | (r1 << 8) | r0);
  1509. int_1 = clk >> 16;
  1510. int_2 = srate >> 16;
  1511. tmp_1 = clk % 0x10000;
  1512. tmp_2 = srate % 0x10000;
  1513. srate = (int_1 * int_2) +
  1514. ((int_1 * tmp_2) >> 16) +
  1515. ((int_2 * tmp_1) >> 16);
  1516. return srate;
  1517. }
  1518. static u32 stv090x_srate_srch_coarse(struct stv090x_state *state)
  1519. {
  1520. struct dvb_frontend *fe = &state->frontend;
  1521. int tmg_lock = 0, i;
  1522. s32 tmg_cpt = 0, dir = 1, steps, cur_step = 0, freq;
  1523. u32 srate_coarse = 0, agc2 = 0, car_step = 1200, reg;
  1524. u32 agc2th;
  1525. if (state->internal->dev_ver >= 0x30)
  1526. agc2th = 0x2e00;
  1527. else
  1528. agc2th = 0x1f00;
  1529. reg = STV090x_READ_DEMOD(state, DMDISTATE);
  1530. STV090x_SETFIELD_Px(reg, I2C_DEMOD_MODE_FIELD, 0x1f); /* Demod RESET */
  1531. if (STV090x_WRITE_DEMOD(state, DMDISTATE, reg) < 0)
  1532. goto err;
  1533. if (STV090x_WRITE_DEMOD(state, TMGCFG, 0x12) < 0)
  1534. goto err;
  1535. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0)
  1536. goto err;
  1537. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0xf0) < 0)
  1538. goto err;
  1539. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0xe0) < 0)
  1540. goto err;
  1541. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1542. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 1);
  1543. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0);
  1544. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1545. goto err;
  1546. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x83) < 0)
  1547. goto err;
  1548. if (STV090x_WRITE_DEMOD(state, SFRUP0, 0xc0) < 0)
  1549. goto err;
  1550. if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x82) < 0)
  1551. goto err;
  1552. if (STV090x_WRITE_DEMOD(state, SFRLOW0, 0xa0) < 0)
  1553. goto err;
  1554. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x00) < 0)
  1555. goto err;
  1556. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x50) < 0)
  1557. goto err;
  1558. if (state->internal->dev_ver >= 0x30) {
  1559. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x99) < 0)
  1560. goto err;
  1561. if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x98) < 0)
  1562. goto err;
  1563. } else if (state->internal->dev_ver >= 0x20) {
  1564. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x6a) < 0)
  1565. goto err;
  1566. if (STV090x_WRITE_DEMOD(state, SFRSTEP, 0x95) < 0)
  1567. goto err;
  1568. }
  1569. if (state->srate <= 2000000)
  1570. car_step = 1000;
  1571. else if (state->srate <= 5000000)
  1572. car_step = 2000;
  1573. else if (state->srate <= 12000000)
  1574. car_step = 3000;
  1575. else
  1576. car_step = 5000;
  1577. steps = -1 + ((state->search_range / 1000) / car_step);
  1578. steps /= 2;
  1579. steps = (2 * steps) + 1;
  1580. if (steps < 0)
  1581. steps = 1;
  1582. else if (steps > 10) {
  1583. steps = 11;
  1584. car_step = (state->search_range / 1000) / 10;
  1585. }
  1586. cur_step = 0;
  1587. dir = 1;
  1588. freq = state->frequency;
  1589. while ((!tmg_lock) && (cur_step < steps)) {
  1590. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5f) < 0) /* Demod RESET */
  1591. goto err;
  1592. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
  1593. goto err;
  1594. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
  1595. goto err;
  1596. if (STV090x_WRITE_DEMOD(state, SFRINIT1, 0x00) < 0)
  1597. goto err;
  1598. if (STV090x_WRITE_DEMOD(state, SFRINIT0, 0x00) < 0)
  1599. goto err;
  1600. /* trigger acquisition */
  1601. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x40) < 0)
  1602. goto err;
  1603. msleep(50);
  1604. for (i = 0; i < 10; i++) {
  1605. reg = STV090x_READ_DEMOD(state, DSTATUS);
  1606. if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
  1607. tmg_cpt++;
  1608. agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
  1609. STV090x_READ_DEMOD(state, AGC2I0);
  1610. }
  1611. agc2 /= 10;
  1612. srate_coarse = stv090x_get_srate(state, state->internal->mclk);
  1613. cur_step++;
  1614. dir *= -1;
  1615. if ((tmg_cpt >= 5) && (agc2 < agc2th) &&
  1616. (srate_coarse < 50000000) && (srate_coarse > 850000))
  1617. tmg_lock = 1;
  1618. else if (cur_step < steps) {
  1619. if (dir > 0)
  1620. freq += cur_step * car_step;
  1621. else
  1622. freq -= cur_step * car_step;
  1623. /* Setup tuner */
  1624. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1625. goto err;
  1626. if (state->config->tuner_set_frequency) {
  1627. if (state->config->tuner_set_frequency(fe, freq) < 0)
  1628. goto err_gateoff;
  1629. }
  1630. if (state->config->tuner_set_bandwidth) {
  1631. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  1632. goto err_gateoff;
  1633. }
  1634. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1635. goto err;
  1636. msleep(50);
  1637. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1638. goto err;
  1639. if (state->config->tuner_get_status) {
  1640. if (state->config->tuner_get_status(fe, &reg) < 0)
  1641. goto err_gateoff;
  1642. }
  1643. if (reg)
  1644. dprintk(FE_DEBUG, 1, "Tuner phase locked");
  1645. else
  1646. dprintk(FE_DEBUG, 1, "Tuner unlocked");
  1647. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1648. goto err;
  1649. }
  1650. }
  1651. if (!tmg_lock)
  1652. srate_coarse = 0;
  1653. else
  1654. srate_coarse = stv090x_get_srate(state, state->internal->mclk);
  1655. return srate_coarse;
  1656. err_gateoff:
  1657. stv090x_i2c_gate_ctrl(state, 0);
  1658. err:
  1659. dprintk(FE_ERROR, 1, "I/O error");
  1660. return -1;
  1661. }
  1662. static u32 stv090x_srate_srch_fine(struct stv090x_state *state)
  1663. {
  1664. u32 srate_coarse, freq_coarse, sym, reg;
  1665. srate_coarse = stv090x_get_srate(state, state->internal->mclk);
  1666. freq_coarse = STV090x_READ_DEMOD(state, CFR2) << 8;
  1667. freq_coarse |= STV090x_READ_DEMOD(state, CFR1);
  1668. sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
  1669. if (sym < state->srate)
  1670. srate_coarse = 0;
  1671. else {
  1672. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0) /* Demod RESET */
  1673. goto err;
  1674. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
  1675. goto err;
  1676. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
  1677. goto err;
  1678. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
  1679. goto err;
  1680. if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
  1681. goto err;
  1682. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1683. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
  1684. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1685. goto err;
  1686. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  1687. goto err;
  1688. if (state->internal->dev_ver >= 0x30) {
  1689. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x79) < 0)
  1690. goto err;
  1691. } else if (state->internal->dev_ver >= 0x20) {
  1692. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
  1693. goto err;
  1694. }
  1695. if (srate_coarse > 3000000) {
  1696. sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
  1697. sym = (sym / 1000) * 65536;
  1698. sym /= (state->internal->mclk / 1000);
  1699. if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
  1700. goto err;
  1701. if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
  1702. goto err;
  1703. sym = 10 * (srate_coarse / 13); /* SFRLOW = SFR - 30% */
  1704. sym = (sym / 1000) * 65536;
  1705. sym /= (state->internal->mclk / 1000);
  1706. if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
  1707. goto err;
  1708. if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
  1709. goto err;
  1710. sym = (srate_coarse / 1000) * 65536;
  1711. sym /= (state->internal->mclk / 1000);
  1712. if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
  1713. goto err;
  1714. if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
  1715. goto err;
  1716. } else {
  1717. sym = 13 * (srate_coarse / 10); /* SFRUP = SFR + 30% */
  1718. sym = (sym / 100) * 65536;
  1719. sym /= (state->internal->mclk / 100);
  1720. if (STV090x_WRITE_DEMOD(state, SFRUP1, (sym >> 8) & 0x7f) < 0)
  1721. goto err;
  1722. if (STV090x_WRITE_DEMOD(state, SFRUP0, sym & 0xff) < 0)
  1723. goto err;
  1724. sym = 10 * (srate_coarse / 14); /* SFRLOW = SFR - 30% */
  1725. sym = (sym / 100) * 65536;
  1726. sym /= (state->internal->mclk / 100);
  1727. if (STV090x_WRITE_DEMOD(state, SFRLOW1, (sym >> 8) & 0x7f) < 0)
  1728. goto err;
  1729. if (STV090x_WRITE_DEMOD(state, SFRLOW0, sym & 0xff) < 0)
  1730. goto err;
  1731. sym = (srate_coarse / 100) * 65536;
  1732. sym /= (state->internal->mclk / 100);
  1733. if (STV090x_WRITE_DEMOD(state, SFRINIT1, (sym >> 8) & 0xff) < 0)
  1734. goto err;
  1735. if (STV090x_WRITE_DEMOD(state, SFRINIT0, sym & 0xff) < 0)
  1736. goto err;
  1737. }
  1738. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
  1739. goto err;
  1740. if (STV090x_WRITE_DEMOD(state, CFRINIT1, (freq_coarse >> 8) & 0xff) < 0)
  1741. goto err;
  1742. if (STV090x_WRITE_DEMOD(state, CFRINIT0, freq_coarse & 0xff) < 0)
  1743. goto err;
  1744. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0) /* trigger acquisition */
  1745. goto err;
  1746. }
  1747. return srate_coarse;
  1748. err:
  1749. dprintk(FE_ERROR, 1, "I/O error");
  1750. return -1;
  1751. }
  1752. static int stv090x_get_dmdlock(struct stv090x_state *state, s32 timeout)
  1753. {
  1754. s32 timer = 0, lock = 0;
  1755. u32 reg;
  1756. u8 stat;
  1757. while ((timer < timeout) && (!lock)) {
  1758. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  1759. stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
  1760. switch (stat) {
  1761. case 0: /* searching */
  1762. case 1: /* first PLH detected */
  1763. default:
  1764. dprintk(FE_DEBUG, 1, "Demodulator searching ..");
  1765. lock = 0;
  1766. break;
  1767. case 2: /* DVB-S2 mode */
  1768. case 3: /* DVB-S1/legacy mode */
  1769. reg = STV090x_READ_DEMOD(state, DSTATUS);
  1770. lock = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
  1771. break;
  1772. }
  1773. if (!lock)
  1774. msleep(10);
  1775. else
  1776. dprintk(FE_DEBUG, 1, "Demodulator acquired LOCK");
  1777. timer += 10;
  1778. }
  1779. return lock;
  1780. }
  1781. static int stv090x_blind_search(struct stv090x_state *state)
  1782. {
  1783. u32 agc2, reg, srate_coarse;
  1784. s32 cpt_fail, agc2_ovflw, i;
  1785. u8 k_ref, k_max, k_min;
  1786. int coarse_fail = 0;
  1787. int lock;
  1788. k_max = 110;
  1789. k_min = 10;
  1790. agc2 = stv090x_get_agc2_min_level(state);
  1791. if (agc2 > STV090x_SEARCH_AGC2_TH(state->internal->dev_ver)) {
  1792. lock = 0;
  1793. } else {
  1794. if (state->internal->dev_ver <= 0x20) {
  1795. if (STV090x_WRITE_DEMOD(state, CARCFG, 0xc4) < 0)
  1796. goto err;
  1797. } else {
  1798. /* > Cut 3 */
  1799. if (STV090x_WRITE_DEMOD(state, CARCFG, 0x06) < 0)
  1800. goto err;
  1801. }
  1802. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x44) < 0)
  1803. goto err;
  1804. if (state->internal->dev_ver >= 0x20) {
  1805. if (STV090x_WRITE_DEMOD(state, EQUALCFG, 0x41) < 0)
  1806. goto err;
  1807. if (STV090x_WRITE_DEMOD(state, FFECFG, 0x41) < 0)
  1808. goto err;
  1809. if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x82) < 0)
  1810. goto err;
  1811. if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x00) < 0) /* set viterbi hysteresis */
  1812. goto err;
  1813. }
  1814. k_ref = k_max;
  1815. do {
  1816. if (STV090x_WRITE_DEMOD(state, KREFTMG, k_ref) < 0)
  1817. goto err;
  1818. if (stv090x_srate_srch_coarse(state) != 0) {
  1819. srate_coarse = stv090x_srate_srch_fine(state);
  1820. if (srate_coarse != 0) {
  1821. stv090x_get_lock_tmg(state);
  1822. lock = stv090x_get_dmdlock(state,
  1823. state->DemodTimeout);
  1824. } else {
  1825. lock = 0;
  1826. }
  1827. } else {
  1828. cpt_fail = 0;
  1829. agc2_ovflw = 0;
  1830. for (i = 0; i < 10; i++) {
  1831. agc2 += (STV090x_READ_DEMOD(state, AGC2I1) << 8) |
  1832. STV090x_READ_DEMOD(state, AGC2I0);
  1833. if (agc2 >= 0xff00)
  1834. agc2_ovflw++;
  1835. reg = STV090x_READ_DEMOD(state, DSTATUS2);
  1836. if ((STV090x_GETFIELD_Px(reg, CFR_OVERFLOW_FIELD) == 0x01) &&
  1837. (STV090x_GETFIELD_Px(reg, DEMOD_DELOCK_FIELD) == 0x01))
  1838. cpt_fail++;
  1839. }
  1840. if ((cpt_fail > 7) || (agc2_ovflw > 7))
  1841. coarse_fail = 1;
  1842. lock = 0;
  1843. }
  1844. k_ref -= 20;
  1845. } while ((k_ref >= k_min) && (!lock) && (!coarse_fail));
  1846. }
  1847. return lock;
  1848. err:
  1849. dprintk(FE_ERROR, 1, "I/O error");
  1850. return -1;
  1851. }
  1852. static int stv090x_chk_tmg(struct stv090x_state *state)
  1853. {
  1854. u32 reg;
  1855. s32 tmg_cpt = 0, i;
  1856. u8 freq, tmg_thh, tmg_thl;
  1857. int tmg_lock = 0;
  1858. freq = STV090x_READ_DEMOD(state, CARFREQ);
  1859. tmg_thh = STV090x_READ_DEMOD(state, TMGTHRISE);
  1860. tmg_thl = STV090x_READ_DEMOD(state, TMGTHFALL);
  1861. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, 0x20) < 0)
  1862. goto err;
  1863. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, 0x00) < 0)
  1864. goto err;
  1865. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  1866. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00); /* stop carrier offset search */
  1867. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  1868. goto err;
  1869. if (STV090x_WRITE_DEMOD(state, RTC, 0x80) < 0)
  1870. goto err;
  1871. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x40) < 0)
  1872. goto err;
  1873. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x00) < 0)
  1874. goto err;
  1875. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0) /* set car ofset to 0 */
  1876. goto err;
  1877. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
  1878. goto err;
  1879. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x65) < 0)
  1880. goto err;
  1881. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0) /* trigger acquisition */
  1882. goto err;
  1883. msleep(10);
  1884. for (i = 0; i < 10; i++) {
  1885. reg = STV090x_READ_DEMOD(state, DSTATUS);
  1886. if (STV090x_GETFIELD_Px(reg, TMGLOCK_QUALITY_FIELD) >= 2)
  1887. tmg_cpt++;
  1888. msleep(1);
  1889. }
  1890. if (tmg_cpt >= 3)
  1891. tmg_lock = 1;
  1892. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  1893. goto err;
  1894. if (STV090x_WRITE_DEMOD(state, RTC, 0x88) < 0) /* DVB-S1 timing */
  1895. goto err;
  1896. if (STV090x_WRITE_DEMOD(state, RTCS2, 0x68) < 0) /* DVB-S2 timing */
  1897. goto err;
  1898. if (STV090x_WRITE_DEMOD(state, CARFREQ, freq) < 0)
  1899. goto err;
  1900. if (STV090x_WRITE_DEMOD(state, TMGTHRISE, tmg_thh) < 0)
  1901. goto err;
  1902. if (STV090x_WRITE_DEMOD(state, TMGTHFALL, tmg_thl) < 0)
  1903. goto err;
  1904. return tmg_lock;
  1905. err:
  1906. dprintk(FE_ERROR, 1, "I/O error");
  1907. return -1;
  1908. }
  1909. static int stv090x_get_coldlock(struct stv090x_state *state, s32 timeout_dmd)
  1910. {
  1911. struct dvb_frontend *fe = &state->frontend;
  1912. u32 reg;
  1913. s32 car_step, steps, cur_step, dir, freq, timeout_lock;
  1914. int lock;
  1915. if (state->srate >= 10000000)
  1916. timeout_lock = timeout_dmd / 3;
  1917. else
  1918. timeout_lock = timeout_dmd / 2;
  1919. lock = stv090x_get_dmdlock(state, timeout_lock); /* cold start wait */
  1920. if (lock)
  1921. return lock;
  1922. if (state->srate >= 10000000) {
  1923. if (stv090x_chk_tmg(state)) {
  1924. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1925. goto err;
  1926. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
  1927. goto err;
  1928. return stv090x_get_dmdlock(state, timeout_dmd);
  1929. }
  1930. return 0;
  1931. }
  1932. if (state->srate <= 4000000)
  1933. car_step = 1000;
  1934. else if (state->srate <= 7000000)
  1935. car_step = 2000;
  1936. else if (state->srate <= 10000000)
  1937. car_step = 3000;
  1938. else
  1939. car_step = 5000;
  1940. steps = (state->search_range / 1000) / car_step;
  1941. steps /= 2;
  1942. steps = 2 * (steps + 1);
  1943. if (steps < 0)
  1944. steps = 2;
  1945. else if (steps > 12)
  1946. steps = 12;
  1947. cur_step = 1;
  1948. dir = 1;
  1949. freq = state->frequency;
  1950. state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + state->srate;
  1951. while ((cur_step <= steps) && (!lock)) {
  1952. if (dir > 0)
  1953. freq += cur_step * car_step;
  1954. else
  1955. freq -= cur_step * car_step;
  1956. /* Setup tuner */
  1957. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1958. goto err;
  1959. if (state->config->tuner_set_frequency) {
  1960. if (state->config->tuner_set_frequency(fe, freq) < 0)
  1961. goto err_gateoff;
  1962. }
  1963. if (state->config->tuner_set_bandwidth) {
  1964. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  1965. goto err_gateoff;
  1966. }
  1967. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1968. goto err;
  1969. msleep(50);
  1970. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  1971. goto err;
  1972. if (state->config->tuner_get_status) {
  1973. if (state->config->tuner_get_status(fe, &reg) < 0)
  1974. goto err_gateoff;
  1975. if (reg)
  1976. dprintk(FE_DEBUG, 1, "Tuner phase locked");
  1977. else
  1978. dprintk(FE_DEBUG, 1, "Tuner unlocked");
  1979. }
  1980. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  1981. goto err;
  1982. STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c);
  1983. if (STV090x_WRITE_DEMOD(state, CFRINIT1, 0x00) < 0)
  1984. goto err;
  1985. if (STV090x_WRITE_DEMOD(state, CFRINIT0, 0x00) < 0)
  1986. goto err;
  1987. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  1988. goto err;
  1989. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x15) < 0)
  1990. goto err;
  1991. lock = stv090x_get_dmdlock(state, (timeout_dmd / 3));
  1992. dir *= -1;
  1993. cur_step++;
  1994. }
  1995. return lock;
  1996. err_gateoff:
  1997. stv090x_i2c_gate_ctrl(state, 0);
  1998. err:
  1999. dprintk(FE_ERROR, 1, "I/O error");
  2000. return -1;
  2001. }
  2002. static int stv090x_get_loop_params(struct stv090x_state *state, s32 *freq_inc, s32 *timeout_sw, s32 *steps)
  2003. {
  2004. s32 timeout, inc, steps_max, srate, car_max;
  2005. srate = state->srate;
  2006. car_max = state->search_range / 1000;
  2007. car_max += car_max / 10;
  2008. car_max = 65536 * (car_max / 2);
  2009. car_max /= (state->internal->mclk / 1000);
  2010. if (car_max > 0x4000)
  2011. car_max = 0x4000 ; /* maxcarrier should be<= +-1/4 Mclk */
  2012. inc = srate;
  2013. inc /= state->internal->mclk / 1000;
  2014. inc *= 256;
  2015. inc *= 256;
  2016. inc /= 1000;
  2017. switch (state->search_mode) {
  2018. case STV090x_SEARCH_DVBS1:
  2019. case STV090x_SEARCH_DSS:
  2020. inc *= 3; /* freq step = 3% of srate */
  2021. timeout = 20;
  2022. break;
  2023. case STV090x_SEARCH_DVBS2:
  2024. inc *= 4;
  2025. timeout = 25;
  2026. break;
  2027. case STV090x_SEARCH_AUTO:
  2028. default:
  2029. inc *= 3;
  2030. timeout = 25;
  2031. break;
  2032. }
  2033. inc /= 100;
  2034. if ((inc > car_max) || (inc < 0))
  2035. inc = car_max / 2; /* increment <= 1/8 Mclk */
  2036. timeout *= 27500; /* 27.5 Msps reference */
  2037. if (srate > 0)
  2038. timeout /= (srate / 1000);
  2039. if ((timeout > 100) || (timeout < 0))
  2040. timeout = 100;
  2041. steps_max = (car_max / inc) + 1; /* min steps = 3 */
  2042. if ((steps_max > 100) || (steps_max < 0)) {
  2043. steps_max = 100; /* max steps <= 100 */
  2044. inc = car_max / steps_max;
  2045. }
  2046. *freq_inc = inc;
  2047. *timeout_sw = timeout;
  2048. *steps = steps_max;
  2049. return 0;
  2050. }
  2051. static int stv090x_chk_signal(struct stv090x_state *state)
  2052. {
  2053. s32 offst_car, agc2, car_max;
  2054. int no_signal;
  2055. offst_car = STV090x_READ_DEMOD(state, CFR2) << 8;
  2056. offst_car |= STV090x_READ_DEMOD(state, CFR1);
  2057. offst_car = comp2(offst_car, 16);
  2058. agc2 = STV090x_READ_DEMOD(state, AGC2I1) << 8;
  2059. agc2 |= STV090x_READ_DEMOD(state, AGC2I0);
  2060. car_max = state->search_range / 1000;
  2061. car_max += (car_max / 10); /* 10% margin */
  2062. car_max = (65536 * car_max / 2);
  2063. car_max /= state->internal->mclk / 1000;
  2064. if (car_max > 0x4000)
  2065. car_max = 0x4000;
  2066. if ((agc2 > 0x2000) || (offst_car > 2 * car_max) || (offst_car < -2 * car_max)) {
  2067. no_signal = 1;
  2068. dprintk(FE_DEBUG, 1, "No Signal");
  2069. } else {
  2070. no_signal = 0;
  2071. dprintk(FE_DEBUG, 1, "Found Signal");
  2072. }
  2073. return no_signal;
  2074. }
  2075. static int stv090x_search_car_loop(struct stv090x_state *state, s32 inc, s32 timeout, int zigzag, s32 steps_max)
  2076. {
  2077. int no_signal, lock = 0;
  2078. s32 cpt_step = 0, offst_freq, car_max;
  2079. u32 reg;
  2080. car_max = state->search_range / 1000;
  2081. car_max += (car_max / 10);
  2082. car_max = (65536 * car_max / 2);
  2083. car_max /= (state->internal->mclk / 1000);
  2084. if (car_max > 0x4000)
  2085. car_max = 0x4000;
  2086. if (zigzag)
  2087. offst_freq = 0;
  2088. else
  2089. offst_freq = -car_max + inc;
  2090. do {
  2091. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1c) < 0)
  2092. goto err;
  2093. if (STV090x_WRITE_DEMOD(state, CFRINIT1, ((offst_freq / 256) & 0xff)) < 0)
  2094. goto err;
  2095. if (STV090x_WRITE_DEMOD(state, CFRINIT0, offst_freq & 0xff) < 0)
  2096. goto err;
  2097. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  2098. goto err;
  2099. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  2100. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x1); /* stop DVB-S2 packet delin */
  2101. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  2102. goto err;
  2103. if (zigzag) {
  2104. if (offst_freq >= 0)
  2105. offst_freq = -offst_freq - 2 * inc;
  2106. else
  2107. offst_freq = -offst_freq;
  2108. } else {
  2109. offst_freq += 2 * inc;
  2110. }
  2111. cpt_step++;
  2112. lock = stv090x_get_dmdlock(state, timeout);
  2113. no_signal = stv090x_chk_signal(state);
  2114. } while ((!lock) &&
  2115. (!no_signal) &&
  2116. ((offst_freq - inc) < car_max) &&
  2117. ((offst_freq + inc) > -car_max) &&
  2118. (cpt_step < steps_max));
  2119. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  2120. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0);
  2121. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  2122. goto err;
  2123. return lock;
  2124. err:
  2125. dprintk(FE_ERROR, 1, "I/O error");
  2126. return -1;
  2127. }
  2128. static int stv090x_sw_algo(struct stv090x_state *state)
  2129. {
  2130. int no_signal, zigzag, lock = 0;
  2131. u32 reg;
  2132. s32 dvbs2_fly_wheel;
  2133. s32 inc, timeout_step, trials, steps_max;
  2134. /* get params */
  2135. stv090x_get_loop_params(state, &inc, &timeout_step, &steps_max);
  2136. switch (state->search_mode) {
  2137. case STV090x_SEARCH_DVBS1:
  2138. case STV090x_SEARCH_DSS:
  2139. /* accelerate the frequency detector */
  2140. if (state->internal->dev_ver >= 0x20) {
  2141. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3B) < 0)
  2142. goto err;
  2143. }
  2144. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x49) < 0)
  2145. goto err;
  2146. zigzag = 0;
  2147. break;
  2148. case STV090x_SEARCH_DVBS2:
  2149. if (state->internal->dev_ver >= 0x20) {
  2150. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
  2151. goto err;
  2152. }
  2153. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
  2154. goto err;
  2155. zigzag = 1;
  2156. break;
  2157. case STV090x_SEARCH_AUTO:
  2158. default:
  2159. /* accelerate the frequency detector */
  2160. if (state->internal->dev_ver >= 0x20) {
  2161. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x3b) < 0)
  2162. goto err;
  2163. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
  2164. goto err;
  2165. }
  2166. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0xc9) < 0)
  2167. goto err;
  2168. zigzag = 0;
  2169. break;
  2170. }
  2171. trials = 0;
  2172. do {
  2173. lock = stv090x_search_car_loop(state, inc, timeout_step, zigzag, steps_max);
  2174. no_signal = stv090x_chk_signal(state);
  2175. trials++;
  2176. /*run the SW search 2 times maximum*/
  2177. if (lock || no_signal || (trials == 2)) {
  2178. /*Check if the demod is not losing lock in DVBS2*/
  2179. if (state->internal->dev_ver >= 0x20) {
  2180. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
  2181. goto err;
  2182. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
  2183. goto err;
  2184. }
  2185. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  2186. if ((lock) && (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == STV090x_DVBS2)) {
  2187. /*Check if the demod is not losing lock in DVBS2*/
  2188. msleep(timeout_step);
  2189. reg = STV090x_READ_DEMOD(state, DMDFLYW);
  2190. dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
  2191. if (dvbs2_fly_wheel < 0xd) { /*if correct frames is decrementing */
  2192. msleep(timeout_step);
  2193. reg = STV090x_READ_DEMOD(state, DMDFLYW);
  2194. dvbs2_fly_wheel = STV090x_GETFIELD_Px(reg, FLYWHEEL_CPT_FIELD);
  2195. }
  2196. if (dvbs2_fly_wheel < 0xd) {
  2197. /*FALSE lock, The demod is losing lock */
  2198. lock = 0;
  2199. if (trials < 2) {
  2200. if (state->internal->dev_ver >= 0x20) {
  2201. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x79) < 0)
  2202. goto err;
  2203. }
  2204. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, 0x89) < 0)
  2205. goto err;
  2206. }
  2207. }
  2208. }
  2209. }
  2210. } while ((!lock) && (trials < 2) && (!no_signal));
  2211. return lock;
  2212. err:
  2213. dprintk(FE_ERROR, 1, "I/O error");
  2214. return -1;
  2215. }
  2216. static enum stv090x_delsys stv090x_get_std(struct stv090x_state *state)
  2217. {
  2218. u32 reg;
  2219. enum stv090x_delsys delsys;
  2220. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  2221. if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 2)
  2222. delsys = STV090x_DVBS2;
  2223. else if (STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD) == 3) {
  2224. reg = STV090x_READ_DEMOD(state, FECM);
  2225. if (STV090x_GETFIELD_Px(reg, DSS_DVB_FIELD) == 1)
  2226. delsys = STV090x_DSS;
  2227. else
  2228. delsys = STV090x_DVBS1;
  2229. } else {
  2230. delsys = STV090x_ERROR;
  2231. }
  2232. return delsys;
  2233. }
  2234. /* in Hz */
  2235. static s32 stv090x_get_car_freq(struct stv090x_state *state, u32 mclk)
  2236. {
  2237. s32 derot, int_1, int_2, tmp_1, tmp_2;
  2238. derot = STV090x_READ_DEMOD(state, CFR2) << 16;
  2239. derot |= STV090x_READ_DEMOD(state, CFR1) << 8;
  2240. derot |= STV090x_READ_DEMOD(state, CFR0);
  2241. derot = comp2(derot, 24);
  2242. int_1 = mclk >> 12;
  2243. int_2 = derot >> 12;
  2244. /* carrier_frequency = MasterClock * Reg / 2^24 */
  2245. tmp_1 = mclk % 0x1000;
  2246. tmp_2 = derot % 0x1000;
  2247. derot = (int_1 * int_2) +
  2248. ((int_1 * tmp_2) >> 12) +
  2249. ((int_2 * tmp_1) >> 12);
  2250. return derot;
  2251. }
  2252. static int stv090x_get_viterbi(struct stv090x_state *state)
  2253. {
  2254. u32 reg, rate;
  2255. reg = STV090x_READ_DEMOD(state, VITCURPUN);
  2256. rate = STV090x_GETFIELD_Px(reg, VIT_CURPUN_FIELD);
  2257. switch (rate) {
  2258. case 13:
  2259. state->fec = STV090x_PR12;
  2260. break;
  2261. case 18:
  2262. state->fec = STV090x_PR23;
  2263. break;
  2264. case 21:
  2265. state->fec = STV090x_PR34;
  2266. break;
  2267. case 24:
  2268. state->fec = STV090x_PR56;
  2269. break;
  2270. case 25:
  2271. state->fec = STV090x_PR67;
  2272. break;
  2273. case 26:
  2274. state->fec = STV090x_PR78;
  2275. break;
  2276. default:
  2277. state->fec = STV090x_PRERR;
  2278. break;
  2279. }
  2280. return 0;
  2281. }
  2282. static enum stv090x_signal_state stv090x_get_sig_params(struct stv090x_state *state)
  2283. {
  2284. struct dvb_frontend *fe = &state->frontend;
  2285. u8 tmg;
  2286. u32 reg;
  2287. s32 i = 0, offst_freq;
  2288. msleep(5);
  2289. if (state->algo == STV090x_BLIND_SEARCH) {
  2290. tmg = STV090x_READ_DEMOD(state, TMGREG2);
  2291. STV090x_WRITE_DEMOD(state, SFRSTEP, 0x5c);
  2292. while ((i <= 50) && (tmg != 0) && (tmg != 0xff)) {
  2293. tmg = STV090x_READ_DEMOD(state, TMGREG2);
  2294. msleep(5);
  2295. i += 5;
  2296. }
  2297. }
  2298. state->delsys = stv090x_get_std(state);
  2299. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2300. goto err;
  2301. if (state->config->tuner_get_frequency) {
  2302. if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
  2303. goto err_gateoff;
  2304. }
  2305. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2306. goto err;
  2307. offst_freq = stv090x_get_car_freq(state, state->internal->mclk) / 1000;
  2308. state->frequency += offst_freq;
  2309. if (stv090x_get_viterbi(state) < 0)
  2310. goto err;
  2311. reg = STV090x_READ_DEMOD(state, DMDMODCOD);
  2312. state->modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
  2313. state->pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
  2314. state->frame_len = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) >> 1;
  2315. reg = STV090x_READ_DEMOD(state, TMGOBS);
  2316. state->rolloff = STV090x_GETFIELD_Px(reg, ROLLOFF_STATUS_FIELD);
  2317. reg = STV090x_READ_DEMOD(state, FECM);
  2318. state->inversion = STV090x_GETFIELD_Px(reg, IQINV_FIELD);
  2319. if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000)) {
  2320. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2321. goto err;
  2322. if (state->config->tuner_get_frequency) {
  2323. if (state->config->tuner_get_frequency(fe, &state->frequency) < 0)
  2324. goto err_gateoff;
  2325. }
  2326. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2327. goto err;
  2328. if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
  2329. return STV090x_RANGEOK;
  2330. else if (abs(offst_freq) <= (stv090x_car_width(state->srate, state->rolloff) / 2000))
  2331. return STV090x_RANGEOK;
  2332. } else {
  2333. if (abs(offst_freq) <= ((state->search_range / 2000) + 500))
  2334. return STV090x_RANGEOK;
  2335. }
  2336. return STV090x_OUTOFRANGE;
  2337. err_gateoff:
  2338. stv090x_i2c_gate_ctrl(state, 0);
  2339. err:
  2340. dprintk(FE_ERROR, 1, "I/O error");
  2341. return -1;
  2342. }
  2343. static u32 stv090x_get_tmgoffst(struct stv090x_state *state, u32 srate)
  2344. {
  2345. s32 offst_tmg;
  2346. offst_tmg = STV090x_READ_DEMOD(state, TMGREG2) << 16;
  2347. offst_tmg |= STV090x_READ_DEMOD(state, TMGREG1) << 8;
  2348. offst_tmg |= STV090x_READ_DEMOD(state, TMGREG0);
  2349. offst_tmg = comp2(offst_tmg, 24); /* 2's complement */
  2350. if (!offst_tmg)
  2351. offst_tmg = 1;
  2352. offst_tmg = ((s32) srate * 10) / ((s32) 0x1000000 / offst_tmg);
  2353. offst_tmg /= 320;
  2354. return offst_tmg;
  2355. }
  2356. static u8 stv090x_optimize_carloop(struct stv090x_state *state, enum stv090x_modcod modcod, s32 pilots)
  2357. {
  2358. u8 aclc = 0x29;
  2359. s32 i;
  2360. struct stv090x_long_frame_crloop *car_loop, *car_loop_qpsk_low, *car_loop_apsk_low;
  2361. if (state->internal->dev_ver == 0x20) {
  2362. car_loop = stv090x_s2_crl_cut20;
  2363. car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut20;
  2364. car_loop_apsk_low = stv090x_s2_apsk_crl_cut20;
  2365. } else {
  2366. /* >= Cut 3 */
  2367. car_loop = stv090x_s2_crl_cut30;
  2368. car_loop_qpsk_low = stv090x_s2_lowqpsk_crl_cut30;
  2369. car_loop_apsk_low = stv090x_s2_apsk_crl_cut30;
  2370. }
  2371. if (modcod < STV090x_QPSK_12) {
  2372. i = 0;
  2373. while ((i < 3) && (modcod != car_loop_qpsk_low[i].modcod))
  2374. i++;
  2375. if (i >= 3)
  2376. i = 2;
  2377. } else {
  2378. i = 0;
  2379. while ((i < 14) && (modcod != car_loop[i].modcod))
  2380. i++;
  2381. if (i >= 14) {
  2382. i = 0;
  2383. while ((i < 11) && (modcod != car_loop_apsk_low[i].modcod))
  2384. i++;
  2385. if (i >= 11)
  2386. i = 10;
  2387. }
  2388. }
  2389. if (modcod <= STV090x_QPSK_25) {
  2390. if (pilots) {
  2391. if (state->srate <= 3000000)
  2392. aclc = car_loop_qpsk_low[i].crl_pilots_on_2;
  2393. else if (state->srate <= 7000000)
  2394. aclc = car_loop_qpsk_low[i].crl_pilots_on_5;
  2395. else if (state->srate <= 15000000)
  2396. aclc = car_loop_qpsk_low[i].crl_pilots_on_10;
  2397. else if (state->srate <= 25000000)
  2398. aclc = car_loop_qpsk_low[i].crl_pilots_on_20;
  2399. else
  2400. aclc = car_loop_qpsk_low[i].crl_pilots_on_30;
  2401. } else {
  2402. if (state->srate <= 3000000)
  2403. aclc = car_loop_qpsk_low[i].crl_pilots_off_2;
  2404. else if (state->srate <= 7000000)
  2405. aclc = car_loop_qpsk_low[i].crl_pilots_off_5;
  2406. else if (state->srate <= 15000000)
  2407. aclc = car_loop_qpsk_low[i].crl_pilots_off_10;
  2408. else if (state->srate <= 25000000)
  2409. aclc = car_loop_qpsk_low[i].crl_pilots_off_20;
  2410. else
  2411. aclc = car_loop_qpsk_low[i].crl_pilots_off_30;
  2412. }
  2413. } else if (modcod <= STV090x_8PSK_910) {
  2414. if (pilots) {
  2415. if (state->srate <= 3000000)
  2416. aclc = car_loop[i].crl_pilots_on_2;
  2417. else if (state->srate <= 7000000)
  2418. aclc = car_loop[i].crl_pilots_on_5;
  2419. else if (state->srate <= 15000000)
  2420. aclc = car_loop[i].crl_pilots_on_10;
  2421. else if (state->srate <= 25000000)
  2422. aclc = car_loop[i].crl_pilots_on_20;
  2423. else
  2424. aclc = car_loop[i].crl_pilots_on_30;
  2425. } else {
  2426. if (state->srate <= 3000000)
  2427. aclc = car_loop[i].crl_pilots_off_2;
  2428. else if (state->srate <= 7000000)
  2429. aclc = car_loop[i].crl_pilots_off_5;
  2430. else if (state->srate <= 15000000)
  2431. aclc = car_loop[i].crl_pilots_off_10;
  2432. else if (state->srate <= 25000000)
  2433. aclc = car_loop[i].crl_pilots_off_20;
  2434. else
  2435. aclc = car_loop[i].crl_pilots_off_30;
  2436. }
  2437. } else { /* 16APSK and 32APSK */
  2438. /*
  2439. * This should never happen in practice, except if
  2440. * something is really wrong at the car_loop table.
  2441. */
  2442. if (i >= 11)
  2443. i = 10;
  2444. if (state->srate <= 3000000)
  2445. aclc = car_loop_apsk_low[i].crl_pilots_on_2;
  2446. else if (state->srate <= 7000000)
  2447. aclc = car_loop_apsk_low[i].crl_pilots_on_5;
  2448. else if (state->srate <= 15000000)
  2449. aclc = car_loop_apsk_low[i].crl_pilots_on_10;
  2450. else if (state->srate <= 25000000)
  2451. aclc = car_loop_apsk_low[i].crl_pilots_on_20;
  2452. else
  2453. aclc = car_loop_apsk_low[i].crl_pilots_on_30;
  2454. }
  2455. return aclc;
  2456. }
  2457. static u8 stv090x_optimize_carloop_short(struct stv090x_state *state)
  2458. {
  2459. struct stv090x_short_frame_crloop *short_crl = NULL;
  2460. s32 index = 0;
  2461. u8 aclc = 0x0b;
  2462. switch (state->modulation) {
  2463. case STV090x_QPSK:
  2464. default:
  2465. index = 0;
  2466. break;
  2467. case STV090x_8PSK:
  2468. index = 1;
  2469. break;
  2470. case STV090x_16APSK:
  2471. index = 2;
  2472. break;
  2473. case STV090x_32APSK:
  2474. index = 3;
  2475. break;
  2476. }
  2477. if (state->internal->dev_ver >= 0x30) {
  2478. /* Cut 3.0 and up */
  2479. short_crl = stv090x_s2_short_crl_cut30;
  2480. } else {
  2481. /* Cut 2.0 and up: we don't support cuts older than 2.0 */
  2482. short_crl = stv090x_s2_short_crl_cut20;
  2483. }
  2484. if (state->srate <= 3000000)
  2485. aclc = short_crl[index].crl_2;
  2486. else if (state->srate <= 7000000)
  2487. aclc = short_crl[index].crl_5;
  2488. else if (state->srate <= 15000000)
  2489. aclc = short_crl[index].crl_10;
  2490. else if (state->srate <= 25000000)
  2491. aclc = short_crl[index].crl_20;
  2492. else
  2493. aclc = short_crl[index].crl_30;
  2494. return aclc;
  2495. }
  2496. static int stv090x_optimize_track(struct stv090x_state *state)
  2497. {
  2498. struct dvb_frontend *fe = &state->frontend;
  2499. enum stv090x_modcod modcod;
  2500. s32 srate, pilots, aclc, f_1, f_0, i = 0, blind_tune = 0;
  2501. u32 reg;
  2502. srate = stv090x_get_srate(state, state->internal->mclk);
  2503. srate += stv090x_get_tmgoffst(state, srate);
  2504. switch (state->delsys) {
  2505. case STV090x_DVBS1:
  2506. case STV090x_DSS:
  2507. if (state->search_mode == STV090x_SEARCH_AUTO) {
  2508. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2509. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  2510. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 0);
  2511. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2512. goto err;
  2513. }
  2514. reg = STV090x_READ_DEMOD(state, DEMOD);
  2515. STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
  2516. STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x01);
  2517. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2518. goto err;
  2519. if (state->internal->dev_ver >= 0x30) {
  2520. if (stv090x_get_viterbi(state) < 0)
  2521. goto err;
  2522. if (state->fec == STV090x_PR12) {
  2523. if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x98) < 0)
  2524. goto err;
  2525. if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
  2526. goto err;
  2527. } else {
  2528. if (STV090x_WRITE_DEMOD(state, GAUSSR0, 0x18) < 0)
  2529. goto err;
  2530. if (STV090x_WRITE_DEMOD(state, CCIR0, 0x18) < 0)
  2531. goto err;
  2532. }
  2533. }
  2534. if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
  2535. goto err;
  2536. break;
  2537. case STV090x_DVBS2:
  2538. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2539. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 0);
  2540. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  2541. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2542. goto err;
  2543. if (state->internal->dev_ver >= 0x30) {
  2544. if (STV090x_WRITE_DEMOD(state, ACLC, 0) < 0)
  2545. goto err;
  2546. if (STV090x_WRITE_DEMOD(state, BCLC, 0) < 0)
  2547. goto err;
  2548. }
  2549. if (state->frame_len == STV090x_LONG_FRAME) {
  2550. reg = STV090x_READ_DEMOD(state, DMDMODCOD);
  2551. modcod = STV090x_GETFIELD_Px(reg, DEMOD_MODCOD_FIELD);
  2552. pilots = STV090x_GETFIELD_Px(reg, DEMOD_TYPE_FIELD) & 0x01;
  2553. aclc = stv090x_optimize_carloop(state, modcod, pilots);
  2554. if (modcod <= STV090x_QPSK_910) {
  2555. STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc);
  2556. } else if (modcod <= STV090x_8PSK_910) {
  2557. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2558. goto err;
  2559. if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
  2560. goto err;
  2561. }
  2562. if ((state->demod_mode == STV090x_SINGLE) && (modcod > STV090x_8PSK_910)) {
  2563. if (modcod <= STV090x_16APSK_910) {
  2564. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2565. goto err;
  2566. if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
  2567. goto err;
  2568. } else {
  2569. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2570. goto err;
  2571. if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
  2572. goto err;
  2573. }
  2574. }
  2575. } else {
  2576. /*Carrier loop setting for short frame*/
  2577. aclc = stv090x_optimize_carloop_short(state);
  2578. if (state->modulation == STV090x_QPSK) {
  2579. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, aclc) < 0)
  2580. goto err;
  2581. } else if (state->modulation == STV090x_8PSK) {
  2582. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2583. goto err;
  2584. if (STV090x_WRITE_DEMOD(state, ACLC2S28, aclc) < 0)
  2585. goto err;
  2586. } else if (state->modulation == STV090x_16APSK) {
  2587. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2588. goto err;
  2589. if (STV090x_WRITE_DEMOD(state, ACLC2S216A, aclc) < 0)
  2590. goto err;
  2591. } else if (state->modulation == STV090x_32APSK) {
  2592. if (STV090x_WRITE_DEMOD(state, ACLC2S2Q, 0x2a) < 0)
  2593. goto err;
  2594. if (STV090x_WRITE_DEMOD(state, ACLC2S232A, aclc) < 0)
  2595. goto err;
  2596. }
  2597. }
  2598. STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67); /* PER */
  2599. break;
  2600. case STV090x_ERROR:
  2601. default:
  2602. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2603. STV090x_SETFIELD_Px(reg, DVBS1_ENABLE_FIELD, 1);
  2604. STV090x_SETFIELD_Px(reg, DVBS2_ENABLE_FIELD, 1);
  2605. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2606. goto err;
  2607. break;
  2608. }
  2609. f_1 = STV090x_READ_DEMOD(state, CFR2);
  2610. f_0 = STV090x_READ_DEMOD(state, CFR1);
  2611. reg = STV090x_READ_DEMOD(state, TMGOBS);
  2612. if (state->algo == STV090x_BLIND_SEARCH) {
  2613. STV090x_WRITE_DEMOD(state, SFRSTEP, 0x00);
  2614. reg = STV090x_READ_DEMOD(state, DMDCFGMD);
  2615. STV090x_SETFIELD_Px(reg, SCAN_ENABLE_FIELD, 0x00);
  2616. STV090x_SETFIELD_Px(reg, CFR_AUTOSCAN_FIELD, 0x00);
  2617. if (STV090x_WRITE_DEMOD(state, DMDCFGMD, reg) < 0)
  2618. goto err;
  2619. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0)
  2620. goto err;
  2621. if (stv090x_set_srate(state, srate) < 0)
  2622. goto err;
  2623. blind_tune = 1;
  2624. if (stv090x_dvbs_track_crl(state) < 0)
  2625. goto err;
  2626. }
  2627. if (state->internal->dev_ver >= 0x20) {
  2628. if ((state->search_mode == STV090x_SEARCH_DVBS1) ||
  2629. (state->search_mode == STV090x_SEARCH_DSS) ||
  2630. (state->search_mode == STV090x_SEARCH_AUTO)) {
  2631. if (STV090x_WRITE_DEMOD(state, VAVSRVIT, 0x0a) < 0)
  2632. goto err;
  2633. if (STV090x_WRITE_DEMOD(state, VITSCALE, 0x00) < 0)
  2634. goto err;
  2635. }
  2636. }
  2637. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  2638. goto err;
  2639. /* AUTO tracking MODE */
  2640. if (STV090x_WRITE_DEMOD(state, SFRUP1, 0x80) < 0)
  2641. goto err;
  2642. /* AUTO tracking MODE */
  2643. if (STV090x_WRITE_DEMOD(state, SFRLOW1, 0x80) < 0)
  2644. goto err;
  2645. if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1) ||
  2646. (state->srate < 10000000)) {
  2647. /* update initial carrier freq with the found freq offset */
  2648. if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
  2649. goto err;
  2650. if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
  2651. goto err;
  2652. state->tuner_bw = stv090x_car_width(srate, state->rolloff) + 10000000;
  2653. if ((state->internal->dev_ver >= 0x20) || (blind_tune == 1)) {
  2654. if (state->algo != STV090x_WARM_SEARCH) {
  2655. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2656. goto err;
  2657. if (state->config->tuner_set_bandwidth) {
  2658. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  2659. goto err_gateoff;
  2660. }
  2661. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2662. goto err;
  2663. }
  2664. }
  2665. if ((state->algo == STV090x_BLIND_SEARCH) || (state->srate < 10000000))
  2666. msleep(50); /* blind search: wait 50ms for SR stabilization */
  2667. else
  2668. msleep(5);
  2669. stv090x_get_lock_tmg(state);
  2670. if (!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) {
  2671. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  2672. goto err;
  2673. if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
  2674. goto err;
  2675. if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
  2676. goto err;
  2677. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  2678. goto err;
  2679. i = 0;
  2680. while ((!(stv090x_get_dmdlock(state, (state->DemodTimeout / 2)))) && (i <= 2)) {
  2681. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x1f) < 0)
  2682. goto err;
  2683. if (STV090x_WRITE_DEMOD(state, CFRINIT1, f_1) < 0)
  2684. goto err;
  2685. if (STV090x_WRITE_DEMOD(state, CFRINIT0, f_0) < 0)
  2686. goto err;
  2687. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x18) < 0)
  2688. goto err;
  2689. i++;
  2690. }
  2691. }
  2692. }
  2693. if (state->internal->dev_ver >= 0x20) {
  2694. if (STV090x_WRITE_DEMOD(state, CARFREQ, 0x49) < 0)
  2695. goto err;
  2696. }
  2697. if ((state->delsys == STV090x_DVBS1) || (state->delsys == STV090x_DSS))
  2698. stv090x_set_vit_thtracq(state);
  2699. return 0;
  2700. err_gateoff:
  2701. stv090x_i2c_gate_ctrl(state, 0);
  2702. err:
  2703. dprintk(FE_ERROR, 1, "I/O error");
  2704. return -1;
  2705. }
  2706. static int stv090x_get_feclock(struct stv090x_state *state, s32 timeout)
  2707. {
  2708. s32 timer = 0, lock = 0, stat;
  2709. u32 reg;
  2710. while ((timer < timeout) && (!lock)) {
  2711. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  2712. stat = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
  2713. switch (stat) {
  2714. case 0: /* searching */
  2715. case 1: /* first PLH detected */
  2716. default:
  2717. lock = 0;
  2718. break;
  2719. case 2: /* DVB-S2 mode */
  2720. reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
  2721. lock = STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD);
  2722. break;
  2723. case 3: /* DVB-S1/legacy mode */
  2724. reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
  2725. lock = STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD);
  2726. break;
  2727. }
  2728. if (!lock) {
  2729. msleep(10);
  2730. timer += 10;
  2731. }
  2732. }
  2733. return lock;
  2734. }
  2735. static int stv090x_get_lock(struct stv090x_state *state, s32 timeout_dmd, s32 timeout_fec)
  2736. {
  2737. u32 reg;
  2738. s32 timer = 0;
  2739. int lock;
  2740. lock = stv090x_get_dmdlock(state, timeout_dmd);
  2741. if (lock)
  2742. lock = stv090x_get_feclock(state, timeout_fec);
  2743. if (lock) {
  2744. lock = 0;
  2745. while ((timer < timeout_fec) && (!lock)) {
  2746. reg = STV090x_READ_DEMOD(state, TSSTATUS);
  2747. lock = STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD);
  2748. msleep(1);
  2749. timer++;
  2750. }
  2751. }
  2752. return lock;
  2753. }
  2754. static int stv090x_set_s2rolloff(struct stv090x_state *state)
  2755. {
  2756. u32 reg;
  2757. if (state->internal->dev_ver <= 0x20) {
  2758. /* rolloff to auto mode if DVBS2 */
  2759. reg = STV090x_READ_DEMOD(state, DEMOD);
  2760. STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 0x00);
  2761. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2762. goto err;
  2763. } else {
  2764. /* DVB-S2 rolloff to auto mode if DVBS2 */
  2765. reg = STV090x_READ_DEMOD(state, DEMOD);
  2766. STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 0x00);
  2767. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2768. goto err;
  2769. }
  2770. return 0;
  2771. err:
  2772. dprintk(FE_ERROR, 1, "I/O error");
  2773. return -1;
  2774. }
  2775. static enum stv090x_signal_state stv090x_algo(struct stv090x_state *state)
  2776. {
  2777. struct dvb_frontend *fe = &state->frontend;
  2778. enum stv090x_signal_state signal_state = STV090x_NOCARRIER;
  2779. u32 reg;
  2780. s32 agc1_power, power_iq = 0, i;
  2781. int lock = 0, low_sr = 0;
  2782. reg = STV090x_READ_DEMOD(state, TSCFGH);
  2783. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* Stop path 1 stream merger */
  2784. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2785. goto err;
  2786. if (STV090x_WRITE_DEMOD(state, DMDISTATE, 0x5c) < 0) /* Demod stop */
  2787. goto err;
  2788. if (state->internal->dev_ver >= 0x20) {
  2789. if (state->srate > 5000000) {
  2790. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x9e) < 0)
  2791. goto err;
  2792. } else {
  2793. if (STV090x_WRITE_DEMOD(state, CORRELABS, 0x82) < 0)
  2794. goto err;
  2795. }
  2796. }
  2797. stv090x_get_lock_tmg(state);
  2798. if (state->algo == STV090x_BLIND_SEARCH) {
  2799. state->tuner_bw = 2 * 36000000; /* wide bw for unknown srate */
  2800. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc0) < 0) /* wider srate scan */
  2801. goto err;
  2802. if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
  2803. goto err;
  2804. if (stv090x_set_srate(state, 1000000) < 0) /* initial srate = 1Msps */
  2805. goto err;
  2806. } else {
  2807. /* known srate */
  2808. if (STV090x_WRITE_DEMOD(state, DMDTOM, 0x20) < 0)
  2809. goto err;
  2810. if (STV090x_WRITE_DEMOD(state, TMGCFG, 0xd2) < 0)
  2811. goto err;
  2812. if (state->srate < 2000000) {
  2813. /* SR < 2MSPS */
  2814. if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x63) < 0)
  2815. goto err;
  2816. } else {
  2817. /* SR >= 2Msps */
  2818. if (STV090x_WRITE_DEMOD(state, CORRELMANT, 0x70) < 0)
  2819. goto err;
  2820. }
  2821. if (STV090x_WRITE_DEMOD(state, AGC2REF, 0x38) < 0)
  2822. goto err;
  2823. if (state->internal->dev_ver >= 0x20) {
  2824. if (STV090x_WRITE_DEMOD(state, KREFTMG, 0x5a) < 0)
  2825. goto err;
  2826. if (state->algo == STV090x_COLD_SEARCH)
  2827. state->tuner_bw = (15 * (stv090x_car_width(state->srate, state->rolloff) + 10000000)) / 10;
  2828. else if (state->algo == STV090x_WARM_SEARCH)
  2829. state->tuner_bw = stv090x_car_width(state->srate, state->rolloff) + 10000000;
  2830. }
  2831. /* if cold start or warm (Symbolrate is known)
  2832. * use a Narrow symbol rate scan range
  2833. */
  2834. if (STV090x_WRITE_DEMOD(state, TMGCFG2, 0xc1) < 0) /* narrow srate scan */
  2835. goto err;
  2836. if (stv090x_set_srate(state, state->srate) < 0)
  2837. goto err;
  2838. if (stv090x_set_max_srate(state, state->internal->mclk,
  2839. state->srate) < 0)
  2840. goto err;
  2841. if (stv090x_set_min_srate(state, state->internal->mclk,
  2842. state->srate) < 0)
  2843. goto err;
  2844. if (state->srate >= 10000000)
  2845. low_sr = 0;
  2846. else
  2847. low_sr = 1;
  2848. }
  2849. /* Setup tuner */
  2850. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2851. goto err;
  2852. if (state->config->tuner_set_bbgain) {
  2853. reg = state->config->tuner_bbgain;
  2854. if (reg == 0)
  2855. reg = 10; /* default: 10dB */
  2856. if (state->config->tuner_set_bbgain(fe, reg) < 0)
  2857. goto err_gateoff;
  2858. }
  2859. if (state->config->tuner_set_frequency) {
  2860. if (state->config->tuner_set_frequency(fe, state->frequency) < 0)
  2861. goto err_gateoff;
  2862. }
  2863. if (state->config->tuner_set_bandwidth) {
  2864. if (state->config->tuner_set_bandwidth(fe, state->tuner_bw) < 0)
  2865. goto err_gateoff;
  2866. }
  2867. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2868. goto err;
  2869. msleep(50);
  2870. if (state->config->tuner_get_status) {
  2871. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  2872. goto err;
  2873. if (state->config->tuner_get_status(fe, &reg) < 0)
  2874. goto err_gateoff;
  2875. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  2876. goto err;
  2877. if (reg)
  2878. dprintk(FE_DEBUG, 1, "Tuner phase locked");
  2879. else {
  2880. dprintk(FE_DEBUG, 1, "Tuner unlocked");
  2881. return STV090x_NOCARRIER;
  2882. }
  2883. }
  2884. msleep(10);
  2885. agc1_power = MAKEWORD16(STV090x_READ_DEMOD(state, AGCIQIN1),
  2886. STV090x_READ_DEMOD(state, AGCIQIN0));
  2887. if (agc1_power == 0) {
  2888. /* If AGC1 integrator value is 0
  2889. * then read POWERI, POWERQ
  2890. */
  2891. for (i = 0; i < 5; i++) {
  2892. power_iq += (STV090x_READ_DEMOD(state, POWERI) +
  2893. STV090x_READ_DEMOD(state, POWERQ)) >> 1;
  2894. }
  2895. power_iq /= 5;
  2896. }
  2897. if ((agc1_power == 0) && (power_iq < STV090x_IQPOWER_THRESHOLD)) {
  2898. dprintk(FE_ERROR, 1, "No Signal: POWER_IQ=0x%02x", power_iq);
  2899. lock = 0;
  2900. signal_state = STV090x_NOAGC1;
  2901. } else {
  2902. reg = STV090x_READ_DEMOD(state, DEMOD);
  2903. STV090x_SETFIELD_Px(reg, SPECINV_CONTROL_FIELD, state->inversion);
  2904. if (state->internal->dev_ver <= 0x20) {
  2905. /* rolloff to auto mode if DVBS2 */
  2906. STV090x_SETFIELD_Px(reg, MANUAL_SXROLLOFF_FIELD, 1);
  2907. } else {
  2908. /* DVB-S2 rolloff to auto mode if DVBS2 */
  2909. STV090x_SETFIELD_Px(reg, MANUAL_S2ROLLOFF_FIELD, 1);
  2910. }
  2911. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  2912. goto err;
  2913. if (stv090x_delivery_search(state) < 0)
  2914. goto err;
  2915. if (state->algo != STV090x_BLIND_SEARCH) {
  2916. if (stv090x_start_search(state) < 0)
  2917. goto err;
  2918. }
  2919. }
  2920. if (signal_state == STV090x_NOAGC1)
  2921. return signal_state;
  2922. if (state->algo == STV090x_BLIND_SEARCH)
  2923. lock = stv090x_blind_search(state);
  2924. else if (state->algo == STV090x_COLD_SEARCH)
  2925. lock = stv090x_get_coldlock(state, state->DemodTimeout);
  2926. else if (state->algo == STV090x_WARM_SEARCH)
  2927. lock = stv090x_get_dmdlock(state, state->DemodTimeout);
  2928. if ((!lock) && (state->algo == STV090x_COLD_SEARCH)) {
  2929. if (!low_sr) {
  2930. if (stv090x_chk_tmg(state))
  2931. lock = stv090x_sw_algo(state);
  2932. }
  2933. }
  2934. if (lock)
  2935. signal_state = stv090x_get_sig_params(state);
  2936. if ((lock) && (signal_state == STV090x_RANGEOK)) { /* signal within Range */
  2937. stv090x_optimize_track(state);
  2938. if (state->internal->dev_ver >= 0x20) {
  2939. /* >= Cut 2.0 :release TS reset after
  2940. * demod lock and optimized Tracking
  2941. */
  2942. reg = STV090x_READ_DEMOD(state, TSCFGH);
  2943. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
  2944. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2945. goto err;
  2946. msleep(3);
  2947. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 1); /* merger reset */
  2948. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2949. goto err;
  2950. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0); /* release merger reset */
  2951. if (STV090x_WRITE_DEMOD(state, TSCFGH, reg) < 0)
  2952. goto err;
  2953. }
  2954. lock = stv090x_get_lock(state, state->FecTimeout,
  2955. state->FecTimeout);
  2956. if (lock) {
  2957. if (state->delsys == STV090x_DVBS2) {
  2958. stv090x_set_s2rolloff(state);
  2959. reg = STV090x_READ_DEMOD(state, PDELCTRL2);
  2960. STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 1);
  2961. if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
  2962. goto err;
  2963. /* Reset DVBS2 packet delinator error counter */
  2964. reg = STV090x_READ_DEMOD(state, PDELCTRL2);
  2965. STV090x_SETFIELD_Px(reg, RESET_UPKO_COUNT, 0);
  2966. if (STV090x_WRITE_DEMOD(state, PDELCTRL2, reg) < 0)
  2967. goto err;
  2968. if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x67) < 0) /* PER */
  2969. goto err;
  2970. } else {
  2971. if (STV090x_WRITE_DEMOD(state, ERRCTRL1, 0x75) < 0)
  2972. goto err;
  2973. }
  2974. /* Reset the Total packet counter */
  2975. if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0x00) < 0)
  2976. goto err;
  2977. /* Reset the packet Error counter2 */
  2978. if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
  2979. goto err;
  2980. } else {
  2981. signal_state = STV090x_NODATA;
  2982. stv090x_chk_signal(state);
  2983. }
  2984. }
  2985. return signal_state;
  2986. err_gateoff:
  2987. stv090x_i2c_gate_ctrl(state, 0);
  2988. err:
  2989. dprintk(FE_ERROR, 1, "I/O error");
  2990. return -1;
  2991. }
  2992. static int stv090x_set_pls(struct stv090x_state *state, u32 pls_code)
  2993. {
  2994. dprintk(FE_DEBUG, 1, "Set Gold PLS code %d", pls_code);
  2995. if (STV090x_WRITE_DEMOD(state, PLROOT0, pls_code & 0xff) < 0)
  2996. goto err;
  2997. if (STV090x_WRITE_DEMOD(state, PLROOT1, (pls_code >> 8) & 0xff) < 0)
  2998. goto err;
  2999. if (STV090x_WRITE_DEMOD(state, PLROOT2, 0x04 | (pls_code >> 16)) < 0)
  3000. goto err;
  3001. return 0;
  3002. err:
  3003. dprintk(FE_ERROR, 1, "I/O error");
  3004. return -1;
  3005. }
  3006. static int stv090x_set_mis(struct stv090x_state *state, int mis)
  3007. {
  3008. u32 reg;
  3009. if (mis < 0 || mis > 255) {
  3010. dprintk(FE_DEBUG, 1, "Disable MIS filtering");
  3011. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  3012. STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x00);
  3013. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  3014. goto err;
  3015. } else {
  3016. dprintk(FE_DEBUG, 1, "Enable MIS filtering - %d", mis);
  3017. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  3018. STV090x_SETFIELD_Px(reg, FILTER_EN_FIELD, 0x01);
  3019. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  3020. goto err;
  3021. if (STV090x_WRITE_DEMOD(state, ISIENTRY, mis) < 0)
  3022. goto err;
  3023. if (STV090x_WRITE_DEMOD(state, ISIBITENA, 0xff) < 0)
  3024. goto err;
  3025. }
  3026. return 0;
  3027. err:
  3028. dprintk(FE_ERROR, 1, "I/O error");
  3029. return -1;
  3030. }
  3031. static enum dvbfe_search stv090x_search(struct dvb_frontend *fe)
  3032. {
  3033. struct stv090x_state *state = fe->demodulator_priv;
  3034. struct dtv_frontend_properties *props = &fe->dtv_property_cache;
  3035. if (props->frequency == 0)
  3036. return DVBFE_ALGO_SEARCH_INVALID;
  3037. switch (props->delivery_system) {
  3038. case SYS_DSS:
  3039. state->delsys = STV090x_DSS;
  3040. break;
  3041. case SYS_DVBS:
  3042. state->delsys = STV090x_DVBS1;
  3043. break;
  3044. case SYS_DVBS2:
  3045. state->delsys = STV090x_DVBS2;
  3046. break;
  3047. default:
  3048. return DVBFE_ALGO_SEARCH_INVALID;
  3049. }
  3050. state->frequency = props->frequency;
  3051. state->srate = props->symbol_rate;
  3052. state->search_mode = STV090x_SEARCH_AUTO;
  3053. state->algo = STV090x_COLD_SEARCH;
  3054. state->fec = STV090x_PRERR;
  3055. if (state->srate > 10000000) {
  3056. dprintk(FE_DEBUG, 1, "Search range: 10 MHz");
  3057. state->search_range = 10000000;
  3058. } else {
  3059. dprintk(FE_DEBUG, 1, "Search range: 5 MHz");
  3060. state->search_range = 5000000;
  3061. }
  3062. stv090x_set_pls(state, props->scrambling_sequence_index);
  3063. stv090x_set_mis(state, props->stream_id);
  3064. if (stv090x_algo(state) == STV090x_RANGEOK) {
  3065. dprintk(FE_DEBUG, 1, "Search success!");
  3066. return DVBFE_ALGO_SEARCH_SUCCESS;
  3067. } else {
  3068. dprintk(FE_DEBUG, 1, "Search failed!");
  3069. return DVBFE_ALGO_SEARCH_FAILED;
  3070. }
  3071. return DVBFE_ALGO_SEARCH_ERROR;
  3072. }
  3073. static int stv090x_read_status(struct dvb_frontend *fe, enum fe_status *status)
  3074. {
  3075. struct stv090x_state *state = fe->demodulator_priv;
  3076. u32 reg, dstatus;
  3077. u8 search_state;
  3078. *status = 0;
  3079. dstatus = STV090x_READ_DEMOD(state, DSTATUS);
  3080. if (STV090x_GETFIELD_Px(dstatus, CAR_LOCK_FIELD))
  3081. *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
  3082. reg = STV090x_READ_DEMOD(state, DMDSTATE);
  3083. search_state = STV090x_GETFIELD_Px(reg, HEADER_MODE_FIELD);
  3084. switch (search_state) {
  3085. case 0: /* searching */
  3086. case 1: /* first PLH detected */
  3087. default:
  3088. dprintk(FE_DEBUG, 1, "Status: Unlocked (Searching ..)");
  3089. break;
  3090. case 2: /* DVB-S2 mode */
  3091. dprintk(FE_DEBUG, 1, "Delivery system: DVB-S2");
  3092. if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
  3093. reg = STV090x_READ_DEMOD(state, PDELSTATUS1);
  3094. if (STV090x_GETFIELD_Px(reg, PKTDELIN_LOCK_FIELD)) {
  3095. *status |= FE_HAS_VITERBI;
  3096. reg = STV090x_READ_DEMOD(state, TSSTATUS);
  3097. if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
  3098. *status |= FE_HAS_SYNC | FE_HAS_LOCK;
  3099. }
  3100. }
  3101. break;
  3102. case 3: /* DVB-S1/legacy mode */
  3103. dprintk(FE_DEBUG, 1, "Delivery system: DVB-S");
  3104. if (STV090x_GETFIELD_Px(dstatus, LOCK_DEFINITIF_FIELD)) {
  3105. reg = STV090x_READ_DEMOD(state, VSTATUSVIT);
  3106. if (STV090x_GETFIELD_Px(reg, LOCKEDVIT_FIELD)) {
  3107. *status |= FE_HAS_VITERBI;
  3108. reg = STV090x_READ_DEMOD(state, TSSTATUS);
  3109. if (STV090x_GETFIELD_Px(reg, TSFIFO_LINEOK_FIELD))
  3110. *status |= FE_HAS_SYNC | FE_HAS_LOCK;
  3111. }
  3112. }
  3113. break;
  3114. }
  3115. return 0;
  3116. }
  3117. static int stv090x_read_per(struct dvb_frontend *fe, u32 *per)
  3118. {
  3119. struct stv090x_state *state = fe->demodulator_priv;
  3120. s32 count_4, count_3, count_2, count_1, count_0, count;
  3121. u32 reg, h, m, l;
  3122. enum fe_status status;
  3123. stv090x_read_status(fe, &status);
  3124. if (!(status & FE_HAS_LOCK)) {
  3125. *per = 1 << 23; /* Max PER */
  3126. } else {
  3127. /* Counter 2 */
  3128. reg = STV090x_READ_DEMOD(state, ERRCNT22);
  3129. h = STV090x_GETFIELD_Px(reg, ERR_CNT2_FIELD);
  3130. reg = STV090x_READ_DEMOD(state, ERRCNT21);
  3131. m = STV090x_GETFIELD_Px(reg, ERR_CNT21_FIELD);
  3132. reg = STV090x_READ_DEMOD(state, ERRCNT20);
  3133. l = STV090x_GETFIELD_Px(reg, ERR_CNT20_FIELD);
  3134. *per = ((h << 16) | (m << 8) | l);
  3135. count_4 = STV090x_READ_DEMOD(state, FBERCPT4);
  3136. count_3 = STV090x_READ_DEMOD(state, FBERCPT3);
  3137. count_2 = STV090x_READ_DEMOD(state, FBERCPT2);
  3138. count_1 = STV090x_READ_DEMOD(state, FBERCPT1);
  3139. count_0 = STV090x_READ_DEMOD(state, FBERCPT0);
  3140. if ((!count_4) && (!count_3)) {
  3141. count = (count_2 & 0xff) << 16;
  3142. count |= (count_1 & 0xff) << 8;
  3143. count |= count_0 & 0xff;
  3144. } else {
  3145. count = 1 << 24;
  3146. }
  3147. if (count == 0)
  3148. *per = 1;
  3149. }
  3150. if (STV090x_WRITE_DEMOD(state, FBERCPT4, 0) < 0)
  3151. goto err;
  3152. if (STV090x_WRITE_DEMOD(state, ERRCTRL2, 0xc1) < 0)
  3153. goto err;
  3154. return 0;
  3155. err:
  3156. dprintk(FE_ERROR, 1, "I/O error");
  3157. return -1;
  3158. }
  3159. static int stv090x_table_lookup(const struct stv090x_tab *tab, int max, int val)
  3160. {
  3161. int res = 0;
  3162. int min = 0, med;
  3163. if ((val >= tab[min].read && val < tab[max].read) ||
  3164. (val >= tab[max].read && val < tab[min].read)) {
  3165. while ((max - min) > 1) {
  3166. med = (max + min) / 2;
  3167. if ((val >= tab[min].read && val < tab[med].read) ||
  3168. (val >= tab[med].read && val < tab[min].read))
  3169. max = med;
  3170. else
  3171. min = med;
  3172. }
  3173. res = ((val - tab[min].read) *
  3174. (tab[max].real - tab[min].real) /
  3175. (tab[max].read - tab[min].read)) +
  3176. tab[min].real;
  3177. } else {
  3178. if (tab[min].read < tab[max].read) {
  3179. if (val < tab[min].read)
  3180. res = tab[min].real;
  3181. else if (val >= tab[max].read)
  3182. res = tab[max].real;
  3183. } else {
  3184. if (val >= tab[min].read)
  3185. res = tab[min].real;
  3186. else if (val < tab[max].read)
  3187. res = tab[max].real;
  3188. }
  3189. }
  3190. return res;
  3191. }
  3192. static int stv090x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  3193. {
  3194. struct stv090x_state *state = fe->demodulator_priv;
  3195. u32 reg;
  3196. s32 agc_0, agc_1, agc;
  3197. s32 str;
  3198. reg = STV090x_READ_DEMOD(state, AGCIQIN1);
  3199. agc_1 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
  3200. reg = STV090x_READ_DEMOD(state, AGCIQIN0);
  3201. agc_0 = STV090x_GETFIELD_Px(reg, AGCIQ_VALUE_FIELD);
  3202. agc = MAKEWORD16(agc_1, agc_0);
  3203. str = stv090x_table_lookup(stv090x_rf_tab,
  3204. ARRAY_SIZE(stv090x_rf_tab) - 1, agc);
  3205. if (agc > stv090x_rf_tab[0].read)
  3206. str = 0;
  3207. else if (agc < stv090x_rf_tab[ARRAY_SIZE(stv090x_rf_tab) - 1].read)
  3208. str = -100;
  3209. *strength = (str + 100) * 0xFFFF / 100;
  3210. return 0;
  3211. }
  3212. static int stv090x_read_cnr(struct dvb_frontend *fe, u16 *cnr)
  3213. {
  3214. struct stv090x_state *state = fe->demodulator_priv;
  3215. u32 reg_0, reg_1, reg, i;
  3216. s32 val_0, val_1, val = 0;
  3217. u8 lock_f;
  3218. s32 div;
  3219. u32 last;
  3220. switch (state->delsys) {
  3221. case STV090x_DVBS2:
  3222. reg = STV090x_READ_DEMOD(state, DSTATUS);
  3223. lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
  3224. if (lock_f) {
  3225. msleep(5);
  3226. for (i = 0; i < 16; i++) {
  3227. reg_1 = STV090x_READ_DEMOD(state, NNOSPLHT1);
  3228. val_1 = STV090x_GETFIELD_Px(reg_1, NOSPLHT_NORMED_FIELD);
  3229. reg_0 = STV090x_READ_DEMOD(state, NNOSPLHT0);
  3230. val_0 = STV090x_GETFIELD_Px(reg_0, NOSPLHT_NORMED_FIELD);
  3231. val += MAKEWORD16(val_1, val_0);
  3232. msleep(1);
  3233. }
  3234. val /= 16;
  3235. last = ARRAY_SIZE(stv090x_s2cn_tab) - 1;
  3236. div = stv090x_s2cn_tab[last].real -
  3237. stv090x_s2cn_tab[3].real;
  3238. val = stv090x_table_lookup(stv090x_s2cn_tab, last, val);
  3239. if (val < 0)
  3240. val = 0;
  3241. *cnr = val * 0xFFFF / div;
  3242. }
  3243. break;
  3244. case STV090x_DVBS1:
  3245. case STV090x_DSS:
  3246. reg = STV090x_READ_DEMOD(state, DSTATUS);
  3247. lock_f = STV090x_GETFIELD_Px(reg, LOCK_DEFINITIF_FIELD);
  3248. if (lock_f) {
  3249. msleep(5);
  3250. for (i = 0; i < 16; i++) {
  3251. reg_1 = STV090x_READ_DEMOD(state, NOSDATAT1);
  3252. val_1 = STV090x_GETFIELD_Px(reg_1, NOSDATAT_UNNORMED_FIELD);
  3253. reg_0 = STV090x_READ_DEMOD(state, NOSDATAT0);
  3254. val_0 = STV090x_GETFIELD_Px(reg_0, NOSDATAT_UNNORMED_FIELD);
  3255. val += MAKEWORD16(val_1, val_0);
  3256. msleep(1);
  3257. }
  3258. val /= 16;
  3259. last = ARRAY_SIZE(stv090x_s1cn_tab) - 1;
  3260. div = stv090x_s1cn_tab[last].real -
  3261. stv090x_s1cn_tab[0].real;
  3262. val = stv090x_table_lookup(stv090x_s1cn_tab, last, val);
  3263. *cnr = val * 0xFFFF / div;
  3264. }
  3265. break;
  3266. default:
  3267. break;
  3268. }
  3269. return 0;
  3270. }
  3271. static int stv090x_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
  3272. {
  3273. struct stv090x_state *state = fe->demodulator_priv;
  3274. u32 reg;
  3275. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3276. switch (tone) {
  3277. case SEC_TONE_ON:
  3278. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
  3279. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3280. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3281. goto err;
  3282. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
  3283. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3284. goto err;
  3285. break;
  3286. case SEC_TONE_OFF:
  3287. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, 0);
  3288. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3289. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3290. goto err;
  3291. break;
  3292. default:
  3293. return -EINVAL;
  3294. }
  3295. return 0;
  3296. err:
  3297. dprintk(FE_ERROR, 1, "I/O error");
  3298. return -1;
  3299. }
  3300. static enum dvbfe_algo stv090x_frontend_algo(struct dvb_frontend *fe)
  3301. {
  3302. return DVBFE_ALGO_CUSTOM;
  3303. }
  3304. static int stv090x_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
  3305. {
  3306. struct stv090x_state *state = fe->demodulator_priv;
  3307. u32 reg, idle = 0, fifo_full = 1;
  3308. int i;
  3309. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3310. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD,
  3311. (state->config->diseqc_envelope_mode) ? 4 : 2);
  3312. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3313. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3314. goto err;
  3315. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
  3316. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3317. goto err;
  3318. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
  3319. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3320. goto err;
  3321. for (i = 0; i < cmd->msg_len; i++) {
  3322. while (fifo_full) {
  3323. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3324. fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
  3325. }
  3326. if (STV090x_WRITE_DEMOD(state, DISTXDATA, cmd->msg[i]) < 0)
  3327. goto err;
  3328. }
  3329. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3330. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
  3331. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3332. goto err;
  3333. i = 0;
  3334. while ((!idle) && (i < 10)) {
  3335. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3336. idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
  3337. msleep(10);
  3338. i++;
  3339. }
  3340. return 0;
  3341. err:
  3342. dprintk(FE_ERROR, 1, "I/O error");
  3343. return -1;
  3344. }
  3345. static int stv090x_send_diseqc_burst(struct dvb_frontend *fe,
  3346. enum fe_sec_mini_cmd burst)
  3347. {
  3348. struct stv090x_state *state = fe->demodulator_priv;
  3349. u32 reg, idle = 0, fifo_full = 1;
  3350. u8 mode, value;
  3351. int i;
  3352. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3353. if (burst == SEC_MINI_A) {
  3354. mode = (state->config->diseqc_envelope_mode) ? 5 : 3;
  3355. value = 0x00;
  3356. } else {
  3357. mode = (state->config->diseqc_envelope_mode) ? 4 : 2;
  3358. value = 0xFF;
  3359. }
  3360. STV090x_SETFIELD_Px(reg, DISTX_MODE_FIELD, mode);
  3361. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 1);
  3362. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3363. goto err;
  3364. STV090x_SETFIELD_Px(reg, DISEQC_RESET_FIELD, 0);
  3365. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3366. goto err;
  3367. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 1);
  3368. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3369. goto err;
  3370. while (fifo_full) {
  3371. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3372. fifo_full = STV090x_GETFIELD_Px(reg, FIFO_FULL_FIELD);
  3373. }
  3374. if (STV090x_WRITE_DEMOD(state, DISTXDATA, value) < 0)
  3375. goto err;
  3376. reg = STV090x_READ_DEMOD(state, DISTXCTL);
  3377. STV090x_SETFIELD_Px(reg, DIS_PRECHARGE_FIELD, 0);
  3378. if (STV090x_WRITE_DEMOD(state, DISTXCTL, reg) < 0)
  3379. goto err;
  3380. i = 0;
  3381. while ((!idle) && (i < 10)) {
  3382. reg = STV090x_READ_DEMOD(state, DISTXSTATUS);
  3383. idle = STV090x_GETFIELD_Px(reg, TX_IDLE_FIELD);
  3384. msleep(10);
  3385. i++;
  3386. }
  3387. return 0;
  3388. err:
  3389. dprintk(FE_ERROR, 1, "I/O error");
  3390. return -1;
  3391. }
  3392. static int stv090x_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
  3393. {
  3394. struct stv090x_state *state = fe->demodulator_priv;
  3395. u32 reg = 0, i = 0, rx_end = 0;
  3396. while ((rx_end != 1) && (i < 10)) {
  3397. msleep(10);
  3398. i++;
  3399. reg = STV090x_READ_DEMOD(state, DISRX_ST0);
  3400. rx_end = STV090x_GETFIELD_Px(reg, RX_END_FIELD);
  3401. }
  3402. if (rx_end) {
  3403. reply->msg_len = STV090x_GETFIELD_Px(reg, FIFO_BYTENBR_FIELD);
  3404. for (i = 0; i < reply->msg_len; i++)
  3405. reply->msg[i] = STV090x_READ_DEMOD(state, DISRXDATA);
  3406. }
  3407. return 0;
  3408. }
  3409. static int stv090x_sleep(struct dvb_frontend *fe)
  3410. {
  3411. struct stv090x_state *state = fe->demodulator_priv;
  3412. u32 reg;
  3413. u8 full_standby = 0;
  3414. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  3415. goto err;
  3416. if (state->config->tuner_sleep) {
  3417. if (state->config->tuner_sleep(fe) < 0)
  3418. goto err_gateoff;
  3419. }
  3420. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  3421. goto err;
  3422. dprintk(FE_DEBUG, 1, "Set %s(%d) to sleep",
  3423. state->device == STV0900 ? "STV0900" : "STV0903",
  3424. state->demod);
  3425. mutex_lock(&state->internal->demod_lock);
  3426. switch (state->demod) {
  3427. case STV090x_DEMODULATOR_0:
  3428. /* power off ADC 1 */
  3429. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  3430. STV090x_SETFIELD(reg, ADC1_PON_FIELD, 0);
  3431. if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
  3432. goto err_unlock;
  3433. /* power off DiSEqC 1 */
  3434. reg = stv090x_read_reg(state, STV090x_TSTTNR2);
  3435. STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 0);
  3436. if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
  3437. goto err_unlock;
  3438. /* check whether path 2 is already sleeping, that is when
  3439. ADC2 is off */
  3440. reg = stv090x_read_reg(state, STV090x_TSTTNR3);
  3441. if (STV090x_GETFIELD(reg, ADC2_PON_FIELD) == 0)
  3442. full_standby = 1;
  3443. /* stop clocks */
  3444. reg = stv090x_read_reg(state, STV090x_STOPCLK1);
  3445. /* packet delineator 1 clock */
  3446. STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 1);
  3447. /* ADC 1 clock */
  3448. STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 1);
  3449. /* FEC clock is shared between the two paths, only stop it
  3450. when full standby is possible */
  3451. if (full_standby)
  3452. STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
  3453. if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
  3454. goto err_unlock;
  3455. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  3456. /* sampling 1 clock */
  3457. STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 1);
  3458. /* viterbi 1 clock */
  3459. STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 1);
  3460. /* TS clock is shared between the two paths, only stop it
  3461. when full standby is possible */
  3462. if (full_standby)
  3463. STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
  3464. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  3465. goto err_unlock;
  3466. break;
  3467. case STV090x_DEMODULATOR_1:
  3468. /* power off ADC 2 */
  3469. reg = stv090x_read_reg(state, STV090x_TSTTNR3);
  3470. STV090x_SETFIELD(reg, ADC2_PON_FIELD, 0);
  3471. if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
  3472. goto err_unlock;
  3473. /* power off DiSEqC 2 */
  3474. reg = stv090x_read_reg(state, STV090x_TSTTNR4);
  3475. STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 0);
  3476. if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
  3477. goto err_unlock;
  3478. /* check whether path 1 is already sleeping, that is when
  3479. ADC1 is off */
  3480. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  3481. if (STV090x_GETFIELD(reg, ADC1_PON_FIELD) == 0)
  3482. full_standby = 1;
  3483. /* stop clocks */
  3484. reg = stv090x_read_reg(state, STV090x_STOPCLK1);
  3485. /* packet delineator 2 clock */
  3486. STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 1);
  3487. /* ADC 2 clock */
  3488. STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 1);
  3489. /* FEC clock is shared between the two paths, only stop it
  3490. when full standby is possible */
  3491. if (full_standby)
  3492. STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 1);
  3493. if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
  3494. goto err_unlock;
  3495. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  3496. /* sampling 2 clock */
  3497. STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 1);
  3498. /* viterbi 2 clock */
  3499. STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 1);
  3500. /* TS clock is shared between the two paths, only stop it
  3501. when full standby is possible */
  3502. if (full_standby)
  3503. STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 1);
  3504. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  3505. goto err_unlock;
  3506. break;
  3507. default:
  3508. dprintk(FE_ERROR, 1, "Wrong demodulator!");
  3509. break;
  3510. }
  3511. if (full_standby) {
  3512. /* general power off */
  3513. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3514. STV090x_SETFIELD(reg, STANDBY_FIELD, 0x01);
  3515. if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
  3516. goto err_unlock;
  3517. }
  3518. mutex_unlock(&state->internal->demod_lock);
  3519. return 0;
  3520. err_gateoff:
  3521. stv090x_i2c_gate_ctrl(state, 0);
  3522. goto err;
  3523. err_unlock:
  3524. mutex_unlock(&state->internal->demod_lock);
  3525. err:
  3526. dprintk(FE_ERROR, 1, "I/O error");
  3527. return -1;
  3528. }
  3529. static int stv090x_wakeup(struct dvb_frontend *fe)
  3530. {
  3531. struct stv090x_state *state = fe->demodulator_priv;
  3532. u32 reg;
  3533. dprintk(FE_DEBUG, 1, "Wake %s(%d) from standby",
  3534. state->device == STV0900 ? "STV0900" : "STV0903",
  3535. state->demod);
  3536. mutex_lock(&state->internal->demod_lock);
  3537. /* general power on */
  3538. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3539. STV090x_SETFIELD(reg, STANDBY_FIELD, 0x00);
  3540. if (stv090x_write_reg(state, STV090x_SYNTCTRL, reg) < 0)
  3541. goto err;
  3542. switch (state->demod) {
  3543. case STV090x_DEMODULATOR_0:
  3544. /* power on ADC 1 */
  3545. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  3546. STV090x_SETFIELD(reg, ADC1_PON_FIELD, 1);
  3547. if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
  3548. goto err;
  3549. /* power on DiSEqC 1 */
  3550. reg = stv090x_read_reg(state, STV090x_TSTTNR2);
  3551. STV090x_SETFIELD(reg, DISEQC1_PON_FIELD, 1);
  3552. if (stv090x_write_reg(state, STV090x_TSTTNR2, reg) < 0)
  3553. goto err;
  3554. /* activate clocks */
  3555. reg = stv090x_read_reg(state, STV090x_STOPCLK1);
  3556. /* packet delineator 1 clock */
  3557. STV090x_SETFIELD(reg, STOP_CLKPKDT1_FIELD, 0);
  3558. /* ADC 1 clock */
  3559. STV090x_SETFIELD(reg, STOP_CLKADCI1_FIELD, 0);
  3560. /* FEC clock */
  3561. STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
  3562. if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
  3563. goto err;
  3564. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  3565. /* sampling 1 clock */
  3566. STV090x_SETFIELD(reg, STOP_CLKSAMP1_FIELD, 0);
  3567. /* viterbi 1 clock */
  3568. STV090x_SETFIELD(reg, STOP_CLKVIT1_FIELD, 0);
  3569. /* TS clock */
  3570. STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
  3571. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  3572. goto err;
  3573. break;
  3574. case STV090x_DEMODULATOR_1:
  3575. /* power on ADC 2 */
  3576. reg = stv090x_read_reg(state, STV090x_TSTTNR3);
  3577. STV090x_SETFIELD(reg, ADC2_PON_FIELD, 1);
  3578. if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
  3579. goto err;
  3580. /* power on DiSEqC 2 */
  3581. reg = stv090x_read_reg(state, STV090x_TSTTNR4);
  3582. STV090x_SETFIELD(reg, DISEQC2_PON_FIELD, 1);
  3583. if (stv090x_write_reg(state, STV090x_TSTTNR4, reg) < 0)
  3584. goto err;
  3585. /* activate clocks */
  3586. reg = stv090x_read_reg(state, STV090x_STOPCLK1);
  3587. /* packet delineator 2 clock */
  3588. STV090x_SETFIELD(reg, STOP_CLKPKDT2_FIELD, 0);
  3589. /* ADC 2 clock */
  3590. STV090x_SETFIELD(reg, STOP_CLKADCI2_FIELD, 0);
  3591. /* FEC clock */
  3592. STV090x_SETFIELD(reg, STOP_CLKFEC_FIELD, 0);
  3593. if (stv090x_write_reg(state, STV090x_STOPCLK1, reg) < 0)
  3594. goto err;
  3595. reg = stv090x_read_reg(state, STV090x_STOPCLK2);
  3596. /* sampling 2 clock */
  3597. STV090x_SETFIELD(reg, STOP_CLKSAMP2_FIELD, 0);
  3598. /* viterbi 2 clock */
  3599. STV090x_SETFIELD(reg, STOP_CLKVIT2_FIELD, 0);
  3600. /* TS clock */
  3601. STV090x_SETFIELD(reg, STOP_CLKTS_FIELD, 0);
  3602. if (stv090x_write_reg(state, STV090x_STOPCLK2, reg) < 0)
  3603. goto err;
  3604. break;
  3605. default:
  3606. dprintk(FE_ERROR, 1, "Wrong demodulator!");
  3607. break;
  3608. }
  3609. mutex_unlock(&state->internal->demod_lock);
  3610. return 0;
  3611. err:
  3612. mutex_unlock(&state->internal->demod_lock);
  3613. dprintk(FE_ERROR, 1, "I/O error");
  3614. return -1;
  3615. }
  3616. static void stv090x_release(struct dvb_frontend *fe)
  3617. {
  3618. struct stv090x_state *state = fe->demodulator_priv;
  3619. state->internal->num_used--;
  3620. if (state->internal->num_used <= 0) {
  3621. dprintk(FE_ERROR, 1, "Actually removing");
  3622. remove_dev(state->internal);
  3623. kfree(state->internal);
  3624. }
  3625. kfree(state);
  3626. }
  3627. static int stv090x_ldpc_mode(struct stv090x_state *state, enum stv090x_mode ldpc_mode)
  3628. {
  3629. u32 reg = 0;
  3630. reg = stv090x_read_reg(state, STV090x_GENCFG);
  3631. switch (ldpc_mode) {
  3632. case STV090x_DUAL:
  3633. default:
  3634. if ((state->demod_mode != STV090x_DUAL) || (STV090x_GETFIELD(reg, DDEMOD_FIELD) != 1)) {
  3635. /* set LDPC to dual mode */
  3636. if (stv090x_write_reg(state, STV090x_GENCFG, 0x1d) < 0)
  3637. goto err;
  3638. state->demod_mode = STV090x_DUAL;
  3639. reg = stv090x_read_reg(state, STV090x_TSTRES0);
  3640. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
  3641. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3642. goto err;
  3643. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
  3644. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3645. goto err;
  3646. if (STV090x_WRITE_DEMOD(state, MODCODLST0, 0xff) < 0)
  3647. goto err;
  3648. if (STV090x_WRITE_DEMOD(state, MODCODLST1, 0xff) < 0)
  3649. goto err;
  3650. if (STV090x_WRITE_DEMOD(state, MODCODLST2, 0xff) < 0)
  3651. goto err;
  3652. if (STV090x_WRITE_DEMOD(state, MODCODLST3, 0xff) < 0)
  3653. goto err;
  3654. if (STV090x_WRITE_DEMOD(state, MODCODLST4, 0xff) < 0)
  3655. goto err;
  3656. if (STV090x_WRITE_DEMOD(state, MODCODLST5, 0xff) < 0)
  3657. goto err;
  3658. if (STV090x_WRITE_DEMOD(state, MODCODLST6, 0xff) < 0)
  3659. goto err;
  3660. if (STV090x_WRITE_DEMOD(state, MODCODLST7, 0xcc) < 0)
  3661. goto err;
  3662. if (STV090x_WRITE_DEMOD(state, MODCODLST8, 0xcc) < 0)
  3663. goto err;
  3664. if (STV090x_WRITE_DEMOD(state, MODCODLST9, 0xcc) < 0)
  3665. goto err;
  3666. if (STV090x_WRITE_DEMOD(state, MODCODLSTA, 0xcc) < 0)
  3667. goto err;
  3668. if (STV090x_WRITE_DEMOD(state, MODCODLSTB, 0xcc) < 0)
  3669. goto err;
  3670. if (STV090x_WRITE_DEMOD(state, MODCODLSTC, 0xcc) < 0)
  3671. goto err;
  3672. if (STV090x_WRITE_DEMOD(state, MODCODLSTD, 0xcc) < 0)
  3673. goto err;
  3674. if (STV090x_WRITE_DEMOD(state, MODCODLSTE, 0xff) < 0)
  3675. goto err;
  3676. if (STV090x_WRITE_DEMOD(state, MODCODLSTF, 0xcf) < 0)
  3677. goto err;
  3678. }
  3679. break;
  3680. case STV090x_SINGLE:
  3681. if (stv090x_stop_modcod(state) < 0)
  3682. goto err;
  3683. if (stv090x_activate_modcod_single(state) < 0)
  3684. goto err;
  3685. if (state->demod == STV090x_DEMODULATOR_1) {
  3686. if (stv090x_write_reg(state, STV090x_GENCFG, 0x06) < 0) /* path 2 */
  3687. goto err;
  3688. } else {
  3689. if (stv090x_write_reg(state, STV090x_GENCFG, 0x04) < 0) /* path 1 */
  3690. goto err;
  3691. }
  3692. reg = stv090x_read_reg(state, STV090x_TSTRES0);
  3693. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x1);
  3694. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3695. goto err;
  3696. STV090x_SETFIELD(reg, FRESFEC_FIELD, 0x0);
  3697. if (stv090x_write_reg(state, STV090x_TSTRES0, reg) < 0)
  3698. goto err;
  3699. reg = STV090x_READ_DEMOD(state, PDELCTRL1);
  3700. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x01);
  3701. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  3702. goto err;
  3703. STV090x_SETFIELD_Px(reg, ALGOSWRST_FIELD, 0x00);
  3704. if (STV090x_WRITE_DEMOD(state, PDELCTRL1, reg) < 0)
  3705. goto err;
  3706. break;
  3707. }
  3708. return 0;
  3709. err:
  3710. dprintk(FE_ERROR, 1, "I/O error");
  3711. return -1;
  3712. }
  3713. /* return (Hz), clk in Hz*/
  3714. static u32 stv090x_get_mclk(struct stv090x_state *state)
  3715. {
  3716. const struct stv090x_config *config = state->config;
  3717. u32 div, reg;
  3718. u8 ratio;
  3719. div = stv090x_read_reg(state, STV090x_NCOARSE);
  3720. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3721. ratio = STV090x_GETFIELD(reg, SELX1RATIO_FIELD) ? 4 : 6;
  3722. return (div + 1) * config->xtal / ratio; /* kHz */
  3723. }
  3724. static int stv090x_set_mclk(struct stv090x_state *state, u32 mclk, u32 clk)
  3725. {
  3726. const struct stv090x_config *config = state->config;
  3727. u32 reg, div, clk_sel;
  3728. reg = stv090x_read_reg(state, STV090x_SYNTCTRL);
  3729. clk_sel = ((STV090x_GETFIELD(reg, SELX1RATIO_FIELD) == 1) ? 4 : 6);
  3730. div = ((clk_sel * mclk) / config->xtal) - 1;
  3731. reg = stv090x_read_reg(state, STV090x_NCOARSE);
  3732. STV090x_SETFIELD(reg, M_DIV_FIELD, div);
  3733. if (stv090x_write_reg(state, STV090x_NCOARSE, reg) < 0)
  3734. goto err;
  3735. state->internal->mclk = stv090x_get_mclk(state);
  3736. /*Set the DiseqC frequency to 22KHz */
  3737. div = state->internal->mclk / 704000;
  3738. if (STV090x_WRITE_DEMOD(state, F22TX, div) < 0)
  3739. goto err;
  3740. if (STV090x_WRITE_DEMOD(state, F22RX, div) < 0)
  3741. goto err;
  3742. return 0;
  3743. err:
  3744. dprintk(FE_ERROR, 1, "I/O error");
  3745. return -1;
  3746. }
  3747. static int stv0900_set_tspath(struct stv090x_state *state)
  3748. {
  3749. u32 reg;
  3750. if (state->internal->dev_ver >= 0x20) {
  3751. switch (state->config->ts1_mode) {
  3752. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3753. case STV090x_TSMODE_DVBCI:
  3754. switch (state->config->ts2_mode) {
  3755. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3756. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3757. default:
  3758. stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
  3759. break;
  3760. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3761. case STV090x_TSMODE_DVBCI:
  3762. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x06) < 0) /* Mux'd stream mode */
  3763. goto err;
  3764. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3765. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3766. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3767. goto err;
  3768. reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
  3769. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3770. if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
  3771. goto err;
  3772. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
  3773. goto err;
  3774. if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
  3775. goto err;
  3776. break;
  3777. }
  3778. break;
  3779. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3780. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3781. default:
  3782. switch (state->config->ts2_mode) {
  3783. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3784. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3785. default:
  3786. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
  3787. goto err;
  3788. break;
  3789. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3790. case STV090x_TSMODE_DVBCI:
  3791. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0a) < 0)
  3792. goto err;
  3793. break;
  3794. }
  3795. break;
  3796. }
  3797. } else {
  3798. switch (state->config->ts1_mode) {
  3799. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3800. case STV090x_TSMODE_DVBCI:
  3801. switch (state->config->ts2_mode) {
  3802. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3803. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3804. default:
  3805. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
  3806. break;
  3807. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3808. case STV090x_TSMODE_DVBCI:
  3809. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x16);
  3810. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3811. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3812. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3813. goto err;
  3814. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3815. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 0);
  3816. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3817. goto err;
  3818. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, 0x14) < 0)
  3819. goto err;
  3820. if (stv090x_write_reg(state, STV090x_P2_TSSPEED, 0x28) < 0)
  3821. goto err;
  3822. break;
  3823. }
  3824. break;
  3825. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3826. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3827. default:
  3828. switch (state->config->ts2_mode) {
  3829. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3830. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3831. default:
  3832. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
  3833. break;
  3834. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3835. case STV090x_TSMODE_DVBCI:
  3836. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x12);
  3837. break;
  3838. }
  3839. break;
  3840. }
  3841. }
  3842. switch (state->config->ts1_mode) {
  3843. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3844. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3845. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
  3846. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3847. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3848. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3849. goto err;
  3850. break;
  3851. case STV090x_TSMODE_DVBCI:
  3852. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3853. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
  3854. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3855. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3856. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3857. goto err;
  3858. break;
  3859. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3860. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3861. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
  3862. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3863. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3864. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3865. goto err;
  3866. break;
  3867. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3868. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3869. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts1_tei);
  3870. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3871. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3872. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3873. goto err;
  3874. break;
  3875. default:
  3876. break;
  3877. }
  3878. switch (state->config->ts2_mode) {
  3879. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3880. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3881. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
  3882. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3883. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3884. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3885. goto err;
  3886. break;
  3887. case STV090x_TSMODE_DVBCI:
  3888. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3889. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
  3890. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  3891. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3892. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3893. goto err;
  3894. break;
  3895. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3896. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3897. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
  3898. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3899. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  3900. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3901. goto err;
  3902. break;
  3903. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3904. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3905. STV090x_SETFIELD_Px(reg, TSFIFO_TEIUPDATE_FIELD, state->config->ts2_tei);
  3906. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  3907. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  3908. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3909. goto err;
  3910. break;
  3911. default:
  3912. break;
  3913. }
  3914. if (state->config->ts1_clk > 0) {
  3915. u32 speed;
  3916. switch (state->config->ts1_mode) {
  3917. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3918. case STV090x_TSMODE_DVBCI:
  3919. default:
  3920. speed = state->internal->mclk /
  3921. (state->config->ts1_clk / 4);
  3922. if (speed < 0x08)
  3923. speed = 0x08;
  3924. if (speed > 0xFF)
  3925. speed = 0xFF;
  3926. break;
  3927. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3928. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3929. speed = state->internal->mclk /
  3930. (state->config->ts1_clk / 32);
  3931. if (speed < 0x20)
  3932. speed = 0x20;
  3933. if (speed > 0xFF)
  3934. speed = 0xFF;
  3935. break;
  3936. }
  3937. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  3938. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3939. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  3940. goto err;
  3941. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
  3942. goto err;
  3943. }
  3944. if (state->config->ts2_clk > 0) {
  3945. u32 speed;
  3946. switch (state->config->ts2_mode) {
  3947. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3948. case STV090x_TSMODE_DVBCI:
  3949. default:
  3950. speed = state->internal->mclk /
  3951. (state->config->ts2_clk / 4);
  3952. if (speed < 0x08)
  3953. speed = 0x08;
  3954. if (speed > 0xFF)
  3955. speed = 0xFF;
  3956. break;
  3957. case STV090x_TSMODE_SERIAL_PUNCTURED:
  3958. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  3959. speed = state->internal->mclk /
  3960. (state->config->ts2_clk / 32);
  3961. if (speed < 0x20)
  3962. speed = 0x20;
  3963. if (speed > 0xFF)
  3964. speed = 0xFF;
  3965. break;
  3966. }
  3967. reg = stv090x_read_reg(state, STV090x_P2_TSCFGM);
  3968. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  3969. if (stv090x_write_reg(state, STV090x_P2_TSCFGM, reg) < 0)
  3970. goto err;
  3971. if (stv090x_write_reg(state, STV090x_P2_TSSPEED, speed) < 0)
  3972. goto err;
  3973. }
  3974. reg = stv090x_read_reg(state, STV090x_P2_TSCFGH);
  3975. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
  3976. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3977. goto err;
  3978. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
  3979. if (stv090x_write_reg(state, STV090x_P2_TSCFGH, reg) < 0)
  3980. goto err;
  3981. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  3982. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
  3983. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3984. goto err;
  3985. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
  3986. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  3987. goto err;
  3988. return 0;
  3989. err:
  3990. dprintk(FE_ERROR, 1, "I/O error");
  3991. return -1;
  3992. }
  3993. static int stv0903_set_tspath(struct stv090x_state *state)
  3994. {
  3995. u32 reg;
  3996. if (state->internal->dev_ver >= 0x20) {
  3997. switch (state->config->ts1_mode) {
  3998. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  3999. case STV090x_TSMODE_DVBCI:
  4000. stv090x_write_reg(state, STV090x_TSGENERAL, 0x00);
  4001. break;
  4002. case STV090x_TSMODE_SERIAL_PUNCTURED:
  4003. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  4004. default:
  4005. stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c);
  4006. break;
  4007. }
  4008. } else {
  4009. switch (state->config->ts1_mode) {
  4010. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  4011. case STV090x_TSMODE_DVBCI:
  4012. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x10);
  4013. break;
  4014. case STV090x_TSMODE_SERIAL_PUNCTURED:
  4015. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  4016. default:
  4017. stv090x_write_reg(state, STV090x_TSGENERAL1X, 0x14);
  4018. break;
  4019. }
  4020. }
  4021. switch (state->config->ts1_mode) {
  4022. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  4023. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  4024. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  4025. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  4026. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  4027. goto err;
  4028. break;
  4029. case STV090x_TSMODE_DVBCI:
  4030. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  4031. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x00);
  4032. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  4033. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  4034. goto err;
  4035. break;
  4036. case STV090x_TSMODE_SERIAL_PUNCTURED:
  4037. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  4038. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  4039. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x00);
  4040. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  4041. goto err;
  4042. break;
  4043. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  4044. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  4045. STV090x_SETFIELD_Px(reg, TSFIFO_SERIAL_FIELD, 0x01);
  4046. STV090x_SETFIELD_Px(reg, TSFIFO_DVBCI_FIELD, 0x01);
  4047. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  4048. goto err;
  4049. break;
  4050. default:
  4051. break;
  4052. }
  4053. if (state->config->ts1_clk > 0) {
  4054. u32 speed;
  4055. switch (state->config->ts1_mode) {
  4056. case STV090x_TSMODE_PARALLEL_PUNCTURED:
  4057. case STV090x_TSMODE_DVBCI:
  4058. default:
  4059. speed = state->internal->mclk /
  4060. (state->config->ts1_clk / 4);
  4061. if (speed < 0x08)
  4062. speed = 0x08;
  4063. if (speed > 0xFF)
  4064. speed = 0xFF;
  4065. break;
  4066. case STV090x_TSMODE_SERIAL_PUNCTURED:
  4067. case STV090x_TSMODE_SERIAL_CONTINUOUS:
  4068. speed = state->internal->mclk /
  4069. (state->config->ts1_clk / 32);
  4070. if (speed < 0x20)
  4071. speed = 0x20;
  4072. if (speed > 0xFF)
  4073. speed = 0xFF;
  4074. break;
  4075. }
  4076. reg = stv090x_read_reg(state, STV090x_P1_TSCFGM);
  4077. STV090x_SETFIELD_Px(reg, TSFIFO_MANSPEED_FIELD, 3);
  4078. if (stv090x_write_reg(state, STV090x_P1_TSCFGM, reg) < 0)
  4079. goto err;
  4080. if (stv090x_write_reg(state, STV090x_P1_TSSPEED, speed) < 0)
  4081. goto err;
  4082. }
  4083. reg = stv090x_read_reg(state, STV090x_P1_TSCFGH);
  4084. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x01);
  4085. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  4086. goto err;
  4087. STV090x_SETFIELD_Px(reg, RST_HWARE_FIELD, 0x00);
  4088. if (stv090x_write_reg(state, STV090x_P1_TSCFGH, reg) < 0)
  4089. goto err;
  4090. return 0;
  4091. err:
  4092. dprintk(FE_ERROR, 1, "I/O error");
  4093. return -1;
  4094. }
  4095. static int stv090x_init(struct dvb_frontend *fe)
  4096. {
  4097. struct stv090x_state *state = fe->demodulator_priv;
  4098. const struct stv090x_config *config = state->config;
  4099. u32 reg;
  4100. if (state->internal->mclk == 0) {
  4101. /* call tuner init to configure the tuner's clock output
  4102. divider directly before setting up the master clock of
  4103. the stv090x. */
  4104. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  4105. goto err;
  4106. if (config->tuner_init) {
  4107. if (config->tuner_init(fe) < 0)
  4108. goto err_gateoff;
  4109. }
  4110. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  4111. goto err;
  4112. stv090x_set_mclk(state, 135000000, config->xtal); /* 135 Mhz */
  4113. msleep(5);
  4114. if (stv090x_write_reg(state, STV090x_SYNTCTRL,
  4115. 0x20 | config->clk_mode) < 0)
  4116. goto err;
  4117. stv090x_get_mclk(state);
  4118. }
  4119. if (stv090x_wakeup(fe) < 0) {
  4120. dprintk(FE_ERROR, 1, "Error waking device");
  4121. goto err;
  4122. }
  4123. if (stv090x_ldpc_mode(state, state->demod_mode) < 0)
  4124. goto err;
  4125. reg = STV090x_READ_DEMOD(state, TNRCFG2);
  4126. STV090x_SETFIELD_Px(reg, TUN_IQSWAP_FIELD, state->inversion);
  4127. if (STV090x_WRITE_DEMOD(state, TNRCFG2, reg) < 0)
  4128. goto err;
  4129. reg = STV090x_READ_DEMOD(state, DEMOD);
  4130. STV090x_SETFIELD_Px(reg, ROLLOFF_CONTROL_FIELD, state->rolloff);
  4131. if (STV090x_WRITE_DEMOD(state, DEMOD, reg) < 0)
  4132. goto err;
  4133. if (stv090x_i2c_gate_ctrl(state, 1) < 0)
  4134. goto err;
  4135. if (config->tuner_set_mode) {
  4136. if (config->tuner_set_mode(fe, TUNER_WAKE) < 0)
  4137. goto err_gateoff;
  4138. }
  4139. if (config->tuner_init) {
  4140. if (config->tuner_init(fe) < 0)
  4141. goto err_gateoff;
  4142. }
  4143. if (stv090x_i2c_gate_ctrl(state, 0) < 0)
  4144. goto err;
  4145. if (state->device == STV0900) {
  4146. if (stv0900_set_tspath(state) < 0)
  4147. goto err;
  4148. } else {
  4149. if (stv0903_set_tspath(state) < 0)
  4150. goto err;
  4151. }
  4152. return 0;
  4153. err_gateoff:
  4154. stv090x_i2c_gate_ctrl(state, 0);
  4155. err:
  4156. dprintk(FE_ERROR, 1, "I/O error");
  4157. return -1;
  4158. }
  4159. static int stv090x_setup(struct dvb_frontend *fe)
  4160. {
  4161. struct stv090x_state *state = fe->demodulator_priv;
  4162. const struct stv090x_config *config = state->config;
  4163. const struct stv090x_reg *stv090x_initval = NULL;
  4164. const struct stv090x_reg *stv090x_cut20_val = NULL;
  4165. unsigned long t1_size = 0, t2_size = 0;
  4166. u32 reg = 0;
  4167. int i;
  4168. if (state->device == STV0900) {
  4169. dprintk(FE_DEBUG, 1, "Initializing STV0900");
  4170. stv090x_initval = stv0900_initval;
  4171. t1_size = ARRAY_SIZE(stv0900_initval);
  4172. stv090x_cut20_val = stv0900_cut20_val;
  4173. t2_size = ARRAY_SIZE(stv0900_cut20_val);
  4174. } else if (state->device == STV0903) {
  4175. dprintk(FE_DEBUG, 1, "Initializing STV0903");
  4176. stv090x_initval = stv0903_initval;
  4177. t1_size = ARRAY_SIZE(stv0903_initval);
  4178. stv090x_cut20_val = stv0903_cut20_val;
  4179. t2_size = ARRAY_SIZE(stv0903_cut20_val);
  4180. }
  4181. /* STV090x init */
  4182. /* Stop Demod */
  4183. if (stv090x_write_reg(state, STV090x_P1_DMDISTATE, 0x5c) < 0)
  4184. goto err;
  4185. if (state->device == STV0900)
  4186. if (stv090x_write_reg(state, STV090x_P2_DMDISTATE, 0x5c) < 0)
  4187. goto err;
  4188. msleep(5);
  4189. /* Set No Tuner Mode */
  4190. if (stv090x_write_reg(state, STV090x_P1_TNRCFG, 0x6c) < 0)
  4191. goto err;
  4192. if (state->device == STV0900)
  4193. if (stv090x_write_reg(state, STV090x_P2_TNRCFG, 0x6c) < 0)
  4194. goto err;
  4195. /* I2C repeater OFF */
  4196. STV090x_SETFIELD_Px(reg, ENARPT_LEVEL_FIELD, config->repeater_level);
  4197. if (stv090x_write_reg(state, STV090x_P1_I2CRPT, reg) < 0)
  4198. goto err;
  4199. if (state->device == STV0900)
  4200. if (stv090x_write_reg(state, STV090x_P2_I2CRPT, reg) < 0)
  4201. goto err;
  4202. if (stv090x_write_reg(state, STV090x_NCOARSE, 0x13) < 0) /* set PLL divider */
  4203. goto err;
  4204. msleep(5);
  4205. if (stv090x_write_reg(state, STV090x_I2CCFG, 0x08) < 0) /* 1/41 oversampling */
  4206. goto err;
  4207. if (stv090x_write_reg(state, STV090x_SYNTCTRL, 0x20 | config->clk_mode) < 0) /* enable PLL */
  4208. goto err;
  4209. msleep(5);
  4210. /* write initval */
  4211. dprintk(FE_DEBUG, 1, "Setting up initial values");
  4212. for (i = 0; i < t1_size; i++) {
  4213. if (stv090x_write_reg(state, stv090x_initval[i].addr, stv090x_initval[i].data) < 0)
  4214. goto err;
  4215. }
  4216. state->internal->dev_ver = stv090x_read_reg(state, STV090x_MID);
  4217. if (state->internal->dev_ver >= 0x20) {
  4218. if (stv090x_write_reg(state, STV090x_TSGENERAL, 0x0c) < 0)
  4219. goto err;
  4220. /* write cut20_val*/
  4221. dprintk(FE_DEBUG, 1, "Setting up Cut 2.0 initial values");
  4222. for (i = 0; i < t2_size; i++) {
  4223. if (stv090x_write_reg(state, stv090x_cut20_val[i].addr, stv090x_cut20_val[i].data) < 0)
  4224. goto err;
  4225. }
  4226. } else if (state->internal->dev_ver < 0x20) {
  4227. dprintk(FE_ERROR, 1, "ERROR: Unsupported Cut: 0x%02x!",
  4228. state->internal->dev_ver);
  4229. goto err;
  4230. } else if (state->internal->dev_ver > 0x30) {
  4231. /* we shouldn't bail out from here */
  4232. dprintk(FE_ERROR, 1, "INFO: Cut: 0x%02x probably incomplete support!",
  4233. state->internal->dev_ver);
  4234. }
  4235. /* ADC1 range */
  4236. reg = stv090x_read_reg(state, STV090x_TSTTNR1);
  4237. STV090x_SETFIELD(reg, ADC1_INMODE_FIELD,
  4238. (config->adc1_range == STV090x_ADC_1Vpp) ? 0 : 1);
  4239. if (stv090x_write_reg(state, STV090x_TSTTNR1, reg) < 0)
  4240. goto err;
  4241. /* ADC2 range */
  4242. reg = stv090x_read_reg(state, STV090x_TSTTNR3);
  4243. STV090x_SETFIELD(reg, ADC2_INMODE_FIELD,
  4244. (config->adc2_range == STV090x_ADC_1Vpp) ? 0 : 1);
  4245. if (stv090x_write_reg(state, STV090x_TSTTNR3, reg) < 0)
  4246. goto err;
  4247. if (stv090x_write_reg(state, STV090x_TSTRES0, 0x80) < 0)
  4248. goto err;
  4249. if (stv090x_write_reg(state, STV090x_TSTRES0, 0x00) < 0)
  4250. goto err;
  4251. return 0;
  4252. err:
  4253. dprintk(FE_ERROR, 1, "I/O error");
  4254. return -1;
  4255. }
  4256. static int stv090x_set_gpio(struct dvb_frontend *fe, u8 gpio, u8 dir,
  4257. u8 value, u8 xor_value)
  4258. {
  4259. struct stv090x_state *state = fe->demodulator_priv;
  4260. u8 reg = 0;
  4261. STV090x_SETFIELD(reg, GPIOx_OPD_FIELD, dir);
  4262. STV090x_SETFIELD(reg, GPIOx_CONFIG_FIELD, value);
  4263. STV090x_SETFIELD(reg, GPIOx_XOR_FIELD, xor_value);
  4264. return stv090x_write_reg(state, STV090x_GPIOxCFG(gpio), reg);
  4265. }
  4266. static int stv090x_setup_compound(struct stv090x_state *state)
  4267. {
  4268. struct stv090x_dev *temp_int;
  4269. temp_int = find_dev(state->i2c,
  4270. state->config->address);
  4271. if (temp_int && state->demod_mode == STV090x_DUAL) {
  4272. state->internal = temp_int->internal;
  4273. state->internal->num_used++;
  4274. dprintk(FE_INFO, 1, "Found Internal Structure!");
  4275. } else {
  4276. state->internal = kmalloc_obj(*state->internal);
  4277. if (!state->internal)
  4278. goto error;
  4279. temp_int = append_internal(state->internal);
  4280. if (!temp_int) {
  4281. kfree(state->internal);
  4282. goto error;
  4283. }
  4284. state->internal->num_used = 1;
  4285. state->internal->mclk = 0;
  4286. state->internal->dev_ver = 0;
  4287. state->internal->i2c_adap = state->i2c;
  4288. state->internal->i2c_addr = state->config->address;
  4289. dprintk(FE_INFO, 1, "Create New Internal Structure!");
  4290. mutex_init(&state->internal->demod_lock);
  4291. mutex_init(&state->internal->tuner_lock);
  4292. if (stv090x_setup(&state->frontend) < 0) {
  4293. dprintk(FE_ERROR, 1, "Error setting up device");
  4294. goto err_remove;
  4295. }
  4296. }
  4297. if (state->internal->dev_ver >= 0x30)
  4298. state->frontend.ops.info.caps |= FE_CAN_MULTISTREAM;
  4299. /* workaround for stuck DiSEqC output */
  4300. if (state->config->diseqc_envelope_mode)
  4301. stv090x_send_diseqc_burst(&state->frontend, SEC_MINI_A);
  4302. state->config->set_gpio = stv090x_set_gpio;
  4303. dprintk(FE_ERROR, 1, "Probing %s demodulator(%d) Cut=0x%02x",
  4304. state->device == STV0900 ? "STV0900" : "STV0903",
  4305. state->config->demod,
  4306. state->internal->dev_ver);
  4307. return 0;
  4308. error:
  4309. return -ENOMEM;
  4310. err_remove:
  4311. remove_dev(state->internal);
  4312. kfree(state->internal);
  4313. return -ENODEV;
  4314. }
  4315. static const struct dvb_frontend_ops stv090x_ops = {
  4316. .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
  4317. .info = {
  4318. .name = "STV090x Multistandard",
  4319. .frequency_min_hz = 950 * MHz,
  4320. .frequency_max_hz = 2150 * MHz,
  4321. .symbol_rate_min = 1000000,
  4322. .symbol_rate_max = 45000000,
  4323. .caps = FE_CAN_INVERSION_AUTO |
  4324. FE_CAN_FEC_AUTO |
  4325. FE_CAN_QPSK |
  4326. FE_CAN_2G_MODULATION
  4327. },
  4328. .release = stv090x_release,
  4329. .init = stv090x_init,
  4330. .sleep = stv090x_sleep,
  4331. .get_frontend_algo = stv090x_frontend_algo,
  4332. .diseqc_send_master_cmd = stv090x_send_diseqc_msg,
  4333. .diseqc_send_burst = stv090x_send_diseqc_burst,
  4334. .diseqc_recv_slave_reply = stv090x_recv_slave_reply,
  4335. .set_tone = stv090x_set_tone,
  4336. .search = stv090x_search,
  4337. .read_status = stv090x_read_status,
  4338. .read_ber = stv090x_read_per,
  4339. .read_signal_strength = stv090x_read_signal_strength,
  4340. .read_snr = stv090x_read_cnr,
  4341. };
  4342. static struct dvb_frontend *stv090x_get_dvb_frontend(struct i2c_client *client)
  4343. {
  4344. struct stv090x_state *state = i2c_get_clientdata(client);
  4345. dev_dbg(&client->dev, "\n");
  4346. return &state->frontend;
  4347. }
  4348. static int stv090x_probe(struct i2c_client *client)
  4349. {
  4350. int ret = 0;
  4351. struct stv090x_config *config = client->dev.platform_data;
  4352. struct stv090x_state *state = NULL;
  4353. state = kzalloc_obj(*state);
  4354. if (!state) {
  4355. ret = -ENOMEM;
  4356. goto error;
  4357. }
  4358. state->verbose = &verbose;
  4359. state->config = config;
  4360. state->i2c = client->adapter;
  4361. state->frontend.ops = stv090x_ops;
  4362. state->frontend.demodulator_priv = state;
  4363. state->demod = config->demod;
  4364. /* Single or Dual mode */
  4365. state->demod_mode = config->demod_mode;
  4366. state->device = config->device;
  4367. /* default */
  4368. state->rolloff = STV090x_RO_35;
  4369. ret = stv090x_setup_compound(state);
  4370. if (ret)
  4371. goto error;
  4372. i2c_set_clientdata(client, state);
  4373. /* setup callbacks */
  4374. config->get_dvb_frontend = stv090x_get_dvb_frontend;
  4375. return 0;
  4376. error:
  4377. kfree(state);
  4378. return ret;
  4379. }
  4380. static void stv090x_remove(struct i2c_client *client)
  4381. {
  4382. struct stv090x_state *state = i2c_get_clientdata(client);
  4383. stv090x_release(&state->frontend);
  4384. }
  4385. struct dvb_frontend *stv090x_attach(struct stv090x_config *config,
  4386. struct i2c_adapter *i2c,
  4387. enum stv090x_demodulator demod)
  4388. {
  4389. int ret = 0;
  4390. struct stv090x_state *state = NULL;
  4391. state = kzalloc_obj(*state);
  4392. if (!state)
  4393. goto error;
  4394. state->verbose = &verbose;
  4395. state->config = config;
  4396. state->i2c = i2c;
  4397. state->frontend.ops = stv090x_ops;
  4398. state->frontend.demodulator_priv = state;
  4399. state->demod = demod;
  4400. /* Single or Dual mode */
  4401. state->demod_mode = config->demod_mode;
  4402. state->device = config->device;
  4403. /* default */
  4404. state->rolloff = STV090x_RO_35;
  4405. ret = stv090x_setup_compound(state);
  4406. if (ret)
  4407. goto error;
  4408. return &state->frontend;
  4409. error:
  4410. kfree(state);
  4411. return NULL;
  4412. }
  4413. EXPORT_SYMBOL_GPL(stv090x_attach);
  4414. static const struct i2c_device_id stv090x_id_table[] = {
  4415. { "stv090x" },
  4416. {}
  4417. };
  4418. MODULE_DEVICE_TABLE(i2c, stv090x_id_table);
  4419. static struct i2c_driver stv090x_driver = {
  4420. .driver = {
  4421. .name = "stv090x",
  4422. .suppress_bind_attrs = true,
  4423. },
  4424. .probe = stv090x_probe,
  4425. .remove = stv090x_remove,
  4426. .id_table = stv090x_id_table,
  4427. };
  4428. module_i2c_driver(stv090x_driver);
  4429. MODULE_PARM_DESC(verbose, "Set Verbosity level");
  4430. MODULE_AUTHOR("Manu Abraham");
  4431. MODULE_DESCRIPTION("STV090x Multi-Std Broadcast frontend");
  4432. MODULE_LICENSE("GPL");