lgdt330x.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Support for LGDT3302 and LGDT3303 - VSB/QAM
  4. *
  5. * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
  6. */
  7. /*
  8. * NOTES ABOUT THIS DRIVER
  9. *
  10. * This Linux driver supports:
  11. * DViCO FusionHDTV 3 Gold-Q
  12. * DViCO FusionHDTV 3 Gold-T
  13. * DViCO FusionHDTV 5 Gold
  14. * DViCO FusionHDTV 5 Lite
  15. * DViCO FusionHDTV 5 USB Gold
  16. * Air2PC/AirStar 2 ATSC 3rd generation (HD5000)
  17. * pcHDTV HD5500
  18. *
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/init.h>
  23. #include <linux/delay.h>
  24. #include <linux/string.h>
  25. #include <linux/slab.h>
  26. #include <asm/byteorder.h>
  27. #include <media/dvb_frontend.h>
  28. #include <linux/int_log.h>
  29. #include "lgdt330x_priv.h"
  30. #include "lgdt330x.h"
  31. /* Use Equalizer Mean Squared Error instead of Phaser Tracker MSE */
  32. /* #define USE_EQMSE */
  33. static int debug;
  34. module_param(debug, int, 0644);
  35. MODULE_PARM_DESC(debug, "Turn on/off lgdt330x frontend debugging (default:off).");
  36. #define dprintk(state, fmt, arg...) do { \
  37. if (debug) \
  38. dev_printk(KERN_DEBUG, &state->client->dev, fmt, ##arg);\
  39. } while (0)
  40. struct lgdt330x_state {
  41. struct i2c_client *client;
  42. /* Configuration settings */
  43. struct lgdt330x_config config;
  44. struct dvb_frontend frontend;
  45. /* Demodulator private data */
  46. enum fe_modulation current_modulation;
  47. u32 snr; /* Result of last SNR calculation */
  48. u16 ucblocks;
  49. unsigned long last_stats_time;
  50. /* Tuner private data */
  51. u32 current_frequency;
  52. };
  53. static int i2c_write_demod_bytes(struct lgdt330x_state *state,
  54. const u8 *buf, /* data bytes to send */
  55. int len /* number of bytes to send */)
  56. {
  57. int i;
  58. int err;
  59. for (i = 0; i < len - 1; i += 2) {
  60. err = i2c_master_send(state->client, buf, 2);
  61. if (err != 2) {
  62. dev_warn(&state->client->dev,
  63. "%s: error (addr %02x <- %02x, err = %i)\n",
  64. __func__, buf[0], buf[1], err);
  65. if (err < 0)
  66. return err;
  67. else
  68. return -EREMOTEIO;
  69. }
  70. buf += 2;
  71. }
  72. return 0;
  73. }
  74. /*
  75. * This routine writes the register (reg) to the demod bus
  76. * then reads the data returned for (len) bytes.
  77. */
  78. static int i2c_read_demod_bytes(struct lgdt330x_state *state,
  79. enum I2C_REG reg, u8 *buf, int len)
  80. {
  81. u8 wr[] = { reg };
  82. struct i2c_msg msg[] = {
  83. {
  84. .addr = state->client->addr,
  85. .flags = 0,
  86. .buf = wr,
  87. .len = 1
  88. }, {
  89. .addr = state->client->addr,
  90. .flags = I2C_M_RD,
  91. .buf = buf,
  92. .len = len
  93. },
  94. };
  95. int ret;
  96. ret = i2c_transfer(state->client->adapter, msg, 2);
  97. if (ret != 2) {
  98. dev_warn(&state->client->dev,
  99. "%s: addr 0x%02x select 0x%02x error (ret == %i)\n",
  100. __func__, state->client->addr, reg, ret);
  101. if (ret >= 0)
  102. ret = -EIO;
  103. } else {
  104. ret = 0;
  105. }
  106. return ret;
  107. }
  108. /* Software reset */
  109. static int lgdt3302_sw_reset(struct lgdt330x_state *state)
  110. {
  111. u8 reset[] = {
  112. IRQ_MASK,
  113. /*
  114. * bit 6 is active low software reset
  115. * bits 5-0 are 1 to mask interrupts
  116. */
  117. 0x00
  118. };
  119. int ret;
  120. ret = i2c_write_demod_bytes(state,
  121. reset, sizeof(reset));
  122. if (ret == 0) {
  123. /* force reset high (inactive) and unmask interrupts */
  124. reset[1] = 0x7f;
  125. ret = i2c_write_demod_bytes(state,
  126. reset, sizeof(reset));
  127. }
  128. return ret;
  129. }
  130. static int lgdt3303_sw_reset(struct lgdt330x_state *state)
  131. {
  132. u8 reset[] = {
  133. 0x02,
  134. 0x00 /* bit 0 is active low software reset */
  135. };
  136. int ret;
  137. ret = i2c_write_demod_bytes(state,
  138. reset, sizeof(reset));
  139. if (ret == 0) {
  140. /* force reset high (inactive) */
  141. reset[1] = 0x01;
  142. ret = i2c_write_demod_bytes(state,
  143. reset, sizeof(reset));
  144. }
  145. return ret;
  146. }
  147. static int lgdt330x_sw_reset(struct lgdt330x_state *state)
  148. {
  149. switch (state->config.demod_chip) {
  150. case LGDT3302:
  151. return lgdt3302_sw_reset(state);
  152. case LGDT3303:
  153. return lgdt3303_sw_reset(state);
  154. default:
  155. return -ENODEV;
  156. }
  157. }
  158. static int lgdt330x_init(struct dvb_frontend *fe)
  159. {
  160. struct lgdt330x_state *state = fe->demodulator_priv;
  161. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  162. char *chip_name;
  163. int err;
  164. /*
  165. * Array of byte pairs <address, value>
  166. * to initialize each different chip
  167. */
  168. static const u8 lgdt3302_init_data[] = {
  169. /* Use 50MHz param values from spec sheet since xtal is 50 */
  170. /*
  171. * Change the value of NCOCTFV[25:0] of carrier
  172. * recovery center frequency register
  173. */
  174. VSB_CARRIER_FREQ0, 0x00,
  175. VSB_CARRIER_FREQ1, 0x87,
  176. VSB_CARRIER_FREQ2, 0x8e,
  177. VSB_CARRIER_FREQ3, 0x01,
  178. /*
  179. * Change the TPCLK pin polarity
  180. * data is valid on falling clock
  181. */
  182. DEMUX_CONTROL, 0xfb,
  183. /*
  184. * Change the value of IFBW[11:0] of
  185. * AGC IF/RF loop filter bandwidth register
  186. */
  187. AGC_RF_BANDWIDTH0, 0x40,
  188. AGC_RF_BANDWIDTH1, 0x93,
  189. AGC_RF_BANDWIDTH2, 0x00,
  190. /*
  191. * Change the value of bit 6, 'nINAGCBY' and
  192. * 'NSSEL[1:0] of ACG function control register 2
  193. */
  194. AGC_FUNC_CTRL2, 0xc6,
  195. /*
  196. * Change the value of bit 6 'RFFIX'
  197. * of AGC function control register 3
  198. */
  199. AGC_FUNC_CTRL3, 0x40,
  200. /*
  201. * Set the value of 'INLVTHD' register 0x2a/0x2c
  202. * to 0x7fe
  203. */
  204. AGC_DELAY0, 0x07,
  205. AGC_DELAY2, 0xfe,
  206. /*
  207. * Change the value of IAGCBW[15:8]
  208. * of inner AGC loop filter bandwidth
  209. */
  210. AGC_LOOP_BANDWIDTH0, 0x08,
  211. AGC_LOOP_BANDWIDTH1, 0x9a
  212. };
  213. static const u8 lgdt3303_init_data[] = {
  214. 0x4c, 0x14
  215. };
  216. static const u8 flip_1_lgdt3303_init_data[] = {
  217. 0x4c, 0x14,
  218. 0x87, 0xf3
  219. };
  220. static const u8 flip_2_lgdt3303_init_data[] = {
  221. 0x4c, 0x14,
  222. 0x87, 0xda
  223. };
  224. /*
  225. * Hardware reset is done using gpio[0] of cx23880x chip.
  226. * I'd like to do it here, but don't know how to find chip address.
  227. * cx88-cards.c arranges for the reset bit to be inactive (high).
  228. * Maybe there needs to be a callable function in cx88-core or
  229. * the caller of this function needs to do it.
  230. */
  231. switch (state->config.demod_chip) {
  232. case LGDT3302:
  233. chip_name = "LGDT3302";
  234. err = i2c_write_demod_bytes(state, lgdt3302_init_data,
  235. sizeof(lgdt3302_init_data));
  236. break;
  237. case LGDT3303:
  238. chip_name = "LGDT3303";
  239. switch (state->config.clock_polarity_flip) {
  240. case 2:
  241. err = i2c_write_demod_bytes(state,
  242. flip_2_lgdt3303_init_data,
  243. sizeof(flip_2_lgdt3303_init_data));
  244. break;
  245. case 1:
  246. err = i2c_write_demod_bytes(state,
  247. flip_1_lgdt3303_init_data,
  248. sizeof(flip_1_lgdt3303_init_data));
  249. break;
  250. case 0:
  251. default:
  252. err = i2c_write_demod_bytes(state, lgdt3303_init_data,
  253. sizeof(lgdt3303_init_data));
  254. }
  255. break;
  256. default:
  257. chip_name = "undefined";
  258. dev_warn(&state->client->dev,
  259. "Only LGDT3302 and LGDT3303 are supported chips.\n");
  260. err = -ENODEV;
  261. }
  262. dprintk(state, "Initialized the %s chip\n", chip_name);
  263. if (err < 0)
  264. return err;
  265. p->cnr.len = 1;
  266. p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  267. p->block_error.len = 1;
  268. p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  269. p->block_count.len = 1;
  270. p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  271. state->last_stats_time = 0;
  272. return lgdt330x_sw_reset(state);
  273. }
  274. static int lgdt330x_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  275. {
  276. struct lgdt330x_state *state = fe->demodulator_priv;
  277. *ucblocks = state->ucblocks;
  278. return 0;
  279. }
  280. static int lgdt330x_set_parameters(struct dvb_frontend *fe)
  281. {
  282. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  283. struct lgdt330x_state *state = fe->demodulator_priv;
  284. /*
  285. * Array of byte pairs <address, value>
  286. * to initialize 8VSB for lgdt3303 chip 50 MHz IF
  287. */
  288. static const u8 lgdt3303_8vsb_44_data[] = {
  289. 0x04, 0x00,
  290. 0x0d, 0x40,
  291. 0x0e, 0x87,
  292. 0x0f, 0x8e,
  293. 0x10, 0x01,
  294. 0x47, 0x8b
  295. };
  296. /*
  297. * Array of byte pairs <address, value>
  298. * to initialize QAM for lgdt3303 chip
  299. */
  300. static const u8 lgdt3303_qam_data[] = {
  301. 0x04, 0x00,
  302. 0x0d, 0x00,
  303. 0x0e, 0x00,
  304. 0x0f, 0x00,
  305. 0x10, 0x00,
  306. 0x51, 0x63,
  307. 0x47, 0x66,
  308. 0x48, 0x66,
  309. 0x4d, 0x1a,
  310. 0x49, 0x08,
  311. 0x4a, 0x9b
  312. };
  313. u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
  314. int err = 0;
  315. /* Change only if we are actually changing the modulation */
  316. if (state->current_modulation != p->modulation) {
  317. switch (p->modulation) {
  318. case VSB_8:
  319. dprintk(state, "VSB_8 MODE\n");
  320. /* Select VSB mode */
  321. top_ctrl_cfg[1] = 0x03;
  322. /* Select ANT connector if supported by card */
  323. if (state->config.pll_rf_set)
  324. state->config.pll_rf_set(fe, 1);
  325. if (state->config.demod_chip == LGDT3303) {
  326. err = i2c_write_demod_bytes(state,
  327. lgdt3303_8vsb_44_data,
  328. sizeof(lgdt3303_8vsb_44_data));
  329. }
  330. break;
  331. case QAM_64:
  332. dprintk(state, "QAM_64 MODE\n");
  333. /* Select QAM_64 mode */
  334. top_ctrl_cfg[1] = 0x00;
  335. /* Select CABLE connector if supported by card */
  336. if (state->config.pll_rf_set)
  337. state->config.pll_rf_set(fe, 0);
  338. if (state->config.demod_chip == LGDT3303) {
  339. err = i2c_write_demod_bytes(state,
  340. lgdt3303_qam_data,
  341. sizeof(lgdt3303_qam_data));
  342. }
  343. break;
  344. case QAM_256:
  345. dprintk(state, "QAM_256 MODE\n");
  346. /* Select QAM_256 mode */
  347. top_ctrl_cfg[1] = 0x01;
  348. /* Select CABLE connector if supported by card */
  349. if (state->config.pll_rf_set)
  350. state->config.pll_rf_set(fe, 0);
  351. if (state->config.demod_chip == LGDT3303) {
  352. err = i2c_write_demod_bytes(state,
  353. lgdt3303_qam_data,
  354. sizeof(lgdt3303_qam_data));
  355. }
  356. break;
  357. default:
  358. dev_warn(&state->client->dev,
  359. "%s: Modulation type(%d) UNSUPPORTED\n",
  360. __func__, p->modulation);
  361. return -1;
  362. }
  363. if (err < 0)
  364. dev_warn(&state->client->dev,
  365. "%s: error blasting bytes to lgdt3303 for modulation type(%d)\n",
  366. __func__, p->modulation);
  367. /*
  368. * select serial or parallel MPEG hardware interface
  369. * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
  370. * Parallel: 0x00
  371. */
  372. top_ctrl_cfg[1] |= state->config.serial_mpeg;
  373. /* Select the requested mode */
  374. i2c_write_demod_bytes(state, top_ctrl_cfg,
  375. sizeof(top_ctrl_cfg));
  376. if (state->config.set_ts_params)
  377. state->config.set_ts_params(fe, 0);
  378. state->current_modulation = p->modulation;
  379. }
  380. /* Tune to the specified frequency */
  381. if (fe->ops.tuner_ops.set_params) {
  382. fe->ops.tuner_ops.set_params(fe);
  383. if (fe->ops.i2c_gate_ctrl)
  384. fe->ops.i2c_gate_ctrl(fe, 0);
  385. }
  386. /* Keep track of the new frequency */
  387. /*
  388. * FIXME this is the wrong way to do this...
  389. * The tuner is shared with the video4linux analog API
  390. */
  391. state->current_frequency = p->frequency;
  392. lgdt330x_sw_reset(state);
  393. return 0;
  394. }
  395. static int lgdt330x_get_frontend(struct dvb_frontend *fe,
  396. struct dtv_frontend_properties *p)
  397. {
  398. struct lgdt330x_state *state = fe->demodulator_priv;
  399. p->frequency = state->current_frequency;
  400. return 0;
  401. }
  402. /*
  403. * Calculate SNR estimation (scaled by 2^24)
  404. *
  405. * 8-VSB SNR equations from LGDT3302 and LGDT3303 datasheets, QAM
  406. * equations from LGDT3303 datasheet. VSB is the same between the '02
  407. * and '03, so maybe QAM is too? Perhaps someone with a newer datasheet
  408. * that has QAM information could verify?
  409. *
  410. * For 8-VSB: (two ways, take your pick)
  411. * LGDT3302:
  412. * SNR_EQ = 10 * log10(25 * 24^2 / EQ_MSE)
  413. * LGDT3303:
  414. * SNR_EQ = 10 * log10(25 * 32^2 / EQ_MSE)
  415. * LGDT3302 & LGDT3303:
  416. * SNR_PT = 10 * log10(25 * 32^2 / PT_MSE) (we use this one)
  417. * For 64-QAM:
  418. * SNR = 10 * log10( 688128 / MSEQAM)
  419. * For 256-QAM:
  420. * SNR = 10 * log10( 696320 / MSEQAM)
  421. *
  422. * We re-write the snr equation as:
  423. * SNR * 2^24 = 10*(c - intlog10(MSE))
  424. * Where for 256-QAM, c = log10(696320) * 2^24, and so on.
  425. */
  426. static u32 calculate_snr(u32 mse, u32 c)
  427. {
  428. if (mse == 0) /* No signal */
  429. return 0;
  430. mse = intlog10(mse);
  431. if (mse > c) {
  432. /*
  433. * Negative SNR, which is possible, but realisticly the
  434. * demod will lose lock before the signal gets this bad.
  435. * The API only allows for unsigned values, so just return 0
  436. */
  437. return 0;
  438. }
  439. return 10 * (c - mse);
  440. }
  441. static int lgdt3302_read_snr(struct dvb_frontend *fe)
  442. {
  443. struct lgdt330x_state *state = fe->demodulator_priv;
  444. u8 buf[5]; /* read data buffer */
  445. u32 noise; /* noise value */
  446. u32 c; /* per-modulation SNR calculation constant */
  447. switch (state->current_modulation) {
  448. case VSB_8:
  449. i2c_read_demod_bytes(state, LGDT3302_EQPH_ERR0, buf, 5);
  450. #ifdef USE_EQMSE
  451. /* Use Equalizer Mean-Square Error Register */
  452. /* SNR for ranges from -15.61 to +41.58 */
  453. noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
  454. c = 69765745; /* log10(25*24^2)*2^24 */
  455. #else
  456. /* Use Phase Tracker Mean-Square Error Register */
  457. /* SNR for ranges from -13.11 to +44.08 */
  458. noise = ((buf[0] & 7 << 3) << 13) | (buf[3] << 8) | buf[4];
  459. c = 73957994; /* log10(25*32^2)*2^24 */
  460. #endif
  461. break;
  462. case QAM_64:
  463. case QAM_256:
  464. i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
  465. noise = ((buf[0] & 3) << 8) | buf[1];
  466. c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
  467. /* log10(688128)*2^24 and log10(696320)*2^24 */
  468. break;
  469. default:
  470. dev_err(&state->client->dev,
  471. "%s: Modulation set to unsupported value\n",
  472. __func__);
  473. state->snr = 0;
  474. return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
  475. }
  476. state->snr = calculate_snr(noise, c);
  477. dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise,
  478. state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
  479. return 0;
  480. }
  481. static int lgdt3303_read_snr(struct dvb_frontend *fe)
  482. {
  483. struct lgdt330x_state *state = fe->demodulator_priv;
  484. u8 buf[5]; /* read data buffer */
  485. u32 noise; /* noise value */
  486. u32 c; /* per-modulation SNR calculation constant */
  487. switch (state->current_modulation) {
  488. case VSB_8:
  489. i2c_read_demod_bytes(state, LGDT3303_EQPH_ERR0, buf, 5);
  490. #ifdef USE_EQMSE
  491. /* Use Equalizer Mean-Square Error Register */
  492. /* SNR for ranges from -16.12 to +44.08 */
  493. noise = ((buf[0] & 0x78) << 13) | (buf[1] << 8) | buf[2];
  494. c = 73957994; /* log10(25*32^2)*2^24 */
  495. #else
  496. /* Use Phase Tracker Mean-Square Error Register */
  497. /* SNR for ranges from -13.11 to +44.08 */
  498. noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
  499. c = 73957994; /* log10(25*32^2)*2^24 */
  500. #endif
  501. break;
  502. case QAM_64:
  503. case QAM_256:
  504. i2c_read_demod_bytes(state, CARRIER_MSEQAM1, buf, 2);
  505. noise = (buf[0] << 8) | buf[1];
  506. c = state->current_modulation == QAM_64 ? 97939837 : 98026066;
  507. /* log10(688128)*2^24 and log10(696320)*2^24 */
  508. break;
  509. default:
  510. dev_err(&state->client->dev,
  511. "%s: Modulation set to unsupported value\n",
  512. __func__);
  513. state->snr = 0;
  514. return -EREMOTEIO; /* return -EDRIVER_IS_GIBBERED; */
  515. }
  516. state->snr = calculate_snr(noise, c);
  517. dprintk(state, "noise = 0x%08x, snr = %d.%02d dB\n", noise,
  518. state->snr >> 24, (((state->snr >> 8) & 0xffff) * 100) >> 16);
  519. return 0;
  520. }
  521. static int lgdt330x_read_snr(struct dvb_frontend *fe, u16 *snr)
  522. {
  523. struct lgdt330x_state *state = fe->demodulator_priv;
  524. *snr = (state->snr) >> 16; /* Convert from 8.24 fixed-point to 8.8 */
  525. return 0;
  526. }
  527. static int lgdt330x_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
  528. {
  529. /* Calculate Strength from SNR up to 35dB */
  530. /*
  531. * Even though the SNR can go higher than 35dB, there is some comfort
  532. * factor in having a range of strong signals that can show at 100%
  533. */
  534. struct lgdt330x_state *state = fe->demodulator_priv;
  535. u16 snr;
  536. int ret;
  537. ret = fe->ops.read_snr(fe, &snr);
  538. if (ret != 0)
  539. return ret;
  540. /* Rather than use the 8.8 value snr, use state->snr which is 8.24 */
  541. /* scale the range 0 - 35*2^24 into 0 - 65535 */
  542. if (state->snr >= 8960 * 0x10000)
  543. *strength = 0xffff;
  544. else
  545. *strength = state->snr / 8960;
  546. return 0;
  547. }
  548. static int lgdt3302_read_status(struct dvb_frontend *fe,
  549. enum fe_status *status)
  550. {
  551. struct lgdt330x_state *state = fe->demodulator_priv;
  552. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  553. u8 buf[3];
  554. int err;
  555. *status = 0; /* Reset status result */
  556. /* AGC status register */
  557. i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
  558. dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]);
  559. if ((buf[0] & 0x0c) == 0x8) {
  560. /*
  561. * Test signal does not exist flag
  562. * as well as the AGC lock flag.
  563. */
  564. *status |= FE_HAS_SIGNAL;
  565. }
  566. /*
  567. * You must set the Mask bits to 1 in the IRQ_MASK in order
  568. * to see that status bit in the IRQ_STATUS register.
  569. * This is done in SwReset();
  570. */
  571. /* signal status */
  572. i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
  573. dprintk(state,
  574. "TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n",
  575. buf[0], buf[1], buf[2]);
  576. /* sync status */
  577. if ((buf[2] & 0x03) == 0x01)
  578. *status |= FE_HAS_SYNC;
  579. /* FEC error status */
  580. if ((buf[2] & 0x0c) == 0x08)
  581. *status |= FE_HAS_LOCK | FE_HAS_VITERBI;
  582. /* Carrier Recovery Lock Status Register */
  583. i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
  584. dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]);
  585. switch (state->current_modulation) {
  586. case QAM_256:
  587. case QAM_64:
  588. /* Need to understand why there are 3 lock levels here */
  589. if ((buf[0] & 0x07) == 0x07)
  590. *status |= FE_HAS_CARRIER;
  591. break;
  592. case VSB_8:
  593. if ((buf[0] & 0x80) == 0x80)
  594. *status |= FE_HAS_CARRIER;
  595. break;
  596. default:
  597. dev_warn(&state->client->dev,
  598. "%s: Modulation set to unsupported value\n",
  599. __func__);
  600. }
  601. if (!(*status & FE_HAS_LOCK)) {
  602. p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  603. p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  604. p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  605. return 0;
  606. }
  607. if (state->last_stats_time &&
  608. time_is_after_jiffies(state->last_stats_time))
  609. return 0;
  610. state->last_stats_time = jiffies + msecs_to_jiffies(1000);
  611. err = lgdt3302_read_snr(fe);
  612. if (!err) {
  613. p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  614. p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24;
  615. } else {
  616. p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  617. }
  618. err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
  619. buf, sizeof(buf));
  620. if (!err) {
  621. state->ucblocks = (buf[0] << 8) | buf[1];
  622. dprintk(state, "UCB = 0x%02x\n", state->ucblocks);
  623. p->block_error.stat[0].uvalue += state->ucblocks;
  624. /* FIXME: what's the basis for block count */
  625. p->block_count.stat[0].uvalue += 10000;
  626. p->block_error.stat[0].scale = FE_SCALE_COUNTER;
  627. p->block_count.stat[0].scale = FE_SCALE_COUNTER;
  628. } else {
  629. p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  630. p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  631. }
  632. return 0;
  633. }
  634. static int lgdt3303_read_status(struct dvb_frontend *fe,
  635. enum fe_status *status)
  636. {
  637. struct lgdt330x_state *state = fe->demodulator_priv;
  638. struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  639. u8 buf[3];
  640. int err;
  641. *status = 0; /* Reset status result */
  642. /* lgdt3303 AGC status register */
  643. err = i2c_read_demod_bytes(state, 0x58, buf, 1);
  644. if (err < 0)
  645. return err;
  646. dprintk(state, "AGC_STATUS = 0x%02x\n", buf[0]);
  647. if ((buf[0] & 0x21) == 0x01) {
  648. /*
  649. * Test input signal does not exist flag
  650. * as well as the AGC lock flag.
  651. */
  652. *status |= FE_HAS_SIGNAL;
  653. }
  654. /* Carrier Recovery Lock Status Register */
  655. i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
  656. dprintk(state, "CARRIER_LOCK = 0x%02x\n", buf[0]);
  657. switch (state->current_modulation) {
  658. case QAM_256:
  659. case QAM_64:
  660. /* Need to understand why there are 3 lock levels here */
  661. if ((buf[0] & 0x07) == 0x07)
  662. *status |= FE_HAS_CARRIER;
  663. else
  664. break;
  665. i2c_read_demod_bytes(state, 0x8a, buf, 1);
  666. dprintk(state, "QAM LOCK = 0x%02x\n", buf[0]);
  667. if ((buf[0] & 0x04) == 0x04)
  668. *status |= FE_HAS_SYNC;
  669. if ((buf[0] & 0x01) == 0x01)
  670. *status |= FE_HAS_LOCK;
  671. if ((buf[0] & 0x08) == 0x08)
  672. *status |= FE_HAS_VITERBI;
  673. break;
  674. case VSB_8:
  675. if ((buf[0] & 0x80) == 0x80)
  676. *status |= FE_HAS_CARRIER;
  677. else
  678. break;
  679. i2c_read_demod_bytes(state, 0x38, buf, 1);
  680. dprintk(state, "8-VSB LOCK = 0x%02x\n", buf[0]);
  681. if ((buf[0] & 0x02) == 0x00)
  682. *status |= FE_HAS_SYNC;
  683. if ((buf[0] & 0x01) == 0x01)
  684. *status |= FE_HAS_VITERBI | FE_HAS_LOCK;
  685. break;
  686. default:
  687. dev_warn(&state->client->dev,
  688. "%s: Modulation set to unsupported value\n",
  689. __func__);
  690. }
  691. if (!(*status & FE_HAS_LOCK)) {
  692. p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  693. p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  694. p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  695. return 0;
  696. }
  697. if (state->last_stats_time &&
  698. time_is_after_jiffies(state->last_stats_time))
  699. return 0;
  700. state->last_stats_time = jiffies + msecs_to_jiffies(1000);
  701. err = lgdt3303_read_snr(fe);
  702. if (!err) {
  703. p->cnr.stat[0].scale = FE_SCALE_DECIBEL;
  704. p->cnr.stat[0].svalue = (((u64)state->snr) * 1000) >> 24;
  705. } else {
  706. p->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  707. }
  708. err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
  709. buf, sizeof(buf));
  710. if (!err) {
  711. state->ucblocks = (buf[0] << 8) | buf[1];
  712. dprintk(state, "UCB = 0x%02x\n", state->ucblocks);
  713. p->block_error.stat[0].uvalue += state->ucblocks;
  714. /* FIXME: what's the basis for block count */
  715. p->block_count.stat[0].uvalue += 10000;
  716. p->block_error.stat[0].scale = FE_SCALE_COUNTER;
  717. p->block_count.stat[0].scale = FE_SCALE_COUNTER;
  718. } else {
  719. p->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  720. p->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
  721. }
  722. return 0;
  723. }
  724. static int
  725. lgdt330x_get_tune_settings(struct dvb_frontend *fe,
  726. struct dvb_frontend_tune_settings *fe_tune_settings)
  727. {
  728. /* I have no idea about this - it may not be needed */
  729. fe_tune_settings->min_delay_ms = 500;
  730. fe_tune_settings->step_size = 0;
  731. fe_tune_settings->max_drift = 0;
  732. return 0;
  733. }
  734. static void lgdt330x_release(struct dvb_frontend *fe)
  735. {
  736. struct lgdt330x_state *state = fe->demodulator_priv;
  737. struct i2c_client *client = state->client;
  738. dev_dbg(&client->dev, "\n");
  739. i2c_unregister_device(client);
  740. }
  741. static struct dvb_frontend *lgdt330x_get_dvb_frontend(struct i2c_client *client)
  742. {
  743. struct lgdt330x_state *state = i2c_get_clientdata(client);
  744. dev_dbg(&client->dev, "\n");
  745. return &state->frontend;
  746. }
  747. static const struct dvb_frontend_ops lgdt3302_ops;
  748. static const struct dvb_frontend_ops lgdt3303_ops;
  749. static int lgdt330x_probe(struct i2c_client *client)
  750. {
  751. struct lgdt330x_state *state = NULL;
  752. u8 buf[1];
  753. /* Allocate memory for the internal state */
  754. state = kzalloc_obj(*state);
  755. if (!state)
  756. goto error;
  757. /* Setup the state */
  758. memcpy(&state->config, client->dev.platform_data,
  759. sizeof(state->config));
  760. i2c_set_clientdata(client, state);
  761. state->client = client;
  762. /* Create dvb_frontend */
  763. switch (state->config.demod_chip) {
  764. case LGDT3302:
  765. memcpy(&state->frontend.ops, &lgdt3302_ops,
  766. sizeof(struct dvb_frontend_ops));
  767. break;
  768. case LGDT3303:
  769. memcpy(&state->frontend.ops, &lgdt3303_ops,
  770. sizeof(struct dvb_frontend_ops));
  771. break;
  772. default:
  773. goto error;
  774. }
  775. state->frontend.demodulator_priv = state;
  776. /* Setup get frontend callback */
  777. state->config.get_dvb_frontend = lgdt330x_get_dvb_frontend;
  778. /* Verify communication with demod chip */
  779. if (i2c_read_demod_bytes(state, 2, buf, 1))
  780. goto error;
  781. state->current_frequency = -1;
  782. state->current_modulation = -1;
  783. dev_info(&state->client->dev,
  784. "Demod loaded for LGDT330%s chip\n",
  785. state->config.demod_chip == LGDT3302 ? "2" : "3");
  786. return 0;
  787. error:
  788. kfree(state);
  789. if (debug)
  790. dev_printk(KERN_DEBUG, &client->dev, "Error loading lgdt330x driver\n");
  791. return -ENODEV;
  792. }
  793. struct dvb_frontend *lgdt330x_attach(const struct lgdt330x_config *_config,
  794. u8 demod_address,
  795. struct i2c_adapter *i2c)
  796. {
  797. struct i2c_client *client;
  798. struct i2c_board_info board_info = {};
  799. struct lgdt330x_config config = *_config;
  800. strscpy(board_info.type, "lgdt330x", sizeof(board_info.type));
  801. board_info.addr = demod_address;
  802. board_info.platform_data = &config;
  803. client = i2c_new_client_device(i2c, &board_info);
  804. if (!i2c_client_has_driver(client))
  805. return NULL;
  806. return lgdt330x_get_dvb_frontend(client);
  807. }
  808. EXPORT_SYMBOL_GPL(lgdt330x_attach);
  809. static const struct dvb_frontend_ops lgdt3302_ops = {
  810. .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
  811. .info = {
  812. .name = "LG Electronics LGDT3302 VSB/QAM Frontend",
  813. .frequency_min_hz = 54 * MHz,
  814. .frequency_max_hz = 858 * MHz,
  815. .frequency_stepsize_hz = 62500,
  816. .symbol_rate_min = 5056941, /* QAM 64 */
  817. .symbol_rate_max = 10762000, /* VSB 8 */
  818. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  819. },
  820. .init = lgdt330x_init,
  821. .set_frontend = lgdt330x_set_parameters,
  822. .get_frontend = lgdt330x_get_frontend,
  823. .get_tune_settings = lgdt330x_get_tune_settings,
  824. .read_status = lgdt3302_read_status,
  825. .read_signal_strength = lgdt330x_read_signal_strength,
  826. .read_snr = lgdt330x_read_snr,
  827. .read_ucblocks = lgdt330x_read_ucblocks,
  828. .release = lgdt330x_release,
  829. };
  830. static const struct dvb_frontend_ops lgdt3303_ops = {
  831. .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
  832. .info = {
  833. .name = "LG Electronics LGDT3303 VSB/QAM Frontend",
  834. .frequency_min_hz = 54 * MHz,
  835. .frequency_max_hz = 858 * MHz,
  836. .frequency_stepsize_hz = 62500,
  837. .symbol_rate_min = 5056941, /* QAM 64 */
  838. .symbol_rate_max = 10762000, /* VSB 8 */
  839. .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
  840. },
  841. .init = lgdt330x_init,
  842. .set_frontend = lgdt330x_set_parameters,
  843. .get_frontend = lgdt330x_get_frontend,
  844. .get_tune_settings = lgdt330x_get_tune_settings,
  845. .read_status = lgdt3303_read_status,
  846. .read_signal_strength = lgdt330x_read_signal_strength,
  847. .read_snr = lgdt330x_read_snr,
  848. .read_ucblocks = lgdt330x_read_ucblocks,
  849. .release = lgdt330x_release,
  850. };
  851. static void lgdt330x_remove(struct i2c_client *client)
  852. {
  853. struct lgdt330x_state *state = i2c_get_clientdata(client);
  854. dev_dbg(&client->dev, "\n");
  855. kfree(state);
  856. }
  857. static const struct i2c_device_id lgdt330x_id_table[] = {
  858. { "lgdt330x" },
  859. {}
  860. };
  861. MODULE_DEVICE_TABLE(i2c, lgdt330x_id_table);
  862. static struct i2c_driver lgdt330x_driver = {
  863. .driver = {
  864. .name = "lgdt330x",
  865. .suppress_bind_attrs = true,
  866. },
  867. .probe = lgdt330x_probe,
  868. .remove = lgdt330x_remove,
  869. .id_table = lgdt330x_id_table,
  870. };
  871. module_i2c_driver(lgdt330x_driver);
  872. MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
  873. MODULE_AUTHOR("Wilson Michaels");
  874. MODULE_LICENSE("GPL");