of_iommu.c 6.8 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * OF helpers for IOMMU
  4. *
  5. * Copyright (c) 2012, NVIDIA CORPORATION. All rights reserved.
  6. */
  7. #include <linux/export.h>
  8. #include <linux/iommu.h>
  9. #include <linux/limits.h>
  10. #include <linux/module.h>
  11. #include <linux/of.h>
  12. #include <linux/of_address.h>
  13. #include <linux/of_iommu.h>
  14. #include <linux/of_pci.h>
  15. #include <linux/pci.h>
  16. #include <linux/slab.h>
  17. #include <linux/fsl/mc.h>
  18. #include "iommu-priv.h"
  19. static int of_iommu_xlate(struct device *dev,
  20. struct of_phandle_args *iommu_spec)
  21. {
  22. const struct iommu_ops *ops;
  23. int ret;
  24. if (!of_device_is_available(iommu_spec->np))
  25. return -ENODEV;
  26. ret = iommu_fwspec_init(dev, of_fwnode_handle(iommu_spec->np));
  27. if (ret)
  28. return ret;
  29. ops = iommu_ops_from_fwnode(&iommu_spec->np->fwnode);
  30. if (!ops->of_xlate || !try_module_get(ops->owner))
  31. return -ENODEV;
  32. ret = ops->of_xlate(dev, iommu_spec);
  33. module_put(ops->owner);
  34. return ret;
  35. }
  36. static int of_iommu_configure_dev_id(struct device_node *master_np,
  37. struct device *dev,
  38. const u32 *id)
  39. {
  40. struct of_phandle_args iommu_spec = { .args_count = 1 };
  41. int err;
  42. err = of_map_id(master_np, *id, "iommu-map",
  43. "iommu-map-mask", &iommu_spec.np,
  44. iommu_spec.args);
  45. if (err)
  46. return err;
  47. err = of_iommu_xlate(dev, &iommu_spec);
  48. of_node_put(iommu_spec.np);
  49. return err;
  50. }
  51. static int of_iommu_configure_dev(struct device_node *master_np,
  52. struct device *dev)
  53. {
  54. struct of_phandle_args iommu_spec;
  55. int err = -ENODEV, idx = 0;
  56. while (!of_parse_phandle_with_args(master_np, "iommus",
  57. "#iommu-cells",
  58. idx, &iommu_spec)) {
  59. err = of_iommu_xlate(dev, &iommu_spec);
  60. of_node_put(iommu_spec.np);
  61. idx++;
  62. if (err)
  63. break;
  64. }
  65. return err;
  66. }
  67. struct of_pci_iommu_alias_info {
  68. struct device *dev;
  69. struct device_node *np;
  70. };
  71. static int of_pci_iommu_init(struct pci_dev *pdev, u16 alias, void *data)
  72. {
  73. struct of_pci_iommu_alias_info *info = data;
  74. u32 input_id = alias;
  75. return of_iommu_configure_dev_id(info->np, info->dev, &input_id);
  76. }
  77. static int of_iommu_configure_device(struct device_node *master_np,
  78. struct device *dev, const u32 *id)
  79. {
  80. return (id) ? of_iommu_configure_dev_id(master_np, dev, id) :
  81. of_iommu_configure_dev(master_np, dev);
  82. }
  83. static void of_pci_check_device_ats(struct device *dev, struct device_node *np)
  84. {
  85. struct iommu_fwspec *fwspec = dev_iommu_fwspec_get(dev);
  86. if (fwspec && of_property_read_bool(np, "ats-supported"))
  87. fwspec->flags |= IOMMU_FWSPEC_PCI_RC_ATS;
  88. }
  89. /*
  90. * Returns:
  91. * 0 on success, an iommu was configured
  92. * -ENODEV if the device does not have any IOMMU
  93. * -EPROBEDEFER if probing should be tried again
  94. * -errno fatal errors
  95. */
  96. int of_iommu_configure(struct device *dev, struct device_node *master_np,
  97. const u32 *id)
  98. {
  99. bool dev_iommu_present;
  100. int err;
  101. if (!master_np)
  102. return -ENODEV;
  103. /* Serialise to make dev->iommu stable under our potential fwspec */
  104. mutex_lock(&iommu_probe_device_lock);
  105. if (dev_iommu_fwspec_get(dev)) {
  106. mutex_unlock(&iommu_probe_device_lock);
  107. return 0;
  108. }
  109. dev_iommu_present = dev->iommu;
  110. /*
  111. * We don't currently walk up the tree looking for a parent IOMMU.
  112. * See the `Notes:' section of
  113. * Documentation/devicetree/bindings/iommu/iommu.txt
  114. */
  115. if (dev_is_pci(dev)) {
  116. struct of_pci_iommu_alias_info info = {
  117. .dev = dev,
  118. .np = master_np,
  119. };
  120. pci_request_acs();
  121. err = pci_for_each_dma_alias(to_pci_dev(dev),
  122. of_pci_iommu_init, &info);
  123. of_pci_check_device_ats(dev, master_np);
  124. } else {
  125. err = of_iommu_configure_device(master_np, dev, id);
  126. }
  127. if (err && dev_iommu_present)
  128. iommu_fwspec_free(dev);
  129. else if (err && dev->iommu)
  130. dev_iommu_free(dev);
  131. mutex_unlock(&iommu_probe_device_lock);
  132. /*
  133. * If we're not on the iommu_probe_device() path (as indicated by the
  134. * initial dev->iommu) then try to simulate it. This should no longer
  135. * happen unless of_dma_configure() is being misused outside bus code.
  136. */
  137. if (!err && dev->bus && !dev_iommu_present)
  138. err = iommu_probe_device(dev);
  139. if (err && err != -EPROBE_DEFER)
  140. dev_dbg(dev, "Adding to IOMMU failed: %d\n", err);
  141. return err;
  142. }
  143. static enum iommu_resv_type __maybe_unused
  144. iommu_resv_region_get_type(struct device *dev,
  145. struct resource *phys,
  146. phys_addr_t start, size_t length)
  147. {
  148. phys_addr_t end = start + length - 1;
  149. /*
  150. * IOMMU regions without an associated physical region cannot be
  151. * mapped and are simply reservations.
  152. */
  153. if (phys->start >= phys->end)
  154. return IOMMU_RESV_RESERVED;
  155. /* may be IOMMU_RESV_DIRECT_RELAXABLE for certain cases */
  156. if (start == phys->start && end == phys->end)
  157. return IOMMU_RESV_DIRECT;
  158. dev_warn(dev, "treating non-direct mapping [%pr] -> [%pap-%pap] as reservation\n", phys,
  159. &start, &end);
  160. return IOMMU_RESV_RESERVED;
  161. }
  162. /**
  163. * of_iommu_get_resv_regions - reserved region driver helper for device tree
  164. * @dev: device for which to get reserved regions
  165. * @list: reserved region list
  166. *
  167. * IOMMU drivers can use this to implement their .get_resv_regions() callback
  168. * for memory regions attached to a device tree node. See the reserved-memory
  169. * device tree bindings on how to use these:
  170. *
  171. * Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
  172. */
  173. void of_iommu_get_resv_regions(struct device *dev, struct list_head *list)
  174. {
  175. #if IS_ENABLED(CONFIG_OF_ADDRESS)
  176. struct of_phandle_iterator it;
  177. int err;
  178. of_for_each_phandle(&it, err, dev->of_node, "memory-region", NULL, 0) {
  179. const __be32 *maps, *end;
  180. struct resource phys;
  181. int size;
  182. memset(&phys, 0, sizeof(phys));
  183. /*
  184. * The "reg" property is optional and can be omitted by reserved-memory regions
  185. * that represent reservations in the IOVA space, which are regions that should
  186. * not be mapped.
  187. */
  188. if (of_property_present(it.node, "reg")) {
  189. err = of_address_to_resource(it.node, 0, &phys);
  190. if (err < 0) {
  191. dev_err(dev, "failed to parse memory region %pOF: %d\n",
  192. it.node, err);
  193. continue;
  194. }
  195. }
  196. maps = of_get_property(it.node, "iommu-addresses", &size);
  197. if (!maps)
  198. continue;
  199. end = maps + size / sizeof(__be32);
  200. while (maps < end) {
  201. struct device_node *np;
  202. u32 phandle;
  203. phandle = be32_to_cpup(maps++);
  204. np = of_find_node_by_phandle(phandle);
  205. if (np == dev->of_node) {
  206. int prot = IOMMU_READ | IOMMU_WRITE;
  207. struct iommu_resv_region *region;
  208. enum iommu_resv_type type;
  209. phys_addr_t iova;
  210. size_t length;
  211. if (of_dma_is_coherent(dev->of_node))
  212. prot |= IOMMU_CACHE;
  213. maps = of_translate_dma_region(np, maps, &iova, &length);
  214. if (length == 0) {
  215. dev_warn(dev, "Cannot reserve IOVA region of 0 size\n");
  216. continue;
  217. }
  218. type = iommu_resv_region_get_type(dev, &phys, iova, length);
  219. region = iommu_alloc_resv_region(iova, length, prot, type,
  220. GFP_KERNEL);
  221. if (region)
  222. list_add_tail(&region->list, list);
  223. }
  224. }
  225. }
  226. #endif
  227. }
  228. EXPORT_SYMBOL(of_iommu_get_resv_regions);