iqs5xx.c 25 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Azoteq IQS550/572/525 Trackpad/Touchscreen Controller
  4. *
  5. * Copyright (C) 2018 Jeff LaBundy <jeff@labundy.com>
  6. *
  7. * These devices require firmware exported from a PC-based configuration tool
  8. * made available by the vendor. Firmware files may be pushed to the device's
  9. * nonvolatile memory by writing the filename to the 'fw_file' sysfs control.
  10. *
  11. * Link to PC-based configuration tool and datasheet: https://www.azoteq.com/
  12. */
  13. #include <linux/bits.h>
  14. #include <linux/delay.h>
  15. #include <linux/device.h>
  16. #include <linux/err.h>
  17. #include <linux/firmware.h>
  18. #include <linux/gpio/consumer.h>
  19. #include <linux/hex.h>
  20. #include <linux/i2c.h>
  21. #include <linux/input.h>
  22. #include <linux/input/mt.h>
  23. #include <linux/input/touchscreen.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/kernel.h>
  26. #include <linux/mod_devicetable.h>
  27. #include <linux/module.h>
  28. #include <linux/slab.h>
  29. #include <linux/unaligned.h>
  30. #define IQS5XX_FW_FILE_LEN 64
  31. #define IQS5XX_NUM_RETRIES 10
  32. #define IQS5XX_NUM_CONTACTS 5
  33. #define IQS5XX_WR_BYTES_MAX 2
  34. #define IQS5XX_PROD_NUM_IQS550 40
  35. #define IQS5XX_PROD_NUM_IQS572 58
  36. #define IQS5XX_PROD_NUM_IQS525 52
  37. #define IQS5XX_SHOW_RESET BIT(7)
  38. #define IQS5XX_ACK_RESET BIT(7)
  39. #define IQS5XX_SUSPEND BIT(0)
  40. #define IQS5XX_RESUME 0
  41. #define IQS5XX_SETUP_COMPLETE BIT(6)
  42. #define IQS5XX_WDT BIT(5)
  43. #define IQS5XX_ALP_REATI BIT(3)
  44. #define IQS5XX_REATI BIT(2)
  45. #define IQS5XX_TP_EVENT BIT(2)
  46. #define IQS5XX_EVENT_MODE BIT(0)
  47. #define IQS5XX_PROD_NUM 0x0000
  48. #define IQS5XX_SYS_INFO0 0x000F
  49. #define IQS5XX_SYS_INFO1 0x0010
  50. #define IQS5XX_SYS_CTRL0 0x0431
  51. #define IQS5XX_SYS_CTRL1 0x0432
  52. #define IQS5XX_SYS_CFG0 0x058E
  53. #define IQS5XX_SYS_CFG1 0x058F
  54. #define IQS5XX_X_RES 0x066E
  55. #define IQS5XX_Y_RES 0x0670
  56. #define IQS5XX_EXP_FILE 0x0677
  57. #define IQS5XX_CHKSM 0x83C0
  58. #define IQS5XX_APP 0x8400
  59. #define IQS5XX_CSTM 0xBE00
  60. #define IQS5XX_PMAP_END 0xBFFF
  61. #define IQS5XX_END_COMM 0xEEEE
  62. #define IQS5XX_CHKSM_LEN (IQS5XX_APP - IQS5XX_CHKSM)
  63. #define IQS5XX_APP_LEN (IQS5XX_CSTM - IQS5XX_APP)
  64. #define IQS5XX_CSTM_LEN (IQS5XX_PMAP_END + 1 - IQS5XX_CSTM)
  65. #define IQS5XX_PMAP_LEN (IQS5XX_PMAP_END + 1 - IQS5XX_CHKSM)
  66. #define IQS5XX_REC_HDR_LEN 4
  67. #define IQS5XX_REC_LEN_MAX 255
  68. #define IQS5XX_REC_TYPE_DATA 0x00
  69. #define IQS5XX_REC_TYPE_EOF 0x01
  70. #define IQS5XX_BL_ADDR_MASK 0x40
  71. #define IQS5XX_BL_CMD_VER 0x00
  72. #define IQS5XX_BL_CMD_READ 0x01
  73. #define IQS5XX_BL_CMD_EXEC 0x02
  74. #define IQS5XX_BL_CMD_CRC 0x03
  75. #define IQS5XX_BL_BLK_LEN_MAX 64
  76. #define IQS5XX_BL_ID 0x0200
  77. #define IQS5XX_BL_STATUS_NONE 0xEE
  78. #define IQS5XX_BL_CRC_PASS 0x00
  79. #define IQS5XX_BL_CRC_FAIL 0x01
  80. #define IQS5XX_BL_ATTEMPTS 3
  81. struct iqs5xx_dev_id_info {
  82. __be16 prod_num;
  83. __be16 proj_num;
  84. u8 major_ver;
  85. u8 minor_ver;
  86. u8 bl_status;
  87. } __packed;
  88. struct iqs5xx_ihex_rec {
  89. char start;
  90. char len[2];
  91. char addr[4];
  92. char type[2];
  93. char data[2];
  94. } __packed;
  95. struct iqs5xx_touch_data {
  96. __be16 abs_x;
  97. __be16 abs_y;
  98. __be16 strength;
  99. u8 area;
  100. } __packed;
  101. struct iqs5xx_status {
  102. u8 sys_info[2];
  103. u8 num_active;
  104. __be16 rel_x;
  105. __be16 rel_y;
  106. struct iqs5xx_touch_data touch_data[IQS5XX_NUM_CONTACTS];
  107. } __packed;
  108. struct iqs5xx_private {
  109. struct i2c_client *client;
  110. struct input_dev *input;
  111. struct gpio_desc *reset_gpio;
  112. struct touchscreen_properties prop;
  113. struct mutex lock;
  114. struct iqs5xx_dev_id_info dev_id_info;
  115. u8 exp_file[2];
  116. };
  117. static int iqs5xx_read_burst(struct i2c_client *client,
  118. u16 reg, void *val, u16 len)
  119. {
  120. __be16 reg_buf = cpu_to_be16(reg);
  121. int ret, i;
  122. struct i2c_msg msg[] = {
  123. {
  124. .addr = client->addr,
  125. .flags = 0,
  126. .len = sizeof(reg_buf),
  127. .buf = (u8 *)&reg_buf,
  128. },
  129. {
  130. .addr = client->addr,
  131. .flags = I2C_M_RD,
  132. .len = len,
  133. .buf = (u8 *)val,
  134. },
  135. };
  136. /*
  137. * The first addressing attempt outside of a communication window fails
  138. * and must be retried, after which the device clock stretches until it
  139. * is available.
  140. */
  141. for (i = 0; i < IQS5XX_NUM_RETRIES; i++) {
  142. ret = i2c_transfer(client->adapter, msg, ARRAY_SIZE(msg));
  143. if (ret == ARRAY_SIZE(msg))
  144. return 0;
  145. usleep_range(200, 300);
  146. }
  147. if (ret >= 0)
  148. ret = -EIO;
  149. dev_err(&client->dev, "Failed to read from address 0x%04X: %d\n",
  150. reg, ret);
  151. return ret;
  152. }
  153. static int iqs5xx_read_word(struct i2c_client *client, u16 reg, u16 *val)
  154. {
  155. __be16 val_buf;
  156. int error;
  157. error = iqs5xx_read_burst(client, reg, &val_buf, sizeof(val_buf));
  158. if (error)
  159. return error;
  160. *val = be16_to_cpu(val_buf);
  161. return 0;
  162. }
  163. static int iqs5xx_write_burst(struct i2c_client *client,
  164. u16 reg, const void *val, u16 len)
  165. {
  166. int ret, i;
  167. u16 mlen = sizeof(reg) + len;
  168. u8 mbuf[sizeof(reg) + IQS5XX_WR_BYTES_MAX];
  169. if (len > IQS5XX_WR_BYTES_MAX)
  170. return -EINVAL;
  171. put_unaligned_be16(reg, mbuf);
  172. memcpy(mbuf + sizeof(reg), val, len);
  173. /*
  174. * The first addressing attempt outside of a communication window fails
  175. * and must be retried, after which the device clock stretches until it
  176. * is available.
  177. */
  178. for (i = 0; i < IQS5XX_NUM_RETRIES; i++) {
  179. ret = i2c_master_send(client, mbuf, mlen);
  180. if (ret == mlen)
  181. return 0;
  182. usleep_range(200, 300);
  183. }
  184. if (ret >= 0)
  185. ret = -EIO;
  186. dev_err(&client->dev, "Failed to write to address 0x%04X: %d\n",
  187. reg, ret);
  188. return ret;
  189. }
  190. static int iqs5xx_write_word(struct i2c_client *client, u16 reg, u16 val)
  191. {
  192. __be16 val_buf = cpu_to_be16(val);
  193. return iqs5xx_write_burst(client, reg, &val_buf, sizeof(val_buf));
  194. }
  195. static int iqs5xx_write_byte(struct i2c_client *client, u16 reg, u8 val)
  196. {
  197. return iqs5xx_write_burst(client, reg, &val, sizeof(val));
  198. }
  199. static void iqs5xx_reset(struct i2c_client *client)
  200. {
  201. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  202. gpiod_set_value_cansleep(iqs5xx->reset_gpio, 1);
  203. usleep_range(200, 300);
  204. gpiod_set_value_cansleep(iqs5xx->reset_gpio, 0);
  205. }
  206. static int iqs5xx_bl_cmd(struct i2c_client *client, u8 bl_cmd, u16 bl_addr)
  207. {
  208. struct i2c_msg msg;
  209. int ret;
  210. u8 mbuf[sizeof(bl_cmd) + sizeof(bl_addr)];
  211. msg.addr = client->addr ^ IQS5XX_BL_ADDR_MASK;
  212. msg.flags = 0;
  213. msg.len = sizeof(bl_cmd);
  214. msg.buf = mbuf;
  215. *mbuf = bl_cmd;
  216. switch (bl_cmd) {
  217. case IQS5XX_BL_CMD_VER:
  218. case IQS5XX_BL_CMD_CRC:
  219. case IQS5XX_BL_CMD_EXEC:
  220. break;
  221. case IQS5XX_BL_CMD_READ:
  222. msg.len += sizeof(bl_addr);
  223. put_unaligned_be16(bl_addr, mbuf + sizeof(bl_cmd));
  224. break;
  225. default:
  226. return -EINVAL;
  227. }
  228. ret = i2c_transfer(client->adapter, &msg, 1);
  229. if (ret != 1)
  230. goto msg_fail;
  231. switch (bl_cmd) {
  232. case IQS5XX_BL_CMD_VER:
  233. msg.len = sizeof(u16);
  234. break;
  235. case IQS5XX_BL_CMD_CRC:
  236. msg.len = sizeof(u8);
  237. /*
  238. * This delay saves the bus controller the trouble of having to
  239. * tolerate a relatively long clock-stretching period while the
  240. * CRC is calculated.
  241. */
  242. msleep(50);
  243. break;
  244. case IQS5XX_BL_CMD_EXEC:
  245. usleep_range(10000, 10100);
  246. fallthrough;
  247. default:
  248. return 0;
  249. }
  250. msg.flags = I2C_M_RD;
  251. ret = i2c_transfer(client->adapter, &msg, 1);
  252. if (ret != 1)
  253. goto msg_fail;
  254. if (bl_cmd == IQS5XX_BL_CMD_VER &&
  255. get_unaligned_be16(mbuf) != IQS5XX_BL_ID) {
  256. dev_err(&client->dev, "Unrecognized bootloader ID: 0x%04X\n",
  257. get_unaligned_be16(mbuf));
  258. return -EINVAL;
  259. }
  260. if (bl_cmd == IQS5XX_BL_CMD_CRC && *mbuf != IQS5XX_BL_CRC_PASS) {
  261. dev_err(&client->dev, "Bootloader CRC failed\n");
  262. return -EIO;
  263. }
  264. return 0;
  265. msg_fail:
  266. if (ret >= 0)
  267. ret = -EIO;
  268. if (bl_cmd != IQS5XX_BL_CMD_VER)
  269. dev_err(&client->dev,
  270. "Unsuccessful bootloader command 0x%02X: %d\n",
  271. bl_cmd, ret);
  272. return ret;
  273. }
  274. static int iqs5xx_bl_open(struct i2c_client *client)
  275. {
  276. int error, i, j;
  277. /*
  278. * The device opens a bootloader polling window for 2 ms following the
  279. * release of reset. If the host cannot establish communication during
  280. * this time frame, it must cycle reset again.
  281. */
  282. for (i = 0; i < IQS5XX_BL_ATTEMPTS; i++) {
  283. iqs5xx_reset(client);
  284. usleep_range(350, 400);
  285. for (j = 0; j < IQS5XX_NUM_RETRIES; j++) {
  286. error = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_VER, 0);
  287. if (!error)
  288. usleep_range(10000, 10100);
  289. else if (error != -EINVAL)
  290. continue;
  291. return error;
  292. }
  293. }
  294. dev_err(&client->dev, "Failed to open bootloader: %d\n", error);
  295. return error;
  296. }
  297. static int iqs5xx_bl_write(struct i2c_client *client,
  298. u16 bl_addr, u8 *pmap_data, u16 pmap_len)
  299. {
  300. struct i2c_msg msg;
  301. int ret, i;
  302. u8 mbuf[sizeof(bl_addr) + IQS5XX_BL_BLK_LEN_MAX];
  303. if (pmap_len % IQS5XX_BL_BLK_LEN_MAX)
  304. return -EINVAL;
  305. msg.addr = client->addr ^ IQS5XX_BL_ADDR_MASK;
  306. msg.flags = 0;
  307. msg.len = sizeof(mbuf);
  308. msg.buf = mbuf;
  309. for (i = 0; i < pmap_len; i += IQS5XX_BL_BLK_LEN_MAX) {
  310. put_unaligned_be16(bl_addr + i, mbuf);
  311. memcpy(mbuf + sizeof(bl_addr), pmap_data + i,
  312. sizeof(mbuf) - sizeof(bl_addr));
  313. ret = i2c_transfer(client->adapter, &msg, 1);
  314. if (ret != 1)
  315. goto msg_fail;
  316. usleep_range(10000, 10100);
  317. }
  318. return 0;
  319. msg_fail:
  320. if (ret >= 0)
  321. ret = -EIO;
  322. dev_err(&client->dev, "Failed to write block at address 0x%04X: %d\n",
  323. bl_addr + i, ret);
  324. return ret;
  325. }
  326. static int iqs5xx_bl_verify(struct i2c_client *client,
  327. u16 bl_addr, u8 *pmap_data, u16 pmap_len)
  328. {
  329. struct i2c_msg msg;
  330. int ret, i;
  331. u8 bl_data[IQS5XX_BL_BLK_LEN_MAX];
  332. if (pmap_len % IQS5XX_BL_BLK_LEN_MAX)
  333. return -EINVAL;
  334. msg.addr = client->addr ^ IQS5XX_BL_ADDR_MASK;
  335. msg.flags = I2C_M_RD;
  336. msg.len = sizeof(bl_data);
  337. msg.buf = bl_data;
  338. for (i = 0; i < pmap_len; i += IQS5XX_BL_BLK_LEN_MAX) {
  339. ret = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_READ, bl_addr + i);
  340. if (ret)
  341. return ret;
  342. ret = i2c_transfer(client->adapter, &msg, 1);
  343. if (ret != 1)
  344. goto msg_fail;
  345. if (memcmp(bl_data, pmap_data + i, sizeof(bl_data))) {
  346. dev_err(&client->dev,
  347. "Failed to verify block at address 0x%04X\n",
  348. bl_addr + i);
  349. return -EIO;
  350. }
  351. }
  352. return 0;
  353. msg_fail:
  354. if (ret >= 0)
  355. ret = -EIO;
  356. dev_err(&client->dev, "Failed to read block at address 0x%04X: %d\n",
  357. bl_addr + i, ret);
  358. return ret;
  359. }
  360. static int iqs5xx_set_state(struct i2c_client *client, u8 state)
  361. {
  362. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  363. int error1, error2;
  364. if (!iqs5xx->dev_id_info.bl_status)
  365. return 0;
  366. mutex_lock(&iqs5xx->lock);
  367. /*
  368. * Addressing the device outside of a communication window prompts it
  369. * to assert the RDY output, so disable the interrupt line to prevent
  370. * the handler from servicing a false interrupt.
  371. */
  372. disable_irq(client->irq);
  373. error1 = iqs5xx_write_byte(client, IQS5XX_SYS_CTRL1, state);
  374. error2 = iqs5xx_write_byte(client, IQS5XX_END_COMM, 0);
  375. usleep_range(50, 100);
  376. enable_irq(client->irq);
  377. mutex_unlock(&iqs5xx->lock);
  378. if (error1)
  379. return error1;
  380. return error2;
  381. }
  382. static int iqs5xx_open(struct input_dev *input)
  383. {
  384. struct iqs5xx_private *iqs5xx = input_get_drvdata(input);
  385. return iqs5xx_set_state(iqs5xx->client, IQS5XX_RESUME);
  386. }
  387. static void iqs5xx_close(struct input_dev *input)
  388. {
  389. struct iqs5xx_private *iqs5xx = input_get_drvdata(input);
  390. iqs5xx_set_state(iqs5xx->client, IQS5XX_SUSPEND);
  391. }
  392. static int iqs5xx_axis_init(struct i2c_client *client)
  393. {
  394. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  395. struct touchscreen_properties *prop = &iqs5xx->prop;
  396. struct input_dev *input = iqs5xx->input;
  397. u16 max_x, max_y;
  398. int error;
  399. if (!input) {
  400. input = devm_input_allocate_device(&client->dev);
  401. if (!input)
  402. return -ENOMEM;
  403. input->name = client->name;
  404. input->id.bustype = BUS_I2C;
  405. input->open = iqs5xx_open;
  406. input->close = iqs5xx_close;
  407. input_set_drvdata(input, iqs5xx);
  408. iqs5xx->input = input;
  409. }
  410. error = iqs5xx_read_word(client, IQS5XX_X_RES, &max_x);
  411. if (error)
  412. return error;
  413. error = iqs5xx_read_word(client, IQS5XX_Y_RES, &max_y);
  414. if (error)
  415. return error;
  416. input_set_abs_params(input, ABS_MT_POSITION_X, 0, max_x, 0, 0);
  417. input_set_abs_params(input, ABS_MT_POSITION_Y, 0, max_y, 0, 0);
  418. input_set_abs_params(input, ABS_MT_PRESSURE, 0, U16_MAX, 0, 0);
  419. touchscreen_parse_properties(input, true, prop);
  420. /*
  421. * The device reserves 0xFFFF for coordinates that correspond to slots
  422. * which are not in a state of touch.
  423. */
  424. if (prop->max_x >= U16_MAX || prop->max_y >= U16_MAX) {
  425. dev_err(&client->dev, "Invalid touchscreen size: %u*%u\n",
  426. prop->max_x, prop->max_y);
  427. return -EINVAL;
  428. }
  429. if (prop->max_x != max_x) {
  430. error = iqs5xx_write_word(client, IQS5XX_X_RES, prop->max_x);
  431. if (error)
  432. return error;
  433. }
  434. if (prop->max_y != max_y) {
  435. error = iqs5xx_write_word(client, IQS5XX_Y_RES, prop->max_y);
  436. if (error)
  437. return error;
  438. }
  439. error = input_mt_init_slots(input, IQS5XX_NUM_CONTACTS,
  440. INPUT_MT_DIRECT);
  441. if (error)
  442. dev_err(&client->dev, "Failed to initialize slots: %d\n",
  443. error);
  444. return error;
  445. }
  446. static int iqs5xx_dev_init(struct i2c_client *client)
  447. {
  448. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  449. struct iqs5xx_dev_id_info *dev_id_info;
  450. int error;
  451. u8 buf[sizeof(*dev_id_info) + 1];
  452. error = iqs5xx_read_burst(client, IQS5XX_PROD_NUM,
  453. &buf[1], sizeof(*dev_id_info));
  454. if (error)
  455. return iqs5xx_bl_open(client);
  456. /*
  457. * A000 and B000 devices use 8-bit and 16-bit addressing, respectively.
  458. * Querying an A000 device's version information with 16-bit addressing
  459. * gives the appearance that the data is shifted by one byte; a nonzero
  460. * leading array element suggests this could be the case (in which case
  461. * the missing zero is prepended).
  462. */
  463. buf[0] = 0;
  464. dev_id_info = (struct iqs5xx_dev_id_info *)&buf[buf[1] ? 0 : 1];
  465. switch (be16_to_cpu(dev_id_info->prod_num)) {
  466. case IQS5XX_PROD_NUM_IQS550:
  467. case IQS5XX_PROD_NUM_IQS572:
  468. case IQS5XX_PROD_NUM_IQS525:
  469. break;
  470. default:
  471. dev_err(&client->dev, "Unrecognized product number: %u\n",
  472. be16_to_cpu(dev_id_info->prod_num));
  473. return -EINVAL;
  474. }
  475. /*
  476. * With the product number recognized yet shifted by one byte, open the
  477. * bootloader and wait for user space to convert the A000 device into a
  478. * B000 device via new firmware.
  479. */
  480. if (buf[1]) {
  481. dev_err(&client->dev, "Opening bootloader for A000 device\n");
  482. return iqs5xx_bl_open(client);
  483. }
  484. error = iqs5xx_read_burst(client, IQS5XX_EXP_FILE,
  485. iqs5xx->exp_file, sizeof(iqs5xx->exp_file));
  486. if (error)
  487. return error;
  488. error = iqs5xx_axis_init(client);
  489. if (error)
  490. return error;
  491. error = iqs5xx_write_byte(client, IQS5XX_SYS_CTRL0, IQS5XX_ACK_RESET);
  492. if (error)
  493. return error;
  494. error = iqs5xx_write_byte(client, IQS5XX_SYS_CFG0,
  495. IQS5XX_SETUP_COMPLETE | IQS5XX_WDT |
  496. IQS5XX_ALP_REATI | IQS5XX_REATI);
  497. if (error)
  498. return error;
  499. error = iqs5xx_write_byte(client, IQS5XX_SYS_CFG1,
  500. IQS5XX_TP_EVENT | IQS5XX_EVENT_MODE);
  501. if (error)
  502. return error;
  503. error = iqs5xx_write_byte(client, IQS5XX_END_COMM, 0);
  504. if (error)
  505. return error;
  506. iqs5xx->dev_id_info = *dev_id_info;
  507. /*
  508. * The following delay allows ATI to complete before the open and close
  509. * callbacks are free to elicit I2C communication. Any attempts to read
  510. * from or write to the device during this time may face extended clock
  511. * stretching and prompt the I2C controller to report an error.
  512. */
  513. msleep(250);
  514. return 0;
  515. }
  516. static irqreturn_t iqs5xx_irq(int irq, void *data)
  517. {
  518. struct iqs5xx_private *iqs5xx = data;
  519. struct iqs5xx_status status;
  520. struct i2c_client *client = iqs5xx->client;
  521. struct input_dev *input = iqs5xx->input;
  522. int error, i;
  523. /*
  524. * This check is purely a precaution, as the device does not assert the
  525. * RDY output during bootloader mode. If the device operates outside of
  526. * bootloader mode, the input device is guaranteed to be allocated.
  527. */
  528. if (!iqs5xx->dev_id_info.bl_status)
  529. return IRQ_NONE;
  530. error = iqs5xx_read_burst(client, IQS5XX_SYS_INFO0,
  531. &status, sizeof(status));
  532. if (error)
  533. return IRQ_NONE;
  534. if (status.sys_info[0] & IQS5XX_SHOW_RESET) {
  535. dev_err(&client->dev, "Unexpected device reset\n");
  536. error = iqs5xx_dev_init(client);
  537. if (error) {
  538. dev_err(&client->dev,
  539. "Failed to re-initialize device: %d\n", error);
  540. return IRQ_NONE;
  541. }
  542. return IRQ_HANDLED;
  543. }
  544. for (i = 0; i < ARRAY_SIZE(status.touch_data); i++) {
  545. struct iqs5xx_touch_data *touch_data = &status.touch_data[i];
  546. u16 pressure = be16_to_cpu(touch_data->strength);
  547. input_mt_slot(input, i);
  548. if (input_mt_report_slot_state(input, MT_TOOL_FINGER,
  549. pressure != 0)) {
  550. touchscreen_report_pos(input, &iqs5xx->prop,
  551. be16_to_cpu(touch_data->abs_x),
  552. be16_to_cpu(touch_data->abs_y),
  553. true);
  554. input_report_abs(input, ABS_MT_PRESSURE, pressure);
  555. }
  556. }
  557. input_mt_sync_frame(input);
  558. input_sync(input);
  559. error = iqs5xx_write_byte(client, IQS5XX_END_COMM, 0);
  560. if (error)
  561. return IRQ_NONE;
  562. /*
  563. * Once the communication window is closed, a small delay is added to
  564. * ensure the device's RDY output has been deasserted by the time the
  565. * interrupt handler returns.
  566. */
  567. usleep_range(50, 100);
  568. return IRQ_HANDLED;
  569. }
  570. static int iqs5xx_fw_file_parse(struct i2c_client *client,
  571. const char *fw_file, u8 *pmap)
  572. {
  573. const struct firmware *fw;
  574. struct iqs5xx_ihex_rec *rec;
  575. size_t pos = 0;
  576. int error, i;
  577. u16 rec_num = 1;
  578. u16 rec_addr;
  579. u8 rec_len, rec_type, rec_chksm, chksm;
  580. u8 rec_hdr[IQS5XX_REC_HDR_LEN];
  581. u8 rec_data[IQS5XX_REC_LEN_MAX];
  582. /*
  583. * Firmware exported from the vendor's configuration tool deviates from
  584. * standard ihex as follows: (1) the checksum for records corresponding
  585. * to user-exported settings is not recalculated, and (2) an address of
  586. * 0xFFFF is used for the EOF record.
  587. *
  588. * Because the ihex2fw tool tolerates neither (1) nor (2), the slightly
  589. * nonstandard ihex firmware is parsed directly by the driver.
  590. */
  591. error = request_firmware(&fw, fw_file, &client->dev);
  592. if (error) {
  593. dev_err(&client->dev, "Failed to request firmware %s: %d\n",
  594. fw_file, error);
  595. return error;
  596. }
  597. do {
  598. if (pos + sizeof(*rec) > fw->size) {
  599. dev_err(&client->dev, "Insufficient firmware size\n");
  600. error = -EINVAL;
  601. break;
  602. }
  603. rec = (struct iqs5xx_ihex_rec *)(fw->data + pos);
  604. pos += sizeof(*rec);
  605. if (rec->start != ':') {
  606. dev_err(&client->dev, "Invalid start at record %u\n",
  607. rec_num);
  608. error = -EINVAL;
  609. break;
  610. }
  611. error = hex2bin(rec_hdr, rec->len, sizeof(rec_hdr));
  612. if (error) {
  613. dev_err(&client->dev, "Invalid header at record %u\n",
  614. rec_num);
  615. break;
  616. }
  617. rec_len = *rec_hdr;
  618. rec_addr = get_unaligned_be16(rec_hdr + sizeof(rec_len));
  619. rec_type = *(rec_hdr + sizeof(rec_len) + sizeof(rec_addr));
  620. if (pos + rec_len * 2 > fw->size) {
  621. dev_err(&client->dev, "Insufficient firmware size\n");
  622. error = -EINVAL;
  623. break;
  624. }
  625. pos += (rec_len * 2);
  626. error = hex2bin(rec_data, rec->data, rec_len);
  627. if (error) {
  628. dev_err(&client->dev, "Invalid data at record %u\n",
  629. rec_num);
  630. break;
  631. }
  632. error = hex2bin(&rec_chksm,
  633. rec->data + rec_len * 2, sizeof(rec_chksm));
  634. if (error) {
  635. dev_err(&client->dev, "Invalid checksum at record %u\n",
  636. rec_num);
  637. break;
  638. }
  639. chksm = 0;
  640. for (i = 0; i < sizeof(rec_hdr); i++)
  641. chksm += rec_hdr[i];
  642. for (i = 0; i < rec_len; i++)
  643. chksm += rec_data[i];
  644. chksm = ~chksm + 1;
  645. if (chksm != rec_chksm && rec_addr < IQS5XX_CSTM) {
  646. dev_err(&client->dev,
  647. "Incorrect checksum at record %u\n",
  648. rec_num);
  649. error = -EINVAL;
  650. break;
  651. }
  652. switch (rec_type) {
  653. case IQS5XX_REC_TYPE_DATA:
  654. if (rec_addr < IQS5XX_CHKSM ||
  655. rec_addr > IQS5XX_PMAP_END) {
  656. dev_err(&client->dev,
  657. "Invalid address at record %u\n",
  658. rec_num);
  659. error = -EINVAL;
  660. } else {
  661. memcpy(pmap + rec_addr - IQS5XX_CHKSM,
  662. rec_data, rec_len);
  663. }
  664. break;
  665. case IQS5XX_REC_TYPE_EOF:
  666. break;
  667. default:
  668. dev_err(&client->dev, "Invalid type at record %u\n",
  669. rec_num);
  670. error = -EINVAL;
  671. }
  672. if (error)
  673. break;
  674. rec_num++;
  675. while (pos < fw->size) {
  676. if (*(fw->data + pos) == ':')
  677. break;
  678. pos++;
  679. }
  680. } while (rec_type != IQS5XX_REC_TYPE_EOF);
  681. release_firmware(fw);
  682. return error;
  683. }
  684. static int iqs5xx_fw_file_write(struct i2c_client *client, const char *fw_file)
  685. {
  686. struct iqs5xx_private *iqs5xx = i2c_get_clientdata(client);
  687. int error, error_init = 0;
  688. u8 *pmap;
  689. pmap = kzalloc(IQS5XX_PMAP_LEN, GFP_KERNEL);
  690. if (!pmap)
  691. return -ENOMEM;
  692. error = iqs5xx_fw_file_parse(client, fw_file, pmap);
  693. if (error)
  694. goto err_kfree;
  695. mutex_lock(&iqs5xx->lock);
  696. /*
  697. * Disable the interrupt line in case the first attempt(s) to enter the
  698. * bootloader don't happen quickly enough, in which case the device may
  699. * assert the RDY output until the next attempt.
  700. */
  701. disable_irq(client->irq);
  702. iqs5xx->dev_id_info.bl_status = 0;
  703. error = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_VER, 0);
  704. if (error) {
  705. error = iqs5xx_bl_open(client);
  706. if (error)
  707. goto err_reset;
  708. }
  709. error = iqs5xx_bl_write(client, IQS5XX_CHKSM, pmap, IQS5XX_PMAP_LEN);
  710. if (error)
  711. goto err_reset;
  712. error = iqs5xx_bl_cmd(client, IQS5XX_BL_CMD_CRC, 0);
  713. if (error)
  714. goto err_reset;
  715. error = iqs5xx_bl_verify(client, IQS5XX_CSTM,
  716. pmap + IQS5XX_CHKSM_LEN + IQS5XX_APP_LEN,
  717. IQS5XX_CSTM_LEN);
  718. err_reset:
  719. iqs5xx_reset(client);
  720. usleep_range(15000, 15100);
  721. error_init = iqs5xx_dev_init(client);
  722. if (!iqs5xx->dev_id_info.bl_status)
  723. error_init = error_init ? : -EINVAL;
  724. enable_irq(client->irq);
  725. mutex_unlock(&iqs5xx->lock);
  726. err_kfree:
  727. kfree(pmap);
  728. return error ? : error_init;
  729. }
  730. static ssize_t fw_file_store(struct device *dev,
  731. struct device_attribute *attr, const char *buf,
  732. size_t count)
  733. {
  734. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  735. struct i2c_client *client = iqs5xx->client;
  736. size_t len = count;
  737. bool input_reg = !iqs5xx->input;
  738. char fw_file[IQS5XX_FW_FILE_LEN + 1];
  739. int error;
  740. if (!len)
  741. return -EINVAL;
  742. if (buf[len - 1] == '\n')
  743. len--;
  744. if (len > IQS5XX_FW_FILE_LEN)
  745. return -ENAMETOOLONG;
  746. memcpy(fw_file, buf, len);
  747. fw_file[len] = '\0';
  748. error = iqs5xx_fw_file_write(client, fw_file);
  749. if (error)
  750. return error;
  751. /*
  752. * If the input device was not allocated already, it is guaranteed to
  753. * be allocated by this point and can finally be registered.
  754. */
  755. if (input_reg) {
  756. error = input_register_device(iqs5xx->input);
  757. if (error) {
  758. dev_err(&client->dev,
  759. "Failed to register device: %d\n",
  760. error);
  761. return error;
  762. }
  763. }
  764. return count;
  765. }
  766. static ssize_t fw_info_show(struct device *dev,
  767. struct device_attribute *attr, char *buf)
  768. {
  769. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  770. if (!iqs5xx->dev_id_info.bl_status)
  771. return -ENODATA;
  772. return sysfs_emit(buf, "%u.%u.%u.%u:%u.%u\n",
  773. be16_to_cpu(iqs5xx->dev_id_info.prod_num),
  774. be16_to_cpu(iqs5xx->dev_id_info.proj_num),
  775. iqs5xx->dev_id_info.major_ver,
  776. iqs5xx->dev_id_info.minor_ver,
  777. iqs5xx->exp_file[0], iqs5xx->exp_file[1]);
  778. }
  779. static DEVICE_ATTR_WO(fw_file);
  780. static DEVICE_ATTR_RO(fw_info);
  781. static struct attribute *iqs5xx_attrs[] = {
  782. &dev_attr_fw_file.attr,
  783. &dev_attr_fw_info.attr,
  784. NULL,
  785. };
  786. static umode_t iqs5xx_attr_is_visible(struct kobject *kobj,
  787. struct attribute *attr, int i)
  788. {
  789. struct device *dev = kobj_to_dev(kobj);
  790. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  791. if (attr == &dev_attr_fw_file.attr &&
  792. (iqs5xx->dev_id_info.bl_status == IQS5XX_BL_STATUS_NONE ||
  793. !iqs5xx->reset_gpio))
  794. return 0;
  795. return attr->mode;
  796. }
  797. static const struct attribute_group iqs5xx_group = {
  798. .is_visible = iqs5xx_attr_is_visible,
  799. .attrs = iqs5xx_attrs,
  800. };
  801. __ATTRIBUTE_GROUPS(iqs5xx);
  802. static int iqs5xx_suspend(struct device *dev)
  803. {
  804. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  805. struct input_dev *input = iqs5xx->input;
  806. int error = 0;
  807. if (!input || device_may_wakeup(dev))
  808. return error;
  809. mutex_lock(&input->mutex);
  810. if (input_device_enabled(input))
  811. error = iqs5xx_set_state(iqs5xx->client, IQS5XX_SUSPEND);
  812. mutex_unlock(&input->mutex);
  813. return error;
  814. }
  815. static int iqs5xx_resume(struct device *dev)
  816. {
  817. struct iqs5xx_private *iqs5xx = dev_get_drvdata(dev);
  818. struct input_dev *input = iqs5xx->input;
  819. int error = 0;
  820. if (!input || device_may_wakeup(dev))
  821. return error;
  822. mutex_lock(&input->mutex);
  823. if (input_device_enabled(input))
  824. error = iqs5xx_set_state(iqs5xx->client, IQS5XX_RESUME);
  825. mutex_unlock(&input->mutex);
  826. return error;
  827. }
  828. static DEFINE_SIMPLE_DEV_PM_OPS(iqs5xx_pm, iqs5xx_suspend, iqs5xx_resume);
  829. static int iqs5xx_probe(struct i2c_client *client)
  830. {
  831. struct iqs5xx_private *iqs5xx;
  832. int error;
  833. iqs5xx = devm_kzalloc(&client->dev, sizeof(*iqs5xx), GFP_KERNEL);
  834. if (!iqs5xx)
  835. return -ENOMEM;
  836. i2c_set_clientdata(client, iqs5xx);
  837. iqs5xx->client = client;
  838. iqs5xx->reset_gpio = devm_gpiod_get_optional(&client->dev,
  839. "reset", GPIOD_OUT_LOW);
  840. if (IS_ERR(iqs5xx->reset_gpio)) {
  841. error = PTR_ERR(iqs5xx->reset_gpio);
  842. dev_err(&client->dev, "Failed to request GPIO: %d\n", error);
  843. return error;
  844. }
  845. mutex_init(&iqs5xx->lock);
  846. error = iqs5xx_dev_init(client);
  847. if (error)
  848. return error;
  849. error = devm_request_threaded_irq(&client->dev, client->irq,
  850. NULL, iqs5xx_irq, IRQF_ONESHOT,
  851. client->name, iqs5xx);
  852. if (error) {
  853. dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
  854. return error;
  855. }
  856. if (iqs5xx->input) {
  857. error = input_register_device(iqs5xx->input);
  858. if (error)
  859. dev_err(&client->dev,
  860. "Failed to register device: %d\n",
  861. error);
  862. }
  863. return error;
  864. }
  865. static const struct i2c_device_id iqs5xx_id[] = {
  866. { "iqs550", 0 },
  867. { "iqs572", 1 },
  868. { "iqs525", 2 },
  869. { }
  870. };
  871. MODULE_DEVICE_TABLE(i2c, iqs5xx_id);
  872. static const struct of_device_id iqs5xx_of_match[] = {
  873. { .compatible = "azoteq,iqs550" },
  874. { .compatible = "azoteq,iqs572" },
  875. { .compatible = "azoteq,iqs525" },
  876. { }
  877. };
  878. MODULE_DEVICE_TABLE(of, iqs5xx_of_match);
  879. static struct i2c_driver iqs5xx_i2c_driver = {
  880. .driver = {
  881. .name = "iqs5xx",
  882. .dev_groups = iqs5xx_groups,
  883. .of_match_table = iqs5xx_of_match,
  884. .pm = pm_sleep_ptr(&iqs5xx_pm),
  885. },
  886. .id_table = iqs5xx_id,
  887. .probe = iqs5xx_probe,
  888. };
  889. module_i2c_driver(iqs5xx_i2c_driver);
  890. MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
  891. MODULE_DESCRIPTION("Azoteq IQS550/572/525 Trackpad/Touchscreen Controller");
  892. MODULE_LICENSE("GPL");