ps2-gpio.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * GPIO based serio bus driver for bit banging the PS/2 protocol
  4. *
  5. * Author: Danilo Krummrich <danilokrummrich@dk-develop.de>
  6. */
  7. #include <linux/gpio/consumer.h>
  8. #include <linux/interrupt.h>
  9. #include <linux/module.h>
  10. #include <linux/serio.h>
  11. #include <linux/slab.h>
  12. #include <linux/platform_device.h>
  13. #include <linux/workqueue.h>
  14. #include <linux/completion.h>
  15. #include <linux/mutex.h>
  16. #include <linux/preempt.h>
  17. #include <linux/property.h>
  18. #include <linux/of.h>
  19. #include <linux/jiffies.h>
  20. #include <linux/delay.h>
  21. #include <linux/timekeeping.h>
  22. #define DRIVER_NAME "ps2-gpio"
  23. #define PS2_MODE_RX 0
  24. #define PS2_MODE_TX 1
  25. #define PS2_START_BIT 0
  26. #define PS2_DATA_BIT0 1
  27. #define PS2_DATA_BIT1 2
  28. #define PS2_DATA_BIT2 3
  29. #define PS2_DATA_BIT3 4
  30. #define PS2_DATA_BIT4 5
  31. #define PS2_DATA_BIT5 6
  32. #define PS2_DATA_BIT6 7
  33. #define PS2_DATA_BIT7 8
  34. #define PS2_PARITY_BIT 9
  35. #define PS2_STOP_BIT 10
  36. #define PS2_ACK_BIT 11
  37. #define PS2_DEV_RET_ACK 0xfa
  38. #define PS2_DEV_RET_NACK 0xfe
  39. #define PS2_CMD_RESEND 0xfe
  40. /*
  41. * The PS2 protocol specifies a clock frequency between 10kHz and 16.7kHz,
  42. * therefore the maximal interrupt interval should be 100us and the minimum
  43. * interrupt interval should be ~60us. Let's allow +/- 20us for frequency
  44. * deviations and interrupt latency.
  45. *
  46. * The data line must be sampled after ~30us to 50us after the falling edge,
  47. * since the device updates the data line at the rising edge.
  48. *
  49. * ___ ______ ______ ______ ___
  50. * \ / \ / \ / \ /
  51. * \ / \ / \ / \ /
  52. * \______/ \______/ \______/ \______/
  53. *
  54. * |-----------------| |--------|
  55. * 60us/100us 30us/50us
  56. */
  57. #define PS2_CLK_FREQ_MIN_HZ 10000
  58. #define PS2_CLK_FREQ_MAX_HZ 16700
  59. #define PS2_CLK_MIN_INTERVAL_US ((1000 * 1000) / PS2_CLK_FREQ_MAX_HZ)
  60. #define PS2_CLK_MAX_INTERVAL_US ((1000 * 1000) / PS2_CLK_FREQ_MIN_HZ)
  61. #define PS2_IRQ_MIN_INTERVAL_US (PS2_CLK_MIN_INTERVAL_US - 20)
  62. #define PS2_IRQ_MAX_INTERVAL_US (PS2_CLK_MAX_INTERVAL_US + 20)
  63. struct ps2_gpio_data {
  64. struct device *dev;
  65. struct serio *serio;
  66. unsigned char mode;
  67. struct gpio_desc *gpio_clk;
  68. struct gpio_desc *gpio_data;
  69. bool write_enable;
  70. int irq;
  71. ktime_t t_irq_now;
  72. ktime_t t_irq_last;
  73. struct {
  74. unsigned char cnt;
  75. unsigned char byte;
  76. } rx;
  77. struct {
  78. unsigned char cnt;
  79. unsigned char byte;
  80. ktime_t t_xfer_start;
  81. ktime_t t_xfer_end;
  82. struct completion complete;
  83. struct mutex mutex;
  84. struct delayed_work work;
  85. } tx;
  86. };
  87. static int ps2_gpio_open(struct serio *serio)
  88. {
  89. struct ps2_gpio_data *drvdata = serio->port_data;
  90. drvdata->t_irq_last = 0;
  91. drvdata->tx.t_xfer_end = 0;
  92. enable_irq(drvdata->irq);
  93. return 0;
  94. }
  95. static void ps2_gpio_close(struct serio *serio)
  96. {
  97. struct ps2_gpio_data *drvdata = serio->port_data;
  98. flush_delayed_work(&drvdata->tx.work);
  99. disable_irq(drvdata->irq);
  100. }
  101. static int __ps2_gpio_write(struct serio *serio, unsigned char val)
  102. {
  103. struct ps2_gpio_data *drvdata = serio->port_data;
  104. disable_irq_nosync(drvdata->irq);
  105. gpiod_direction_output(drvdata->gpio_clk, 0);
  106. drvdata->mode = PS2_MODE_TX;
  107. drvdata->tx.byte = val;
  108. schedule_delayed_work(&drvdata->tx.work, usecs_to_jiffies(200));
  109. return 0;
  110. }
  111. static int ps2_gpio_write(struct serio *serio, unsigned char val)
  112. {
  113. struct ps2_gpio_data *drvdata = serio->port_data;
  114. int ret = 0;
  115. if (in_task()) {
  116. guard(mutex)(&drvdata->tx.mutex);
  117. __ps2_gpio_write(serio, val);
  118. if (!wait_for_completion_timeout(&drvdata->tx.complete,
  119. msecs_to_jiffies(10000)))
  120. ret = SERIO_TIMEOUT;
  121. } else {
  122. __ps2_gpio_write(serio, val);
  123. }
  124. return ret;
  125. }
  126. static void ps2_gpio_tx_work_fn(struct work_struct *work)
  127. {
  128. struct delayed_work *dwork = to_delayed_work(work);
  129. struct ps2_gpio_data *drvdata = container_of(dwork,
  130. struct ps2_gpio_data,
  131. tx.work);
  132. drvdata->tx.t_xfer_start = ktime_get();
  133. enable_irq(drvdata->irq);
  134. gpiod_direction_output(drvdata->gpio_data, 0);
  135. gpiod_direction_input(drvdata->gpio_clk);
  136. }
  137. static irqreturn_t ps2_gpio_irq_rx(struct ps2_gpio_data *drvdata)
  138. {
  139. unsigned char byte, cnt;
  140. int data;
  141. int rxflags = 0;
  142. s64 us_delta;
  143. byte = drvdata->rx.byte;
  144. cnt = drvdata->rx.cnt;
  145. drvdata->t_irq_now = ktime_get();
  146. /*
  147. * We need to consider spurious interrupts happening right after
  148. * a TX xfer finished.
  149. */
  150. us_delta = ktime_us_delta(drvdata->t_irq_now, drvdata->tx.t_xfer_end);
  151. if (unlikely(us_delta < PS2_IRQ_MIN_INTERVAL_US))
  152. goto end;
  153. us_delta = ktime_us_delta(drvdata->t_irq_now, drvdata->t_irq_last);
  154. if (us_delta > PS2_IRQ_MAX_INTERVAL_US && cnt) {
  155. dev_err(drvdata->dev,
  156. "RX: timeout, probably we missed an interrupt\n");
  157. goto err;
  158. } else if (unlikely(us_delta < PS2_IRQ_MIN_INTERVAL_US)) {
  159. /* Ignore spurious IRQs. */
  160. goto end;
  161. }
  162. drvdata->t_irq_last = drvdata->t_irq_now;
  163. data = gpiod_get_value(drvdata->gpio_data);
  164. if (unlikely(data < 0)) {
  165. dev_err(drvdata->dev, "RX: failed to get data gpio val: %d\n",
  166. data);
  167. goto err;
  168. }
  169. switch (cnt) {
  170. case PS2_START_BIT:
  171. /* start bit should be low */
  172. if (unlikely(data)) {
  173. dev_err(drvdata->dev, "RX: start bit should be low\n");
  174. goto err;
  175. }
  176. break;
  177. case PS2_DATA_BIT0:
  178. case PS2_DATA_BIT1:
  179. case PS2_DATA_BIT2:
  180. case PS2_DATA_BIT3:
  181. case PS2_DATA_BIT4:
  182. case PS2_DATA_BIT5:
  183. case PS2_DATA_BIT6:
  184. case PS2_DATA_BIT7:
  185. /* processing data bits */
  186. if (data)
  187. byte |= (data << (cnt - 1));
  188. break;
  189. case PS2_PARITY_BIT:
  190. /* check odd parity */
  191. if (!((hweight8(byte) & 1) ^ data)) {
  192. rxflags |= SERIO_PARITY;
  193. dev_warn(drvdata->dev, "RX: parity error\n");
  194. if (!drvdata->write_enable)
  195. goto err;
  196. }
  197. break;
  198. case PS2_STOP_BIT:
  199. /* stop bit should be high */
  200. if (unlikely(!data)) {
  201. dev_err(drvdata->dev, "RX: stop bit should be high\n");
  202. goto err;
  203. }
  204. /*
  205. * Do not send spurious ACK's and NACK's when write fn is
  206. * not provided.
  207. */
  208. if (!drvdata->write_enable) {
  209. if (byte == PS2_DEV_RET_NACK)
  210. goto err;
  211. else if (byte == PS2_DEV_RET_ACK)
  212. break;
  213. }
  214. serio_interrupt(drvdata->serio, byte, rxflags);
  215. dev_dbg(drvdata->dev, "RX: sending byte 0x%x\n", byte);
  216. cnt = byte = 0;
  217. goto end; /* success */
  218. default:
  219. dev_err(drvdata->dev, "RX: got out of sync with the device\n");
  220. goto err;
  221. }
  222. cnt++;
  223. goto end; /* success */
  224. err:
  225. cnt = byte = 0;
  226. __ps2_gpio_write(drvdata->serio, PS2_CMD_RESEND);
  227. end:
  228. drvdata->rx.cnt = cnt;
  229. drvdata->rx.byte = byte;
  230. return IRQ_HANDLED;
  231. }
  232. static irqreturn_t ps2_gpio_irq_tx(struct ps2_gpio_data *drvdata)
  233. {
  234. unsigned char byte, cnt;
  235. int data;
  236. s64 us_delta;
  237. cnt = drvdata->tx.cnt;
  238. byte = drvdata->tx.byte;
  239. drvdata->t_irq_now = ktime_get();
  240. /*
  241. * There might be pending IRQs since we disabled IRQs in
  242. * __ps2_gpio_write(). We can expect at least one clock period until
  243. * the device generates the first falling edge after releasing the
  244. * clock line.
  245. */
  246. us_delta = ktime_us_delta(drvdata->t_irq_now,
  247. drvdata->tx.t_xfer_start);
  248. if (unlikely(us_delta < PS2_CLK_MIN_INTERVAL_US))
  249. goto end;
  250. us_delta = ktime_us_delta(drvdata->t_irq_now, drvdata->t_irq_last);
  251. if (us_delta > PS2_IRQ_MAX_INTERVAL_US && cnt > 1) {
  252. dev_err(drvdata->dev,
  253. "TX: timeout, probably we missed an interrupt\n");
  254. goto err;
  255. } else if (unlikely(us_delta < PS2_IRQ_MIN_INTERVAL_US)) {
  256. /* Ignore spurious IRQs. */
  257. goto end;
  258. }
  259. drvdata->t_irq_last = drvdata->t_irq_now;
  260. switch (cnt) {
  261. case PS2_START_BIT:
  262. /* should never happen */
  263. dev_err(drvdata->dev,
  264. "TX: start bit should have been sent already\n");
  265. goto err;
  266. case PS2_DATA_BIT0:
  267. case PS2_DATA_BIT1:
  268. case PS2_DATA_BIT2:
  269. case PS2_DATA_BIT3:
  270. case PS2_DATA_BIT4:
  271. case PS2_DATA_BIT5:
  272. case PS2_DATA_BIT6:
  273. case PS2_DATA_BIT7:
  274. data = byte & BIT(cnt - 1);
  275. gpiod_set_value(drvdata->gpio_data, data);
  276. break;
  277. case PS2_PARITY_BIT:
  278. /* do odd parity */
  279. data = !(hweight8(byte) & 1);
  280. gpiod_set_value(drvdata->gpio_data, data);
  281. break;
  282. case PS2_STOP_BIT:
  283. /* release data line to generate stop bit */
  284. gpiod_direction_input(drvdata->gpio_data);
  285. break;
  286. case PS2_ACK_BIT:
  287. data = gpiod_get_value(drvdata->gpio_data);
  288. if (data) {
  289. dev_warn(drvdata->dev, "TX: received NACK, retry\n");
  290. goto err;
  291. }
  292. drvdata->tx.t_xfer_end = ktime_get();
  293. drvdata->mode = PS2_MODE_RX;
  294. complete(&drvdata->tx.complete);
  295. cnt = 1;
  296. goto end; /* success */
  297. default:
  298. /*
  299. * Probably we missed the stop bit. Therefore we release data
  300. * line and try again.
  301. */
  302. gpiod_direction_input(drvdata->gpio_data);
  303. dev_err(drvdata->dev, "TX: got out of sync with the device\n");
  304. goto err;
  305. }
  306. cnt++;
  307. goto end; /* success */
  308. err:
  309. cnt = 1;
  310. gpiod_direction_input(drvdata->gpio_data);
  311. __ps2_gpio_write(drvdata->serio, drvdata->tx.byte);
  312. end:
  313. drvdata->tx.cnt = cnt;
  314. return IRQ_HANDLED;
  315. }
  316. static irqreturn_t ps2_gpio_irq(int irq, void *dev_id)
  317. {
  318. struct ps2_gpio_data *drvdata = dev_id;
  319. return drvdata->mode ? ps2_gpio_irq_tx(drvdata) :
  320. ps2_gpio_irq_rx(drvdata);
  321. }
  322. static int ps2_gpio_get_props(struct device *dev,
  323. struct ps2_gpio_data *drvdata)
  324. {
  325. enum gpiod_flags gflags;
  326. /* Enforce open drain, since this is required by the PS/2 bus. */
  327. gflags = GPIOD_IN | GPIOD_FLAGS_BIT_OPEN_DRAIN;
  328. drvdata->gpio_data = devm_gpiod_get(dev, "data", gflags);
  329. if (IS_ERR(drvdata->gpio_data)) {
  330. dev_err(dev, "failed to request data gpio: %ld",
  331. PTR_ERR(drvdata->gpio_data));
  332. return PTR_ERR(drvdata->gpio_data);
  333. }
  334. drvdata->gpio_clk = devm_gpiod_get(dev, "clk", gflags);
  335. if (IS_ERR(drvdata->gpio_clk)) {
  336. dev_err(dev, "failed to request clock gpio: %ld",
  337. PTR_ERR(drvdata->gpio_clk));
  338. return PTR_ERR(drvdata->gpio_clk);
  339. }
  340. drvdata->write_enable = device_property_read_bool(dev,
  341. "write-enable");
  342. return 0;
  343. }
  344. static int ps2_gpio_probe(struct platform_device *pdev)
  345. {
  346. struct ps2_gpio_data *drvdata;
  347. struct serio *serio;
  348. struct device *dev = &pdev->dev;
  349. int error;
  350. drvdata = devm_kzalloc(dev, sizeof(*drvdata), GFP_KERNEL);
  351. serio = kzalloc_obj(*serio);
  352. if (!drvdata || !serio) {
  353. error = -ENOMEM;
  354. goto err_free_serio;
  355. }
  356. error = ps2_gpio_get_props(dev, drvdata);
  357. if (error)
  358. goto err_free_serio;
  359. if (gpiod_cansleep(drvdata->gpio_data) ||
  360. gpiod_cansleep(drvdata->gpio_clk)) {
  361. dev_err(dev, "GPIO data or clk are connected via slow bus\n");
  362. error = -EINVAL;
  363. goto err_free_serio;
  364. }
  365. drvdata->irq = platform_get_irq(pdev, 0);
  366. if (drvdata->irq < 0) {
  367. error = drvdata->irq;
  368. goto err_free_serio;
  369. }
  370. error = devm_request_irq(dev, drvdata->irq, ps2_gpio_irq,
  371. IRQF_NO_THREAD | IRQF_NO_AUTOEN, DRIVER_NAME,
  372. drvdata);
  373. if (error) {
  374. dev_err(dev, "failed to request irq %d: %d\n",
  375. drvdata->irq, error);
  376. goto err_free_serio;
  377. }
  378. serio->id.type = SERIO_8042;
  379. serio->open = ps2_gpio_open;
  380. serio->close = ps2_gpio_close;
  381. /*
  382. * Write can be enabled in platform/dt data, but possibly it will not
  383. * work because of the tough timings.
  384. */
  385. serio->write = drvdata->write_enable ? ps2_gpio_write : NULL;
  386. serio->port_data = drvdata;
  387. serio->dev.parent = dev;
  388. strscpy(serio->name, dev_name(dev), sizeof(serio->name));
  389. strscpy(serio->phys, dev_name(dev), sizeof(serio->phys));
  390. drvdata->serio = serio;
  391. drvdata->dev = dev;
  392. drvdata->mode = PS2_MODE_RX;
  393. /*
  394. * Tx count always starts at 1, as the start bit is sent implicitly by
  395. * host-to-device communication initialization.
  396. */
  397. drvdata->tx.cnt = 1;
  398. INIT_DELAYED_WORK(&drvdata->tx.work, ps2_gpio_tx_work_fn);
  399. init_completion(&drvdata->tx.complete);
  400. mutex_init(&drvdata->tx.mutex);
  401. serio_register_port(serio);
  402. platform_set_drvdata(pdev, drvdata);
  403. return 0; /* success */
  404. err_free_serio:
  405. kfree(serio);
  406. return error;
  407. }
  408. static void ps2_gpio_remove(struct platform_device *pdev)
  409. {
  410. struct ps2_gpio_data *drvdata = platform_get_drvdata(pdev);
  411. serio_unregister_port(drvdata->serio);
  412. }
  413. #if defined(CONFIG_OF)
  414. static const struct of_device_id ps2_gpio_match[] = {
  415. { .compatible = "ps2-gpio", },
  416. { },
  417. };
  418. MODULE_DEVICE_TABLE(of, ps2_gpio_match);
  419. #endif
  420. static struct platform_driver ps2_gpio_driver = {
  421. .probe = ps2_gpio_probe,
  422. .remove = ps2_gpio_remove,
  423. .driver = {
  424. .name = DRIVER_NAME,
  425. .of_match_table = of_match_ptr(ps2_gpio_match),
  426. },
  427. };
  428. module_platform_driver(ps2_gpio_driver);
  429. MODULE_AUTHOR("Danilo Krummrich <danilokrummrich@dk-develop.de>");
  430. MODULE_DESCRIPTION("GPIO PS2 driver");
  431. MODULE_LICENSE("GPL v2");