iqs269a.c 49 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Azoteq IQS269A Capacitive Touch Controller
  4. *
  5. * Copyright (C) 2020 Jeff LaBundy <jeff@labundy.com>
  6. *
  7. * This driver registers up to 3 input devices: one representing capacitive or
  8. * inductive keys as well as Hall-effect switches, and one for each of the two
  9. * axial sliders presented by the device.
  10. */
  11. #include <linux/bits.h>
  12. #include <linux/completion.h>
  13. #include <linux/delay.h>
  14. #include <linux/device.h>
  15. #include <linux/err.h>
  16. #include <linux/i2c.h>
  17. #include <linux/input.h>
  18. #include <linux/interrupt.h>
  19. #include <linux/kernel.h>
  20. #include <linux/mod_devicetable.h>
  21. #include <linux/module.h>
  22. #include <linux/mutex.h>
  23. #include <linux/property.h>
  24. #include <linux/regmap.h>
  25. #include <linux/slab.h>
  26. #define IQS269_VER_INFO 0x00
  27. #define IQS269_VER_INFO_PROD_NUM 0x4F
  28. #define IQS269_VER_INFO_FW_NUM_2 0x03
  29. #define IQS269_VER_INFO_FW_NUM_3 0x10
  30. #define IQS269_SYS_FLAGS 0x02
  31. #define IQS269_SYS_FLAGS_SHOW_RESET BIT(15)
  32. #define IQS269_SYS_FLAGS_PWR_MODE_MASK GENMASK(12, 11)
  33. #define IQS269_SYS_FLAGS_PWR_MODE_SHIFT 11
  34. #define IQS269_SYS_FLAGS_IN_ATI BIT(10)
  35. #define IQS269_CHx_COUNTS 0x08
  36. #define IQS269_SLIDER_X 0x30
  37. #define IQS269_CAL_DATA_A 0x35
  38. #define IQS269_CAL_DATA_A_HALL_BIN_L_MASK GENMASK(15, 12)
  39. #define IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT 12
  40. #define IQS269_CAL_DATA_A_HALL_BIN_R_MASK GENMASK(11, 8)
  41. #define IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT 8
  42. #define IQS269_SYS_SETTINGS 0x80
  43. #define IQS269_SYS_SETTINGS_CLK_DIV BIT(15)
  44. #define IQS269_SYS_SETTINGS_ULP_AUTO BIT(14)
  45. #define IQS269_SYS_SETTINGS_DIS_AUTO BIT(13)
  46. #define IQS269_SYS_SETTINGS_PWR_MODE_MASK GENMASK(12, 11)
  47. #define IQS269_SYS_SETTINGS_PWR_MODE_SHIFT 11
  48. #define IQS269_SYS_SETTINGS_PWR_MODE_MAX 3
  49. #define IQS269_SYS_SETTINGS_ULP_UPDATE_MASK GENMASK(10, 8)
  50. #define IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT 8
  51. #define IQS269_SYS_SETTINGS_ULP_UPDATE_MAX 7
  52. #define IQS269_SYS_SETTINGS_SLIDER_SWIPE BIT(7)
  53. #define IQS269_SYS_SETTINGS_RESEED_OFFSET BIT(6)
  54. #define IQS269_SYS_SETTINGS_EVENT_MODE BIT(5)
  55. #define IQS269_SYS_SETTINGS_EVENT_MODE_LP BIT(4)
  56. #define IQS269_SYS_SETTINGS_REDO_ATI BIT(2)
  57. #define IQS269_SYS_SETTINGS_ACK_RESET BIT(0)
  58. #define IQS269_FILT_STR_LP_LTA_MASK GENMASK(7, 6)
  59. #define IQS269_FILT_STR_LP_LTA_SHIFT 6
  60. #define IQS269_FILT_STR_LP_CNT_MASK GENMASK(5, 4)
  61. #define IQS269_FILT_STR_LP_CNT_SHIFT 4
  62. #define IQS269_FILT_STR_NP_LTA_MASK GENMASK(3, 2)
  63. #define IQS269_FILT_STR_NP_LTA_SHIFT 2
  64. #define IQS269_FILT_STR_NP_CNT_MASK GENMASK(1, 0)
  65. #define IQS269_FILT_STR_MAX 3
  66. #define IQS269_EVENT_MASK_SYS BIT(6)
  67. #define IQS269_EVENT_MASK_GESTURE BIT(3)
  68. #define IQS269_EVENT_MASK_DEEP BIT(2)
  69. #define IQS269_EVENT_MASK_TOUCH BIT(1)
  70. #define IQS269_EVENT_MASK_PROX BIT(0)
  71. #define IQS269_RATE_NP_MS_MAX 255
  72. #define IQS269_RATE_LP_MS_MAX 255
  73. #define IQS269_RATE_ULP_MS_MAX 4080
  74. #define IQS269_TIMEOUT_PWR_MS_MAX 130560
  75. #define IQS269_TIMEOUT_LTA_MS_MAX 130560
  76. #define IQS269_MISC_A_ATI_BAND_DISABLE BIT(15)
  77. #define IQS269_MISC_A_ATI_LP_ONLY BIT(14)
  78. #define IQS269_MISC_A_ATI_BAND_TIGHTEN BIT(13)
  79. #define IQS269_MISC_A_FILT_DISABLE BIT(12)
  80. #define IQS269_MISC_A_GPIO3_SELECT_MASK GENMASK(10, 8)
  81. #define IQS269_MISC_A_GPIO3_SELECT_SHIFT 8
  82. #define IQS269_MISC_A_DUAL_DIR BIT(6)
  83. #define IQS269_MISC_A_TX_FREQ_MASK GENMASK(5, 4)
  84. #define IQS269_MISC_A_TX_FREQ_SHIFT 4
  85. #define IQS269_MISC_A_TX_FREQ_MAX 3
  86. #define IQS269_MISC_A_GLOBAL_CAP_SIZE BIT(0)
  87. #define IQS269_MISC_B_RESEED_UI_SEL_MASK GENMASK(7, 6)
  88. #define IQS269_MISC_B_RESEED_UI_SEL_SHIFT 6
  89. #define IQS269_MISC_B_RESEED_UI_SEL_MAX 3
  90. #define IQS269_MISC_B_TRACKING_UI_ENABLE BIT(4)
  91. #define IQS269_MISC_B_FILT_STR_SLIDER GENMASK(1, 0)
  92. #define IQS269_TOUCH_HOLD_SLIDER_SEL 0x89
  93. #define IQS269_TOUCH_HOLD_DEFAULT 0x14
  94. #define IQS269_TOUCH_HOLD_MS_MIN 256
  95. #define IQS269_TOUCH_HOLD_MS_MAX 65280
  96. #define IQS269_TIMEOUT_TAP_MS_MAX 4080
  97. #define IQS269_TIMEOUT_SWIPE_MS_MAX 4080
  98. #define IQS269_THRESH_SWIPE_MAX 255
  99. #define IQS269_CHx_ENG_A_MEAS_CAP_SIZE BIT(15)
  100. #define IQS269_CHx_ENG_A_RX_GND_INACTIVE BIT(13)
  101. #define IQS269_CHx_ENG_A_LOCAL_CAP_SIZE BIT(12)
  102. #define IQS269_CHx_ENG_A_ATI_MODE_MASK GENMASK(9, 8)
  103. #define IQS269_CHx_ENG_A_ATI_MODE_SHIFT 8
  104. #define IQS269_CHx_ENG_A_ATI_MODE_MAX 3
  105. #define IQS269_CHx_ENG_A_INV_LOGIC BIT(7)
  106. #define IQS269_CHx_ENG_A_PROJ_BIAS_MASK GENMASK(6, 5)
  107. #define IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT 5
  108. #define IQS269_CHx_ENG_A_PROJ_BIAS_MAX 3
  109. #define IQS269_CHx_ENG_A_SENSE_MODE_MASK GENMASK(3, 0)
  110. #define IQS269_CHx_ENG_A_SENSE_MODE_MAX 15
  111. #define IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE BIT(13)
  112. #define IQS269_CHx_ENG_B_SENSE_FREQ_MASK GENMASK(10, 9)
  113. #define IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT 9
  114. #define IQS269_CHx_ENG_B_SENSE_FREQ_MAX 3
  115. #define IQS269_CHx_ENG_B_STATIC_ENABLE BIT(8)
  116. #define IQS269_CHx_ENG_B_ATI_BASE_MASK GENMASK(7, 6)
  117. #define IQS269_CHx_ENG_B_ATI_BASE_75 0x00
  118. #define IQS269_CHx_ENG_B_ATI_BASE_100 0x40
  119. #define IQS269_CHx_ENG_B_ATI_BASE_150 0x80
  120. #define IQS269_CHx_ENG_B_ATI_BASE_200 0xC0
  121. #define IQS269_CHx_ENG_B_ATI_TARGET_MASK GENMASK(5, 0)
  122. #define IQS269_CHx_ENG_B_ATI_TARGET_MAX 2016
  123. #define IQS269_CHx_WEIGHT_MAX 255
  124. #define IQS269_CHx_THRESH_MAX 255
  125. #define IQS269_CHx_HYST_DEEP_MASK GENMASK(7, 4)
  126. #define IQS269_CHx_HYST_DEEP_SHIFT 4
  127. #define IQS269_CHx_HYST_TOUCH_MASK GENMASK(3, 0)
  128. #define IQS269_CHx_HYST_MAX 15
  129. #define IQS269_CHx_HALL_INACTIVE 6
  130. #define IQS269_CHx_HALL_ACTIVE 7
  131. #define IQS269_HALL_PAD_R BIT(0)
  132. #define IQS269_HALL_PAD_L BIT(1)
  133. #define IQS269_HALL_PAD_INV BIT(6)
  134. #define IQS269_HALL_UI 0xF5
  135. #define IQS269_HALL_UI_ENABLE BIT(15)
  136. #define IQS269_MAX_REG 0xFF
  137. #define IQS269_OTP_OPTION_DEFAULT 0x00
  138. #define IQS269_OTP_OPTION_TWS 0xD0
  139. #define IQS269_OTP_OPTION_HOLD BIT(7)
  140. #define IQS269_NUM_CH 8
  141. #define IQS269_NUM_SL 2
  142. #define iqs269_irq_wait() usleep_range(200, 250)
  143. enum iqs269_local_cap_size {
  144. IQS269_LOCAL_CAP_SIZE_0,
  145. IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY,
  146. IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5,
  147. };
  148. enum iqs269_st_offs {
  149. IQS269_ST_OFFS_PROX,
  150. IQS269_ST_OFFS_DIR,
  151. IQS269_ST_OFFS_TOUCH,
  152. IQS269_ST_OFFS_DEEP,
  153. };
  154. enum iqs269_th_offs {
  155. IQS269_TH_OFFS_PROX,
  156. IQS269_TH_OFFS_TOUCH,
  157. IQS269_TH_OFFS_DEEP,
  158. };
  159. enum iqs269_event_id {
  160. IQS269_EVENT_PROX_DN,
  161. IQS269_EVENT_PROX_UP,
  162. IQS269_EVENT_TOUCH_DN,
  163. IQS269_EVENT_TOUCH_UP,
  164. IQS269_EVENT_DEEP_DN,
  165. IQS269_EVENT_DEEP_UP,
  166. };
  167. enum iqs269_slider_id {
  168. IQS269_SLIDER_NONE,
  169. IQS269_SLIDER_KEY,
  170. IQS269_SLIDER_RAW,
  171. };
  172. enum iqs269_gesture_id {
  173. IQS269_GESTURE_TAP,
  174. IQS269_GESTURE_HOLD,
  175. IQS269_GESTURE_FLICK_POS,
  176. IQS269_GESTURE_FLICK_NEG,
  177. IQS269_NUM_GESTURES,
  178. };
  179. struct iqs269_switch_desc {
  180. unsigned int code;
  181. bool enabled;
  182. };
  183. struct iqs269_event_desc {
  184. const char *name;
  185. enum iqs269_st_offs st_offs;
  186. enum iqs269_th_offs th_offs;
  187. bool dir_up;
  188. u8 mask;
  189. };
  190. static const struct iqs269_event_desc iqs269_events[] = {
  191. [IQS269_EVENT_PROX_DN] = {
  192. .name = "event-prox",
  193. .st_offs = IQS269_ST_OFFS_PROX,
  194. .th_offs = IQS269_TH_OFFS_PROX,
  195. .mask = IQS269_EVENT_MASK_PROX,
  196. },
  197. [IQS269_EVENT_PROX_UP] = {
  198. .name = "event-prox-alt",
  199. .st_offs = IQS269_ST_OFFS_PROX,
  200. .th_offs = IQS269_TH_OFFS_PROX,
  201. .dir_up = true,
  202. .mask = IQS269_EVENT_MASK_PROX,
  203. },
  204. [IQS269_EVENT_TOUCH_DN] = {
  205. .name = "event-touch",
  206. .st_offs = IQS269_ST_OFFS_TOUCH,
  207. .th_offs = IQS269_TH_OFFS_TOUCH,
  208. .mask = IQS269_EVENT_MASK_TOUCH,
  209. },
  210. [IQS269_EVENT_TOUCH_UP] = {
  211. .name = "event-touch-alt",
  212. .st_offs = IQS269_ST_OFFS_TOUCH,
  213. .th_offs = IQS269_TH_OFFS_TOUCH,
  214. .dir_up = true,
  215. .mask = IQS269_EVENT_MASK_TOUCH,
  216. },
  217. [IQS269_EVENT_DEEP_DN] = {
  218. .name = "event-deep",
  219. .st_offs = IQS269_ST_OFFS_DEEP,
  220. .th_offs = IQS269_TH_OFFS_DEEP,
  221. .mask = IQS269_EVENT_MASK_DEEP,
  222. },
  223. [IQS269_EVENT_DEEP_UP] = {
  224. .name = "event-deep-alt",
  225. .st_offs = IQS269_ST_OFFS_DEEP,
  226. .th_offs = IQS269_TH_OFFS_DEEP,
  227. .dir_up = true,
  228. .mask = IQS269_EVENT_MASK_DEEP,
  229. },
  230. };
  231. struct iqs269_ver_info {
  232. u8 prod_num;
  233. u8 sw_num;
  234. u8 hw_num;
  235. u8 fw_num;
  236. } __packed;
  237. struct iqs269_ch_reg {
  238. u8 rx_enable;
  239. u8 tx_enable;
  240. __be16 engine_a;
  241. __be16 engine_b;
  242. __be16 ati_comp;
  243. u8 thresh[3];
  244. u8 hyst;
  245. u8 assoc_select;
  246. u8 assoc_weight;
  247. } __packed;
  248. struct iqs269_sys_reg {
  249. __be16 general;
  250. u8 active;
  251. u8 filter;
  252. u8 reseed;
  253. u8 event_mask;
  254. u8 rate_np;
  255. u8 rate_lp;
  256. u8 rate_ulp;
  257. u8 timeout_pwr;
  258. u8 timeout_rdy;
  259. u8 timeout_lta;
  260. __be16 misc_a;
  261. __be16 misc_b;
  262. u8 blocking;
  263. u8 padding;
  264. u8 slider_select[IQS269_NUM_SL];
  265. u8 timeout_tap;
  266. u8 timeout_swipe;
  267. u8 thresh_swipe;
  268. u8 redo_ati;
  269. struct iqs269_ch_reg ch_reg[IQS269_NUM_CH];
  270. } __packed;
  271. struct iqs269_flags {
  272. __be16 system;
  273. u8 gesture;
  274. u8 padding;
  275. u8 states[4];
  276. } __packed;
  277. struct iqs269_private {
  278. struct i2c_client *client;
  279. struct regmap *regmap;
  280. struct mutex lock;
  281. struct iqs269_switch_desc switches[ARRAY_SIZE(iqs269_events)];
  282. struct iqs269_ver_info ver_info;
  283. struct iqs269_sys_reg sys_reg;
  284. struct completion ati_done;
  285. struct input_dev *keypad;
  286. struct input_dev *slider[IQS269_NUM_SL];
  287. unsigned int keycode[ARRAY_SIZE(iqs269_events) * IQS269_NUM_CH];
  288. unsigned int sl_code[IQS269_NUM_SL][IQS269_NUM_GESTURES];
  289. unsigned int otp_option;
  290. unsigned int ch_num;
  291. bool hall_enable;
  292. bool ati_current;
  293. };
  294. static enum iqs269_slider_id iqs269_slider_type(struct iqs269_private *iqs269,
  295. int slider_num)
  296. {
  297. int i;
  298. /*
  299. * Slider 1 is unavailable if the touch-and-hold option is enabled via
  300. * OTP. In that case, the channel selection register is repurposed for
  301. * the touch-and-hold timer ceiling.
  302. */
  303. if (slider_num && (iqs269->otp_option & IQS269_OTP_OPTION_HOLD))
  304. return IQS269_SLIDER_NONE;
  305. if (!iqs269->sys_reg.slider_select[slider_num])
  306. return IQS269_SLIDER_NONE;
  307. for (i = 0; i < IQS269_NUM_GESTURES; i++)
  308. if (iqs269->sl_code[slider_num][i] != KEY_RESERVED)
  309. return IQS269_SLIDER_KEY;
  310. return IQS269_SLIDER_RAW;
  311. }
  312. static int iqs269_ati_mode_set(struct iqs269_private *iqs269,
  313. unsigned int ch_num, unsigned int mode)
  314. {
  315. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  316. u16 engine_a;
  317. if (ch_num >= IQS269_NUM_CH)
  318. return -EINVAL;
  319. if (mode > IQS269_CHx_ENG_A_ATI_MODE_MAX)
  320. return -EINVAL;
  321. guard(mutex)(&iqs269->lock);
  322. engine_a = be16_to_cpu(ch_reg[ch_num].engine_a);
  323. engine_a &= ~IQS269_CHx_ENG_A_ATI_MODE_MASK;
  324. engine_a |= (mode << IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
  325. ch_reg[ch_num].engine_a = cpu_to_be16(engine_a);
  326. iqs269->ati_current = false;
  327. return 0;
  328. }
  329. static int iqs269_ati_mode_get(struct iqs269_private *iqs269,
  330. unsigned int ch_num, unsigned int *mode)
  331. {
  332. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  333. u16 engine_a;
  334. if (ch_num >= IQS269_NUM_CH)
  335. return -EINVAL;
  336. guard(mutex)(&iqs269->lock);
  337. engine_a = be16_to_cpu(ch_reg[ch_num].engine_a);
  338. engine_a &= IQS269_CHx_ENG_A_ATI_MODE_MASK;
  339. *mode = (engine_a >> IQS269_CHx_ENG_A_ATI_MODE_SHIFT);
  340. return 0;
  341. }
  342. static int iqs269_ati_base_set(struct iqs269_private *iqs269,
  343. unsigned int ch_num, unsigned int base)
  344. {
  345. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  346. u16 engine_b;
  347. if (ch_num >= IQS269_NUM_CH)
  348. return -EINVAL;
  349. switch (base) {
  350. case 75:
  351. base = IQS269_CHx_ENG_B_ATI_BASE_75;
  352. break;
  353. case 100:
  354. base = IQS269_CHx_ENG_B_ATI_BASE_100;
  355. break;
  356. case 150:
  357. base = IQS269_CHx_ENG_B_ATI_BASE_150;
  358. break;
  359. case 200:
  360. base = IQS269_CHx_ENG_B_ATI_BASE_200;
  361. break;
  362. default:
  363. return -EINVAL;
  364. }
  365. guard(mutex)(&iqs269->lock);
  366. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  367. engine_b &= ~IQS269_CHx_ENG_B_ATI_BASE_MASK;
  368. engine_b |= base;
  369. ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
  370. iqs269->ati_current = false;
  371. return 0;
  372. }
  373. static int iqs269_ati_base_get(struct iqs269_private *iqs269,
  374. unsigned int ch_num, unsigned int *base)
  375. {
  376. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  377. u16 engine_b;
  378. if (ch_num >= IQS269_NUM_CH)
  379. return -EINVAL;
  380. guard(mutex)(&iqs269->lock);
  381. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  382. switch (engine_b & IQS269_CHx_ENG_B_ATI_BASE_MASK) {
  383. case IQS269_CHx_ENG_B_ATI_BASE_75:
  384. *base = 75;
  385. return 0;
  386. case IQS269_CHx_ENG_B_ATI_BASE_100:
  387. *base = 100;
  388. return 0;
  389. case IQS269_CHx_ENG_B_ATI_BASE_150:
  390. *base = 150;
  391. return 0;
  392. case IQS269_CHx_ENG_B_ATI_BASE_200:
  393. *base = 200;
  394. return 0;
  395. default:
  396. return -EINVAL;
  397. }
  398. }
  399. static int iqs269_ati_target_set(struct iqs269_private *iqs269,
  400. unsigned int ch_num, unsigned int target)
  401. {
  402. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  403. u16 engine_b;
  404. if (ch_num >= IQS269_NUM_CH)
  405. return -EINVAL;
  406. if (target > IQS269_CHx_ENG_B_ATI_TARGET_MAX)
  407. return -EINVAL;
  408. guard(mutex)(&iqs269->lock);
  409. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  410. engine_b &= ~IQS269_CHx_ENG_B_ATI_TARGET_MASK;
  411. engine_b |= target / 32;
  412. ch_reg[ch_num].engine_b = cpu_to_be16(engine_b);
  413. iqs269->ati_current = false;
  414. return 0;
  415. }
  416. static int iqs269_ati_target_get(struct iqs269_private *iqs269,
  417. unsigned int ch_num, unsigned int *target)
  418. {
  419. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  420. u16 engine_b;
  421. if (ch_num >= IQS269_NUM_CH)
  422. return -EINVAL;
  423. guard(mutex)(&iqs269->lock);
  424. engine_b = be16_to_cpu(ch_reg[ch_num].engine_b);
  425. *target = (engine_b & IQS269_CHx_ENG_B_ATI_TARGET_MASK) * 32;
  426. return 0;
  427. }
  428. static int iqs269_parse_mask(const struct fwnode_handle *fwnode,
  429. const char *propname, u8 *mask)
  430. {
  431. unsigned int val[IQS269_NUM_CH];
  432. int count, error, i;
  433. count = fwnode_property_count_u32(fwnode, propname);
  434. if (count < 0)
  435. return 0;
  436. if (count > IQS269_NUM_CH)
  437. return -EINVAL;
  438. error = fwnode_property_read_u32_array(fwnode, propname, val, count);
  439. if (error)
  440. return error;
  441. *mask = 0;
  442. for (i = 0; i < count; i++) {
  443. if (val[i] >= IQS269_NUM_CH)
  444. return -EINVAL;
  445. *mask |= BIT(val[i]);
  446. }
  447. return 0;
  448. }
  449. static int iqs269_parse_chan(struct iqs269_private *iqs269,
  450. const struct fwnode_handle *ch_node)
  451. {
  452. struct i2c_client *client = iqs269->client;
  453. struct iqs269_ch_reg *ch_reg;
  454. u16 engine_a, engine_b;
  455. unsigned int reg, val;
  456. int error, i;
  457. error = fwnode_property_read_u32(ch_node, "reg", &reg);
  458. if (error) {
  459. dev_err(&client->dev, "Failed to read channel number: %d\n",
  460. error);
  461. return error;
  462. } else if (reg >= IQS269_NUM_CH) {
  463. dev_err(&client->dev, "Invalid channel number: %u\n", reg);
  464. return -EINVAL;
  465. }
  466. iqs269->sys_reg.active |= BIT(reg);
  467. if (!fwnode_property_present(ch_node, "azoteq,reseed-disable"))
  468. iqs269->sys_reg.reseed |= BIT(reg);
  469. if (fwnode_property_present(ch_node, "azoteq,blocking-enable"))
  470. iqs269->sys_reg.blocking |= BIT(reg);
  471. if (fwnode_property_present(ch_node, "azoteq,slider0-select"))
  472. iqs269->sys_reg.slider_select[0] |= BIT(reg);
  473. if (fwnode_property_present(ch_node, "azoteq,slider1-select") &&
  474. !(iqs269->otp_option & IQS269_OTP_OPTION_HOLD))
  475. iqs269->sys_reg.slider_select[1] |= BIT(reg);
  476. ch_reg = &iqs269->sys_reg.ch_reg[reg];
  477. error = iqs269_parse_mask(ch_node, "azoteq,rx-enable",
  478. &ch_reg->rx_enable);
  479. if (error) {
  480. dev_err(&client->dev, "Invalid channel %u RX enable mask: %d\n",
  481. reg, error);
  482. return error;
  483. }
  484. error = iqs269_parse_mask(ch_node, "azoteq,tx-enable",
  485. &ch_reg->tx_enable);
  486. if (error) {
  487. dev_err(&client->dev, "Invalid channel %u TX enable mask: %d\n",
  488. reg, error);
  489. return error;
  490. }
  491. engine_a = be16_to_cpu(ch_reg->engine_a);
  492. engine_b = be16_to_cpu(ch_reg->engine_b);
  493. engine_a |= IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
  494. if (fwnode_property_present(ch_node, "azoteq,meas-cap-decrease"))
  495. engine_a &= ~IQS269_CHx_ENG_A_MEAS_CAP_SIZE;
  496. engine_a |= IQS269_CHx_ENG_A_RX_GND_INACTIVE;
  497. if (fwnode_property_present(ch_node, "azoteq,rx-float-inactive"))
  498. engine_a &= ~IQS269_CHx_ENG_A_RX_GND_INACTIVE;
  499. engine_a &= ~IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
  500. engine_b &= ~IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
  501. if (!fwnode_property_read_u32(ch_node, "azoteq,local-cap-size", &val)) {
  502. switch (val) {
  503. case IQS269_LOCAL_CAP_SIZE_0:
  504. break;
  505. case IQS269_LOCAL_CAP_SIZE_GLOBAL_0pF5:
  506. engine_a |= IQS269_CHx_ENG_A_LOCAL_CAP_SIZE;
  507. fallthrough;
  508. case IQS269_LOCAL_CAP_SIZE_GLOBAL_ONLY:
  509. engine_b |= IQS269_CHx_ENG_B_LOCAL_CAP_ENABLE;
  510. break;
  511. default:
  512. dev_err(&client->dev,
  513. "Invalid channel %u local cap. size: %u\n", reg,
  514. val);
  515. return -EINVAL;
  516. }
  517. }
  518. engine_a &= ~IQS269_CHx_ENG_A_INV_LOGIC;
  519. if (fwnode_property_present(ch_node, "azoteq,invert-enable"))
  520. engine_a |= IQS269_CHx_ENG_A_INV_LOGIC;
  521. if (!fwnode_property_read_u32(ch_node, "azoteq,proj-bias", &val)) {
  522. if (val > IQS269_CHx_ENG_A_PROJ_BIAS_MAX) {
  523. dev_err(&client->dev,
  524. "Invalid channel %u bias current: %u\n", reg,
  525. val);
  526. return -EINVAL;
  527. }
  528. engine_a &= ~IQS269_CHx_ENG_A_PROJ_BIAS_MASK;
  529. engine_a |= (val << IQS269_CHx_ENG_A_PROJ_BIAS_SHIFT);
  530. }
  531. if (!fwnode_property_read_u32(ch_node, "azoteq,sense-mode", &val)) {
  532. if (val > IQS269_CHx_ENG_A_SENSE_MODE_MAX) {
  533. dev_err(&client->dev,
  534. "Invalid channel %u sensing mode: %u\n", reg,
  535. val);
  536. return -EINVAL;
  537. }
  538. engine_a &= ~IQS269_CHx_ENG_A_SENSE_MODE_MASK;
  539. engine_a |= val;
  540. }
  541. if (!fwnode_property_read_u32(ch_node, "azoteq,sense-freq", &val)) {
  542. if (val > IQS269_CHx_ENG_B_SENSE_FREQ_MAX) {
  543. dev_err(&client->dev,
  544. "Invalid channel %u sensing frequency: %u\n",
  545. reg, val);
  546. return -EINVAL;
  547. }
  548. engine_b &= ~IQS269_CHx_ENG_B_SENSE_FREQ_MASK;
  549. engine_b |= (val << IQS269_CHx_ENG_B_SENSE_FREQ_SHIFT);
  550. }
  551. engine_b &= ~IQS269_CHx_ENG_B_STATIC_ENABLE;
  552. if (fwnode_property_present(ch_node, "azoteq,static-enable"))
  553. engine_b |= IQS269_CHx_ENG_B_STATIC_ENABLE;
  554. ch_reg->engine_a = cpu_to_be16(engine_a);
  555. ch_reg->engine_b = cpu_to_be16(engine_b);
  556. if (!fwnode_property_read_u32(ch_node, "azoteq,ati-mode", &val)) {
  557. error = iqs269_ati_mode_set(iqs269, reg, val);
  558. if (error) {
  559. dev_err(&client->dev,
  560. "Invalid channel %u ATI mode: %u\n", reg, val);
  561. return error;
  562. }
  563. }
  564. if (!fwnode_property_read_u32(ch_node, "azoteq,ati-base", &val)) {
  565. error = iqs269_ati_base_set(iqs269, reg, val);
  566. if (error) {
  567. dev_err(&client->dev,
  568. "Invalid channel %u ATI base: %u\n", reg, val);
  569. return error;
  570. }
  571. }
  572. if (!fwnode_property_read_u32(ch_node, "azoteq,ati-target", &val)) {
  573. error = iqs269_ati_target_set(iqs269, reg, val);
  574. if (error) {
  575. dev_err(&client->dev,
  576. "Invalid channel %u ATI target: %u\n", reg,
  577. val);
  578. return error;
  579. }
  580. }
  581. error = iqs269_parse_mask(ch_node, "azoteq,assoc-select",
  582. &ch_reg->assoc_select);
  583. if (error) {
  584. dev_err(&client->dev, "Invalid channel %u association: %d\n",
  585. reg, error);
  586. return error;
  587. }
  588. if (!fwnode_property_read_u32(ch_node, "azoteq,assoc-weight", &val)) {
  589. if (val > IQS269_CHx_WEIGHT_MAX) {
  590. dev_err(&client->dev,
  591. "Invalid channel %u associated weight: %u\n",
  592. reg, val);
  593. return -EINVAL;
  594. }
  595. ch_reg->assoc_weight = val;
  596. }
  597. for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
  598. struct fwnode_handle *ev_node __free(fwnode_handle) =
  599. fwnode_get_named_child_node(ch_node,
  600. iqs269_events[i].name);
  601. if (!ev_node)
  602. continue;
  603. if (!fwnode_property_read_u32(ev_node, "azoteq,thresh", &val)) {
  604. if (val > IQS269_CHx_THRESH_MAX) {
  605. dev_err(&client->dev,
  606. "Invalid channel %u threshold: %u\n",
  607. reg, val);
  608. return -EINVAL;
  609. }
  610. ch_reg->thresh[iqs269_events[i].th_offs] = val;
  611. }
  612. if (!fwnode_property_read_u32(ev_node, "azoteq,hyst", &val)) {
  613. u8 *hyst = &ch_reg->hyst;
  614. if (val > IQS269_CHx_HYST_MAX) {
  615. dev_err(&client->dev,
  616. "Invalid channel %u hysteresis: %u\n",
  617. reg, val);
  618. return -EINVAL;
  619. }
  620. if (i == IQS269_EVENT_DEEP_DN ||
  621. i == IQS269_EVENT_DEEP_UP) {
  622. *hyst &= ~IQS269_CHx_HYST_DEEP_MASK;
  623. *hyst |= (val << IQS269_CHx_HYST_DEEP_SHIFT);
  624. } else if (i == IQS269_EVENT_TOUCH_DN ||
  625. i == IQS269_EVENT_TOUCH_UP) {
  626. *hyst &= ~IQS269_CHx_HYST_TOUCH_MASK;
  627. *hyst |= val;
  628. }
  629. }
  630. error = fwnode_property_read_u32(ev_node, "linux,code", &val);
  631. if (error == -EINVAL) {
  632. continue;
  633. } else if (error) {
  634. dev_err(&client->dev,
  635. "Failed to read channel %u code: %d\n", reg,
  636. error);
  637. return error;
  638. }
  639. switch (reg) {
  640. case IQS269_CHx_HALL_ACTIVE:
  641. if (iqs269->hall_enable) {
  642. iqs269->switches[i].code = val;
  643. iqs269->switches[i].enabled = true;
  644. }
  645. fallthrough;
  646. case IQS269_CHx_HALL_INACTIVE:
  647. if (iqs269->hall_enable)
  648. break;
  649. fallthrough;
  650. default:
  651. iqs269->keycode[i * IQS269_NUM_CH + reg] = val;
  652. }
  653. iqs269->sys_reg.event_mask &= ~iqs269_events[i].mask;
  654. }
  655. return 0;
  656. }
  657. static int iqs269_parse_prop(struct iqs269_private *iqs269)
  658. {
  659. struct iqs269_sys_reg *sys_reg = &iqs269->sys_reg;
  660. struct i2c_client *client = iqs269->client;
  661. u16 general, misc_a, misc_b;
  662. unsigned int val;
  663. int error;
  664. iqs269->hall_enable = device_property_present(&client->dev,
  665. "azoteq,hall-enable");
  666. error = regmap_raw_read(iqs269->regmap, IQS269_SYS_SETTINGS, sys_reg,
  667. sizeof(*sys_reg));
  668. if (error)
  669. return error;
  670. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-lta",
  671. &val)) {
  672. if (val > IQS269_FILT_STR_MAX) {
  673. dev_err(&client->dev, "Invalid filter strength: %u\n",
  674. val);
  675. return -EINVAL;
  676. }
  677. sys_reg->filter &= ~IQS269_FILT_STR_LP_LTA_MASK;
  678. sys_reg->filter |= (val << IQS269_FILT_STR_LP_LTA_SHIFT);
  679. }
  680. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-lp-cnt",
  681. &val)) {
  682. if (val > IQS269_FILT_STR_MAX) {
  683. dev_err(&client->dev, "Invalid filter strength: %u\n",
  684. val);
  685. return -EINVAL;
  686. }
  687. sys_reg->filter &= ~IQS269_FILT_STR_LP_CNT_MASK;
  688. sys_reg->filter |= (val << IQS269_FILT_STR_LP_CNT_SHIFT);
  689. }
  690. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-lta",
  691. &val)) {
  692. if (val > IQS269_FILT_STR_MAX) {
  693. dev_err(&client->dev, "Invalid filter strength: %u\n",
  694. val);
  695. return -EINVAL;
  696. }
  697. sys_reg->filter &= ~IQS269_FILT_STR_NP_LTA_MASK;
  698. sys_reg->filter |= (val << IQS269_FILT_STR_NP_LTA_SHIFT);
  699. }
  700. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-np-cnt",
  701. &val)) {
  702. if (val > IQS269_FILT_STR_MAX) {
  703. dev_err(&client->dev, "Invalid filter strength: %u\n",
  704. val);
  705. return -EINVAL;
  706. }
  707. sys_reg->filter &= ~IQS269_FILT_STR_NP_CNT_MASK;
  708. sys_reg->filter |= val;
  709. }
  710. if (!device_property_read_u32(&client->dev, "azoteq,rate-np-ms",
  711. &val)) {
  712. if (val > IQS269_RATE_NP_MS_MAX) {
  713. dev_err(&client->dev, "Invalid report rate: %u\n", val);
  714. return -EINVAL;
  715. }
  716. sys_reg->rate_np = val;
  717. }
  718. if (!device_property_read_u32(&client->dev, "azoteq,rate-lp-ms",
  719. &val)) {
  720. if (val > IQS269_RATE_LP_MS_MAX) {
  721. dev_err(&client->dev, "Invalid report rate: %u\n", val);
  722. return -EINVAL;
  723. }
  724. sys_reg->rate_lp = val;
  725. }
  726. if (!device_property_read_u32(&client->dev, "azoteq,rate-ulp-ms",
  727. &val)) {
  728. if (val > IQS269_RATE_ULP_MS_MAX) {
  729. dev_err(&client->dev, "Invalid report rate: %u\n", val);
  730. return -EINVAL;
  731. }
  732. sys_reg->rate_ulp = val / 16;
  733. }
  734. if (!device_property_read_u32(&client->dev, "azoteq,timeout-pwr-ms",
  735. &val)) {
  736. if (val > IQS269_TIMEOUT_PWR_MS_MAX) {
  737. dev_err(&client->dev, "Invalid timeout: %u\n", val);
  738. return -EINVAL;
  739. }
  740. sys_reg->timeout_pwr = val / 512;
  741. }
  742. if (!device_property_read_u32(&client->dev, "azoteq,timeout-lta-ms",
  743. &val)) {
  744. if (val > IQS269_TIMEOUT_LTA_MS_MAX) {
  745. dev_err(&client->dev, "Invalid timeout: %u\n", val);
  746. return -EINVAL;
  747. }
  748. sys_reg->timeout_lta = val / 512;
  749. }
  750. misc_a = be16_to_cpu(sys_reg->misc_a);
  751. misc_b = be16_to_cpu(sys_reg->misc_b);
  752. misc_a &= ~IQS269_MISC_A_ATI_BAND_DISABLE;
  753. if (device_property_present(&client->dev, "azoteq,ati-band-disable"))
  754. misc_a |= IQS269_MISC_A_ATI_BAND_DISABLE;
  755. misc_a &= ~IQS269_MISC_A_ATI_LP_ONLY;
  756. if (device_property_present(&client->dev, "azoteq,ati-lp-only"))
  757. misc_a |= IQS269_MISC_A_ATI_LP_ONLY;
  758. misc_a &= ~IQS269_MISC_A_ATI_BAND_TIGHTEN;
  759. if (device_property_present(&client->dev, "azoteq,ati-band-tighten"))
  760. misc_a |= IQS269_MISC_A_ATI_BAND_TIGHTEN;
  761. misc_a &= ~IQS269_MISC_A_FILT_DISABLE;
  762. if (device_property_present(&client->dev, "azoteq,filt-disable"))
  763. misc_a |= IQS269_MISC_A_FILT_DISABLE;
  764. if (!device_property_read_u32(&client->dev, "azoteq,gpio3-select",
  765. &val)) {
  766. if (val >= IQS269_NUM_CH) {
  767. dev_err(&client->dev, "Invalid GPIO3 selection: %u\n",
  768. val);
  769. return -EINVAL;
  770. }
  771. misc_a &= ~IQS269_MISC_A_GPIO3_SELECT_MASK;
  772. misc_a |= (val << IQS269_MISC_A_GPIO3_SELECT_SHIFT);
  773. }
  774. misc_a &= ~IQS269_MISC_A_DUAL_DIR;
  775. if (device_property_present(&client->dev, "azoteq,dual-direction"))
  776. misc_a |= IQS269_MISC_A_DUAL_DIR;
  777. if (!device_property_read_u32(&client->dev, "azoteq,tx-freq", &val)) {
  778. if (val > IQS269_MISC_A_TX_FREQ_MAX) {
  779. dev_err(&client->dev,
  780. "Invalid excitation frequency: %u\n", val);
  781. return -EINVAL;
  782. }
  783. misc_a &= ~IQS269_MISC_A_TX_FREQ_MASK;
  784. misc_a |= (val << IQS269_MISC_A_TX_FREQ_SHIFT);
  785. }
  786. misc_a &= ~IQS269_MISC_A_GLOBAL_CAP_SIZE;
  787. if (device_property_present(&client->dev, "azoteq,global-cap-increase"))
  788. misc_a |= IQS269_MISC_A_GLOBAL_CAP_SIZE;
  789. if (!device_property_read_u32(&client->dev, "azoteq,reseed-select",
  790. &val)) {
  791. if (val > IQS269_MISC_B_RESEED_UI_SEL_MAX) {
  792. dev_err(&client->dev, "Invalid reseed selection: %u\n",
  793. val);
  794. return -EINVAL;
  795. }
  796. misc_b &= ~IQS269_MISC_B_RESEED_UI_SEL_MASK;
  797. misc_b |= (val << IQS269_MISC_B_RESEED_UI_SEL_SHIFT);
  798. }
  799. misc_b &= ~IQS269_MISC_B_TRACKING_UI_ENABLE;
  800. if (device_property_present(&client->dev, "azoteq,tracking-enable"))
  801. misc_b |= IQS269_MISC_B_TRACKING_UI_ENABLE;
  802. if (!device_property_read_u32(&client->dev, "azoteq,filt-str-slider",
  803. &val)) {
  804. if (val > IQS269_FILT_STR_MAX) {
  805. dev_err(&client->dev, "Invalid filter strength: %u\n",
  806. val);
  807. return -EINVAL;
  808. }
  809. misc_b &= ~IQS269_MISC_B_FILT_STR_SLIDER;
  810. misc_b |= val;
  811. }
  812. sys_reg->misc_a = cpu_to_be16(misc_a);
  813. sys_reg->misc_b = cpu_to_be16(misc_b);
  814. sys_reg->active = 0;
  815. sys_reg->reseed = 0;
  816. sys_reg->blocking = 0;
  817. sys_reg->slider_select[0] = 0;
  818. /*
  819. * If configured via OTP to do so, the device asserts a pulse on the
  820. * GPIO4 pin for approximately 60 ms once a selected channel is held
  821. * in a state of touch for a configurable length of time.
  822. *
  823. * In that case, the register used for slider 1 channel selection is
  824. * repurposed for the touch-and-hold timer ceiling.
  825. */
  826. if (iqs269->otp_option & IQS269_OTP_OPTION_HOLD) {
  827. if (!device_property_read_u32(&client->dev,
  828. "azoteq,touch-hold-ms", &val)) {
  829. if (val < IQS269_TOUCH_HOLD_MS_MIN ||
  830. val > IQS269_TOUCH_HOLD_MS_MAX) {
  831. dev_err(&client->dev,
  832. "Invalid touch-and-hold ceiling: %u\n",
  833. val);
  834. return -EINVAL;
  835. }
  836. sys_reg->slider_select[1] = val / 256;
  837. } else if (iqs269->ver_info.fw_num < IQS269_VER_INFO_FW_NUM_3) {
  838. /*
  839. * The default touch-and-hold timer ceiling initially
  840. * read from early revisions of silicon is invalid if
  841. * the device experienced a soft reset between power-
  842. * on and the read operation.
  843. *
  844. * To protect against this case, explicitly cache the
  845. * default value so that it is restored each time the
  846. * device is re-initialized.
  847. */
  848. sys_reg->slider_select[1] = IQS269_TOUCH_HOLD_DEFAULT;
  849. }
  850. } else {
  851. sys_reg->slider_select[1] = 0;
  852. }
  853. sys_reg->event_mask = ~((u8)IQS269_EVENT_MASK_SYS);
  854. device_for_each_child_node_scoped(&client->dev, ch_node) {
  855. error = iqs269_parse_chan(iqs269, ch_node);
  856. if (error)
  857. return error;
  858. }
  859. /*
  860. * Volunteer all active channels to participate in ATI when REDO-ATI is
  861. * manually triggered.
  862. */
  863. sys_reg->redo_ati = sys_reg->active;
  864. general = be16_to_cpu(sys_reg->general);
  865. if (device_property_present(&client->dev, "azoteq,clk-div"))
  866. general |= IQS269_SYS_SETTINGS_CLK_DIV;
  867. /*
  868. * Configure the device to automatically switch between normal and low-
  869. * power modes as a function of sensing activity. Ultra-low-power mode,
  870. * if enabled, is reserved for suspend.
  871. */
  872. general &= ~IQS269_SYS_SETTINGS_ULP_AUTO;
  873. general &= ~IQS269_SYS_SETTINGS_DIS_AUTO;
  874. general &= ~IQS269_SYS_SETTINGS_PWR_MODE_MASK;
  875. if (!device_property_read_u32(&client->dev, "azoteq,suspend-mode",
  876. &val)) {
  877. if (val > IQS269_SYS_SETTINGS_PWR_MODE_MAX) {
  878. dev_err(&client->dev, "Invalid suspend mode: %u\n",
  879. val);
  880. return -EINVAL;
  881. }
  882. general |= (val << IQS269_SYS_SETTINGS_PWR_MODE_SHIFT);
  883. }
  884. if (!device_property_read_u32(&client->dev, "azoteq,ulp-update",
  885. &val)) {
  886. if (val > IQS269_SYS_SETTINGS_ULP_UPDATE_MAX) {
  887. dev_err(&client->dev, "Invalid update rate: %u\n", val);
  888. return -EINVAL;
  889. }
  890. general &= ~IQS269_SYS_SETTINGS_ULP_UPDATE_MASK;
  891. general |= (val << IQS269_SYS_SETTINGS_ULP_UPDATE_SHIFT);
  892. }
  893. if (device_property_present(&client->dev, "linux,keycodes")) {
  894. int scale = 1;
  895. int count = device_property_count_u32(&client->dev,
  896. "linux,keycodes");
  897. if (count > IQS269_NUM_GESTURES * IQS269_NUM_SL) {
  898. dev_err(&client->dev, "Too many keycodes present\n");
  899. return -EINVAL;
  900. } else if (count < 0) {
  901. dev_err(&client->dev, "Failed to count keycodes: %d\n",
  902. count);
  903. return count;
  904. }
  905. error = device_property_read_u32_array(&client->dev,
  906. "linux,keycodes",
  907. *iqs269->sl_code, count);
  908. if (error) {
  909. dev_err(&client->dev, "Failed to read keycodes: %d\n",
  910. error);
  911. return error;
  912. }
  913. if (device_property_present(&client->dev,
  914. "azoteq,gesture-swipe"))
  915. general |= IQS269_SYS_SETTINGS_SLIDER_SWIPE;
  916. /*
  917. * Early revisions of silicon use a more granular step size for
  918. * tap and swipe gesture timeouts; scale them appropriately.
  919. */
  920. if (iqs269->ver_info.fw_num < IQS269_VER_INFO_FW_NUM_3)
  921. scale = 4;
  922. if (!device_property_read_u32(&client->dev,
  923. "azoteq,timeout-tap-ms", &val)) {
  924. if (val > IQS269_TIMEOUT_TAP_MS_MAX / scale) {
  925. dev_err(&client->dev, "Invalid timeout: %u\n",
  926. val);
  927. return -EINVAL;
  928. }
  929. sys_reg->timeout_tap = val / (16 / scale);
  930. }
  931. if (!device_property_read_u32(&client->dev,
  932. "azoteq,timeout-swipe-ms",
  933. &val)) {
  934. if (val > IQS269_TIMEOUT_SWIPE_MS_MAX / scale) {
  935. dev_err(&client->dev, "Invalid timeout: %u\n",
  936. val);
  937. return -EINVAL;
  938. }
  939. sys_reg->timeout_swipe = val / (16 / scale);
  940. }
  941. if (!device_property_read_u32(&client->dev,
  942. "azoteq,thresh-swipe", &val)) {
  943. if (val > IQS269_THRESH_SWIPE_MAX) {
  944. dev_err(&client->dev, "Invalid threshold: %u\n",
  945. val);
  946. return -EINVAL;
  947. }
  948. sys_reg->thresh_swipe = val;
  949. }
  950. sys_reg->event_mask &= ~IQS269_EVENT_MASK_GESTURE;
  951. }
  952. general &= ~IQS269_SYS_SETTINGS_RESEED_OFFSET;
  953. if (device_property_present(&client->dev, "azoteq,reseed-offset"))
  954. general |= IQS269_SYS_SETTINGS_RESEED_OFFSET;
  955. general |= IQS269_SYS_SETTINGS_EVENT_MODE;
  956. /*
  957. * As per the datasheet, enable streaming during normal-power mode if
  958. * raw coordinates will be read from either slider. In that case, the
  959. * device returns to event mode during low-power mode.
  960. */
  961. if (iqs269_slider_type(iqs269, 0) == IQS269_SLIDER_RAW ||
  962. iqs269_slider_type(iqs269, 1) == IQS269_SLIDER_RAW)
  963. general |= IQS269_SYS_SETTINGS_EVENT_MODE_LP;
  964. general |= IQS269_SYS_SETTINGS_REDO_ATI;
  965. general |= IQS269_SYS_SETTINGS_ACK_RESET;
  966. sys_reg->general = cpu_to_be16(general);
  967. return 0;
  968. }
  969. static const struct reg_sequence iqs269_tws_init[] = {
  970. { IQS269_TOUCH_HOLD_SLIDER_SEL, IQS269_TOUCH_HOLD_DEFAULT },
  971. { 0xF0, 0x580F },
  972. { 0xF0, 0x59EF },
  973. };
  974. static int iqs269_dev_init(struct iqs269_private *iqs269)
  975. {
  976. int error;
  977. guard(mutex)(&iqs269->lock);
  978. /*
  979. * Early revisions of silicon require the following workaround in order
  980. * to restore any OTP-enabled functionality after a soft reset.
  981. */
  982. if (iqs269->otp_option == IQS269_OTP_OPTION_TWS &&
  983. iqs269->ver_info.fw_num < IQS269_VER_INFO_FW_NUM_3) {
  984. error = regmap_multi_reg_write(iqs269->regmap, iqs269_tws_init,
  985. ARRAY_SIZE(iqs269_tws_init));
  986. if (error)
  987. return error;
  988. }
  989. error = regmap_update_bits(iqs269->regmap, IQS269_HALL_UI,
  990. IQS269_HALL_UI_ENABLE,
  991. iqs269->hall_enable ? ~0 : 0);
  992. if (error)
  993. return error;
  994. error = regmap_raw_write(iqs269->regmap, IQS269_SYS_SETTINGS,
  995. &iqs269->sys_reg, sizeof(iqs269->sys_reg));
  996. if (error)
  997. return error;
  998. /*
  999. * The following delay gives the device time to deassert its RDY output
  1000. * so as to prevent an interrupt from being serviced prematurely.
  1001. */
  1002. usleep_range(2000, 2100);
  1003. iqs269->ati_current = true;
  1004. return 0;
  1005. }
  1006. static int iqs269_input_init(struct iqs269_private *iqs269)
  1007. {
  1008. struct i2c_client *client = iqs269->client;
  1009. unsigned int sw_code, keycode;
  1010. int error, i, j;
  1011. iqs269->keypad = devm_input_allocate_device(&client->dev);
  1012. if (!iqs269->keypad)
  1013. return -ENOMEM;
  1014. iqs269->keypad->keycodemax = ARRAY_SIZE(iqs269->keycode);
  1015. iqs269->keypad->keycode = iqs269->keycode;
  1016. iqs269->keypad->keycodesize = sizeof(*iqs269->keycode);
  1017. iqs269->keypad->name = "iqs269a_keypad";
  1018. iqs269->keypad->id.bustype = BUS_I2C;
  1019. for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
  1020. sw_code = iqs269->switches[i].code;
  1021. for (j = 0; j < IQS269_NUM_CH; j++) {
  1022. keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
  1023. /*
  1024. * Hall-effect sensing repurposes a pair of dedicated
  1025. * channels, only one of which reports events.
  1026. */
  1027. switch (j) {
  1028. case IQS269_CHx_HALL_ACTIVE:
  1029. if (iqs269->hall_enable &&
  1030. iqs269->switches[i].enabled)
  1031. input_set_capability(iqs269->keypad,
  1032. EV_SW, sw_code);
  1033. fallthrough;
  1034. case IQS269_CHx_HALL_INACTIVE:
  1035. if (iqs269->hall_enable)
  1036. continue;
  1037. fallthrough;
  1038. default:
  1039. if (keycode != KEY_RESERVED)
  1040. input_set_capability(iqs269->keypad,
  1041. EV_KEY, keycode);
  1042. }
  1043. }
  1044. }
  1045. for (i = 0; i < IQS269_NUM_SL; i++) {
  1046. if (iqs269_slider_type(iqs269, i) == IQS269_SLIDER_NONE)
  1047. continue;
  1048. iqs269->slider[i] = devm_input_allocate_device(&client->dev);
  1049. if (!iqs269->slider[i])
  1050. return -ENOMEM;
  1051. iqs269->slider[i]->keycodemax = ARRAY_SIZE(iqs269->sl_code[i]);
  1052. iqs269->slider[i]->keycode = iqs269->sl_code[i];
  1053. iqs269->slider[i]->keycodesize = sizeof(**iqs269->sl_code);
  1054. iqs269->slider[i]->name = i ? "iqs269a_slider_1"
  1055. : "iqs269a_slider_0";
  1056. iqs269->slider[i]->id.bustype = BUS_I2C;
  1057. for (j = 0; j < IQS269_NUM_GESTURES; j++)
  1058. if (iqs269->sl_code[i][j] != KEY_RESERVED)
  1059. input_set_capability(iqs269->slider[i], EV_KEY,
  1060. iqs269->sl_code[i][j]);
  1061. /*
  1062. * Present the slider as a narrow trackpad if one or more chan-
  1063. * nels have been selected to participate, but no gestures have
  1064. * been mapped to a keycode.
  1065. */
  1066. if (iqs269_slider_type(iqs269, i) == IQS269_SLIDER_RAW) {
  1067. input_set_capability(iqs269->slider[i],
  1068. EV_KEY, BTN_TOUCH);
  1069. input_set_abs_params(iqs269->slider[i],
  1070. ABS_X, 0, 255, 0, 0);
  1071. }
  1072. error = input_register_device(iqs269->slider[i]);
  1073. if (error) {
  1074. dev_err(&client->dev,
  1075. "Failed to register slider %d: %d\n", i, error);
  1076. return error;
  1077. }
  1078. }
  1079. return 0;
  1080. }
  1081. static int iqs269_report(struct iqs269_private *iqs269)
  1082. {
  1083. struct i2c_client *client = iqs269->client;
  1084. struct iqs269_flags flags;
  1085. unsigned int sw_code, keycode;
  1086. int error, i, j;
  1087. u8 slider_x[IQS269_NUM_SL];
  1088. u8 dir_mask, state;
  1089. error = regmap_raw_read(iqs269->regmap, IQS269_SYS_FLAGS, &flags,
  1090. sizeof(flags));
  1091. if (error) {
  1092. dev_err(&client->dev, "Failed to read device status: %d\n",
  1093. error);
  1094. return error;
  1095. }
  1096. /*
  1097. * The device resets itself if its own watchdog bites, which can happen
  1098. * in the event of an I2C communication error. In this case, the device
  1099. * asserts a SHOW_RESET interrupt and all registers must be restored.
  1100. */
  1101. if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_SHOW_RESET) {
  1102. dev_err(&client->dev, "Unexpected device reset\n");
  1103. error = iqs269_dev_init(iqs269);
  1104. if (error)
  1105. dev_err(&client->dev,
  1106. "Failed to re-initialize device: %d\n", error);
  1107. return error;
  1108. }
  1109. if (be16_to_cpu(flags.system) & IQS269_SYS_FLAGS_IN_ATI)
  1110. return 0;
  1111. if (iqs269_slider_type(iqs269, 0) == IQS269_SLIDER_RAW ||
  1112. iqs269_slider_type(iqs269, 1) == IQS269_SLIDER_RAW) {
  1113. error = regmap_raw_read(iqs269->regmap, IQS269_SLIDER_X,
  1114. slider_x, sizeof(slider_x));
  1115. if (error) {
  1116. dev_err(&client->dev,
  1117. "Failed to read slider position: %d\n", error);
  1118. return error;
  1119. }
  1120. }
  1121. for (i = 0; i < IQS269_NUM_SL; i++) {
  1122. flags.gesture >>= (i * IQS269_NUM_GESTURES);
  1123. switch (iqs269_slider_type(iqs269, i)) {
  1124. case IQS269_SLIDER_NONE:
  1125. continue;
  1126. case IQS269_SLIDER_KEY:
  1127. for (j = 0; j < IQS269_NUM_GESTURES; j++)
  1128. input_report_key(iqs269->slider[i],
  1129. iqs269->sl_code[i][j],
  1130. flags.gesture & BIT(j));
  1131. if (!(flags.gesture & (BIT(IQS269_GESTURE_FLICK_NEG) |
  1132. BIT(IQS269_GESTURE_FLICK_POS) |
  1133. BIT(IQS269_GESTURE_TAP))))
  1134. break;
  1135. input_sync(iqs269->slider[i]);
  1136. /*
  1137. * Momentary gestures are followed by a complementary
  1138. * release cycle so as to emulate a full keystroke.
  1139. */
  1140. for (j = 0; j < IQS269_NUM_GESTURES; j++)
  1141. if (j != IQS269_GESTURE_HOLD)
  1142. input_report_key(iqs269->slider[i],
  1143. iqs269->sl_code[i][j],
  1144. 0);
  1145. break;
  1146. case IQS269_SLIDER_RAW:
  1147. /*
  1148. * The slider is considered to be in a state of touch
  1149. * if any selected channels are in a state of touch.
  1150. */
  1151. state = flags.states[IQS269_ST_OFFS_TOUCH];
  1152. state &= iqs269->sys_reg.slider_select[i];
  1153. input_report_key(iqs269->slider[i], BTN_TOUCH, state);
  1154. if (state)
  1155. input_report_abs(iqs269->slider[i],
  1156. ABS_X, slider_x[i]);
  1157. break;
  1158. }
  1159. input_sync(iqs269->slider[i]);
  1160. }
  1161. for (i = 0; i < ARRAY_SIZE(iqs269_events); i++) {
  1162. dir_mask = flags.states[IQS269_ST_OFFS_DIR];
  1163. if (!iqs269_events[i].dir_up)
  1164. dir_mask = ~dir_mask;
  1165. state = flags.states[iqs269_events[i].st_offs] & dir_mask;
  1166. sw_code = iqs269->switches[i].code;
  1167. for (j = 0; j < IQS269_NUM_CH; j++) {
  1168. keycode = iqs269->keycode[i * IQS269_NUM_CH + j];
  1169. switch (j) {
  1170. case IQS269_CHx_HALL_ACTIVE:
  1171. if (iqs269->hall_enable &&
  1172. iqs269->switches[i].enabled)
  1173. input_report_switch(iqs269->keypad,
  1174. sw_code,
  1175. state & BIT(j));
  1176. fallthrough;
  1177. case IQS269_CHx_HALL_INACTIVE:
  1178. if (iqs269->hall_enable)
  1179. continue;
  1180. fallthrough;
  1181. default:
  1182. input_report_key(iqs269->keypad, keycode,
  1183. state & BIT(j));
  1184. }
  1185. }
  1186. }
  1187. input_sync(iqs269->keypad);
  1188. /*
  1189. * The following completion signals that ATI has finished, any initial
  1190. * switch states have been reported and the keypad can be registered.
  1191. */
  1192. complete_all(&iqs269->ati_done);
  1193. return 0;
  1194. }
  1195. static irqreturn_t iqs269_irq(int irq, void *context)
  1196. {
  1197. struct iqs269_private *iqs269 = context;
  1198. if (iqs269_report(iqs269))
  1199. return IRQ_NONE;
  1200. /*
  1201. * The device does not deassert its interrupt (RDY) pin until shortly
  1202. * after receiving an I2C stop condition; the following delay ensures
  1203. * the interrupt handler does not return before this time.
  1204. */
  1205. iqs269_irq_wait();
  1206. return IRQ_HANDLED;
  1207. }
  1208. static ssize_t counts_show(struct device *dev,
  1209. struct device_attribute *attr, char *buf)
  1210. {
  1211. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1212. struct i2c_client *client = iqs269->client;
  1213. __le16 counts;
  1214. int error;
  1215. if (!iqs269->ati_current || iqs269->hall_enable)
  1216. return -EPERM;
  1217. if (!completion_done(&iqs269->ati_done))
  1218. return -EBUSY;
  1219. /*
  1220. * Unsolicited I2C communication prompts the device to assert its RDY
  1221. * pin, so disable the interrupt line until the operation is finished
  1222. * and RDY has been deasserted.
  1223. */
  1224. disable_irq(client->irq);
  1225. error = regmap_raw_read(iqs269->regmap,
  1226. IQS269_CHx_COUNTS + iqs269->ch_num * 2,
  1227. &counts, sizeof(counts));
  1228. iqs269_irq_wait();
  1229. enable_irq(client->irq);
  1230. if (error)
  1231. return error;
  1232. return sysfs_emit(buf, "%u\n", le16_to_cpu(counts));
  1233. }
  1234. static ssize_t hall_bin_show(struct device *dev,
  1235. struct device_attribute *attr, char *buf)
  1236. {
  1237. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1238. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  1239. struct i2c_client *client = iqs269->client;
  1240. unsigned int val;
  1241. int error;
  1242. disable_irq(client->irq);
  1243. error = regmap_read(iqs269->regmap, IQS269_CAL_DATA_A, &val);
  1244. iqs269_irq_wait();
  1245. enable_irq(client->irq);
  1246. if (error)
  1247. return error;
  1248. switch (ch_reg[IQS269_CHx_HALL_ACTIVE].rx_enable &
  1249. ch_reg[IQS269_CHx_HALL_INACTIVE].rx_enable) {
  1250. case IQS269_HALL_PAD_R:
  1251. val &= IQS269_CAL_DATA_A_HALL_BIN_R_MASK;
  1252. val >>= IQS269_CAL_DATA_A_HALL_BIN_R_SHIFT;
  1253. break;
  1254. case IQS269_HALL_PAD_L:
  1255. val &= IQS269_CAL_DATA_A_HALL_BIN_L_MASK;
  1256. val >>= IQS269_CAL_DATA_A_HALL_BIN_L_SHIFT;
  1257. break;
  1258. default:
  1259. return -EINVAL;
  1260. }
  1261. return sysfs_emit(buf, "%u\n", val);
  1262. }
  1263. static ssize_t hall_enable_show(struct device *dev,
  1264. struct device_attribute *attr, char *buf)
  1265. {
  1266. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1267. return sysfs_emit(buf, "%u\n", iqs269->hall_enable);
  1268. }
  1269. static ssize_t hall_enable_store(struct device *dev,
  1270. struct device_attribute *attr, const char *buf,
  1271. size_t count)
  1272. {
  1273. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1274. unsigned int val;
  1275. int error;
  1276. error = kstrtouint(buf, 10, &val);
  1277. if (error)
  1278. return error;
  1279. guard(mutex)(&iqs269->lock);
  1280. iqs269->hall_enable = val;
  1281. iqs269->ati_current = false;
  1282. return count;
  1283. }
  1284. static ssize_t ch_number_show(struct device *dev,
  1285. struct device_attribute *attr, char *buf)
  1286. {
  1287. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1288. return sysfs_emit(buf, "%u\n", iqs269->ch_num);
  1289. }
  1290. static ssize_t ch_number_store(struct device *dev,
  1291. struct device_attribute *attr, const char *buf,
  1292. size_t count)
  1293. {
  1294. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1295. unsigned int val;
  1296. int error;
  1297. error = kstrtouint(buf, 10, &val);
  1298. if (error)
  1299. return error;
  1300. if (val >= IQS269_NUM_CH)
  1301. return -EINVAL;
  1302. iqs269->ch_num = val;
  1303. return count;
  1304. }
  1305. static ssize_t rx_enable_show(struct device *dev,
  1306. struct device_attribute *attr, char *buf)
  1307. {
  1308. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1309. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  1310. return sysfs_emit(buf, "%u\n", ch_reg[iqs269->ch_num].rx_enable);
  1311. }
  1312. static ssize_t rx_enable_store(struct device *dev,
  1313. struct device_attribute *attr, const char *buf,
  1314. size_t count)
  1315. {
  1316. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1317. struct iqs269_ch_reg *ch_reg = iqs269->sys_reg.ch_reg;
  1318. unsigned int val;
  1319. int error;
  1320. error = kstrtouint(buf, 10, &val);
  1321. if (error)
  1322. return error;
  1323. if (val > 0xFF)
  1324. return -EINVAL;
  1325. guard(mutex)(&iqs269->lock);
  1326. ch_reg[iqs269->ch_num].rx_enable = val;
  1327. iqs269->ati_current = false;
  1328. return count;
  1329. }
  1330. static ssize_t ati_mode_show(struct device *dev,
  1331. struct device_attribute *attr, char *buf)
  1332. {
  1333. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1334. unsigned int val;
  1335. int error;
  1336. error = iqs269_ati_mode_get(iqs269, iqs269->ch_num, &val);
  1337. if (error)
  1338. return error;
  1339. return sysfs_emit(buf, "%u\n", val);
  1340. }
  1341. static ssize_t ati_mode_store(struct device *dev,
  1342. struct device_attribute *attr, const char *buf,
  1343. size_t count)
  1344. {
  1345. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1346. unsigned int val;
  1347. int error;
  1348. error = kstrtouint(buf, 10, &val);
  1349. if (error)
  1350. return error;
  1351. error = iqs269_ati_mode_set(iqs269, iqs269->ch_num, val);
  1352. if (error)
  1353. return error;
  1354. return count;
  1355. }
  1356. static ssize_t ati_base_show(struct device *dev,
  1357. struct device_attribute *attr, char *buf)
  1358. {
  1359. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1360. unsigned int val;
  1361. int error;
  1362. error = iqs269_ati_base_get(iqs269, iqs269->ch_num, &val);
  1363. if (error)
  1364. return error;
  1365. return sysfs_emit(buf, "%u\n", val);
  1366. }
  1367. static ssize_t ati_base_store(struct device *dev,
  1368. struct device_attribute *attr, const char *buf,
  1369. size_t count)
  1370. {
  1371. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1372. unsigned int val;
  1373. int error;
  1374. error = kstrtouint(buf, 10, &val);
  1375. if (error)
  1376. return error;
  1377. error = iqs269_ati_base_set(iqs269, iqs269->ch_num, val);
  1378. if (error)
  1379. return error;
  1380. return count;
  1381. }
  1382. static ssize_t ati_target_show(struct device *dev,
  1383. struct device_attribute *attr, char *buf)
  1384. {
  1385. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1386. unsigned int val;
  1387. int error;
  1388. error = iqs269_ati_target_get(iqs269, iqs269->ch_num, &val);
  1389. if (error)
  1390. return error;
  1391. return sysfs_emit(buf, "%u\n", val);
  1392. }
  1393. static ssize_t ati_target_store(struct device *dev,
  1394. struct device_attribute *attr, const char *buf,
  1395. size_t count)
  1396. {
  1397. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1398. unsigned int val;
  1399. int error;
  1400. error = kstrtouint(buf, 10, &val);
  1401. if (error)
  1402. return error;
  1403. error = iqs269_ati_target_set(iqs269, iqs269->ch_num, val);
  1404. if (error)
  1405. return error;
  1406. return count;
  1407. }
  1408. static ssize_t ati_trigger_show(struct device *dev,
  1409. struct device_attribute *attr, char *buf)
  1410. {
  1411. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1412. return sysfs_emit(buf, "%u\n",
  1413. iqs269->ati_current &&
  1414. completion_done(&iqs269->ati_done));
  1415. }
  1416. static ssize_t ati_trigger_store(struct device *dev,
  1417. struct device_attribute *attr, const char *buf,
  1418. size_t count)
  1419. {
  1420. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1421. struct i2c_client *client = iqs269->client;
  1422. unsigned int val;
  1423. int error;
  1424. error = kstrtouint(buf, 10, &val);
  1425. if (error)
  1426. return error;
  1427. if (!val)
  1428. return count;
  1429. disable_irq(client->irq);
  1430. reinit_completion(&iqs269->ati_done);
  1431. error = iqs269_dev_init(iqs269);
  1432. iqs269_irq_wait();
  1433. enable_irq(client->irq);
  1434. if (error)
  1435. return error;
  1436. if (!wait_for_completion_timeout(&iqs269->ati_done,
  1437. msecs_to_jiffies(2000)))
  1438. return -ETIMEDOUT;
  1439. return count;
  1440. }
  1441. static DEVICE_ATTR_RO(counts);
  1442. static DEVICE_ATTR_RO(hall_bin);
  1443. static DEVICE_ATTR_RW(hall_enable);
  1444. static DEVICE_ATTR_RW(ch_number);
  1445. static DEVICE_ATTR_RW(rx_enable);
  1446. static DEVICE_ATTR_RW(ati_mode);
  1447. static DEVICE_ATTR_RW(ati_base);
  1448. static DEVICE_ATTR_RW(ati_target);
  1449. static DEVICE_ATTR_RW(ati_trigger);
  1450. static struct attribute *iqs269_attrs[] = {
  1451. &dev_attr_counts.attr,
  1452. &dev_attr_hall_bin.attr,
  1453. &dev_attr_hall_enable.attr,
  1454. &dev_attr_ch_number.attr,
  1455. &dev_attr_rx_enable.attr,
  1456. &dev_attr_ati_mode.attr,
  1457. &dev_attr_ati_base.attr,
  1458. &dev_attr_ati_target.attr,
  1459. &dev_attr_ati_trigger.attr,
  1460. NULL,
  1461. };
  1462. ATTRIBUTE_GROUPS(iqs269);
  1463. static const struct regmap_config iqs269_regmap_config = {
  1464. .reg_bits = 8,
  1465. .val_bits = 16,
  1466. .max_register = IQS269_MAX_REG,
  1467. };
  1468. static int iqs269_probe(struct i2c_client *client)
  1469. {
  1470. struct iqs269_private *iqs269;
  1471. int error;
  1472. iqs269 = devm_kzalloc(&client->dev, sizeof(*iqs269), GFP_KERNEL);
  1473. if (!iqs269)
  1474. return -ENOMEM;
  1475. i2c_set_clientdata(client, iqs269);
  1476. iqs269->client = client;
  1477. iqs269->regmap = devm_regmap_init_i2c(client, &iqs269_regmap_config);
  1478. if (IS_ERR(iqs269->regmap)) {
  1479. error = PTR_ERR(iqs269->regmap);
  1480. dev_err(&client->dev, "Failed to initialize register map: %d\n",
  1481. error);
  1482. return error;
  1483. }
  1484. mutex_init(&iqs269->lock);
  1485. init_completion(&iqs269->ati_done);
  1486. iqs269->otp_option = (uintptr_t)device_get_match_data(&client->dev);
  1487. error = regmap_raw_read(iqs269->regmap, IQS269_VER_INFO,
  1488. &iqs269->ver_info, sizeof(iqs269->ver_info));
  1489. if (error)
  1490. return error;
  1491. if (iqs269->ver_info.prod_num != IQS269_VER_INFO_PROD_NUM) {
  1492. dev_err(&client->dev, "Unrecognized product number: 0x%02X\n",
  1493. iqs269->ver_info.prod_num);
  1494. return -EINVAL;
  1495. }
  1496. error = iqs269_parse_prop(iqs269);
  1497. if (error)
  1498. return error;
  1499. error = iqs269_dev_init(iqs269);
  1500. if (error) {
  1501. dev_err(&client->dev, "Failed to initialize device: %d\n",
  1502. error);
  1503. return error;
  1504. }
  1505. error = iqs269_input_init(iqs269);
  1506. if (error)
  1507. return error;
  1508. error = devm_request_threaded_irq(&client->dev, client->irq,
  1509. NULL, iqs269_irq, IRQF_ONESHOT,
  1510. client->name, iqs269);
  1511. if (error) {
  1512. dev_err(&client->dev, "Failed to request IRQ: %d\n", error);
  1513. return error;
  1514. }
  1515. if (!wait_for_completion_timeout(&iqs269->ati_done,
  1516. msecs_to_jiffies(2000))) {
  1517. dev_err(&client->dev, "Failed to complete ATI\n");
  1518. return -ETIMEDOUT;
  1519. }
  1520. /*
  1521. * The keypad may include one or more switches and is not registered
  1522. * until ATI is complete and the initial switch states are read.
  1523. */
  1524. error = input_register_device(iqs269->keypad);
  1525. if (error) {
  1526. dev_err(&client->dev, "Failed to register keypad: %d\n", error);
  1527. return error;
  1528. }
  1529. return error;
  1530. }
  1531. static u16 iqs269_general_get(struct iqs269_private *iqs269)
  1532. {
  1533. u16 general = be16_to_cpu(iqs269->sys_reg.general);
  1534. general &= ~IQS269_SYS_SETTINGS_REDO_ATI;
  1535. general &= ~IQS269_SYS_SETTINGS_ACK_RESET;
  1536. return general | IQS269_SYS_SETTINGS_DIS_AUTO;
  1537. }
  1538. static int iqs269_suspend(struct device *dev)
  1539. {
  1540. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1541. struct i2c_client *client = iqs269->client;
  1542. int error;
  1543. u16 general = iqs269_general_get(iqs269);
  1544. if (!(general & IQS269_SYS_SETTINGS_PWR_MODE_MASK))
  1545. return 0;
  1546. disable_irq(client->irq);
  1547. error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS, general);
  1548. iqs269_irq_wait();
  1549. enable_irq(client->irq);
  1550. return error;
  1551. }
  1552. static int iqs269_resume(struct device *dev)
  1553. {
  1554. struct iqs269_private *iqs269 = dev_get_drvdata(dev);
  1555. struct i2c_client *client = iqs269->client;
  1556. int error;
  1557. u16 general = iqs269_general_get(iqs269);
  1558. if (!(general & IQS269_SYS_SETTINGS_PWR_MODE_MASK))
  1559. return 0;
  1560. disable_irq(client->irq);
  1561. error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS,
  1562. general & ~IQS269_SYS_SETTINGS_PWR_MODE_MASK);
  1563. if (!error)
  1564. error = regmap_write(iqs269->regmap, IQS269_SYS_SETTINGS,
  1565. general & ~IQS269_SYS_SETTINGS_DIS_AUTO);
  1566. iqs269_irq_wait();
  1567. enable_irq(client->irq);
  1568. return error;
  1569. }
  1570. static DEFINE_SIMPLE_DEV_PM_OPS(iqs269_pm, iqs269_suspend, iqs269_resume);
  1571. static const struct of_device_id iqs269_of_match[] = {
  1572. {
  1573. .compatible = "azoteq,iqs269a",
  1574. .data = (void *)IQS269_OTP_OPTION_DEFAULT,
  1575. },
  1576. {
  1577. .compatible = "azoteq,iqs269a-00",
  1578. .data = (void *)IQS269_OTP_OPTION_DEFAULT,
  1579. },
  1580. {
  1581. .compatible = "azoteq,iqs269a-d0",
  1582. .data = (void *)IQS269_OTP_OPTION_TWS,
  1583. },
  1584. { }
  1585. };
  1586. MODULE_DEVICE_TABLE(of, iqs269_of_match);
  1587. static struct i2c_driver iqs269_i2c_driver = {
  1588. .driver = {
  1589. .name = "iqs269a",
  1590. .dev_groups = iqs269_groups,
  1591. .of_match_table = iqs269_of_match,
  1592. .pm = pm_sleep_ptr(&iqs269_pm),
  1593. },
  1594. .probe = iqs269_probe,
  1595. };
  1596. module_i2c_driver(iqs269_i2c_driver);
  1597. MODULE_AUTHOR("Jeff LaBundy <jeff@labundy.com>");
  1598. MODULE_DESCRIPTION("Azoteq IQS269A Capacitive Touch Controller");
  1599. MODULE_LICENSE("GPL");