tmp464.c 18 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /* Driver for the Texas Instruments TMP464 SMBus temperature sensor IC.
  3. * Supported models: TMP464, TMP468
  4. * Copyright (C) 2022 Agathe Porte <agathe.porte@nokia.com>
  5. * Preliminary support by:
  6. * Lionel Pouliquen <lionel.lp.pouliquen@nokia.com>
  7. */
  8. #include <linux/err.h>
  9. #include <linux/hwmon.h>
  10. #include <linux/i2c.h>
  11. #include <linux/init.h>
  12. #include <linux/module.h>
  13. #include <linux/of.h>
  14. #include <linux/regmap.h>
  15. #include <linux/slab.h>
  16. /* Addresses to scan */
  17. static const unsigned short normal_i2c[] = { 0x48, 0x49, 0x4a, 0x4b, I2C_CLIENT_END };
  18. #define TMP464_NUM_CHANNELS 5 /* chan 0 is internal, 1-4 are remote */
  19. #define TMP468_NUM_CHANNELS 9 /* chan 0 is internal, 1-8 are remote */
  20. #define MAX_CHANNELS 9
  21. #define TMP464_TEMP_REG(channel) (channel)
  22. #define TMP464_TEMP_OFFSET_REG(channel) (0x40 + ((channel) - 1) * 8)
  23. #define TMP464_N_FACTOR_REG(channel) (0x41 + ((channel) - 1) * 8)
  24. static const u8 TMP464_THERM_LIMIT[MAX_CHANNELS] = {
  25. 0x39, 0x42, 0x4A, 0x52, 0x5A, 0x62, 0x6a, 0x72, 0x7a };
  26. static const u8 TMP464_THERM2_LIMIT[MAX_CHANNELS] = {
  27. 0x3A, 0x43, 0x4B, 0x53, 0x5B, 0x63, 0x6b, 0x73, 0x7b };
  28. #define TMP464_THERM_STATUS_REG 0x21
  29. #define TMP464_THERM2_STATUS_REG 0x22
  30. #define TMP464_REMOTE_OPEN_REG 0x23
  31. #define TMP464_CONFIG_REG 0x30
  32. #define TMP464_TEMP_HYST_REG 0x38
  33. #define TMP464_LOCK_REG 0xc4
  34. /* Identification */
  35. #define TMP464_MANUFACTURER_ID_REG 0xFE
  36. #define TMP464_DEVICE_ID_REG 0xFF
  37. /* Flags */
  38. #define TMP464_CONFIG_SHUTDOWN BIT(5)
  39. #define TMP464_CONFIG_RANGE 0x04
  40. #define TMP464_CONFIG_REG_REN(x) (BIT(7 + (x)))
  41. #define TMP464_CONFIG_REG_REN_MASK GENMASK(15, 7)
  42. #define TMP464_CONFIG_CONVERSION_RATE_B0 2
  43. #define TMP464_CONFIG_CONVERSION_RATE_B2 4
  44. #define TMP464_CONFIG_CONVERSION_RATE_MASK GENMASK(TMP464_CONFIG_CONVERSION_RATE_B2, \
  45. TMP464_CONFIG_CONVERSION_RATE_B0)
  46. #define TMP464_UNLOCK_VAL 0xeb19
  47. #define TMP464_LOCK_VAL 0x5ca6
  48. #define TMP464_LOCKED 0x8000
  49. /* Manufacturer / Device ID's */
  50. #define TMP464_MANUFACTURER_ID 0x5449
  51. #define TMP464_DEVICE_ID 0x1468
  52. #define TMP468_DEVICE_ID 0x0468
  53. static const struct i2c_device_id tmp464_id[] = {
  54. { "tmp464", TMP464_NUM_CHANNELS },
  55. { "tmp468", TMP468_NUM_CHANNELS },
  56. { }
  57. };
  58. MODULE_DEVICE_TABLE(i2c, tmp464_id);
  59. static const struct of_device_id __maybe_unused tmp464_of_match[] = {
  60. {
  61. .compatible = "ti,tmp464",
  62. .data = (void *)TMP464_NUM_CHANNELS
  63. },
  64. {
  65. .compatible = "ti,tmp468",
  66. .data = (void *)TMP468_NUM_CHANNELS
  67. },
  68. {},
  69. };
  70. MODULE_DEVICE_TABLE(of, tmp464_of_match);
  71. struct tmp464_channel {
  72. const char *label;
  73. bool enabled;
  74. };
  75. struct tmp464_data {
  76. struct regmap *regmap;
  77. int channels;
  78. s16 config_orig;
  79. u16 open_reg;
  80. unsigned long last_updated;
  81. bool valid;
  82. int update_interval;
  83. struct tmp464_channel channel[MAX_CHANNELS];
  84. };
  85. static int temp_from_reg(s16 reg)
  86. {
  87. return DIV_ROUND_CLOSEST((reg >> 3) * 625, 10);
  88. }
  89. static s16 temp_to_limit_reg(long temp)
  90. {
  91. return DIV_ROUND_CLOSEST(temp, 500) << 6;
  92. }
  93. static s16 temp_to_offset_reg(long temp)
  94. {
  95. return DIV_ROUND_CLOSEST(temp * 10, 625) << 3;
  96. }
  97. static int tmp464_enable_channels(struct tmp464_data *data)
  98. {
  99. struct regmap *regmap = data->regmap;
  100. u16 enable = 0;
  101. int i;
  102. for (i = 0; i < data->channels; i++)
  103. if (data->channel[i].enabled)
  104. enable |= TMP464_CONFIG_REG_REN(i);
  105. return regmap_update_bits(regmap, TMP464_CONFIG_REG, TMP464_CONFIG_REG_REN_MASK, enable);
  106. }
  107. static int tmp464_chip_read(struct device *dev, u32 attr, int channel, long *val)
  108. {
  109. struct tmp464_data *data = dev_get_drvdata(dev);
  110. switch (attr) {
  111. case hwmon_chip_update_interval:
  112. *val = data->update_interval;
  113. return 0;
  114. default:
  115. return -EOPNOTSUPP;
  116. }
  117. }
  118. static int tmp464_temp_read(struct device *dev, u32 attr, int channel, long *val)
  119. {
  120. struct tmp464_data *data = dev_get_drvdata(dev);
  121. struct regmap *regmap = data->regmap;
  122. unsigned int regs[2];
  123. unsigned int regval;
  124. u16 regvals[2];
  125. int err = 0;
  126. switch (attr) {
  127. case hwmon_temp_max_alarm:
  128. err = regmap_read(regmap, TMP464_THERM_STATUS_REG, &regval);
  129. if (err < 0)
  130. break;
  131. *val = !!(regval & BIT(channel + 7));
  132. break;
  133. case hwmon_temp_crit_alarm:
  134. err = regmap_read(regmap, TMP464_THERM2_STATUS_REG, &regval);
  135. if (err < 0)
  136. break;
  137. *val = !!(regval & BIT(channel + 7));
  138. break;
  139. case hwmon_temp_fault:
  140. /*
  141. * The chip clears TMP464_REMOTE_OPEN_REG after it is read
  142. * and only updates it after the next measurement cycle is
  143. * complete. That means we have to cache the value internally
  144. * for one measurement cycle and report the cached value.
  145. */
  146. if (!data->valid || time_after(jiffies, data->last_updated +
  147. msecs_to_jiffies(data->update_interval))) {
  148. err = regmap_read(regmap, TMP464_REMOTE_OPEN_REG, &regval);
  149. if (err < 0)
  150. break;
  151. data->open_reg = regval;
  152. data->last_updated = jiffies;
  153. data->valid = true;
  154. }
  155. *val = !!(data->open_reg & BIT(channel + 7));
  156. break;
  157. case hwmon_temp_max_hyst:
  158. regs[0] = TMP464_THERM_LIMIT[channel];
  159. regs[1] = TMP464_TEMP_HYST_REG;
  160. err = regmap_multi_reg_read(regmap, regs, regvals, 2);
  161. if (err < 0)
  162. break;
  163. *val = temp_from_reg(regvals[0] - regvals[1]);
  164. break;
  165. case hwmon_temp_max:
  166. err = regmap_read(regmap, TMP464_THERM_LIMIT[channel], &regval);
  167. if (err < 0)
  168. break;
  169. *val = temp_from_reg(regval);
  170. break;
  171. case hwmon_temp_crit_hyst:
  172. regs[0] = TMP464_THERM2_LIMIT[channel];
  173. regs[1] = TMP464_TEMP_HYST_REG;
  174. err = regmap_multi_reg_read(regmap, regs, regvals, 2);
  175. if (err < 0)
  176. break;
  177. *val = temp_from_reg(regvals[0] - regvals[1]);
  178. break;
  179. case hwmon_temp_crit:
  180. err = regmap_read(regmap, TMP464_THERM2_LIMIT[channel], &regval);
  181. if (err < 0)
  182. break;
  183. *val = temp_from_reg(regval);
  184. break;
  185. case hwmon_temp_offset:
  186. err = regmap_read(regmap, TMP464_TEMP_OFFSET_REG(channel), &regval);
  187. if (err < 0)
  188. break;
  189. *val = temp_from_reg(regval);
  190. break;
  191. case hwmon_temp_input:
  192. if (!data->channel[channel].enabled) {
  193. err = -ENODATA;
  194. break;
  195. }
  196. err = regmap_read(regmap, TMP464_TEMP_REG(channel), &regval);
  197. if (err < 0)
  198. break;
  199. *val = temp_from_reg(regval);
  200. break;
  201. case hwmon_temp_enable:
  202. *val = data->channel[channel].enabled;
  203. break;
  204. default:
  205. err = -EOPNOTSUPP;
  206. break;
  207. }
  208. return err;
  209. }
  210. static int tmp464_read(struct device *dev, enum hwmon_sensor_types type,
  211. u32 attr, int channel, long *val)
  212. {
  213. switch (type) {
  214. case hwmon_chip:
  215. return tmp464_chip_read(dev, attr, channel, val);
  216. case hwmon_temp:
  217. return tmp464_temp_read(dev, attr, channel, val);
  218. default:
  219. return -EOPNOTSUPP;
  220. }
  221. }
  222. static int tmp464_read_string(struct device *dev, enum hwmon_sensor_types type,
  223. u32 attr, int channel, const char **str)
  224. {
  225. struct tmp464_data *data = dev_get_drvdata(dev);
  226. *str = data->channel[channel].label;
  227. return 0;
  228. }
  229. static int tmp464_set_convrate(struct tmp464_data *data, long interval)
  230. {
  231. int rate;
  232. /*
  233. * For valid rates, interval in milli-seconds can be calculated as
  234. * interval = 125 << (7 - rate);
  235. * or
  236. * interval = (1 << (7 - rate)) * 125;
  237. * The rate is therefore
  238. * rate = 7 - __fls(interval / 125);
  239. * and the rounded rate is
  240. * rate = 7 - __fls(interval * 4 / (125 * 3));
  241. * Use clamp_val() to avoid overflows, and to ensure valid input
  242. * for __fls.
  243. */
  244. interval = clamp_val(interval, 125, 16000);
  245. rate = 7 - __fls(interval * 4 / (125 * 3));
  246. data->update_interval = 125 << (7 - rate);
  247. return regmap_update_bits(data->regmap, TMP464_CONFIG_REG,
  248. TMP464_CONFIG_CONVERSION_RATE_MASK,
  249. rate << TMP464_CONFIG_CONVERSION_RATE_B0);
  250. }
  251. static int tmp464_chip_write(struct tmp464_data *data, u32 attr, int channel, long val)
  252. {
  253. switch (attr) {
  254. case hwmon_chip_update_interval:
  255. return tmp464_set_convrate(data, val);
  256. default:
  257. return -EOPNOTSUPP;
  258. }
  259. }
  260. static int tmp464_temp_write(struct tmp464_data *data, u32 attr, int channel, long val)
  261. {
  262. struct regmap *regmap = data->regmap;
  263. unsigned int regval;
  264. int err = 0;
  265. switch (attr) {
  266. case hwmon_temp_max_hyst:
  267. err = regmap_read(regmap, TMP464_THERM_LIMIT[0], &regval);
  268. if (err < 0)
  269. break;
  270. val = clamp_val(val, -256000, 256000); /* prevent overflow/underflow */
  271. val = clamp_val(temp_from_reg(regval) - val, 0, 255000);
  272. err = regmap_write(regmap, TMP464_TEMP_HYST_REG,
  273. DIV_ROUND_CLOSEST(val, 1000) << 7);
  274. break;
  275. case hwmon_temp_max:
  276. val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
  277. err = regmap_write(regmap, TMP464_THERM_LIMIT[channel], val);
  278. break;
  279. case hwmon_temp_crit:
  280. val = temp_to_limit_reg(clamp_val(val, -255000, 255500));
  281. err = regmap_write(regmap, TMP464_THERM2_LIMIT[channel], val);
  282. break;
  283. case hwmon_temp_offset:
  284. val = temp_to_offset_reg(clamp_val(val, -128000, 127937));
  285. err = regmap_write(regmap, TMP464_TEMP_OFFSET_REG(channel), val);
  286. break;
  287. case hwmon_temp_enable:
  288. data->channel[channel].enabled = !!val;
  289. err = tmp464_enable_channels(data);
  290. break;
  291. default:
  292. err = -EOPNOTSUPP;
  293. break;
  294. }
  295. return err;
  296. }
  297. static int tmp464_write(struct device *dev, enum hwmon_sensor_types type,
  298. u32 attr, int channel, long val)
  299. {
  300. struct tmp464_data *data = dev_get_drvdata(dev);
  301. int err;
  302. switch (type) {
  303. case hwmon_chip:
  304. err = tmp464_chip_write(data, attr, channel, val);
  305. break;
  306. case hwmon_temp:
  307. err = tmp464_temp_write(data, attr, channel, val);
  308. break;
  309. default:
  310. err = -EOPNOTSUPP;
  311. break;
  312. }
  313. return err;
  314. }
  315. static umode_t tmp464_is_visible(const void *_data, enum hwmon_sensor_types type,
  316. u32 attr, int channel)
  317. {
  318. const struct tmp464_data *data = _data;
  319. if (channel >= data->channels)
  320. return 0;
  321. if (type == hwmon_chip) {
  322. if (attr == hwmon_chip_update_interval)
  323. return 0644;
  324. return 0;
  325. }
  326. switch (attr) {
  327. case hwmon_temp_input:
  328. case hwmon_temp_max_alarm:
  329. case hwmon_temp_crit_alarm:
  330. case hwmon_temp_crit_hyst:
  331. return 0444;
  332. case hwmon_temp_enable:
  333. case hwmon_temp_max:
  334. case hwmon_temp_crit:
  335. return 0644;
  336. case hwmon_temp_max_hyst:
  337. if (!channel)
  338. return 0644;
  339. return 0444;
  340. case hwmon_temp_label:
  341. if (data->channel[channel].label)
  342. return 0444;
  343. return 0;
  344. case hwmon_temp_fault:
  345. if (channel)
  346. return 0444;
  347. return 0;
  348. case hwmon_temp_offset:
  349. if (channel)
  350. return 0644;
  351. return 0;
  352. default:
  353. return 0;
  354. }
  355. }
  356. static void tmp464_restore_lock(void *regmap)
  357. {
  358. regmap_write(regmap, TMP464_LOCK_REG, TMP464_LOCK_VAL);
  359. }
  360. static void tmp464_restore_config(void *_data)
  361. {
  362. struct tmp464_data *data = _data;
  363. regmap_write(data->regmap, TMP464_CONFIG_REG, data->config_orig);
  364. }
  365. static int tmp464_init_client(struct device *dev, struct tmp464_data *data)
  366. {
  367. struct regmap *regmap = data->regmap;
  368. unsigned int regval;
  369. int err;
  370. err = regmap_read(regmap, TMP464_LOCK_REG, &regval);
  371. if (err)
  372. return err;
  373. if (regval == TMP464_LOCKED) {
  374. /* Explicitly unlock chip if it is locked */
  375. err = regmap_write(regmap, TMP464_LOCK_REG, TMP464_UNLOCK_VAL);
  376. if (err)
  377. return err;
  378. /* and lock it again when unloading the driver */
  379. err = devm_add_action_or_reset(dev, tmp464_restore_lock, regmap);
  380. if (err)
  381. return err;
  382. }
  383. err = regmap_read(regmap, TMP464_CONFIG_REG, &regval);
  384. if (err)
  385. return err;
  386. data->config_orig = regval;
  387. err = devm_add_action_or_reset(dev, tmp464_restore_config, data);
  388. if (err)
  389. return err;
  390. /* Default to 500 ms update interval */
  391. err = regmap_update_bits(regmap, TMP464_CONFIG_REG,
  392. TMP464_CONFIG_CONVERSION_RATE_MASK | TMP464_CONFIG_SHUTDOWN,
  393. BIT(TMP464_CONFIG_CONVERSION_RATE_B0) |
  394. BIT(TMP464_CONFIG_CONVERSION_RATE_B2));
  395. if (err)
  396. return err;
  397. data->update_interval = 500;
  398. return tmp464_enable_channels(data);
  399. }
  400. static int tmp464_detect(struct i2c_client *client,
  401. struct i2c_board_info *info)
  402. {
  403. struct i2c_adapter *adapter = client->adapter;
  404. char *name, *chip;
  405. int reg;
  406. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA))
  407. return -ENODEV;
  408. reg = i2c_smbus_read_word_swapped(client, TMP464_MANUFACTURER_ID_REG);
  409. if (reg < 0)
  410. return reg;
  411. if (reg != TMP464_MANUFACTURER_ID)
  412. return -ENODEV;
  413. /* Check for "always return zero" bits */
  414. reg = i2c_smbus_read_word_swapped(client, TMP464_THERM_STATUS_REG);
  415. if (reg < 0)
  416. return reg;
  417. if (reg & 0x1f)
  418. return -ENODEV;
  419. reg = i2c_smbus_read_word_swapped(client, TMP464_THERM2_STATUS_REG);
  420. if (reg < 0)
  421. return reg;
  422. if (reg & 0x1f)
  423. return -ENODEV;
  424. reg = i2c_smbus_read_word_swapped(client, TMP464_DEVICE_ID_REG);
  425. if (reg < 0)
  426. return reg;
  427. switch (reg) {
  428. case TMP464_DEVICE_ID:
  429. name = "tmp464";
  430. chip = "TMP464";
  431. break;
  432. case TMP468_DEVICE_ID:
  433. name = "tmp468";
  434. chip = "TMP468";
  435. break;
  436. default:
  437. return -ENODEV;
  438. }
  439. strscpy(info->type, name, I2C_NAME_SIZE);
  440. dev_info(&adapter->dev, "Detected TI %s chip at 0x%02x\n", chip, client->addr);
  441. return 0;
  442. }
  443. static int tmp464_probe_child_from_dt(struct device *dev,
  444. struct device_node *child,
  445. struct tmp464_data *data)
  446. {
  447. struct regmap *regmap = data->regmap;
  448. u32 channel;
  449. s32 nfactor;
  450. int err;
  451. err = of_property_read_u32(child, "reg", &channel);
  452. if (err) {
  453. dev_err(dev, "missing reg property of %pOFn\n", child);
  454. return err;
  455. }
  456. if (channel >= data->channels) {
  457. dev_err(dev, "invalid reg %d of %pOFn\n", channel, child);
  458. return -EINVAL;
  459. }
  460. of_property_read_string(child, "label", &data->channel[channel].label);
  461. data->channel[channel].enabled = of_device_is_available(child);
  462. err = of_property_read_s32(child, "ti,n-factor", &nfactor);
  463. if (err && err != -EINVAL)
  464. return err;
  465. if (!err) {
  466. if (channel == 0) {
  467. dev_err(dev, "n-factor can't be set for internal channel\n");
  468. return -EINVAL;
  469. }
  470. if (nfactor > 127 || nfactor < -128) {
  471. dev_err(dev, "n-factor for channel %d invalid (%d)\n",
  472. channel, nfactor);
  473. return -EINVAL;
  474. }
  475. err = regmap_write(regmap, TMP464_N_FACTOR_REG(channel),
  476. (nfactor << 8) & 0xff00);
  477. if (err)
  478. return err;
  479. }
  480. return 0;
  481. }
  482. static int tmp464_probe_from_dt(struct device *dev, struct tmp464_data *data)
  483. {
  484. const struct device_node *np = dev->of_node;
  485. int err;
  486. for_each_child_of_node_scoped(np, child) {
  487. if (strcmp(child->name, "channel"))
  488. continue;
  489. err = tmp464_probe_child_from_dt(dev, child, data);
  490. if (err)
  491. return err;
  492. }
  493. return 0;
  494. }
  495. static const struct hwmon_ops tmp464_ops = {
  496. .is_visible = tmp464_is_visible,
  497. .read = tmp464_read,
  498. .read_string = tmp464_read_string,
  499. .write = tmp464_write,
  500. };
  501. static const struct hwmon_channel_info * const tmp464_info[] = {
  502. HWMON_CHANNEL_INFO(chip,
  503. HWMON_C_UPDATE_INTERVAL),
  504. HWMON_CHANNEL_INFO(temp,
  505. HWMON_T_INPUT | HWMON_T_MAX | HWMON_T_MAX_HYST | HWMON_T_CRIT |
  506. HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM |
  507. HWMON_T_LABEL | HWMON_T_ENABLE,
  508. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  509. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  510. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  511. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  512. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  513. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  514. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  515. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  516. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  517. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  518. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  519. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  520. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  521. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  522. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  523. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  524. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  525. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  526. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  527. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  528. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE,
  529. HWMON_T_INPUT | HWMON_T_OFFSET | HWMON_T_MAX | HWMON_T_MAX_HYST |
  530. HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MAX_ALARM |
  531. HWMON_T_CRIT_ALARM | HWMON_T_FAULT | HWMON_T_LABEL | HWMON_T_ENABLE),
  532. NULL
  533. };
  534. static const struct hwmon_chip_info tmp464_chip_info = {
  535. .ops = &tmp464_ops,
  536. .info = tmp464_info,
  537. };
  538. /* regmap */
  539. static bool tmp464_is_volatile_reg(struct device *dev, unsigned int reg)
  540. {
  541. return (reg < TMP464_TEMP_REG(TMP468_NUM_CHANNELS) ||
  542. reg == TMP464_THERM_STATUS_REG ||
  543. reg == TMP464_THERM2_STATUS_REG ||
  544. reg == TMP464_REMOTE_OPEN_REG);
  545. }
  546. static const struct regmap_config tmp464_regmap_config = {
  547. .reg_bits = 8,
  548. .val_bits = 16,
  549. .max_register = TMP464_DEVICE_ID_REG,
  550. .volatile_reg = tmp464_is_volatile_reg,
  551. .val_format_endian = REGMAP_ENDIAN_BIG,
  552. .cache_type = REGCACHE_MAPLE,
  553. .use_single_read = true,
  554. .use_single_write = true,
  555. };
  556. static int tmp464_probe(struct i2c_client *client)
  557. {
  558. struct device *dev = &client->dev;
  559. struct device *hwmon_dev;
  560. struct tmp464_data *data;
  561. int i, err;
  562. if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
  563. dev_err(&client->dev, "i2c functionality check failed\n");
  564. return -ENODEV;
  565. }
  566. data = devm_kzalloc(dev, sizeof(struct tmp464_data), GFP_KERNEL);
  567. if (!data)
  568. return -ENOMEM;
  569. data->channels = (int)(unsigned long)i2c_get_match_data(client);
  570. data->regmap = devm_regmap_init_i2c(client, &tmp464_regmap_config);
  571. if (IS_ERR(data->regmap))
  572. return PTR_ERR(data->regmap);
  573. for (i = 0; i < data->channels; i++)
  574. data->channel[i].enabled = true;
  575. err = tmp464_init_client(dev, data);
  576. if (err)
  577. return err;
  578. if (dev->of_node) {
  579. err = tmp464_probe_from_dt(dev, data);
  580. if (err)
  581. return err;
  582. }
  583. hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
  584. data, &tmp464_chip_info, NULL);
  585. return PTR_ERR_OR_ZERO(hwmon_dev);
  586. }
  587. static struct i2c_driver tmp464_driver = {
  588. .class = I2C_CLASS_HWMON,
  589. .driver = {
  590. .name = "tmp464",
  591. .of_match_table = of_match_ptr(tmp464_of_match),
  592. },
  593. .probe = tmp464_probe,
  594. .id_table = tmp464_id,
  595. .detect = tmp464_detect,
  596. .address_list = normal_i2c,
  597. };
  598. module_i2c_driver(tmp464_driver);
  599. MODULE_AUTHOR("Agathe Porte <agathe.porte@nokia.com>");
  600. MODULE_DESCRIPTION("Texas Instruments TMP464 temperature sensor driver");
  601. MODULE_LICENSE("GPL");