emc2305.c 19 KB

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  1. // SPDX-License-Identifier: GPL-2.0+
  2. /*
  3. * Hardware monitoring driver for EMC2305 fan controller
  4. *
  5. * Copyright (C) 2022 Nvidia Technologies Ltd.
  6. */
  7. #include <linux/err.h>
  8. #include <linux/hwmon.h>
  9. #include <linux/i2c.h>
  10. #include <linux/module.h>
  11. #include <linux/platform_data/emc2305.h>
  12. #include <linux/thermal.h>
  13. #include <linux/pwm.h>
  14. #include <linux/of_device.h>
  15. #include <linux/util_macros.h>
  16. #define EMC2305_REG_DRIVE_FAIL_STATUS 0x27
  17. #define EMC2305_REG_VENDOR 0xfe
  18. #define EMC2305_FAN_MAX 0xff
  19. #define EMC2305_FAN_MIN 0x00
  20. #define EMC2305_FAN_MAX_STATE 10
  21. #define EMC2305_DEVICE 0x34
  22. #define EMC2305_VENDOR 0x5d
  23. #define EMC2305_REG_PRODUCT_ID 0xfd
  24. #define EMC2305_TACH_REGS_UNUSE_BITS 3
  25. #define EMC2305_TACH_CNT_MULTIPLIER 0x02
  26. #define EMC2305_TACH_RANGE_MIN 480
  27. #define EMC2305_DEFAULT_OUTPUT 0x0
  28. #define EMC2305_DEFAULT_POLARITY 0x0
  29. #define EMC2305_REG_POLARITY 0x2a
  30. #define EMC2305_REG_DRIVE_PWM_OUT 0x2b
  31. #define EMC2305_OPEN_DRAIN 0x0
  32. #define EMC2305_PUSH_PULL 0x1
  33. #define EMC2305_PWM_DUTY2STATE(duty, max_state, pwm_max) \
  34. DIV_ROUND_CLOSEST((duty) * (max_state), (pwm_max))
  35. #define EMC2305_PWM_STATE2DUTY(state, max_state, pwm_max) \
  36. DIV_ROUND_CLOSEST((state) * (pwm_max), (max_state))
  37. /*
  38. * Factor by equations [2] and [3] from data sheet; valid for fans where the number of edges
  39. * equal (poles * 2 + 1).
  40. */
  41. #define EMC2305_RPM_FACTOR 3932160
  42. #define EMC2305_REG_FAN_DRIVE(n) (0x30 + 0x10 * (n))
  43. #define EMC2305_REG_FAN_MIN_DRIVE(n) (0x38 + 0x10 * (n))
  44. #define EMC2305_REG_FAN_TACH(n) (0x3e + 0x10 * (n))
  45. /* Supported base PWM frequencies */
  46. static const unsigned int base_freq_table[] = { 2441, 4882, 19530, 26000 };
  47. enum emc230x_product_id {
  48. EMC2305 = 0x34,
  49. EMC2303 = 0x35,
  50. EMC2302 = 0x36,
  51. EMC2301 = 0x37,
  52. };
  53. static const struct i2c_device_id emc2305_ids[] = {
  54. { "emc2305" },
  55. { "emc2303" },
  56. { "emc2302" },
  57. { "emc2301" },
  58. { }
  59. };
  60. MODULE_DEVICE_TABLE(i2c, emc2305_ids);
  61. /**
  62. * struct emc2305_cdev_data - device-specific cooling device state
  63. * @cdev: cooling device
  64. * @cur_state: cooling current state
  65. * @last_hwmon_state: last cooling state updated by hwmon subsystem
  66. * @last_thermal_state: last cooling state updated by thermal subsystem
  67. *
  68. * The 'last_hwmon_state' and 'last_thermal_state' fields are provided to support fan low limit
  69. * speed feature. The purpose of this feature is to provides ability to limit fan speed
  70. * according to some system wise considerations, like absence of some replaceable units (PSU or
  71. * line cards), high system ambient temperature, unreliable transceivers temperature sensing or
  72. * some other factors which indirectly impacts system's airflow
  73. * Fan low limit feature is supported through 'hwmon' interface: 'hwmon' 'pwm' attribute is
  74. * used for setting low limit for fan speed in case 'thermal' subsystem is configured in
  75. * kernel. In this case setting fan speed through 'hwmon' will never let the 'thermal'
  76. * subsystem to select a lower duty cycle than the duty cycle selected with the 'pwm'
  77. * attribute.
  78. * From other side, fan speed is to be updated in hardware through 'pwm' only in case the
  79. * requested fan speed is above last speed set by 'thermal' subsystem, otherwise requested fan
  80. * speed will be just stored with no PWM update.
  81. */
  82. struct emc2305_cdev_data {
  83. struct thermal_cooling_device *cdev;
  84. unsigned int cur_state;
  85. unsigned long last_hwmon_state;
  86. unsigned long last_thermal_state;
  87. };
  88. /**
  89. * struct emc2305_data - device-specific data
  90. * @client: i2c client
  91. * @hwmon_dev: hwmon device
  92. * @max_state: maximum cooling state of the cooling device
  93. * @pwm_num: number of PWM channels
  94. * @pwm_output_mask: PWM output mask
  95. * @pwm_polarity_mask: PWM polarity mask
  96. * @pwm_separate: separate PWM settings for every channel
  97. * @pwm_min: array of minimum PWM per channel
  98. * @pwm_freq: array of PWM frequency per channel
  99. * @cdev_data: array of cooling devices data
  100. */
  101. struct emc2305_data {
  102. struct i2c_client *client;
  103. struct device *hwmon_dev;
  104. u8 max_state;
  105. u8 pwm_num;
  106. u8 pwm_output_mask;
  107. u8 pwm_polarity_mask;
  108. bool pwm_separate;
  109. u8 pwm_min[EMC2305_PWM_MAX];
  110. u16 pwm_freq[EMC2305_PWM_MAX];
  111. struct emc2305_cdev_data cdev_data[EMC2305_PWM_MAX];
  112. };
  113. static char *emc2305_fan_name[] = {
  114. "emc2305_fan",
  115. "emc2305_fan1",
  116. "emc2305_fan2",
  117. "emc2305_fan3",
  118. "emc2305_fan4",
  119. "emc2305_fan5",
  120. };
  121. static int emc2305_get_max_channel(const struct emc2305_data *data)
  122. {
  123. return data->pwm_num;
  124. }
  125. static int emc2305_get_cdev_idx(struct thermal_cooling_device *cdev)
  126. {
  127. struct emc2305_data *data = cdev->devdata;
  128. size_t len = strlen(cdev->type);
  129. int ret;
  130. if (len <= 0)
  131. return -EINVAL;
  132. /*
  133. * Returns index of cooling device 0..4 in case of separate PWM setting.
  134. * Zero index is used in case of one common PWM setting.
  135. * If the mode is not set as pwm_separate, all PWMs are to be bound
  136. * to the common thermal zone and should work at the same speed
  137. * to perform cooling for the same thermal junction.
  138. * Otherwise, return specific channel that will be used in bound
  139. * related PWM to the thermal zone.
  140. */
  141. if (!data->pwm_separate)
  142. return 0;
  143. ret = cdev->type[len - 1];
  144. switch (ret) {
  145. case '1' ... '5':
  146. return ret - '1';
  147. default:
  148. break;
  149. }
  150. return -EINVAL;
  151. }
  152. static int emc2305_get_cur_state(struct thermal_cooling_device *cdev, unsigned long *state)
  153. {
  154. int cdev_idx;
  155. struct emc2305_data *data = cdev->devdata;
  156. cdev_idx = emc2305_get_cdev_idx(cdev);
  157. if (cdev_idx < 0)
  158. return cdev_idx;
  159. *state = data->cdev_data[cdev_idx].cur_state;
  160. return 0;
  161. }
  162. static int emc2305_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state)
  163. {
  164. struct emc2305_data *data = cdev->devdata;
  165. *state = data->max_state;
  166. return 0;
  167. }
  168. static int __emc2305_set_cur_state(struct emc2305_data *data, int cdev_idx, unsigned long state)
  169. {
  170. int ret;
  171. struct i2c_client *client = data->client;
  172. u8 val, i;
  173. state = max_t(unsigned long, state, data->cdev_data[cdev_idx].last_hwmon_state);
  174. val = EMC2305_PWM_STATE2DUTY(state, data->max_state, EMC2305_FAN_MAX);
  175. data->cdev_data[cdev_idx].cur_state = state;
  176. if (data->pwm_separate) {
  177. ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(cdev_idx), val);
  178. if (ret < 0)
  179. return ret;
  180. } else {
  181. /*
  182. * Set the same PWM value in all channels
  183. * if common PWM channel is used.
  184. */
  185. for (i = 0; i < data->pwm_num; i++) {
  186. ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(i), val);
  187. if (ret < 0)
  188. return ret;
  189. }
  190. }
  191. return 0;
  192. }
  193. static int emc2305_set_cur_state(struct thermal_cooling_device *cdev, unsigned long state)
  194. {
  195. int cdev_idx, ret;
  196. struct emc2305_data *data = cdev->devdata;
  197. if (state > data->max_state)
  198. return -EINVAL;
  199. cdev_idx = emc2305_get_cdev_idx(cdev);
  200. if (cdev_idx < 0)
  201. return cdev_idx;
  202. /* Save thermal state. */
  203. data->cdev_data[cdev_idx].last_thermal_state = state;
  204. ret = __emc2305_set_cur_state(data, cdev_idx, state);
  205. if (ret < 0)
  206. return ret;
  207. return 0;
  208. }
  209. static const struct thermal_cooling_device_ops emc2305_cooling_ops = {
  210. .get_max_state = emc2305_get_max_state,
  211. .get_cur_state = emc2305_get_cur_state,
  212. .set_cur_state = emc2305_set_cur_state,
  213. };
  214. static int emc2305_show_fault(struct device *dev, int channel)
  215. {
  216. struct emc2305_data *data = dev_get_drvdata(dev);
  217. struct i2c_client *client = data->client;
  218. int status_reg;
  219. status_reg = i2c_smbus_read_byte_data(client, EMC2305_REG_DRIVE_FAIL_STATUS);
  220. if (status_reg < 0)
  221. return status_reg;
  222. return status_reg & (1 << channel) ? 1 : 0;
  223. }
  224. static int emc2305_show_fan(struct device *dev, int channel)
  225. {
  226. struct emc2305_data *data = dev_get_drvdata(dev);
  227. struct i2c_client *client = data->client;
  228. int ret;
  229. ret = i2c_smbus_read_word_swapped(client, EMC2305_REG_FAN_TACH(channel));
  230. if (ret <= 0)
  231. return ret;
  232. ret = ret >> EMC2305_TACH_REGS_UNUSE_BITS;
  233. ret = EMC2305_RPM_FACTOR / ret;
  234. if (ret <= EMC2305_TACH_RANGE_MIN)
  235. return 0;
  236. return ret * EMC2305_TACH_CNT_MULTIPLIER;
  237. }
  238. static int emc2305_show_pwm(struct device *dev, int channel)
  239. {
  240. struct emc2305_data *data = dev_get_drvdata(dev);
  241. struct i2c_client *client = data->client;
  242. return i2c_smbus_read_byte_data(client, EMC2305_REG_FAN_DRIVE(channel));
  243. }
  244. static int emc2305_set_pwm(struct device *dev, long val, int channel)
  245. {
  246. struct emc2305_data *data = dev_get_drvdata(dev);
  247. struct i2c_client *client = data->client;
  248. int ret;
  249. if (val < data->pwm_min[channel] || val > EMC2305_FAN_MAX)
  250. return -EINVAL;
  251. ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_DRIVE(channel), val);
  252. if (ret < 0)
  253. return ret;
  254. data->cdev_data[channel].cur_state = EMC2305_PWM_DUTY2STATE(val, data->max_state,
  255. EMC2305_FAN_MAX);
  256. return 0;
  257. }
  258. static int emc2305_set_single_tz(struct device *dev, struct device_node *fan_node, int idx)
  259. {
  260. struct emc2305_data *data = dev_get_drvdata(dev);
  261. long pwm;
  262. int i, cdev_idx, ret;
  263. cdev_idx = (idx) ? idx - 1 : 0;
  264. pwm = data->pwm_min[cdev_idx];
  265. data->cdev_data[cdev_idx].cdev =
  266. devm_thermal_of_cooling_device_register(dev, fan_node,
  267. emc2305_fan_name[idx], data,
  268. &emc2305_cooling_ops);
  269. if (IS_ERR(data->cdev_data[cdev_idx].cdev)) {
  270. dev_err(dev, "Failed to register cooling device %s\n", emc2305_fan_name[idx]);
  271. return PTR_ERR(data->cdev_data[cdev_idx].cdev);
  272. }
  273. if (data->cdev_data[cdev_idx].cur_state > 0)
  274. /* Update pwm when temperature is above trips */
  275. pwm = EMC2305_PWM_STATE2DUTY(data->cdev_data[cdev_idx].cur_state,
  276. data->max_state, EMC2305_FAN_MAX);
  277. /* Set minimal PWM speed. */
  278. if (data->pwm_separate) {
  279. ret = emc2305_set_pwm(dev, pwm, cdev_idx);
  280. if (ret < 0)
  281. return ret;
  282. } else {
  283. for (i = 0; i < data->pwm_num; i++) {
  284. ret = emc2305_set_pwm(dev, pwm, i);
  285. if (ret < 0)
  286. return ret;
  287. }
  288. }
  289. data->cdev_data[cdev_idx].cur_state =
  290. EMC2305_PWM_DUTY2STATE(pwm, data->max_state,
  291. EMC2305_FAN_MAX);
  292. data->cdev_data[cdev_idx].last_hwmon_state =
  293. EMC2305_PWM_DUTY2STATE(pwm, data->max_state,
  294. EMC2305_FAN_MAX);
  295. return 0;
  296. }
  297. static int emc2305_set_tz(struct device *dev)
  298. {
  299. struct emc2305_data *data = dev_get_drvdata(dev);
  300. int i, ret;
  301. if (!data->pwm_separate)
  302. return emc2305_set_single_tz(dev, dev->of_node, 0);
  303. for (i = 0; i < data->pwm_num; i++) {
  304. ret = emc2305_set_single_tz(dev, dev->of_node, i + 1);
  305. if (ret)
  306. return ret;
  307. }
  308. return 0;
  309. }
  310. static umode_t
  311. emc2305_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel)
  312. {
  313. int max_channel = emc2305_get_max_channel(data);
  314. /* Don't show channels which are not physically connected. */
  315. if (channel >= max_channel)
  316. return 0;
  317. switch (type) {
  318. case hwmon_fan:
  319. switch (attr) {
  320. case hwmon_fan_input:
  321. return 0444;
  322. case hwmon_fan_fault:
  323. return 0444;
  324. default:
  325. break;
  326. }
  327. break;
  328. case hwmon_pwm:
  329. switch (attr) {
  330. case hwmon_pwm_input:
  331. return 0644;
  332. default:
  333. break;
  334. }
  335. break;
  336. default:
  337. break;
  338. }
  339. return 0;
  340. };
  341. static int
  342. emc2305_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val)
  343. {
  344. struct emc2305_data *data = dev_get_drvdata(dev);
  345. int cdev_idx;
  346. switch (type) {
  347. case hwmon_pwm:
  348. switch (attr) {
  349. case hwmon_pwm_input:
  350. /* If thermal is configured - handle PWM limit setting. */
  351. if (IS_REACHABLE(CONFIG_THERMAL)) {
  352. if (data->pwm_separate)
  353. cdev_idx = channel;
  354. else
  355. cdev_idx = 0;
  356. data->cdev_data[cdev_idx].last_hwmon_state =
  357. EMC2305_PWM_DUTY2STATE(val, data->max_state,
  358. EMC2305_FAN_MAX);
  359. /*
  360. * Update PWM only in case requested state is not less than the
  361. * last thermal state.
  362. */
  363. if (data->cdev_data[cdev_idx].last_hwmon_state >=
  364. data->cdev_data[cdev_idx].last_thermal_state)
  365. return __emc2305_set_cur_state(data, cdev_idx,
  366. data->cdev_data[cdev_idx].last_hwmon_state);
  367. return 0;
  368. }
  369. return emc2305_set_pwm(dev, val, channel);
  370. default:
  371. break;
  372. }
  373. break;
  374. default:
  375. break;
  376. }
  377. return -EOPNOTSUPP;
  378. };
  379. static int
  380. emc2305_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val)
  381. {
  382. int ret;
  383. switch (type) {
  384. case hwmon_fan:
  385. switch (attr) {
  386. case hwmon_fan_input:
  387. ret = emc2305_show_fan(dev, channel);
  388. if (ret < 0)
  389. return ret;
  390. *val = ret;
  391. return 0;
  392. case hwmon_fan_fault:
  393. ret = emc2305_show_fault(dev, channel);
  394. if (ret < 0)
  395. return ret;
  396. *val = ret;
  397. return 0;
  398. default:
  399. break;
  400. }
  401. break;
  402. case hwmon_pwm:
  403. switch (attr) {
  404. case hwmon_pwm_input:
  405. ret = emc2305_show_pwm(dev, channel);
  406. if (ret < 0)
  407. return ret;
  408. *val = ret;
  409. return 0;
  410. default:
  411. break;
  412. }
  413. break;
  414. default:
  415. break;
  416. }
  417. return -EOPNOTSUPP;
  418. };
  419. static const struct hwmon_ops emc2305_ops = {
  420. .is_visible = emc2305_is_visible,
  421. .read = emc2305_read,
  422. .write = emc2305_write,
  423. };
  424. static const struct hwmon_channel_info * const emc2305_info[] = {
  425. HWMON_CHANNEL_INFO(fan,
  426. HWMON_F_INPUT | HWMON_F_FAULT,
  427. HWMON_F_INPUT | HWMON_F_FAULT,
  428. HWMON_F_INPUT | HWMON_F_FAULT,
  429. HWMON_F_INPUT | HWMON_F_FAULT,
  430. HWMON_F_INPUT | HWMON_F_FAULT),
  431. HWMON_CHANNEL_INFO(pwm,
  432. HWMON_PWM_INPUT,
  433. HWMON_PWM_INPUT,
  434. HWMON_PWM_INPUT,
  435. HWMON_PWM_INPUT,
  436. HWMON_PWM_INPUT),
  437. NULL
  438. };
  439. static const struct hwmon_chip_info emc2305_chip_info = {
  440. .ops = &emc2305_ops,
  441. .info = emc2305_info,
  442. };
  443. static int emc2305_identify(struct device *dev)
  444. {
  445. struct i2c_client *client = to_i2c_client(dev);
  446. struct emc2305_data *data = i2c_get_clientdata(client);
  447. int ret;
  448. ret = i2c_smbus_read_byte_data(client, EMC2305_REG_PRODUCT_ID);
  449. if (ret < 0)
  450. return ret;
  451. switch (ret) {
  452. case EMC2305:
  453. data->pwm_num = 5;
  454. break;
  455. case EMC2303:
  456. data->pwm_num = 3;
  457. break;
  458. case EMC2302:
  459. data->pwm_num = 2;
  460. break;
  461. case EMC2301:
  462. data->pwm_num = 1;
  463. break;
  464. default:
  465. return -ENODEV;
  466. }
  467. return 0;
  468. }
  469. static int emc2305_of_parse_pwm_child(struct device *dev,
  470. struct device_node *child,
  471. struct emc2305_data *data)
  472. { u32 ch;
  473. int ret;
  474. struct of_phandle_args args;
  475. ret = of_property_read_u32(child, "reg", &ch);
  476. if (ret) {
  477. dev_err(dev, "missing reg property of %pOFn\n", child);
  478. return ret;
  479. }
  480. ret = of_parse_phandle_with_args(child, "pwms", "#pwm-cells", 0, &args);
  481. if (ret)
  482. return ret;
  483. if (args.args_count > 0) {
  484. data->pwm_freq[ch] = find_closest(args.args[0], base_freq_table,
  485. ARRAY_SIZE(base_freq_table));
  486. } else {
  487. data->pwm_freq[ch] = base_freq_table[3];
  488. }
  489. if (args.args_count > 1) {
  490. if (args.args[1] == PWM_POLARITY_NORMAL || args.args[1] == PWM_POLARITY_INVERSED)
  491. data->pwm_polarity_mask |= args.args[1] << ch;
  492. else
  493. dev_err(dev, "Wrong PWM polarity config provided: %d\n", args.args[0]);
  494. } else {
  495. data->pwm_polarity_mask |= PWM_POLARITY_NORMAL << ch;
  496. }
  497. if (args.args_count > 2) {
  498. if (args.args[2] == EMC2305_PUSH_PULL || args.args[2] <= EMC2305_OPEN_DRAIN)
  499. data->pwm_output_mask |= args.args[2] << ch;
  500. else
  501. dev_err(dev, "Wrong PWM output config provided: %d\n", args.args[1]);
  502. } else {
  503. data->pwm_output_mask |= EMC2305_OPEN_DRAIN << ch;
  504. }
  505. of_node_put(args.np);
  506. return 0;
  507. }
  508. static int emc2305_probe_childs_from_dt(struct device *dev)
  509. {
  510. struct emc2305_data *data = dev_get_drvdata(dev);
  511. struct device_node *child;
  512. int ret, count = 0;
  513. data->pwm_output_mask = 0x0;
  514. data->pwm_polarity_mask = 0x0;
  515. for_each_child_of_node(dev->of_node, child) {
  516. if (of_property_present(child, "reg")) {
  517. ret = emc2305_of_parse_pwm_child(dev, child, data);
  518. if (ret)
  519. continue;
  520. count++;
  521. }
  522. }
  523. return count;
  524. }
  525. static int emc2305_probe(struct i2c_client *client)
  526. {
  527. struct i2c_adapter *adapter = client->adapter;
  528. struct device *dev = &client->dev;
  529. struct emc2305_data *data;
  530. struct emc2305_platform_data *pdata;
  531. int vendor;
  532. int ret;
  533. int i;
  534. int pwm_childs;
  535. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA))
  536. return -ENODEV;
  537. vendor = i2c_smbus_read_byte_data(client, EMC2305_REG_VENDOR);
  538. if (vendor != EMC2305_VENDOR)
  539. return -ENODEV;
  540. data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
  541. if (!data)
  542. return -ENOMEM;
  543. i2c_set_clientdata(client, data);
  544. data->client = client;
  545. ret = emc2305_identify(dev);
  546. if (ret)
  547. return ret;
  548. pwm_childs = emc2305_probe_childs_from_dt(dev);
  549. pdata = dev_get_platdata(&client->dev);
  550. if (!pwm_childs) {
  551. if (pdata) {
  552. if (!pdata->max_state || pdata->max_state > EMC2305_FAN_MAX_STATE)
  553. return -EINVAL;
  554. data->max_state = pdata->max_state;
  555. /*
  556. * Validate a number of active PWM channels. Note that
  557. * configured number can be less than the actual maximum
  558. * supported by the device.
  559. */
  560. if (!pdata->pwm_num || pdata->pwm_num > EMC2305_PWM_MAX)
  561. return -EINVAL;
  562. data->pwm_num = pdata->pwm_num;
  563. data->pwm_output_mask = pdata->pwm_output_mask;
  564. data->pwm_polarity_mask = pdata->pwm_polarity_mask;
  565. data->pwm_separate = pdata->pwm_separate;
  566. for (i = 0; i < EMC2305_PWM_MAX; i++) {
  567. data->pwm_min[i] = pdata->pwm_min[i];
  568. data->pwm_freq[i] = pdata->pwm_freq[i];
  569. }
  570. } else {
  571. data->max_state = EMC2305_FAN_MAX_STATE;
  572. data->pwm_separate = false;
  573. data->pwm_output_mask = EMC2305_DEFAULT_OUTPUT;
  574. data->pwm_polarity_mask = EMC2305_DEFAULT_POLARITY;
  575. for (i = 0; i < EMC2305_PWM_MAX; i++) {
  576. data->pwm_min[i] = EMC2305_FAN_MIN;
  577. data->pwm_freq[i] = base_freq_table[3];
  578. }
  579. }
  580. } else {
  581. data->max_state = EMC2305_FAN_MAX_STATE;
  582. data->pwm_separate = false;
  583. for (i = 0; i < EMC2305_PWM_MAX; i++)
  584. data->pwm_min[i] = EMC2305_FAN_MIN;
  585. }
  586. data->hwmon_dev = devm_hwmon_device_register_with_info(dev, "emc2305", data,
  587. &emc2305_chip_info, NULL);
  588. if (IS_ERR(data->hwmon_dev))
  589. return PTR_ERR(data->hwmon_dev);
  590. if (IS_REACHABLE(CONFIG_THERMAL)) {
  591. /* Parse and check for the available PWM child nodes */
  592. if (pwm_childs > 0) {
  593. i = 0;
  594. for_each_child_of_node_scoped(dev->of_node, child) {
  595. ret = emc2305_set_single_tz(dev, child, i);
  596. if (ret != 0)
  597. return ret;
  598. i++;
  599. }
  600. } else {
  601. ret = emc2305_set_tz(dev);
  602. if (ret != 0)
  603. return ret;
  604. }
  605. }
  606. ret = i2c_smbus_write_byte_data(client, EMC2305_REG_DRIVE_PWM_OUT,
  607. data->pwm_output_mask);
  608. if (ret < 0)
  609. dev_err(dev, "Failed to configure pwm output, using default\n");
  610. ret = i2c_smbus_write_byte_data(client, EMC2305_REG_POLARITY,
  611. data->pwm_polarity_mask);
  612. if (ret < 0)
  613. dev_err(dev, "Failed to configure pwm polarity, using default\n");
  614. for (i = 0; i < data->pwm_num; i++) {
  615. ret = i2c_smbus_write_byte_data(client, EMC2305_REG_FAN_MIN_DRIVE(i),
  616. data->pwm_min[i]);
  617. if (ret < 0)
  618. return ret;
  619. }
  620. return 0;
  621. }
  622. static const struct of_device_id of_emc2305_match_table[] = {
  623. { .compatible = "microchip,emc2305", },
  624. {},
  625. };
  626. MODULE_DEVICE_TABLE(of, of_emc2305_match_table);
  627. static struct i2c_driver emc2305_driver = {
  628. .driver = {
  629. .name = "emc2305",
  630. .of_match_table = of_emc2305_match_table,
  631. },
  632. .probe = emc2305_probe,
  633. .id_table = emc2305_ids,
  634. };
  635. module_i2c_driver(emc2305_driver);
  636. MODULE_AUTHOR("Nvidia");
  637. MODULE_DESCRIPTION("Microchip EMC2305 fan controller driver");
  638. MODULE_LICENSE("GPL");