corsair-psu.c 24 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * corsair-psu.c - Linux driver for Corsair power supplies with HID sensors interface
  4. * Copyright (C) 2020 Wilken Gottwalt <wilken.gottwalt@posteo.net>
  5. */
  6. #include <linux/completion.h>
  7. #include <linux/debugfs.h>
  8. #include <linux/errno.h>
  9. #include <linux/hid.h>
  10. #include <linux/hwmon.h>
  11. #include <linux/jiffies.h>
  12. #include <linux/kernel.h>
  13. #include <linux/module.h>
  14. #include <linux/slab.h>
  15. #include <linux/types.h>
  16. /*
  17. * Corsair protocol for PSUs
  18. *
  19. * message size = 64 bytes (request and response, little endian)
  20. * request:
  21. * [length][command][param0][param1][paramX]...
  22. * reply:
  23. * [echo of length][echo of command][data0][data1][dataX]...
  24. *
  25. * - commands are byte sized opcodes
  26. * - length is the sum of all bytes of the commands/params
  27. * - the micro-controller of most of these PSUs support concatenation in the request and reply,
  28. * but it is better to not rely on this (it is also hard to parse)
  29. * - the driver uses raw events to be accessible from userspace (though this is not really
  30. * supported, it is just there for convenience, may be removed in the future)
  31. * - a reply always starts with the length and command in the same order the request used it
  32. * - length of the reply data is specific to the command used
  33. * - some of the commands work on a rail and can be switched to a specific rail (0 = 12v,
  34. * 1 = 5v, 2 = 3.3v)
  35. * - the format of the init command 0xFE is swapped length/command bytes
  36. * - parameter bytes amount and values are specific to the command (rail setting is the only
  37. * one for now that uses non-zero values)
  38. * - the driver supports debugfs for values not fitting into the hwmon class
  39. * - not every device class (HXi or RMi) supports all commands
  40. * - if configured wrong the PSU resets or shuts down, often before actually hitting the
  41. * reported critical temperature
  42. * - new models like HX1500i Series 2023 have changes in the reported vendor and product
  43. * strings, both are slightly longer now, report vendor and product in one string and are
  44. * the same now
  45. */
  46. #define DRIVER_NAME "corsair-psu"
  47. #define REPLY_SIZE 24 /* max length of a reply to a single command */
  48. #define CMD_BUFFER_SIZE 64
  49. #define CMD_TIMEOUT_MS 250
  50. #define SECONDS_PER_HOUR (60 * 60)
  51. #define SECONDS_PER_DAY (SECONDS_PER_HOUR * 24)
  52. #define RAIL_COUNT 3 /* 3v3 + 5v + 12v */
  53. #define TEMP_COUNT 2
  54. #define OCP_MULTI_RAIL 0x02
  55. #define PSU_CMD_SELECT_RAIL 0x00 /* expects length 2 */
  56. #define PSU_CMD_FAN_PWM 0x3B /* the rest of the commands expect length 3 */
  57. #define PSU_CMD_RAIL_VOLTS_HCRIT 0x40
  58. #define PSU_CMD_RAIL_VOLTS_LCRIT 0x44
  59. #define PSU_CMD_RAIL_AMPS_HCRIT 0x46
  60. #define PSU_CMD_TEMP_HCRIT 0x4F
  61. #define PSU_CMD_IN_VOLTS 0x88
  62. #define PSU_CMD_IN_AMPS 0x89
  63. #define PSU_CMD_RAIL_VOLTS 0x8B
  64. #define PSU_CMD_RAIL_AMPS 0x8C
  65. #define PSU_CMD_TEMP0 0x8D
  66. #define PSU_CMD_TEMP1 0x8E
  67. #define PSU_CMD_FAN 0x90
  68. #define PSU_CMD_RAIL_WATTS 0x96
  69. #define PSU_CMD_VEND_STR 0x99
  70. #define PSU_CMD_PROD_STR 0x9A
  71. #define PSU_CMD_TOTAL_UPTIME 0xD1
  72. #define PSU_CMD_UPTIME 0xD2
  73. #define PSU_CMD_OCPMODE 0xD8
  74. #define PSU_CMD_TOTAL_WATTS 0xEE
  75. #define PSU_CMD_FAN_PWM_ENABLE 0xF0
  76. #define PSU_CMD_INIT 0xFE
  77. #define L_IN_VOLTS "v_in"
  78. #define L_OUT_VOLTS_12V "v_out +12v"
  79. #define L_OUT_VOLTS_5V "v_out +5v"
  80. #define L_OUT_VOLTS_3_3V "v_out +3.3v"
  81. #define L_IN_AMPS "curr in"
  82. #define L_AMPS_12V "curr +12v"
  83. #define L_AMPS_5V "curr +5v"
  84. #define L_AMPS_3_3V "curr +3.3v"
  85. #define L_FAN "psu fan"
  86. #define L_TEMP0 "vrm temp"
  87. #define L_TEMP1 "case temp"
  88. #define L_WATTS "power total"
  89. #define L_WATTS_12V "power +12v"
  90. #define L_WATTS_5V "power +5v"
  91. #define L_WATTS_3_3V "power +3.3v"
  92. static const char *const label_watts[] = {
  93. L_WATTS,
  94. L_WATTS_12V,
  95. L_WATTS_5V,
  96. L_WATTS_3_3V
  97. };
  98. static const char *const label_volts[] = {
  99. L_IN_VOLTS,
  100. L_OUT_VOLTS_12V,
  101. L_OUT_VOLTS_5V,
  102. L_OUT_VOLTS_3_3V
  103. };
  104. static const char *const label_amps[] = {
  105. L_IN_AMPS,
  106. L_AMPS_12V,
  107. L_AMPS_5V,
  108. L_AMPS_3_3V
  109. };
  110. struct corsairpsu_data {
  111. struct hid_device *hdev;
  112. struct device *hwmon_dev;
  113. struct dentry *debugfs;
  114. struct completion wait_completion;
  115. u8 *cmd_buffer;
  116. char vendor[REPLY_SIZE];
  117. char product[REPLY_SIZE];
  118. long temp_crit[TEMP_COUNT];
  119. long in_crit[RAIL_COUNT];
  120. long in_lcrit[RAIL_COUNT];
  121. long curr_crit[RAIL_COUNT];
  122. u8 temp_crit_support;
  123. u8 in_crit_support;
  124. u8 in_lcrit_support;
  125. u8 curr_crit_support;
  126. bool in_curr_cmd_support; /* not all commands are supported on every PSU */
  127. };
  128. /* some values are SMBus LINEAR11 data which need a conversion */
  129. static int corsairpsu_linear11_to_int(const u16 val, const int scale)
  130. {
  131. const int exp = ((s16)val) >> 11;
  132. const int mant = (((s16)(val & 0x7ff)) << 5) >> 5;
  133. const int result = mant * scale;
  134. return (exp >= 0) ? (result << exp) : (result >> -exp);
  135. }
  136. /* the micro-controller uses percentage values to control pwm */
  137. static int corsairpsu_dutycycle_to_pwm(const long dutycycle)
  138. {
  139. const int result = (256 << 16) / 100;
  140. return (result * dutycycle) >> 16;
  141. }
  142. static int corsairpsu_usb_cmd(struct corsairpsu_data *priv, u8 p0, u8 p1, u8 p2, void *data)
  143. {
  144. unsigned long time;
  145. int ret;
  146. memset(priv->cmd_buffer, 0, CMD_BUFFER_SIZE);
  147. priv->cmd_buffer[0] = p0;
  148. priv->cmd_buffer[1] = p1;
  149. priv->cmd_buffer[2] = p2;
  150. reinit_completion(&priv->wait_completion);
  151. ret = hid_hw_output_report(priv->hdev, priv->cmd_buffer, CMD_BUFFER_SIZE);
  152. if (ret < 0)
  153. return ret;
  154. time = wait_for_completion_timeout(&priv->wait_completion,
  155. msecs_to_jiffies(CMD_TIMEOUT_MS));
  156. if (!time)
  157. return -ETIMEDOUT;
  158. /*
  159. * at the start of the reply is an echo of the send command/length in the same order it
  160. * was send, not every command is supported on every device class, if a command is not
  161. * supported, the length value in the reply is okay, but the command value is set to 0
  162. */
  163. if (p0 != priv->cmd_buffer[0] || p1 != priv->cmd_buffer[1])
  164. return -EOPNOTSUPP;
  165. if (data)
  166. memcpy(data, priv->cmd_buffer + 2, REPLY_SIZE);
  167. return 0;
  168. }
  169. static int corsairpsu_init(struct corsairpsu_data *priv)
  170. {
  171. /*
  172. * PSU_CMD_INIT uses swapped length/command and expects 2 parameter bytes, this command
  173. * actually generates a reply, but we don't need it
  174. */
  175. return corsairpsu_usb_cmd(priv, PSU_CMD_INIT, 3, 0, NULL);
  176. }
  177. static int corsairpsu_fwinfo(struct corsairpsu_data *priv)
  178. {
  179. int ret;
  180. ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_VEND_STR, 0, priv->vendor);
  181. if (ret < 0)
  182. return ret;
  183. ret = corsairpsu_usb_cmd(priv, 3, PSU_CMD_PROD_STR, 0, priv->product);
  184. if (ret < 0)
  185. return ret;
  186. return 0;
  187. }
  188. static int corsairpsu_request(struct corsairpsu_data *priv, u8 cmd, u8 rail, void *data)
  189. {
  190. int ret;
  191. switch (cmd) {
  192. case PSU_CMD_RAIL_VOLTS_HCRIT:
  193. case PSU_CMD_RAIL_VOLTS_LCRIT:
  194. case PSU_CMD_RAIL_AMPS_HCRIT:
  195. case PSU_CMD_RAIL_VOLTS:
  196. case PSU_CMD_RAIL_AMPS:
  197. case PSU_CMD_RAIL_WATTS:
  198. ret = corsairpsu_usb_cmd(priv, 2, PSU_CMD_SELECT_RAIL, rail, NULL);
  199. if (ret < 0)
  200. return ret;
  201. break;
  202. default:
  203. break;
  204. }
  205. return corsairpsu_usb_cmd(priv, 3, cmd, 0, data);
  206. }
  207. static int corsairpsu_get_value(struct corsairpsu_data *priv, u8 cmd, u8 rail, long *val)
  208. {
  209. u8 data[REPLY_SIZE];
  210. long tmp;
  211. int ret;
  212. ret = corsairpsu_request(priv, cmd, rail, data);
  213. if (ret < 0)
  214. return ret;
  215. /*
  216. * the biggest value here comes from the uptime command and to exceed MAXINT total uptime
  217. * needs to be about 68 years, the rest are u16 values and the biggest value coming out of
  218. * the LINEAR11 conversion are the watts values which are about 1500 for the strongest psu
  219. * supported (HX1500i)
  220. */
  221. tmp = ((long)data[3] << 24) + (data[2] << 16) + (data[1] << 8) + data[0];
  222. switch (cmd) {
  223. case PSU_CMD_RAIL_VOLTS_HCRIT:
  224. case PSU_CMD_RAIL_VOLTS_LCRIT:
  225. case PSU_CMD_RAIL_AMPS_HCRIT:
  226. case PSU_CMD_TEMP_HCRIT:
  227. case PSU_CMD_IN_VOLTS:
  228. case PSU_CMD_IN_AMPS:
  229. case PSU_CMD_RAIL_VOLTS:
  230. case PSU_CMD_RAIL_AMPS:
  231. case PSU_CMD_TEMP0:
  232. case PSU_CMD_TEMP1:
  233. *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000);
  234. break;
  235. case PSU_CMD_FAN:
  236. *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
  237. break;
  238. case PSU_CMD_FAN_PWM_ENABLE:
  239. *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
  240. /*
  241. * 0 = automatic mode, means the micro-controller controls the fan using a plan
  242. * which can be modified, but changing this plan is not supported by this
  243. * driver, the matching PWM mode is automatic fan speed control = PWM 2
  244. * 1 = fixed mode, fan runs at a fixed speed represented by a percentage
  245. * value 0-100, this matches the PWM manual fan speed control = PWM 1
  246. * technically there is no PWM no fan speed control mode, it would be a combination
  247. * of 1 at 100%
  248. */
  249. if (*val == 0)
  250. *val = 2;
  251. break;
  252. case PSU_CMD_FAN_PWM:
  253. *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1);
  254. *val = corsairpsu_dutycycle_to_pwm(*val);
  255. break;
  256. case PSU_CMD_RAIL_WATTS:
  257. case PSU_CMD_TOTAL_WATTS:
  258. *val = corsairpsu_linear11_to_int(tmp & 0xFFFF, 1000000);
  259. break;
  260. case PSU_CMD_TOTAL_UPTIME:
  261. case PSU_CMD_UPTIME:
  262. case PSU_CMD_OCPMODE:
  263. *val = tmp;
  264. break;
  265. default:
  266. ret = -EOPNOTSUPP;
  267. break;
  268. }
  269. return ret;
  270. }
  271. static void corsairpsu_get_criticals(struct corsairpsu_data *priv)
  272. {
  273. long tmp;
  274. int rail;
  275. for (rail = 0; rail < TEMP_COUNT; ++rail) {
  276. if (!corsairpsu_get_value(priv, PSU_CMD_TEMP_HCRIT, rail, &tmp)) {
  277. priv->temp_crit_support |= BIT(rail);
  278. priv->temp_crit[rail] = tmp;
  279. }
  280. }
  281. for (rail = 0; rail < RAIL_COUNT; ++rail) {
  282. if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_HCRIT, rail, &tmp)) {
  283. priv->in_crit_support |= BIT(rail);
  284. priv->in_crit[rail] = tmp;
  285. }
  286. if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS_LCRIT, rail, &tmp)) {
  287. priv->in_lcrit_support |= BIT(rail);
  288. priv->in_lcrit[rail] = tmp;
  289. }
  290. if (!corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS_HCRIT, rail, &tmp)) {
  291. priv->curr_crit_support |= BIT(rail);
  292. priv->curr_crit[rail] = tmp;
  293. }
  294. }
  295. }
  296. static void corsairpsu_check_cmd_support(struct corsairpsu_data *priv)
  297. {
  298. long tmp;
  299. priv->in_curr_cmd_support = !corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, &tmp);
  300. }
  301. static umode_t corsairpsu_hwmon_temp_is_visible(const struct corsairpsu_data *priv, u32 attr,
  302. int channel)
  303. {
  304. umode_t res = 0444;
  305. switch (attr) {
  306. case hwmon_temp_input:
  307. case hwmon_temp_label:
  308. case hwmon_temp_crit:
  309. if (channel > 0 && !(priv->temp_crit_support & BIT(channel - 1)))
  310. res = 0;
  311. break;
  312. default:
  313. break;
  314. }
  315. return res;
  316. }
  317. static umode_t corsairpsu_hwmon_fan_is_visible(const struct corsairpsu_data *priv, u32 attr,
  318. int channel)
  319. {
  320. switch (attr) {
  321. case hwmon_fan_input:
  322. case hwmon_fan_label:
  323. return 0444;
  324. default:
  325. return 0;
  326. }
  327. }
  328. static umode_t corsairpsu_hwmon_pwm_is_visible(const struct corsairpsu_data *priv, u32 attr,
  329. int channel)
  330. {
  331. switch (attr) {
  332. case hwmon_pwm_input:
  333. case hwmon_pwm_enable:
  334. return 0444;
  335. default:
  336. return 0;
  337. }
  338. }
  339. static umode_t corsairpsu_hwmon_power_is_visible(const struct corsairpsu_data *priv, u32 attr,
  340. int channel)
  341. {
  342. switch (attr) {
  343. case hwmon_power_input:
  344. case hwmon_power_label:
  345. return 0444;
  346. default:
  347. return 0;
  348. }
  349. }
  350. static umode_t corsairpsu_hwmon_in_is_visible(const struct corsairpsu_data *priv, u32 attr,
  351. int channel)
  352. {
  353. umode_t res = 0444;
  354. switch (attr) {
  355. case hwmon_in_input:
  356. case hwmon_in_label:
  357. case hwmon_in_crit:
  358. if (channel > 0 && !(priv->in_crit_support & BIT(channel - 1)))
  359. res = 0;
  360. break;
  361. case hwmon_in_lcrit:
  362. if (channel > 0 && !(priv->in_lcrit_support & BIT(channel - 1)))
  363. res = 0;
  364. break;
  365. default:
  366. break;
  367. }
  368. return res;
  369. }
  370. static umode_t corsairpsu_hwmon_curr_is_visible(const struct corsairpsu_data *priv, u32 attr,
  371. int channel)
  372. {
  373. umode_t res = 0444;
  374. switch (attr) {
  375. case hwmon_curr_input:
  376. if (channel == 0 && !priv->in_curr_cmd_support)
  377. res = 0;
  378. break;
  379. case hwmon_curr_label:
  380. case hwmon_curr_crit:
  381. if (channel > 0 && !(priv->curr_crit_support & BIT(channel - 1)))
  382. res = 0;
  383. break;
  384. default:
  385. break;
  386. }
  387. return res;
  388. }
  389. static umode_t corsairpsu_hwmon_ops_is_visible(const void *data, enum hwmon_sensor_types type,
  390. u32 attr, int channel)
  391. {
  392. const struct corsairpsu_data *priv = data;
  393. switch (type) {
  394. case hwmon_temp:
  395. return corsairpsu_hwmon_temp_is_visible(priv, attr, channel);
  396. case hwmon_fan:
  397. return corsairpsu_hwmon_fan_is_visible(priv, attr, channel);
  398. case hwmon_pwm:
  399. return corsairpsu_hwmon_pwm_is_visible(priv, attr, channel);
  400. case hwmon_power:
  401. return corsairpsu_hwmon_power_is_visible(priv, attr, channel);
  402. case hwmon_in:
  403. return corsairpsu_hwmon_in_is_visible(priv, attr, channel);
  404. case hwmon_curr:
  405. return corsairpsu_hwmon_curr_is_visible(priv, attr, channel);
  406. default:
  407. return 0;
  408. }
  409. }
  410. static int corsairpsu_hwmon_temp_read(struct corsairpsu_data *priv, u32 attr, int channel,
  411. long *val)
  412. {
  413. int err = -EOPNOTSUPP;
  414. switch (attr) {
  415. case hwmon_temp_input:
  416. return corsairpsu_get_value(priv, channel ? PSU_CMD_TEMP1 : PSU_CMD_TEMP0,
  417. channel, val);
  418. case hwmon_temp_crit:
  419. *val = priv->temp_crit[channel];
  420. err = 0;
  421. break;
  422. default:
  423. break;
  424. }
  425. return err;
  426. }
  427. static int corsairpsu_hwmon_pwm_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
  428. {
  429. switch (attr) {
  430. case hwmon_pwm_input:
  431. return corsairpsu_get_value(priv, PSU_CMD_FAN_PWM, 0, val);
  432. case hwmon_pwm_enable:
  433. return corsairpsu_get_value(priv, PSU_CMD_FAN_PWM_ENABLE, 0, val);
  434. default:
  435. break;
  436. }
  437. return -EOPNOTSUPP;
  438. }
  439. static int corsairpsu_hwmon_power_read(struct corsairpsu_data *priv, u32 attr, int channel,
  440. long *val)
  441. {
  442. if (attr == hwmon_power_input) {
  443. switch (channel) {
  444. case 0:
  445. return corsairpsu_get_value(priv, PSU_CMD_TOTAL_WATTS, 0, val);
  446. case 1 ... 3:
  447. return corsairpsu_get_value(priv, PSU_CMD_RAIL_WATTS, channel - 1, val);
  448. default:
  449. break;
  450. }
  451. }
  452. return -EOPNOTSUPP;
  453. }
  454. static int corsairpsu_hwmon_in_read(struct corsairpsu_data *priv, u32 attr, int channel, long *val)
  455. {
  456. int err = -EOPNOTSUPP;
  457. switch (attr) {
  458. case hwmon_in_input:
  459. switch (channel) {
  460. case 0:
  461. return corsairpsu_get_value(priv, PSU_CMD_IN_VOLTS, 0, val);
  462. case 1 ... 3:
  463. return corsairpsu_get_value(priv, PSU_CMD_RAIL_VOLTS, channel - 1, val);
  464. default:
  465. break;
  466. }
  467. break;
  468. case hwmon_in_crit:
  469. *val = priv->in_crit[channel - 1];
  470. err = 0;
  471. break;
  472. case hwmon_in_lcrit:
  473. *val = priv->in_lcrit[channel - 1];
  474. err = 0;
  475. break;
  476. }
  477. return err;
  478. }
  479. static int corsairpsu_hwmon_curr_read(struct corsairpsu_data *priv, u32 attr, int channel,
  480. long *val)
  481. {
  482. int err = -EOPNOTSUPP;
  483. switch (attr) {
  484. case hwmon_curr_input:
  485. switch (channel) {
  486. case 0:
  487. return corsairpsu_get_value(priv, PSU_CMD_IN_AMPS, 0, val);
  488. case 1 ... 3:
  489. return corsairpsu_get_value(priv, PSU_CMD_RAIL_AMPS, channel - 1, val);
  490. default:
  491. break;
  492. }
  493. break;
  494. case hwmon_curr_crit:
  495. *val = priv->curr_crit[channel - 1];
  496. err = 0;
  497. break;
  498. default:
  499. break;
  500. }
  501. return err;
  502. }
  503. static int corsairpsu_hwmon_ops_read(struct device *dev, enum hwmon_sensor_types type, u32 attr,
  504. int channel, long *val)
  505. {
  506. struct corsairpsu_data *priv = dev_get_drvdata(dev);
  507. switch (type) {
  508. case hwmon_temp:
  509. return corsairpsu_hwmon_temp_read(priv, attr, channel, val);
  510. case hwmon_fan:
  511. if (attr == hwmon_fan_input)
  512. return corsairpsu_get_value(priv, PSU_CMD_FAN, 0, val);
  513. return -EOPNOTSUPP;
  514. case hwmon_pwm:
  515. return corsairpsu_hwmon_pwm_read(priv, attr, channel, val);
  516. case hwmon_power:
  517. return corsairpsu_hwmon_power_read(priv, attr, channel, val);
  518. case hwmon_in:
  519. return corsairpsu_hwmon_in_read(priv, attr, channel, val);
  520. case hwmon_curr:
  521. return corsairpsu_hwmon_curr_read(priv, attr, channel, val);
  522. default:
  523. return -EOPNOTSUPP;
  524. }
  525. }
  526. static int corsairpsu_hwmon_ops_read_string(struct device *dev, enum hwmon_sensor_types type,
  527. u32 attr, int channel, const char **str)
  528. {
  529. if (type == hwmon_temp && attr == hwmon_temp_label) {
  530. *str = channel ? L_TEMP1 : L_TEMP0;
  531. return 0;
  532. } else if (type == hwmon_fan && attr == hwmon_fan_label) {
  533. *str = L_FAN;
  534. return 0;
  535. } else if (type == hwmon_power && attr == hwmon_power_label && channel < 4) {
  536. *str = label_watts[channel];
  537. return 0;
  538. } else if (type == hwmon_in && attr == hwmon_in_label && channel < 4) {
  539. *str = label_volts[channel];
  540. return 0;
  541. } else if (type == hwmon_curr && attr == hwmon_curr_label && channel < 4) {
  542. *str = label_amps[channel];
  543. return 0;
  544. }
  545. return -EOPNOTSUPP;
  546. }
  547. static const struct hwmon_ops corsairpsu_hwmon_ops = {
  548. .is_visible = corsairpsu_hwmon_ops_is_visible,
  549. .read = corsairpsu_hwmon_ops_read,
  550. .read_string = corsairpsu_hwmon_ops_read_string,
  551. };
  552. static const struct hwmon_channel_info *const corsairpsu_info[] = {
  553. HWMON_CHANNEL_INFO(chip,
  554. HWMON_C_REGISTER_TZ),
  555. HWMON_CHANNEL_INFO(temp,
  556. HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT,
  557. HWMON_T_INPUT | HWMON_T_LABEL | HWMON_T_CRIT),
  558. HWMON_CHANNEL_INFO(fan,
  559. HWMON_F_INPUT | HWMON_F_LABEL),
  560. HWMON_CHANNEL_INFO(pwm,
  561. HWMON_PWM_INPUT | HWMON_PWM_ENABLE),
  562. HWMON_CHANNEL_INFO(power,
  563. HWMON_P_INPUT | HWMON_P_LABEL,
  564. HWMON_P_INPUT | HWMON_P_LABEL,
  565. HWMON_P_INPUT | HWMON_P_LABEL,
  566. HWMON_P_INPUT | HWMON_P_LABEL),
  567. HWMON_CHANNEL_INFO(in,
  568. HWMON_I_INPUT | HWMON_I_LABEL,
  569. HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
  570. HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT,
  571. HWMON_I_INPUT | HWMON_I_LABEL | HWMON_I_LCRIT | HWMON_I_CRIT),
  572. HWMON_CHANNEL_INFO(curr,
  573. HWMON_C_INPUT | HWMON_C_LABEL,
  574. HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
  575. HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT,
  576. HWMON_C_INPUT | HWMON_C_LABEL | HWMON_C_CRIT),
  577. NULL
  578. };
  579. static const struct hwmon_chip_info corsairpsu_chip_info = {
  580. .ops = &corsairpsu_hwmon_ops,
  581. .info = corsairpsu_info,
  582. };
  583. #ifdef CONFIG_DEBUG_FS
  584. static void print_uptime(struct seq_file *seqf, u8 cmd)
  585. {
  586. struct corsairpsu_data *priv = seqf->private;
  587. long val;
  588. int ret;
  589. ret = corsairpsu_get_value(priv, cmd, 0, &val);
  590. if (ret < 0) {
  591. seq_puts(seqf, "N/A\n");
  592. return;
  593. }
  594. if (val > SECONDS_PER_DAY) {
  595. seq_printf(seqf, "%ld day(s), %02ld:%02ld:%02ld\n", val / SECONDS_PER_DAY,
  596. val % SECONDS_PER_DAY / SECONDS_PER_HOUR, val % SECONDS_PER_HOUR / 60,
  597. val % 60);
  598. return;
  599. }
  600. seq_printf(seqf, "%02ld:%02ld:%02ld\n", val % SECONDS_PER_DAY / SECONDS_PER_HOUR,
  601. val % SECONDS_PER_HOUR / 60, val % 60);
  602. }
  603. static int uptime_show(struct seq_file *seqf, void *unused)
  604. {
  605. print_uptime(seqf, PSU_CMD_UPTIME);
  606. return 0;
  607. }
  608. DEFINE_SHOW_ATTRIBUTE(uptime);
  609. static int uptime_total_show(struct seq_file *seqf, void *unused)
  610. {
  611. print_uptime(seqf, PSU_CMD_TOTAL_UPTIME);
  612. return 0;
  613. }
  614. DEFINE_SHOW_ATTRIBUTE(uptime_total);
  615. static int vendor_show(struct seq_file *seqf, void *unused)
  616. {
  617. struct corsairpsu_data *priv = seqf->private;
  618. seq_printf(seqf, "%s\n", priv->vendor);
  619. return 0;
  620. }
  621. DEFINE_SHOW_ATTRIBUTE(vendor);
  622. static int product_show(struct seq_file *seqf, void *unused)
  623. {
  624. struct corsairpsu_data *priv = seqf->private;
  625. seq_printf(seqf, "%s\n", priv->product);
  626. return 0;
  627. }
  628. DEFINE_SHOW_ATTRIBUTE(product);
  629. static int ocpmode_show(struct seq_file *seqf, void *unused)
  630. {
  631. struct corsairpsu_data *priv = seqf->private;
  632. long val;
  633. int ret;
  634. /*
  635. * The rail mode is switchable on the fly. The RAW interface can be used for this. But it
  636. * will not be included here, because I consider it somewhat dangerous for the health of the
  637. * PSU. The returned value can be a bogus one, if the PSU is in the process of switching and
  638. * getting of the value itself can also fail during this. Because of this every other value
  639. * than OCP_MULTI_RAIL can be considered as "single rail".
  640. */
  641. ret = corsairpsu_get_value(priv, PSU_CMD_OCPMODE, 0, &val);
  642. if (ret < 0)
  643. seq_puts(seqf, "N/A\n");
  644. else
  645. seq_printf(seqf, "%s\n", (val == OCP_MULTI_RAIL) ? "multi rail" : "single rail");
  646. return 0;
  647. }
  648. DEFINE_SHOW_ATTRIBUTE(ocpmode);
  649. static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
  650. {
  651. char name[32];
  652. scnprintf(name, sizeof(name), "%s-%s", DRIVER_NAME, dev_name(&priv->hdev->dev));
  653. priv->debugfs = debugfs_create_dir(name, NULL);
  654. debugfs_create_file("uptime", 0444, priv->debugfs, priv, &uptime_fops);
  655. debugfs_create_file("uptime_total", 0444, priv->debugfs, priv, &uptime_total_fops);
  656. debugfs_create_file("vendor", 0444, priv->debugfs, priv, &vendor_fops);
  657. debugfs_create_file("product", 0444, priv->debugfs, priv, &product_fops);
  658. debugfs_create_file("ocpmode", 0444, priv->debugfs, priv, &ocpmode_fops);
  659. }
  660. #else
  661. static void corsairpsu_debugfs_init(struct corsairpsu_data *priv)
  662. {
  663. }
  664. #endif
  665. static int corsairpsu_probe(struct hid_device *hdev, const struct hid_device_id *id)
  666. {
  667. struct corsairpsu_data *priv;
  668. int ret;
  669. priv = devm_kzalloc(&hdev->dev, sizeof(struct corsairpsu_data), GFP_KERNEL);
  670. if (!priv)
  671. return -ENOMEM;
  672. priv->cmd_buffer = devm_kmalloc(&hdev->dev, CMD_BUFFER_SIZE, GFP_KERNEL);
  673. if (!priv->cmd_buffer)
  674. return -ENOMEM;
  675. ret = hid_parse(hdev);
  676. if (ret)
  677. return ret;
  678. ret = hid_hw_start(hdev, HID_CONNECT_HIDRAW);
  679. if (ret)
  680. return ret;
  681. ret = hid_hw_open(hdev);
  682. if (ret)
  683. goto fail_and_stop;
  684. priv->hdev = hdev;
  685. hid_set_drvdata(hdev, priv);
  686. init_completion(&priv->wait_completion);
  687. hid_device_io_start(hdev);
  688. ret = corsairpsu_init(priv);
  689. if (ret < 0) {
  690. dev_err(&hdev->dev, "unable to initialize device (%d)\n", ret);
  691. goto fail_and_stop;
  692. }
  693. ret = corsairpsu_fwinfo(priv);
  694. if (ret < 0) {
  695. dev_err(&hdev->dev, "unable to query firmware (%d)\n", ret);
  696. goto fail_and_stop;
  697. }
  698. corsairpsu_get_criticals(priv);
  699. corsairpsu_check_cmd_support(priv);
  700. priv->hwmon_dev = hwmon_device_register_with_info(&hdev->dev, "corsairpsu", priv,
  701. &corsairpsu_chip_info, NULL);
  702. if (IS_ERR(priv->hwmon_dev)) {
  703. ret = PTR_ERR(priv->hwmon_dev);
  704. goto fail_and_close;
  705. }
  706. corsairpsu_debugfs_init(priv);
  707. return 0;
  708. fail_and_close:
  709. hid_hw_close(hdev);
  710. fail_and_stop:
  711. hid_hw_stop(hdev);
  712. return ret;
  713. }
  714. static void corsairpsu_remove(struct hid_device *hdev)
  715. {
  716. struct corsairpsu_data *priv = hid_get_drvdata(hdev);
  717. debugfs_remove_recursive(priv->debugfs);
  718. hwmon_device_unregister(priv->hwmon_dev);
  719. hid_hw_close(hdev);
  720. hid_hw_stop(hdev);
  721. }
  722. static int corsairpsu_raw_event(struct hid_device *hdev, struct hid_report *report, u8 *data,
  723. int size)
  724. {
  725. struct corsairpsu_data *priv = hid_get_drvdata(hdev);
  726. if (completion_done(&priv->wait_completion))
  727. return 0;
  728. memcpy(priv->cmd_buffer, data, min(CMD_BUFFER_SIZE, size));
  729. complete(&priv->wait_completion);
  730. return 0;
  731. }
  732. #ifdef CONFIG_PM
  733. static int corsairpsu_resume(struct hid_device *hdev)
  734. {
  735. struct corsairpsu_data *priv = hid_get_drvdata(hdev);
  736. /* some PSUs turn off the microcontroller during standby, so a reinit is required */
  737. return corsairpsu_init(priv);
  738. }
  739. #endif
  740. static const struct hid_device_id corsairpsu_idtable[] = {
  741. { HID_USB_DEVICE(0x1b1c, 0x1c03) }, /* Corsair HX550i */
  742. { HID_USB_DEVICE(0x1b1c, 0x1c04) }, /* Corsair HX650i */
  743. { HID_USB_DEVICE(0x1b1c, 0x1c05) }, /* Corsair HX750i */
  744. { HID_USB_DEVICE(0x1b1c, 0x1c06) }, /* Corsair HX850i */
  745. { HID_USB_DEVICE(0x1b1c, 0x1c07) }, /* Corsair HX1000i Legacy */
  746. { HID_USB_DEVICE(0x1b1c, 0x1c08) }, /* Corsair HX1200i Legacy */
  747. { HID_USB_DEVICE(0x1b1c, 0x1c09) }, /* Corsair RM550i */
  748. { HID_USB_DEVICE(0x1b1c, 0x1c0a) }, /* Corsair RM650i */
  749. { HID_USB_DEVICE(0x1b1c, 0x1c0b) }, /* Corsair RM750i */
  750. { HID_USB_DEVICE(0x1b1c, 0x1c0c) }, /* Corsair RM850i */
  751. { HID_USB_DEVICE(0x1b1c, 0x1c0d) }, /* Corsair RM1000i */
  752. { HID_USB_DEVICE(0x1b1c, 0x1c1e) }, /* Corsair HX1000i Series 2023 */
  753. { HID_USB_DEVICE(0x1b1c, 0x1c1f) }, /* Corsair HX1500i Legacy and Series 2023 */
  754. { HID_USB_DEVICE(0x1b1c, 0x1c23) }, /* Corsair HX1200i Series 2023 */
  755. { HID_USB_DEVICE(0x1b1c, 0x1c27) }, /* Corsair HX1200i Series 2025 */
  756. { },
  757. };
  758. MODULE_DEVICE_TABLE(hid, corsairpsu_idtable);
  759. static struct hid_driver corsairpsu_driver = {
  760. .name = DRIVER_NAME,
  761. .id_table = corsairpsu_idtable,
  762. .probe = corsairpsu_probe,
  763. .remove = corsairpsu_remove,
  764. .raw_event = corsairpsu_raw_event,
  765. #ifdef CONFIG_PM
  766. .resume = corsairpsu_resume,
  767. .reset_resume = corsairpsu_resume,
  768. #endif
  769. };
  770. static int __init corsair_init(void)
  771. {
  772. return hid_register_driver(&corsairpsu_driver);
  773. }
  774. static void __exit corsair_exit(void)
  775. {
  776. hid_unregister_driver(&corsairpsu_driver);
  777. }
  778. /*
  779. * With module_init() the driver would load before the HID bus when
  780. * built-in, so use late_initcall() instead.
  781. */
  782. late_initcall(corsair_init);
  783. module_exit(corsair_exit);
  784. MODULE_LICENSE("GPL");
  785. MODULE_AUTHOR("Wilken Gottwalt <wilken.gottwalt@posteo.net>");
  786. MODULE_DESCRIPTION("Linux driver for Corsair power supplies with HID sensors interface");