vmwgfx_execbuf.c 136 KB

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  1. // SPDX-License-Identifier: GPL-2.0 OR MIT
  2. /**************************************************************************
  3. *
  4. * Copyright (c) 2009-2025 Broadcom. All Rights Reserved. The term
  5. * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.
  6. *
  7. **************************************************************************/
  8. #include "vmwgfx_binding.h"
  9. #include "vmwgfx_bo.h"
  10. #include "vmwgfx_drv.h"
  11. #include "vmwgfx_mksstat.h"
  12. #include "vmwgfx_so.h"
  13. #include <drm/ttm/ttm_bo.h>
  14. #include <drm/ttm/ttm_placement.h>
  15. #include <linux/sync_file.h>
  16. #include <linux/hashtable.h>
  17. #include <linux/vmalloc.h>
  18. /*
  19. * Helper macro to get dx_ctx_node if available otherwise print an error
  20. * message. This is for use in command verifier function where if dx_ctx_node
  21. * is not set then command is invalid.
  22. */
  23. #define VMW_GET_CTX_NODE(__sw_context) \
  24. ({ \
  25. __sw_context->dx_ctx_node ? __sw_context->dx_ctx_node : ({ \
  26. VMW_DEBUG_USER("SM context is not set at %s\n", __func__); \
  27. __sw_context->dx_ctx_node; \
  28. }); \
  29. })
  30. #define VMW_DECLARE_CMD_VAR(__var, __type) \
  31. struct { \
  32. SVGA3dCmdHeader header; \
  33. __type body; \
  34. } __var
  35. /**
  36. * struct vmw_relocation - Buffer object relocation
  37. *
  38. * @head: List head for the command submission context's relocation list
  39. * @vbo: Non ref-counted pointer to buffer object
  40. * @mob_loc: Pointer to location for mob id to be modified
  41. * @location: Pointer to location for guest pointer to be modified
  42. */
  43. struct vmw_relocation {
  44. struct list_head head;
  45. struct vmw_bo *vbo;
  46. union {
  47. SVGAMobId *mob_loc;
  48. SVGAGuestPtr *location;
  49. };
  50. };
  51. /**
  52. * enum vmw_resource_relocation_type - Relocation type for resources
  53. *
  54. * @vmw_res_rel_normal: Traditional relocation. The resource id in the
  55. * command stream is replaced with the actual id after validation.
  56. * @vmw_res_rel_nop: NOP relocation. The command is unconditionally replaced
  57. * with a NOP.
  58. * @vmw_res_rel_cond_nop: Conditional NOP relocation. If the resource id after
  59. * validation is -1, the command is replaced with a NOP. Otherwise no action.
  60. * @vmw_res_rel_max: Last value in the enum - used for error checking
  61. */
  62. enum vmw_resource_relocation_type {
  63. vmw_res_rel_normal,
  64. vmw_res_rel_nop,
  65. vmw_res_rel_cond_nop,
  66. vmw_res_rel_max
  67. };
  68. /**
  69. * struct vmw_resource_relocation - Relocation info for resources
  70. *
  71. * @head: List head for the software context's relocation list.
  72. * @res: Non-ref-counted pointer to the resource.
  73. * @offset: Offset of single byte entries into the command buffer where the id
  74. * that needs fixup is located.
  75. * @rel_type: Type of relocation.
  76. */
  77. struct vmw_resource_relocation {
  78. struct list_head head;
  79. const struct vmw_resource *res;
  80. u32 offset:29;
  81. enum vmw_resource_relocation_type rel_type:3;
  82. };
  83. /**
  84. * struct vmw_ctx_validation_info - Extra validation metadata for contexts
  85. *
  86. * @head: List head of context list
  87. * @ctx: The context resource
  88. * @cur: The context's persistent binding state
  89. * @staged: The binding state changes of this command buffer
  90. */
  91. struct vmw_ctx_validation_info {
  92. struct list_head head;
  93. struct vmw_resource *ctx;
  94. struct vmw_ctx_binding_state *cur;
  95. struct vmw_ctx_binding_state *staged;
  96. };
  97. /**
  98. * struct vmw_cmd_entry - Describe a command for the verifier
  99. *
  100. * @func: Call-back to handle the command.
  101. * @user_allow: Whether allowed from the execbuf ioctl.
  102. * @gb_disable: Whether disabled if guest-backed objects are available.
  103. * @gb_enable: Whether enabled iff guest-backed objects are available.
  104. * @cmd_name: Name of the command.
  105. */
  106. struct vmw_cmd_entry {
  107. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  108. SVGA3dCmdHeader *);
  109. bool user_allow;
  110. bool gb_disable;
  111. bool gb_enable;
  112. const char *cmd_name;
  113. };
  114. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  115. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  116. (_gb_disable), (_gb_enable), #_cmd}
  117. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  118. struct vmw_sw_context *sw_context,
  119. struct vmw_resource *ctx);
  120. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  121. struct vmw_sw_context *sw_context,
  122. SVGAMobId *id,
  123. struct vmw_bo **vmw_bo_p);
  124. /**
  125. * vmw_ptr_diff - Compute the offset from a to b in bytes
  126. *
  127. * @a: A starting pointer.
  128. * @b: A pointer offset in the same address space.
  129. *
  130. * Returns: The offset in bytes between the two pointers.
  131. */
  132. static size_t vmw_ptr_diff(void *a, void *b)
  133. {
  134. return (unsigned long) b - (unsigned long) a;
  135. }
  136. /**
  137. * vmw_execbuf_bindings_commit - Commit modified binding state
  138. *
  139. * @sw_context: The command submission context
  140. * @backoff: Whether this is part of the error path and binding state changes
  141. * should be ignored
  142. */
  143. static void vmw_execbuf_bindings_commit(struct vmw_sw_context *sw_context,
  144. bool backoff)
  145. {
  146. struct vmw_ctx_validation_info *entry;
  147. list_for_each_entry(entry, &sw_context->ctx_list, head) {
  148. if (!backoff)
  149. vmw_binding_state_commit(entry->cur, entry->staged);
  150. if (entry->staged != sw_context->staged_bindings)
  151. vmw_binding_state_free(entry->staged);
  152. else
  153. sw_context->staged_bindings_inuse = false;
  154. }
  155. /* List entries are freed with the validation context */
  156. INIT_LIST_HEAD(&sw_context->ctx_list);
  157. }
  158. /**
  159. * vmw_bind_dx_query_mob - Bind the DX query MOB if referenced
  160. *
  161. * @sw_context: The command submission context
  162. */
  163. static void vmw_bind_dx_query_mob(struct vmw_sw_context *sw_context)
  164. {
  165. if (sw_context->dx_query_mob)
  166. vmw_context_bind_dx_query(sw_context->dx_query_ctx,
  167. sw_context->dx_query_mob);
  168. }
  169. /**
  170. * vmw_cmd_ctx_first_setup - Perform the setup needed when a context is added to
  171. * the validate list.
  172. *
  173. * @dev_priv: Pointer to the device private:
  174. * @sw_context: The command submission context
  175. * @res: Pointer to the resource
  176. * @node: The validation node holding the context resource metadata
  177. */
  178. static int vmw_cmd_ctx_first_setup(struct vmw_private *dev_priv,
  179. struct vmw_sw_context *sw_context,
  180. struct vmw_resource *res,
  181. struct vmw_ctx_validation_info *node)
  182. {
  183. int ret;
  184. ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
  185. if (unlikely(ret != 0))
  186. goto out_err;
  187. if (!sw_context->staged_bindings) {
  188. sw_context->staged_bindings = vmw_binding_state_alloc(dev_priv);
  189. if (IS_ERR(sw_context->staged_bindings)) {
  190. ret = PTR_ERR(sw_context->staged_bindings);
  191. sw_context->staged_bindings = NULL;
  192. goto out_err;
  193. }
  194. }
  195. if (sw_context->staged_bindings_inuse) {
  196. node->staged = vmw_binding_state_alloc(dev_priv);
  197. if (IS_ERR(node->staged)) {
  198. ret = PTR_ERR(node->staged);
  199. node->staged = NULL;
  200. goto out_err;
  201. }
  202. } else {
  203. node->staged = sw_context->staged_bindings;
  204. sw_context->staged_bindings_inuse = true;
  205. }
  206. node->ctx = res;
  207. node->cur = vmw_context_binding_state(res);
  208. list_add_tail(&node->head, &sw_context->ctx_list);
  209. return 0;
  210. out_err:
  211. return ret;
  212. }
  213. /**
  214. * vmw_execbuf_res_size - calculate extra size fore the resource validation node
  215. *
  216. * @dev_priv: Pointer to the device private struct.
  217. * @res_type: The resource type.
  218. *
  219. * Guest-backed contexts and DX contexts require extra size to store execbuf
  220. * private information in the validation node. Typically the binding manager
  221. * associated data structures.
  222. *
  223. * Returns: The extra size requirement based on resource type.
  224. */
  225. static unsigned int vmw_execbuf_res_size(struct vmw_private *dev_priv,
  226. enum vmw_res_type res_type)
  227. {
  228. return (res_type == vmw_res_dx_context ||
  229. (res_type == vmw_res_context && dev_priv->has_mob)) ?
  230. sizeof(struct vmw_ctx_validation_info) : 0;
  231. }
  232. /**
  233. * vmw_execbuf_rcache_update - Update a resource-node cache entry
  234. *
  235. * @rcache: Pointer to the entry to update.
  236. * @res: Pointer to the resource.
  237. * @private: Pointer to the execbuf-private space in the resource validation
  238. * node.
  239. */
  240. static void vmw_execbuf_rcache_update(struct vmw_res_cache_entry *rcache,
  241. struct vmw_resource *res,
  242. void *private)
  243. {
  244. rcache->res = res;
  245. rcache->private = private;
  246. rcache->valid = 1;
  247. rcache->valid_handle = 0;
  248. }
  249. enum vmw_val_add_flags {
  250. vmw_val_add_flag_none = 0,
  251. vmw_val_add_flag_noctx = 1 << 0,
  252. };
  253. /**
  254. * vmw_execbuf_res_val_add - Add a resource to the validation list.
  255. *
  256. * @sw_context: Pointer to the software context.
  257. * @res: Unreferenced rcu-protected pointer to the resource.
  258. * @dirty: Whether to change dirty status.
  259. * @flags: specifies whether to use the context or not
  260. *
  261. * Returns: 0 on success. Negative error code on failure. Typical error codes
  262. * are %-EINVAL on inconsistency and %-ESRCH if the resource was doomed.
  263. */
  264. static int vmw_execbuf_res_val_add(struct vmw_sw_context *sw_context,
  265. struct vmw_resource *res,
  266. u32 dirty,
  267. u32 flags)
  268. {
  269. struct vmw_private *dev_priv = res->dev_priv;
  270. int ret;
  271. enum vmw_res_type res_type = vmw_res_type(res);
  272. struct vmw_res_cache_entry *rcache;
  273. struct vmw_ctx_validation_info *ctx_info;
  274. bool first_usage;
  275. unsigned int priv_size;
  276. rcache = &sw_context->res_cache[res_type];
  277. if (likely(rcache->valid && rcache->res == res)) {
  278. if (dirty)
  279. vmw_validation_res_set_dirty(sw_context->ctx,
  280. rcache->private, dirty);
  281. return 0;
  282. }
  283. if ((flags & vmw_val_add_flag_noctx) != 0) {
  284. ret = vmw_validation_add_resource(sw_context->ctx, res, 0, dirty,
  285. (void **)&ctx_info, NULL);
  286. if (ret)
  287. return ret;
  288. } else {
  289. priv_size = vmw_execbuf_res_size(dev_priv, res_type);
  290. ret = vmw_validation_add_resource(sw_context->ctx, res, priv_size,
  291. dirty, (void **)&ctx_info,
  292. &first_usage);
  293. if (ret)
  294. return ret;
  295. if (priv_size && first_usage) {
  296. ret = vmw_cmd_ctx_first_setup(dev_priv, sw_context, res,
  297. ctx_info);
  298. if (ret) {
  299. VMW_DEBUG_USER("Failed first usage context setup.\n");
  300. return ret;
  301. }
  302. }
  303. }
  304. vmw_execbuf_rcache_update(rcache, res, ctx_info);
  305. return 0;
  306. }
  307. /**
  308. * vmw_view_res_val_add - Add a view and the surface it's pointing to to the
  309. * validation list
  310. *
  311. * @sw_context: The software context holding the validation list.
  312. * @view: Pointer to the view resource.
  313. *
  314. * Returns 0 if success, negative error code otherwise.
  315. */
  316. static int vmw_view_res_val_add(struct vmw_sw_context *sw_context,
  317. struct vmw_resource *view)
  318. {
  319. int ret;
  320. /*
  321. * First add the resource the view is pointing to, otherwise it may be
  322. * swapped out when the view is validated.
  323. */
  324. ret = vmw_execbuf_res_val_add(sw_context, vmw_view_srf(view),
  325. vmw_view_dirtying(view), vmw_val_add_flag_noctx);
  326. if (ret)
  327. return ret;
  328. return vmw_execbuf_res_val_add(sw_context, view, VMW_RES_DIRTY_NONE,
  329. vmw_val_add_flag_noctx);
  330. }
  331. /**
  332. * vmw_view_id_val_add - Look up a view and add it and the surface it's pointing
  333. * to to the validation list.
  334. *
  335. * @sw_context: The software context holding the validation list.
  336. * @view_type: The view type to look up.
  337. * @id: view id of the view.
  338. *
  339. * The view is represented by a view id and the DX context it's created on, or
  340. * scheduled for creation on. If there is no DX context set, the function will
  341. * return an -EINVAL error pointer.
  342. *
  343. * Returns: Unreferenced pointer to the resource on success, negative error
  344. * pointer on failure.
  345. */
  346. static struct vmw_resource *
  347. vmw_view_id_val_add(struct vmw_sw_context *sw_context,
  348. enum vmw_view_type view_type, u32 id)
  349. {
  350. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  351. struct vmw_resource *view;
  352. int ret;
  353. if (!ctx_node)
  354. return ERR_PTR(-EINVAL);
  355. view = vmw_view_lookup(sw_context->man, view_type, id);
  356. if (IS_ERR(view))
  357. return view;
  358. ret = vmw_view_res_val_add(sw_context, view);
  359. if (ret)
  360. return ERR_PTR(ret);
  361. return view;
  362. }
  363. /**
  364. * vmw_resource_context_res_add - Put resources previously bound to a context on
  365. * the validation list
  366. *
  367. * @dev_priv: Pointer to a device private structure
  368. * @sw_context: Pointer to a software context used for this command submission
  369. * @ctx: Pointer to the context resource
  370. *
  371. * This function puts all resources that were previously bound to @ctx on the
  372. * resource validation list. This is part of the context state reemission
  373. */
  374. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  375. struct vmw_sw_context *sw_context,
  376. struct vmw_resource *ctx)
  377. {
  378. struct list_head *binding_list;
  379. struct vmw_ctx_bindinfo *entry;
  380. int ret = 0;
  381. struct vmw_resource *res;
  382. u32 i;
  383. u32 cotable_max = has_sm5_context(ctx->dev_priv) ?
  384. SVGA_COTABLE_MAX : SVGA_COTABLE_DX10_MAX;
  385. /* Add all cotables to the validation list. */
  386. if (has_sm4_context(dev_priv) &&
  387. vmw_res_type(ctx) == vmw_res_dx_context) {
  388. for (i = 0; i < cotable_max; ++i) {
  389. res = vmw_context_cotable(ctx, i);
  390. if (IS_ERR_OR_NULL(res))
  391. continue;
  392. ret = vmw_execbuf_res_val_add(sw_context, res,
  393. VMW_RES_DIRTY_SET,
  394. vmw_val_add_flag_noctx);
  395. if (unlikely(ret != 0))
  396. return ret;
  397. }
  398. }
  399. /* Add all resources bound to the context to the validation list */
  400. mutex_lock(&dev_priv->binding_mutex);
  401. binding_list = vmw_context_binding_list(ctx);
  402. list_for_each_entry(entry, binding_list, ctx_list) {
  403. if (vmw_res_type(entry->res) == vmw_res_view)
  404. ret = vmw_view_res_val_add(sw_context, entry->res);
  405. else
  406. ret = vmw_execbuf_res_val_add(sw_context, entry->res,
  407. vmw_binding_dirtying(entry->bt),
  408. vmw_val_add_flag_noctx);
  409. if (unlikely(ret != 0))
  410. break;
  411. }
  412. if (has_sm4_context(dev_priv) &&
  413. vmw_res_type(ctx) == vmw_res_dx_context) {
  414. struct vmw_bo *dx_query_mob;
  415. dx_query_mob = vmw_context_get_dx_query_mob(ctx);
  416. if (dx_query_mob) {
  417. vmw_bo_placement_set(dx_query_mob,
  418. VMW_BO_DOMAIN_MOB,
  419. VMW_BO_DOMAIN_MOB);
  420. ret = vmw_validation_add_bo(sw_context->ctx,
  421. dx_query_mob);
  422. }
  423. }
  424. mutex_unlock(&dev_priv->binding_mutex);
  425. return ret;
  426. }
  427. /**
  428. * vmw_resource_relocation_add - Add a relocation to the relocation list
  429. *
  430. * @sw_context: Pointer to the software context.
  431. * @res: The resource.
  432. * @offset: Offset into the command buffer currently being parsed where the id
  433. * that needs fixup is located. Granularity is one byte.
  434. * @rel_type: Relocation type.
  435. */
  436. static int vmw_resource_relocation_add(struct vmw_sw_context *sw_context,
  437. const struct vmw_resource *res,
  438. unsigned long offset,
  439. enum vmw_resource_relocation_type
  440. rel_type)
  441. {
  442. struct vmw_resource_relocation *rel;
  443. rel = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*rel));
  444. if (unlikely(!rel)) {
  445. VMW_DEBUG_USER("Failed to allocate a resource relocation.\n");
  446. return -ENOMEM;
  447. }
  448. rel->res = res;
  449. rel->offset = offset;
  450. rel->rel_type = rel_type;
  451. list_add_tail(&rel->head, &sw_context->res_relocations);
  452. return 0;
  453. }
  454. /**
  455. * vmw_resource_relocations_free - Free all relocations on a list
  456. *
  457. * @list: Pointer to the head of the relocation list
  458. */
  459. static void vmw_resource_relocations_free(struct list_head *list)
  460. {
  461. /* Memory is validation context memory, so no need to free it */
  462. INIT_LIST_HEAD(list);
  463. }
  464. /**
  465. * vmw_resource_relocations_apply - Apply all relocations on a list
  466. *
  467. * @cb: Pointer to the start of the command buffer bein patch. This need not be
  468. * the same buffer as the one being parsed when the relocation list was built,
  469. * but the contents must be the same modulo the resource ids.
  470. * @list: Pointer to the head of the relocation list.
  471. */
  472. static void vmw_resource_relocations_apply(uint32_t *cb,
  473. struct list_head *list)
  474. {
  475. struct vmw_resource_relocation *rel;
  476. /* Validate the struct vmw_resource_relocation member size */
  477. BUILD_BUG_ON(SVGA_CB_MAX_SIZE >= (1 << 29));
  478. BUILD_BUG_ON(vmw_res_rel_max >= (1 << 3));
  479. list_for_each_entry(rel, list, head) {
  480. u32 *addr = (u32 *)((unsigned long) cb + rel->offset);
  481. switch (rel->rel_type) {
  482. case vmw_res_rel_normal:
  483. *addr = rel->res->id;
  484. break;
  485. case vmw_res_rel_nop:
  486. *addr = SVGA_3D_CMD_NOP;
  487. break;
  488. default:
  489. if (rel->res->id == -1)
  490. *addr = SVGA_3D_CMD_NOP;
  491. break;
  492. }
  493. }
  494. }
  495. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  496. struct vmw_sw_context *sw_context,
  497. SVGA3dCmdHeader *header)
  498. {
  499. return -EINVAL;
  500. }
  501. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  502. struct vmw_sw_context *sw_context,
  503. SVGA3dCmdHeader *header)
  504. {
  505. return 0;
  506. }
  507. /**
  508. * vmw_resources_reserve - Reserve all resources on the sw_context's resource
  509. * list.
  510. *
  511. * @sw_context: Pointer to the software context.
  512. *
  513. * Note that since vmware's command submission currently is protected by the
  514. * cmdbuf mutex, no fancy deadlock avoidance is required for resources, since
  515. * only a single thread at once will attempt this.
  516. */
  517. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  518. {
  519. int ret;
  520. ret = vmw_validation_res_reserve(sw_context->ctx, true);
  521. if (ret)
  522. return ret;
  523. if (sw_context->dx_query_mob) {
  524. struct vmw_bo *expected_dx_query_mob;
  525. expected_dx_query_mob =
  526. vmw_context_get_dx_query_mob(sw_context->dx_query_ctx);
  527. if (expected_dx_query_mob &&
  528. expected_dx_query_mob != sw_context->dx_query_mob) {
  529. ret = -EINVAL;
  530. }
  531. }
  532. return ret;
  533. }
  534. /**
  535. * vmw_cmd_res_check - Check that a resource is present and if so, put it on the
  536. * resource validate list unless it's already there.
  537. *
  538. * @dev_priv: Pointer to a device private structure.
  539. * @sw_context: Pointer to the software context.
  540. * @res_type: Resource type.
  541. * @dirty: Whether to change dirty status.
  542. * @converter: User-space visible type specific information.
  543. * @id_loc: Pointer to the location in the command buffer currently being parsed
  544. * from where the user-space resource id handle is located.
  545. * @p_res: Pointer to pointer to resource validation node. Populated on
  546. * exit.
  547. */
  548. static int
  549. vmw_cmd_res_check(struct vmw_private *dev_priv,
  550. struct vmw_sw_context *sw_context,
  551. enum vmw_res_type res_type,
  552. u32 dirty,
  553. const struct vmw_user_resource_conv *converter,
  554. uint32_t *id_loc,
  555. struct vmw_resource **p_res)
  556. {
  557. struct vmw_res_cache_entry *rcache = &sw_context->res_cache[res_type];
  558. struct vmw_resource *res;
  559. int ret = 0;
  560. bool needs_unref = false;
  561. if (p_res)
  562. *p_res = NULL;
  563. if (*id_loc == SVGA3D_INVALID_ID) {
  564. if (res_type == vmw_res_context) {
  565. VMW_DEBUG_USER("Illegal context invalid id.\n");
  566. return -EINVAL;
  567. }
  568. return 0;
  569. }
  570. if (likely(rcache->valid_handle && *id_loc == rcache->handle)) {
  571. res = rcache->res;
  572. if (dirty)
  573. vmw_validation_res_set_dirty(sw_context->ctx,
  574. rcache->private, dirty);
  575. } else {
  576. unsigned int size = vmw_execbuf_res_size(dev_priv, res_type);
  577. ret = vmw_validation_preload_res(sw_context->ctx, size);
  578. if (ret)
  579. return ret;
  580. ret = vmw_user_resource_lookup_handle
  581. (dev_priv, sw_context->fp->tfile, *id_loc, converter, &res);
  582. if (ret != 0) {
  583. VMW_DEBUG_USER("Could not find/use resource 0x%08x.\n",
  584. (unsigned int) *id_loc);
  585. return ret;
  586. }
  587. needs_unref = true;
  588. ret = vmw_execbuf_res_val_add(sw_context, res, dirty, vmw_val_add_flag_none);
  589. if (unlikely(ret != 0))
  590. goto res_check_done;
  591. if (rcache->valid && rcache->res == res) {
  592. rcache->valid_handle = true;
  593. rcache->handle = *id_loc;
  594. }
  595. }
  596. ret = vmw_resource_relocation_add(sw_context, res,
  597. vmw_ptr_diff(sw_context->buf_start,
  598. id_loc),
  599. vmw_res_rel_normal);
  600. if (p_res)
  601. *p_res = res;
  602. res_check_done:
  603. if (needs_unref)
  604. vmw_resource_unreference(&res);
  605. return ret;
  606. }
  607. /**
  608. * vmw_rebind_all_dx_query - Rebind DX query associated with the context
  609. *
  610. * @ctx_res: context the query belongs to
  611. *
  612. * This function assumes binding_mutex is held.
  613. */
  614. static int vmw_rebind_all_dx_query(struct vmw_resource *ctx_res)
  615. {
  616. struct vmw_private *dev_priv = ctx_res->dev_priv;
  617. struct vmw_bo *dx_query_mob;
  618. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindAllQuery);
  619. dx_query_mob = vmw_context_get_dx_query_mob(ctx_res);
  620. if (!dx_query_mob || dx_query_mob->dx_query_ctx)
  621. return 0;
  622. cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), ctx_res->id);
  623. if (cmd == NULL)
  624. return -ENOMEM;
  625. cmd->header.id = SVGA_3D_CMD_DX_BIND_ALL_QUERY;
  626. cmd->header.size = sizeof(cmd->body);
  627. cmd->body.cid = ctx_res->id;
  628. cmd->body.mobid = dx_query_mob->tbo.resource->start;
  629. vmw_cmd_commit(dev_priv, sizeof(*cmd));
  630. vmw_context_bind_dx_query(ctx_res, dx_query_mob);
  631. return 0;
  632. }
  633. /**
  634. * vmw_rebind_contexts - Rebind all resources previously bound to referenced
  635. * contexts.
  636. *
  637. * @sw_context: Pointer to the software context.
  638. *
  639. * Rebind context binding points that have been scrubbed because of eviction.
  640. */
  641. static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
  642. {
  643. struct vmw_ctx_validation_info *val;
  644. int ret;
  645. list_for_each_entry(val, &sw_context->ctx_list, head) {
  646. ret = vmw_binding_rebind_all(val->cur);
  647. if (unlikely(ret != 0)) {
  648. if (ret != -ERESTARTSYS)
  649. VMW_DEBUG_USER("Failed to rebind context.\n");
  650. return ret;
  651. }
  652. ret = vmw_rebind_all_dx_query(val->ctx);
  653. if (ret != 0) {
  654. VMW_DEBUG_USER("Failed to rebind queries.\n");
  655. return ret;
  656. }
  657. }
  658. return 0;
  659. }
  660. /**
  661. * vmw_view_bindings_add - Add an array of view bindings to a context binding
  662. * state tracker.
  663. *
  664. * @sw_context: The execbuf state used for this command.
  665. * @view_type: View type for the bindings.
  666. * @binding_type: Binding type for the bindings.
  667. * @shader_slot: The shader slot to user for the bindings.
  668. * @view_ids: Array of view ids to be bound.
  669. * @num_views: Number of view ids in @view_ids.
  670. * @first_slot: The binding slot to be used for the first view id in @view_ids.
  671. */
  672. static int vmw_view_bindings_add(struct vmw_sw_context *sw_context,
  673. enum vmw_view_type view_type,
  674. enum vmw_ctx_binding_type binding_type,
  675. uint32 shader_slot,
  676. uint32 view_ids[], u32 num_views,
  677. u32 first_slot)
  678. {
  679. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  680. u32 i;
  681. if (!ctx_node)
  682. return -EINVAL;
  683. for (i = 0; i < num_views; ++i) {
  684. struct vmw_ctx_bindinfo_view binding;
  685. struct vmw_resource *view = NULL;
  686. if (view_ids[i] != SVGA3D_INVALID_ID) {
  687. view = vmw_view_id_val_add(sw_context, view_type,
  688. view_ids[i]);
  689. if (IS_ERR(view)) {
  690. VMW_DEBUG_USER("View not found.\n");
  691. return PTR_ERR(view);
  692. }
  693. }
  694. binding.bi.ctx = ctx_node->ctx;
  695. binding.bi.res = view;
  696. binding.bi.bt = binding_type;
  697. binding.shader_slot = shader_slot;
  698. binding.slot = first_slot + i;
  699. vmw_binding_add(ctx_node->staged, &binding.bi,
  700. shader_slot, binding.slot);
  701. }
  702. return 0;
  703. }
  704. /**
  705. * vmw_cmd_cid_check - Check a command header for valid context information.
  706. *
  707. * @dev_priv: Pointer to a device private structure.
  708. * @sw_context: Pointer to the software context.
  709. * @header: A command header with an embedded user-space context handle.
  710. *
  711. * Convenience function: Call vmw_cmd_res_check with the user-space context
  712. * handle embedded in @header.
  713. */
  714. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  715. struct vmw_sw_context *sw_context,
  716. SVGA3dCmdHeader *header)
  717. {
  718. VMW_DECLARE_CMD_VAR(*cmd, uint32_t) =
  719. container_of(header, typeof(*cmd), header);
  720. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  721. VMW_RES_DIRTY_SET, user_context_converter,
  722. &cmd->body, NULL);
  723. }
  724. /**
  725. * vmw_execbuf_info_from_res - Get the private validation metadata for a
  726. * recently validated resource
  727. *
  728. * @sw_context: Pointer to the command submission context
  729. * @res: The resource
  730. *
  731. * The resource pointed to by @res needs to be present in the command submission
  732. * context's resource cache and hence the last resource of that type to be
  733. * processed by the validation code.
  734. *
  735. * Return: a pointer to the private metadata of the resource, or NULL if it
  736. * wasn't found
  737. */
  738. static struct vmw_ctx_validation_info *
  739. vmw_execbuf_info_from_res(struct vmw_sw_context *sw_context,
  740. struct vmw_resource *res)
  741. {
  742. struct vmw_res_cache_entry *rcache =
  743. &sw_context->res_cache[vmw_res_type(res)];
  744. if (rcache->valid && rcache->res == res)
  745. return rcache->private;
  746. WARN_ON_ONCE(true);
  747. return NULL;
  748. }
  749. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  750. struct vmw_sw_context *sw_context,
  751. SVGA3dCmdHeader *header)
  752. {
  753. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetRenderTarget);
  754. struct vmw_resource *ctx;
  755. struct vmw_resource *res;
  756. int ret;
  757. cmd = container_of(header, typeof(*cmd), header);
  758. if (cmd->body.type >= SVGA3D_RT_MAX) {
  759. VMW_DEBUG_USER("Illegal render target type %u.\n",
  760. (unsigned int) cmd->body.type);
  761. return -EINVAL;
  762. }
  763. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  764. VMW_RES_DIRTY_SET, user_context_converter,
  765. &cmd->body.cid, &ctx);
  766. if (unlikely(ret != 0))
  767. return ret;
  768. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  769. VMW_RES_DIRTY_SET, user_surface_converter,
  770. &cmd->body.target.sid, &res);
  771. if (unlikely(ret))
  772. return ret;
  773. if (dev_priv->has_mob) {
  774. struct vmw_ctx_bindinfo_view binding;
  775. struct vmw_ctx_validation_info *node;
  776. node = vmw_execbuf_info_from_res(sw_context, ctx);
  777. if (!node)
  778. return -EINVAL;
  779. binding.bi.ctx = ctx;
  780. binding.bi.res = res;
  781. binding.bi.bt = vmw_ctx_binding_rt;
  782. binding.slot = cmd->body.type;
  783. vmw_binding_add(node->staged, &binding.bi, 0, binding.slot);
  784. }
  785. return 0;
  786. }
  787. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  788. struct vmw_sw_context *sw_context,
  789. SVGA3dCmdHeader *header)
  790. {
  791. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceCopy);
  792. int ret;
  793. cmd = container_of(header, typeof(*cmd), header);
  794. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  795. VMW_RES_DIRTY_NONE, user_surface_converter,
  796. &cmd->body.src.sid, NULL);
  797. if (ret)
  798. return ret;
  799. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  800. VMW_RES_DIRTY_SET, user_surface_converter,
  801. &cmd->body.dest.sid, NULL);
  802. }
  803. static int vmw_cmd_buffer_copy_check(struct vmw_private *dev_priv,
  804. struct vmw_sw_context *sw_context,
  805. SVGA3dCmdHeader *header)
  806. {
  807. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBufferCopy);
  808. int ret;
  809. cmd = container_of(header, typeof(*cmd), header);
  810. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  811. VMW_RES_DIRTY_NONE, user_surface_converter,
  812. &cmd->body.src, NULL);
  813. if (ret != 0)
  814. return ret;
  815. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  816. VMW_RES_DIRTY_SET, user_surface_converter,
  817. &cmd->body.dest, NULL);
  818. }
  819. static int vmw_cmd_pred_copy_check(struct vmw_private *dev_priv,
  820. struct vmw_sw_context *sw_context,
  821. SVGA3dCmdHeader *header)
  822. {
  823. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXPredCopyRegion);
  824. int ret;
  825. cmd = container_of(header, typeof(*cmd), header);
  826. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  827. VMW_RES_DIRTY_NONE, user_surface_converter,
  828. &cmd->body.srcSid, NULL);
  829. if (ret != 0)
  830. return ret;
  831. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  832. VMW_RES_DIRTY_SET, user_surface_converter,
  833. &cmd->body.dstSid, NULL);
  834. }
  835. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  836. struct vmw_sw_context *sw_context,
  837. SVGA3dCmdHeader *header)
  838. {
  839. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceStretchBlt);
  840. int ret;
  841. cmd = container_of(header, typeof(*cmd), header);
  842. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  843. VMW_RES_DIRTY_NONE, user_surface_converter,
  844. &cmd->body.src.sid, NULL);
  845. if (unlikely(ret != 0))
  846. return ret;
  847. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  848. VMW_RES_DIRTY_SET, user_surface_converter,
  849. &cmd->body.dest.sid, NULL);
  850. }
  851. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  852. struct vmw_sw_context *sw_context,
  853. SVGA3dCmdHeader *header)
  854. {
  855. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBlitSurfaceToScreen) =
  856. container_of(header, typeof(*cmd), header);
  857. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  858. VMW_RES_DIRTY_NONE, user_surface_converter,
  859. &cmd->body.srcImage.sid, NULL);
  860. }
  861. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  862. struct vmw_sw_context *sw_context,
  863. SVGA3dCmdHeader *header)
  864. {
  865. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdPresent) =
  866. container_of(header, typeof(*cmd), header);
  867. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  868. VMW_RES_DIRTY_NONE, user_surface_converter,
  869. &cmd->body.sid, NULL);
  870. }
  871. /**
  872. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  873. *
  874. * @dev_priv: The device private structure.
  875. * @new_query_bo: The new buffer holding query results.
  876. * @sw_context: The software context used for this command submission.
  877. *
  878. * This function checks whether @new_query_bo is suitable for holding query
  879. * results, and if another buffer currently is pinned for query results. If so,
  880. * the function prepares the state of @sw_context for switching pinned buffers
  881. * after successful submission of the current command batch.
  882. */
  883. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  884. struct vmw_bo *new_query_bo,
  885. struct vmw_sw_context *sw_context)
  886. {
  887. struct vmw_res_cache_entry *ctx_entry =
  888. &sw_context->res_cache[vmw_res_context];
  889. int ret;
  890. BUG_ON(!ctx_entry->valid);
  891. sw_context->last_query_ctx = ctx_entry->res;
  892. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  893. if (unlikely(PFN_UP(new_query_bo->tbo.resource->size) > 4)) {
  894. VMW_DEBUG_USER("Query buffer too large.\n");
  895. return -EINVAL;
  896. }
  897. if (unlikely(sw_context->cur_query_bo != NULL)) {
  898. sw_context->needs_post_query_barrier = true;
  899. vmw_bo_placement_set_default_accelerated(sw_context->cur_query_bo);
  900. ret = vmw_validation_add_bo(sw_context->ctx,
  901. sw_context->cur_query_bo);
  902. if (unlikely(ret != 0))
  903. return ret;
  904. }
  905. sw_context->cur_query_bo = new_query_bo;
  906. vmw_bo_placement_set_default_accelerated(dev_priv->dummy_query_bo);
  907. ret = vmw_validation_add_bo(sw_context->ctx,
  908. dev_priv->dummy_query_bo);
  909. if (unlikely(ret != 0))
  910. return ret;
  911. }
  912. return 0;
  913. }
  914. /**
  915. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  916. *
  917. * @dev_priv: The device private structure.
  918. * @sw_context: The software context used for this command submission batch.
  919. *
  920. * This function will check if we're switching query buffers, and will then,
  921. * issue a dummy occlusion query wait used as a query barrier. When the fence
  922. * object following that query wait has signaled, we are sure that all preceding
  923. * queries have finished, and the old query buffer can be unpinned. However,
  924. * since both the new query buffer and the old one are fenced with that fence,
  925. * we can do an asynchronus unpin now, and be sure that the old query buffer
  926. * won't be moved until the fence has signaled.
  927. *
  928. * As mentioned above, both the new - and old query buffers need to be fenced
  929. * using a sequence emitted *after* calling this function.
  930. */
  931. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  932. struct vmw_sw_context *sw_context)
  933. {
  934. /*
  935. * The validate list should still hold references to all
  936. * contexts here.
  937. */
  938. if (sw_context->needs_post_query_barrier) {
  939. struct vmw_res_cache_entry *ctx_entry =
  940. &sw_context->res_cache[vmw_res_context];
  941. struct vmw_resource *ctx;
  942. int ret;
  943. BUG_ON(!ctx_entry->valid);
  944. ctx = ctx_entry->res;
  945. ret = vmw_cmd_emit_dummy_query(dev_priv, ctx->id);
  946. if (unlikely(ret != 0))
  947. VMW_DEBUG_USER("Out of fifo space for dummy query.\n");
  948. }
  949. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  950. if (dev_priv->pinned_bo) {
  951. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  952. vmw_bo_unreference(&dev_priv->pinned_bo);
  953. }
  954. if (!sw_context->needs_post_query_barrier) {
  955. vmw_bo_pin_reserved(sw_context->cur_query_bo, true);
  956. /*
  957. * We pin also the dummy_query_bo buffer so that we
  958. * don't need to validate it when emitting dummy queries
  959. * in context destroy paths.
  960. */
  961. if (!dev_priv->dummy_query_bo_pinned) {
  962. vmw_bo_pin_reserved(dev_priv->dummy_query_bo,
  963. true);
  964. dev_priv->dummy_query_bo_pinned = true;
  965. }
  966. BUG_ON(sw_context->last_query_ctx == NULL);
  967. dev_priv->query_cid = sw_context->last_query_ctx->id;
  968. dev_priv->query_cid_valid = true;
  969. dev_priv->pinned_bo =
  970. vmw_bo_reference(sw_context->cur_query_bo);
  971. }
  972. }
  973. }
  974. /**
  975. * vmw_translate_mob_ptr - Prepare to translate a user-space buffer handle
  976. * to a MOB id.
  977. *
  978. * @dev_priv: Pointer to a device private structure.
  979. * @sw_context: The software context used for this command batch validation.
  980. * @id: Pointer to the user-space handle to be translated.
  981. * @vmw_bo_p: Points to a location that, on successful return will carry a
  982. * non-reference-counted pointer to the buffer object identified by the
  983. * user-space handle in @id.
  984. *
  985. * This function saves information needed to translate a user-space buffer
  986. * handle to a MOB id. The translation does not take place immediately, but
  987. * during a call to vmw_apply_relocations().
  988. *
  989. * This function builds a relocation list and a list of buffers to validate. The
  990. * former needs to be freed using either vmw_apply_relocations() or
  991. * vmw_free_relocations(). The latter needs to be freed using
  992. * vmw_clear_validations.
  993. */
  994. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  995. struct vmw_sw_context *sw_context,
  996. SVGAMobId *id,
  997. struct vmw_bo **vmw_bo_p)
  998. {
  999. struct vmw_bo *vmw_bo, *tmp_bo;
  1000. uint32_t handle = *id;
  1001. struct vmw_relocation *reloc;
  1002. int ret;
  1003. vmw_validation_preload_bo(sw_context->ctx);
  1004. ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
  1005. if (ret != 0) {
  1006. drm_dbg(&dev_priv->drm, "Could not find or use MOB buffer.\n");
  1007. return ret;
  1008. }
  1009. vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_MOB, VMW_BO_DOMAIN_MOB);
  1010. ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
  1011. tmp_bo = vmw_bo;
  1012. vmw_user_bo_unref(&tmp_bo);
  1013. if (unlikely(ret != 0))
  1014. return ret;
  1015. reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
  1016. if (!reloc)
  1017. return -ENOMEM;
  1018. reloc->mob_loc = id;
  1019. reloc->vbo = vmw_bo;
  1020. *vmw_bo_p = vmw_bo;
  1021. list_add_tail(&reloc->head, &sw_context->bo_relocations);
  1022. return 0;
  1023. }
  1024. /**
  1025. * vmw_translate_guest_ptr - Prepare to translate a user-space buffer handle
  1026. * to a valid SVGAGuestPtr
  1027. *
  1028. * @dev_priv: Pointer to a device private structure.
  1029. * @sw_context: The software context used for this command batch validation.
  1030. * @ptr: Pointer to the user-space handle to be translated.
  1031. * @vmw_bo_p: Points to a location that, on successful return will carry a
  1032. * non-reference-counted pointer to the DMA buffer identified by the user-space
  1033. * handle in @id.
  1034. *
  1035. * This function saves information needed to translate a user-space buffer
  1036. * handle to a valid SVGAGuestPtr. The translation does not take place
  1037. * immediately, but during a call to vmw_apply_relocations().
  1038. *
  1039. * This function builds a relocation list and a list of buffers to validate.
  1040. * The former needs to be freed using either vmw_apply_relocations() or
  1041. * vmw_free_relocations(). The latter needs to be freed using
  1042. * vmw_clear_validations.
  1043. */
  1044. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  1045. struct vmw_sw_context *sw_context,
  1046. SVGAGuestPtr *ptr,
  1047. struct vmw_bo **vmw_bo_p)
  1048. {
  1049. struct vmw_bo *vmw_bo, *tmp_bo;
  1050. uint32_t handle = ptr->gmrId;
  1051. struct vmw_relocation *reloc;
  1052. int ret;
  1053. vmw_validation_preload_bo(sw_context->ctx);
  1054. ret = vmw_user_bo_lookup(sw_context->filp, handle, &vmw_bo);
  1055. if (ret != 0) {
  1056. drm_dbg(&dev_priv->drm, "Could not find or use GMR region.\n");
  1057. return ret;
  1058. }
  1059. vmw_bo_placement_set(vmw_bo, VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
  1060. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
  1061. ret = vmw_validation_add_bo(sw_context->ctx, vmw_bo);
  1062. tmp_bo = vmw_bo;
  1063. vmw_user_bo_unref(&tmp_bo);
  1064. if (unlikely(ret != 0))
  1065. return ret;
  1066. reloc = vmw_validation_mem_alloc(sw_context->ctx, sizeof(*reloc));
  1067. if (!reloc)
  1068. return -ENOMEM;
  1069. reloc->location = ptr;
  1070. reloc->vbo = vmw_bo;
  1071. *vmw_bo_p = vmw_bo;
  1072. list_add_tail(&reloc->head, &sw_context->bo_relocations);
  1073. return 0;
  1074. }
  1075. /**
  1076. * vmw_cmd_dx_define_query - validate SVGA_3D_CMD_DX_DEFINE_QUERY command.
  1077. *
  1078. * @dev_priv: Pointer to a device private struct.
  1079. * @sw_context: The software context used for this command submission.
  1080. * @header: Pointer to the command header in the command stream.
  1081. *
  1082. * This function adds the new query into the query COTABLE
  1083. */
  1084. static int vmw_cmd_dx_define_query(struct vmw_private *dev_priv,
  1085. struct vmw_sw_context *sw_context,
  1086. SVGA3dCmdHeader *header)
  1087. {
  1088. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineQuery);
  1089. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1090. struct vmw_resource *cotable_res;
  1091. int ret;
  1092. if (!ctx_node)
  1093. return -EINVAL;
  1094. cmd = container_of(header, typeof(*cmd), header);
  1095. if (cmd->body.type < SVGA3D_QUERYTYPE_MIN ||
  1096. cmd->body.type >= SVGA3D_QUERYTYPE_MAX)
  1097. return -EINVAL;
  1098. cotable_res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXQUERY);
  1099. if (IS_ERR_OR_NULL(cotable_res))
  1100. return cotable_res ? PTR_ERR(cotable_res) : -EINVAL;
  1101. ret = vmw_cotable_notify(cotable_res, cmd->body.queryId);
  1102. return ret;
  1103. }
  1104. /**
  1105. * vmw_cmd_dx_bind_query - validate SVGA_3D_CMD_DX_BIND_QUERY command.
  1106. *
  1107. * @dev_priv: Pointer to a device private struct.
  1108. * @sw_context: The software context used for this command submission.
  1109. * @header: Pointer to the command header in the command stream.
  1110. *
  1111. * The query bind operation will eventually associate the query ID with its
  1112. * backing MOB. In this function, we take the user mode MOB ID and use
  1113. * vmw_translate_mob_ptr() to translate it to its kernel mode equivalent.
  1114. */
  1115. static int vmw_cmd_dx_bind_query(struct vmw_private *dev_priv,
  1116. struct vmw_sw_context *sw_context,
  1117. SVGA3dCmdHeader *header)
  1118. {
  1119. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindQuery);
  1120. struct vmw_bo *vmw_bo;
  1121. int ret;
  1122. cmd = container_of(header, typeof(*cmd), header);
  1123. /*
  1124. * Look up the buffer pointed to by q.mobid, put it on the relocation
  1125. * list so its kernel mode MOB ID can be filled in later
  1126. */
  1127. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
  1128. &vmw_bo);
  1129. if (ret != 0)
  1130. return ret;
  1131. sw_context->dx_query_mob = vmw_bo;
  1132. sw_context->dx_query_ctx = sw_context->dx_ctx_node->ctx;
  1133. return 0;
  1134. }
  1135. /**
  1136. * vmw_cmd_begin_gb_query - validate SVGA_3D_CMD_BEGIN_GB_QUERY command.
  1137. *
  1138. * @dev_priv: Pointer to a device private struct.
  1139. * @sw_context: The software context used for this command submission.
  1140. * @header: Pointer to the command header in the command stream.
  1141. */
  1142. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  1143. struct vmw_sw_context *sw_context,
  1144. SVGA3dCmdHeader *header)
  1145. {
  1146. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginGBQuery) =
  1147. container_of(header, typeof(*cmd), header);
  1148. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1149. VMW_RES_DIRTY_SET, user_context_converter,
  1150. &cmd->body.cid, NULL);
  1151. }
  1152. /**
  1153. * vmw_cmd_begin_query - validate SVGA_3D_CMD_BEGIN_QUERY command.
  1154. *
  1155. * @dev_priv: Pointer to a device private struct.
  1156. * @sw_context: The software context used for this command submission.
  1157. * @header: Pointer to the command header in the command stream.
  1158. */
  1159. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  1160. struct vmw_sw_context *sw_context,
  1161. SVGA3dCmdHeader *header)
  1162. {
  1163. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBeginQuery) =
  1164. container_of(header, typeof(*cmd), header);
  1165. if (unlikely(dev_priv->has_mob)) {
  1166. VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdBeginGBQuery);
  1167. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1168. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  1169. gb_cmd.header.size = cmd->header.size;
  1170. gb_cmd.body.cid = cmd->body.cid;
  1171. gb_cmd.body.type = cmd->body.type;
  1172. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1173. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  1174. }
  1175. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1176. VMW_RES_DIRTY_SET, user_context_converter,
  1177. &cmd->body.cid, NULL);
  1178. }
  1179. /**
  1180. * vmw_cmd_end_gb_query - validate SVGA_3D_CMD_END_GB_QUERY command.
  1181. *
  1182. * @dev_priv: Pointer to a device private struct.
  1183. * @sw_context: The software context used for this command submission.
  1184. * @header: Pointer to the command header in the command stream.
  1185. */
  1186. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  1187. struct vmw_sw_context *sw_context,
  1188. SVGA3dCmdHeader *header)
  1189. {
  1190. struct vmw_bo *vmw_bo;
  1191. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndGBQuery);
  1192. int ret;
  1193. cmd = container_of(header, typeof(*cmd), header);
  1194. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1195. if (unlikely(ret != 0))
  1196. return ret;
  1197. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
  1198. &vmw_bo);
  1199. if (unlikely(ret != 0))
  1200. return ret;
  1201. ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
  1202. return ret;
  1203. }
  1204. /**
  1205. * vmw_cmd_end_query - validate SVGA_3D_CMD_END_QUERY command.
  1206. *
  1207. * @dev_priv: Pointer to a device private struct.
  1208. * @sw_context: The software context used for this command submission.
  1209. * @header: Pointer to the command header in the command stream.
  1210. */
  1211. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  1212. struct vmw_sw_context *sw_context,
  1213. SVGA3dCmdHeader *header)
  1214. {
  1215. struct vmw_bo *vmw_bo;
  1216. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdEndQuery);
  1217. int ret;
  1218. cmd = container_of(header, typeof(*cmd), header);
  1219. if (dev_priv->has_mob) {
  1220. VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdEndGBQuery);
  1221. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1222. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  1223. gb_cmd.header.size = cmd->header.size;
  1224. gb_cmd.body.cid = cmd->body.cid;
  1225. gb_cmd.body.type = cmd->body.type;
  1226. gb_cmd.body.mobid = cmd->body.guestResult.gmrId;
  1227. gb_cmd.body.offset = cmd->body.guestResult.offset;
  1228. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1229. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  1230. }
  1231. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1232. if (unlikely(ret != 0))
  1233. return ret;
  1234. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1235. &cmd->body.guestResult, &vmw_bo);
  1236. if (unlikely(ret != 0))
  1237. return ret;
  1238. ret = vmw_query_bo_switch_prepare(dev_priv, vmw_bo, sw_context);
  1239. return ret;
  1240. }
  1241. /**
  1242. * vmw_cmd_wait_gb_query - validate SVGA_3D_CMD_WAIT_GB_QUERY command.
  1243. *
  1244. * @dev_priv: Pointer to a device private struct.
  1245. * @sw_context: The software context used for this command submission.
  1246. * @header: Pointer to the command header in the command stream.
  1247. */
  1248. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  1249. struct vmw_sw_context *sw_context,
  1250. SVGA3dCmdHeader *header)
  1251. {
  1252. struct vmw_bo *vmw_bo;
  1253. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForGBQuery);
  1254. int ret;
  1255. cmd = container_of(header, typeof(*cmd), header);
  1256. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1257. if (unlikely(ret != 0))
  1258. return ret;
  1259. ret = vmw_translate_mob_ptr(dev_priv, sw_context, &cmd->body.mobid,
  1260. &vmw_bo);
  1261. if (unlikely(ret != 0))
  1262. return ret;
  1263. return 0;
  1264. }
  1265. /**
  1266. * vmw_cmd_wait_query - validate SVGA_3D_CMD_WAIT_QUERY command.
  1267. *
  1268. * @dev_priv: Pointer to a device private struct.
  1269. * @sw_context: The software context used for this command submission.
  1270. * @header: Pointer to the command header in the command stream.
  1271. */
  1272. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  1273. struct vmw_sw_context *sw_context,
  1274. SVGA3dCmdHeader *header)
  1275. {
  1276. struct vmw_bo *vmw_bo;
  1277. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdWaitForQuery);
  1278. int ret;
  1279. cmd = container_of(header, typeof(*cmd), header);
  1280. if (dev_priv->has_mob) {
  1281. VMW_DECLARE_CMD_VAR(gb_cmd, SVGA3dCmdWaitForGBQuery);
  1282. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1283. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  1284. gb_cmd.header.size = cmd->header.size;
  1285. gb_cmd.body.cid = cmd->body.cid;
  1286. gb_cmd.body.type = cmd->body.type;
  1287. gb_cmd.body.mobid = cmd->body.guestResult.gmrId;
  1288. gb_cmd.body.offset = cmd->body.guestResult.offset;
  1289. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1290. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  1291. }
  1292. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1293. if (unlikely(ret != 0))
  1294. return ret;
  1295. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1296. &cmd->body.guestResult, &vmw_bo);
  1297. if (unlikely(ret != 0))
  1298. return ret;
  1299. return 0;
  1300. }
  1301. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  1302. struct vmw_sw_context *sw_context,
  1303. SVGA3dCmdHeader *header)
  1304. {
  1305. struct vmw_bo *vmw_bo = NULL;
  1306. struct vmw_resource *res;
  1307. struct vmw_surface *srf = NULL;
  1308. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSurfaceDMA);
  1309. int ret;
  1310. SVGA3dCmdSurfaceDMASuffix *suffix;
  1311. uint32_t bo_size;
  1312. bool dirty;
  1313. cmd = container_of(header, typeof(*cmd), header);
  1314. suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->body +
  1315. header->size - sizeof(*suffix));
  1316. /* Make sure device and verifier stays in sync. */
  1317. if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
  1318. VMW_DEBUG_USER("Invalid DMA suffix size.\n");
  1319. return -EINVAL;
  1320. }
  1321. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1322. &cmd->body.guest.ptr, &vmw_bo);
  1323. if (unlikely(ret != 0))
  1324. return ret;
  1325. /* Make sure DMA doesn't cross BO boundaries. */
  1326. bo_size = vmw_bo->tbo.base.size;
  1327. if (unlikely(cmd->body.guest.ptr.offset > bo_size)) {
  1328. VMW_DEBUG_USER("Invalid DMA offset.\n");
  1329. return -EINVAL;
  1330. }
  1331. bo_size -= cmd->body.guest.ptr.offset;
  1332. if (unlikely(suffix->maximumOffset > bo_size))
  1333. suffix->maximumOffset = bo_size;
  1334. dirty = (cmd->body.transfer == SVGA3D_WRITE_HOST_VRAM) ?
  1335. VMW_RES_DIRTY_SET : 0;
  1336. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface, dirty,
  1337. user_surface_converter, &cmd->body.host.sid,
  1338. NULL);
  1339. if (unlikely(ret != 0)) {
  1340. if (unlikely(ret != -ERESTARTSYS))
  1341. VMW_DEBUG_USER("could not find surface for DMA.\n");
  1342. return ret;
  1343. }
  1344. res = sw_context->res_cache[vmw_res_surface].res;
  1345. if (!res) {
  1346. VMW_DEBUG_USER("Invalid DMA surface.\n");
  1347. return -EINVAL;
  1348. }
  1349. srf = vmw_res_to_srf(res);
  1350. vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->tbo,
  1351. header);
  1352. return 0;
  1353. }
  1354. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  1355. struct vmw_sw_context *sw_context,
  1356. SVGA3dCmdHeader *header)
  1357. {
  1358. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDrawPrimitives);
  1359. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  1360. (unsigned long)header + sizeof(*cmd));
  1361. SVGA3dPrimitiveRange *range;
  1362. uint32_t i;
  1363. uint32_t maxnum;
  1364. int ret;
  1365. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1366. if (unlikely(ret != 0))
  1367. return ret;
  1368. cmd = container_of(header, typeof(*cmd), header);
  1369. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1370. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1371. VMW_DEBUG_USER("Illegal number of vertex declarations.\n");
  1372. return -EINVAL;
  1373. }
  1374. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1375. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1376. VMW_RES_DIRTY_NONE,
  1377. user_surface_converter,
  1378. &decl->array.surfaceId, NULL);
  1379. if (unlikely(ret != 0))
  1380. return ret;
  1381. }
  1382. maxnum = (header->size - sizeof(cmd->body) -
  1383. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1384. if (unlikely(cmd->body.numRanges > maxnum)) {
  1385. VMW_DEBUG_USER("Illegal number of index ranges.\n");
  1386. return -EINVAL;
  1387. }
  1388. range = (SVGA3dPrimitiveRange *) decl;
  1389. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1390. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1391. VMW_RES_DIRTY_NONE,
  1392. user_surface_converter,
  1393. &range->indexArray.surfaceId, NULL);
  1394. if (unlikely(ret != 0))
  1395. return ret;
  1396. }
  1397. return 0;
  1398. }
  1399. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1400. struct vmw_sw_context *sw_context,
  1401. SVGA3dCmdHeader *header)
  1402. {
  1403. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetTextureState);
  1404. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1405. ((unsigned long) header + header->size + sizeof(*header));
  1406. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1407. ((unsigned long) header + sizeof(*cmd));
  1408. struct vmw_resource *ctx;
  1409. struct vmw_resource *res;
  1410. int ret;
  1411. cmd = container_of(header, typeof(*cmd), header);
  1412. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1413. VMW_RES_DIRTY_SET, user_context_converter,
  1414. &cmd->body.cid, &ctx);
  1415. if (unlikely(ret != 0))
  1416. return ret;
  1417. for (; cur_state < last_state; ++cur_state) {
  1418. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1419. continue;
  1420. if (cur_state->stage >= SVGA3D_NUM_TEXTURE_UNITS) {
  1421. VMW_DEBUG_USER("Illegal texture/sampler unit %u.\n",
  1422. (unsigned int) cur_state->stage);
  1423. return -EINVAL;
  1424. }
  1425. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1426. VMW_RES_DIRTY_NONE,
  1427. user_surface_converter,
  1428. &cur_state->value, &res);
  1429. if (unlikely(ret != 0))
  1430. return ret;
  1431. if (dev_priv->has_mob) {
  1432. struct vmw_ctx_bindinfo_tex binding;
  1433. struct vmw_ctx_validation_info *node;
  1434. node = vmw_execbuf_info_from_res(sw_context, ctx);
  1435. if (!node)
  1436. return -EINVAL;
  1437. binding.bi.ctx = ctx;
  1438. binding.bi.res = res;
  1439. binding.bi.bt = vmw_ctx_binding_tex;
  1440. binding.texture_stage = cur_state->stage;
  1441. vmw_binding_add(node->staged, &binding.bi, 0,
  1442. binding.texture_stage);
  1443. }
  1444. }
  1445. return 0;
  1446. }
  1447. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1448. struct vmw_sw_context *sw_context,
  1449. void *buf)
  1450. {
  1451. struct vmw_bo *vmw_bo;
  1452. struct {
  1453. uint32_t header;
  1454. SVGAFifoCmdDefineGMRFB body;
  1455. } *cmd = buf;
  1456. return vmw_translate_guest_ptr(dev_priv, sw_context, &cmd->body.ptr,
  1457. &vmw_bo);
  1458. }
  1459. /**
  1460. * vmw_cmd_res_switch_backup - Utility function to handle backup buffer
  1461. * switching
  1462. *
  1463. * @dev_priv: Pointer to a device private struct.
  1464. * @sw_context: The software context being used for this batch.
  1465. * @res: Pointer to the resource.
  1466. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1467. * stream.
  1468. * @backup_offset: Offset of backup into MOB.
  1469. *
  1470. * This function prepares for registering a switch of backup buffers in the
  1471. * resource metadata just prior to unreserving. It's basically a wrapper around
  1472. * vmw_cmd_res_switch_backup with a different interface.
  1473. */
  1474. static int vmw_cmd_res_switch_backup(struct vmw_private *dev_priv,
  1475. struct vmw_sw_context *sw_context,
  1476. struct vmw_resource *res, uint32_t *buf_id,
  1477. unsigned long backup_offset)
  1478. {
  1479. struct vmw_bo *vbo;
  1480. void *info;
  1481. int ret;
  1482. info = vmw_execbuf_info_from_res(sw_context, res);
  1483. if (!info)
  1484. return -EINVAL;
  1485. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &vbo);
  1486. if (ret)
  1487. return ret;
  1488. vmw_validation_res_switch_backup(sw_context->ctx, info, vbo,
  1489. backup_offset);
  1490. return 0;
  1491. }
  1492. /**
  1493. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1494. *
  1495. * @dev_priv: Pointer to a device private struct.
  1496. * @sw_context: The software context being used for this batch.
  1497. * @res_type: The resource type.
  1498. * @converter: Information about user-space binding for this resource type.
  1499. * @res_id: Pointer to the user-space resource handle in the command stream.
  1500. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1501. * stream.
  1502. * @backup_offset: Offset of backup into MOB.
  1503. *
  1504. * This function prepares for registering a switch of backup buffers in the
  1505. * resource metadata just prior to unreserving. It's basically a wrapper around
  1506. * vmw_cmd_res_switch_backup with a different interface.
  1507. */
  1508. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1509. struct vmw_sw_context *sw_context,
  1510. enum vmw_res_type res_type,
  1511. const struct vmw_user_resource_conv
  1512. *converter, uint32_t *res_id, uint32_t *buf_id,
  1513. unsigned long backup_offset)
  1514. {
  1515. struct vmw_resource *res;
  1516. int ret;
  1517. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1518. VMW_RES_DIRTY_NONE, converter, res_id, &res);
  1519. if (ret)
  1520. return ret;
  1521. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res, buf_id,
  1522. backup_offset);
  1523. }
  1524. /**
  1525. * vmw_cmd_bind_gb_surface - Validate SVGA_3D_CMD_BIND_GB_SURFACE command
  1526. *
  1527. * @dev_priv: Pointer to a device private struct.
  1528. * @sw_context: The software context being used for this batch.
  1529. * @header: Pointer to the command header in the command stream.
  1530. */
  1531. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1532. struct vmw_sw_context *sw_context,
  1533. SVGA3dCmdHeader *header)
  1534. {
  1535. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBSurface) =
  1536. container_of(header, typeof(*cmd), header);
  1537. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1538. user_surface_converter, &cmd->body.sid,
  1539. &cmd->body.mobid, 0);
  1540. }
  1541. /**
  1542. * vmw_cmd_update_gb_image - Validate SVGA_3D_CMD_UPDATE_GB_IMAGE command
  1543. *
  1544. * @dev_priv: Pointer to a device private struct.
  1545. * @sw_context: The software context being used for this batch.
  1546. * @header: Pointer to the command header in the command stream.
  1547. */
  1548. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1549. struct vmw_sw_context *sw_context,
  1550. SVGA3dCmdHeader *header)
  1551. {
  1552. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBImage) =
  1553. container_of(header, typeof(*cmd), header);
  1554. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1555. VMW_RES_DIRTY_NONE, user_surface_converter,
  1556. &cmd->body.image.sid, NULL);
  1557. }
  1558. /**
  1559. * vmw_cmd_update_gb_surface - Validate SVGA_3D_CMD_UPDATE_GB_SURFACE command
  1560. *
  1561. * @dev_priv: Pointer to a device private struct.
  1562. * @sw_context: The software context being used for this batch.
  1563. * @header: Pointer to the command header in the command stream.
  1564. */
  1565. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1566. struct vmw_sw_context *sw_context,
  1567. SVGA3dCmdHeader *header)
  1568. {
  1569. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdUpdateGBSurface) =
  1570. container_of(header, typeof(*cmd), header);
  1571. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1572. VMW_RES_DIRTY_CLEAR, user_surface_converter,
  1573. &cmd->body.sid, NULL);
  1574. }
  1575. /**
  1576. * vmw_cmd_readback_gb_image - Validate SVGA_3D_CMD_READBACK_GB_IMAGE command
  1577. *
  1578. * @dev_priv: Pointer to a device private struct.
  1579. * @sw_context: The software context being used for this batch.
  1580. * @header: Pointer to the command header in the command stream.
  1581. */
  1582. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1583. struct vmw_sw_context *sw_context,
  1584. SVGA3dCmdHeader *header)
  1585. {
  1586. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBImage) =
  1587. container_of(header, typeof(*cmd), header);
  1588. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1589. VMW_RES_DIRTY_NONE, user_surface_converter,
  1590. &cmd->body.image.sid, NULL);
  1591. }
  1592. /**
  1593. * vmw_cmd_readback_gb_surface - Validate SVGA_3D_CMD_READBACK_GB_SURFACE
  1594. * command
  1595. *
  1596. * @dev_priv: Pointer to a device private struct.
  1597. * @sw_context: The software context being used for this batch.
  1598. * @header: Pointer to the command header in the command stream.
  1599. */
  1600. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1601. struct vmw_sw_context *sw_context,
  1602. SVGA3dCmdHeader *header)
  1603. {
  1604. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdReadbackGBSurface) =
  1605. container_of(header, typeof(*cmd), header);
  1606. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1607. VMW_RES_DIRTY_CLEAR, user_surface_converter,
  1608. &cmd->body.sid, NULL);
  1609. }
  1610. /**
  1611. * vmw_cmd_invalidate_gb_image - Validate SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1612. * command
  1613. *
  1614. * @dev_priv: Pointer to a device private struct.
  1615. * @sw_context: The software context being used for this batch.
  1616. * @header: Pointer to the command header in the command stream.
  1617. */
  1618. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1619. struct vmw_sw_context *sw_context,
  1620. SVGA3dCmdHeader *header)
  1621. {
  1622. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBImage) =
  1623. container_of(header, typeof(*cmd), header);
  1624. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1625. VMW_RES_DIRTY_NONE, user_surface_converter,
  1626. &cmd->body.image.sid, NULL);
  1627. }
  1628. /**
  1629. * vmw_cmd_invalidate_gb_surface - Validate SVGA_3D_CMD_INVALIDATE_GB_SURFACE
  1630. * command
  1631. *
  1632. * @dev_priv: Pointer to a device private struct.
  1633. * @sw_context: The software context being used for this batch.
  1634. * @header: Pointer to the command header in the command stream.
  1635. */
  1636. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1637. struct vmw_sw_context *sw_context,
  1638. SVGA3dCmdHeader *header)
  1639. {
  1640. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdInvalidateGBSurface) =
  1641. container_of(header, typeof(*cmd), header);
  1642. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1643. VMW_RES_DIRTY_CLEAR, user_surface_converter,
  1644. &cmd->body.sid, NULL);
  1645. }
  1646. /**
  1647. * vmw_cmd_shader_define - Validate SVGA_3D_CMD_SHADER_DEFINE command
  1648. *
  1649. * @dev_priv: Pointer to a device private struct.
  1650. * @sw_context: The software context being used for this batch.
  1651. * @header: Pointer to the command header in the command stream.
  1652. */
  1653. static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
  1654. struct vmw_sw_context *sw_context,
  1655. SVGA3dCmdHeader *header)
  1656. {
  1657. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDefineShader);
  1658. int ret;
  1659. size_t size;
  1660. struct vmw_resource *ctx;
  1661. cmd = container_of(header, typeof(*cmd), header);
  1662. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1663. VMW_RES_DIRTY_SET, user_context_converter,
  1664. &cmd->body.cid, &ctx);
  1665. if (unlikely(ret != 0))
  1666. return ret;
  1667. if (unlikely(!dev_priv->has_mob))
  1668. return 0;
  1669. size = cmd->header.size - sizeof(cmd->body);
  1670. ret = vmw_compat_shader_add(dev_priv, vmw_context_res_man(ctx),
  1671. cmd->body.shid, cmd + 1, cmd->body.type,
  1672. size, &sw_context->staged_cmd_res);
  1673. if (unlikely(ret != 0))
  1674. return ret;
  1675. return vmw_resource_relocation_add(sw_context, NULL,
  1676. vmw_ptr_diff(sw_context->buf_start,
  1677. &cmd->header.id),
  1678. vmw_res_rel_nop);
  1679. }
  1680. /**
  1681. * vmw_cmd_shader_destroy - Validate SVGA_3D_CMD_SHADER_DESTROY command
  1682. *
  1683. * @dev_priv: Pointer to a device private struct.
  1684. * @sw_context: The software context being used for this batch.
  1685. * @header: Pointer to the command header in the command stream.
  1686. */
  1687. static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
  1688. struct vmw_sw_context *sw_context,
  1689. SVGA3dCmdHeader *header)
  1690. {
  1691. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDestroyShader);
  1692. int ret;
  1693. struct vmw_resource *ctx;
  1694. cmd = container_of(header, typeof(*cmd), header);
  1695. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1696. VMW_RES_DIRTY_SET, user_context_converter,
  1697. &cmd->body.cid, &ctx);
  1698. if (unlikely(ret != 0))
  1699. return ret;
  1700. if (unlikely(!dev_priv->has_mob))
  1701. return 0;
  1702. ret = vmw_shader_remove(vmw_context_res_man(ctx), cmd->body.shid,
  1703. cmd->body.type, &sw_context->staged_cmd_res);
  1704. if (unlikely(ret != 0))
  1705. return ret;
  1706. return vmw_resource_relocation_add(sw_context, NULL,
  1707. vmw_ptr_diff(sw_context->buf_start,
  1708. &cmd->header.id),
  1709. vmw_res_rel_nop);
  1710. }
  1711. /**
  1712. * vmw_cmd_set_shader - Validate SVGA_3D_CMD_SET_SHADER command
  1713. *
  1714. * @dev_priv: Pointer to a device private struct.
  1715. * @sw_context: The software context being used for this batch.
  1716. * @header: Pointer to the command header in the command stream.
  1717. */
  1718. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1719. struct vmw_sw_context *sw_context,
  1720. SVGA3dCmdHeader *header)
  1721. {
  1722. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShader);
  1723. struct vmw_ctx_bindinfo_shader binding;
  1724. struct vmw_resource *ctx, *res = NULL;
  1725. struct vmw_ctx_validation_info *ctx_info;
  1726. int ret;
  1727. cmd = container_of(header, typeof(*cmd), header);
  1728. if (!vmw_shadertype_is_valid(VMW_SM_LEGACY, cmd->body.type)) {
  1729. VMW_DEBUG_USER("Illegal shader type %u.\n",
  1730. (unsigned int) cmd->body.type);
  1731. return -EINVAL;
  1732. }
  1733. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1734. VMW_RES_DIRTY_SET, user_context_converter,
  1735. &cmd->body.cid, &ctx);
  1736. if (unlikely(ret != 0))
  1737. return ret;
  1738. if (!dev_priv->has_mob)
  1739. return 0;
  1740. if (cmd->body.shid != SVGA3D_INVALID_ID) {
  1741. /*
  1742. * This is the compat shader path - Per device guest-backed
  1743. * shaders, but user-space thinks it's per context host-
  1744. * backed shaders.
  1745. */
  1746. res = vmw_shader_lookup(vmw_context_res_man(ctx),
  1747. cmd->body.shid, cmd->body.type);
  1748. if (!IS_ERR(res)) {
  1749. ret = vmw_execbuf_res_val_add(sw_context, res,
  1750. VMW_RES_DIRTY_NONE,
  1751. vmw_val_add_flag_noctx);
  1752. if (unlikely(ret != 0))
  1753. return ret;
  1754. ret = vmw_resource_relocation_add
  1755. (sw_context, res,
  1756. vmw_ptr_diff(sw_context->buf_start,
  1757. &cmd->body.shid),
  1758. vmw_res_rel_normal);
  1759. if (unlikely(ret != 0))
  1760. return ret;
  1761. }
  1762. }
  1763. if (IS_ERR_OR_NULL(res)) {
  1764. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_shader,
  1765. VMW_RES_DIRTY_NONE,
  1766. user_shader_converter, &cmd->body.shid,
  1767. &res);
  1768. if (unlikely(ret != 0))
  1769. return ret;
  1770. }
  1771. ctx_info = vmw_execbuf_info_from_res(sw_context, ctx);
  1772. if (!ctx_info)
  1773. return -EINVAL;
  1774. binding.bi.ctx = ctx;
  1775. binding.bi.res = res;
  1776. binding.bi.bt = vmw_ctx_binding_shader;
  1777. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1778. vmw_binding_add(ctx_info->staged, &binding.bi, binding.shader_slot, 0);
  1779. return 0;
  1780. }
  1781. /**
  1782. * vmw_cmd_set_shader_const - Validate SVGA_3D_CMD_SET_SHADER_CONST command
  1783. *
  1784. * @dev_priv: Pointer to a device private struct.
  1785. * @sw_context: The software context being used for this batch.
  1786. * @header: Pointer to the command header in the command stream.
  1787. */
  1788. static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
  1789. struct vmw_sw_context *sw_context,
  1790. SVGA3dCmdHeader *header)
  1791. {
  1792. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdSetShaderConst);
  1793. int ret;
  1794. cmd = container_of(header, typeof(*cmd), header);
  1795. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1796. VMW_RES_DIRTY_SET, user_context_converter,
  1797. &cmd->body.cid, NULL);
  1798. if (unlikely(ret != 0))
  1799. return ret;
  1800. if (dev_priv->has_mob)
  1801. header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
  1802. return 0;
  1803. }
  1804. /**
  1805. * vmw_cmd_bind_gb_shader - Validate SVGA_3D_CMD_BIND_GB_SHADER command
  1806. *
  1807. * @dev_priv: Pointer to a device private struct.
  1808. * @sw_context: The software context being used for this batch.
  1809. * @header: Pointer to the command header in the command stream.
  1810. */
  1811. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1812. struct vmw_sw_context *sw_context,
  1813. SVGA3dCmdHeader *header)
  1814. {
  1815. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdBindGBShader) =
  1816. container_of(header, typeof(*cmd), header);
  1817. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1818. user_shader_converter, &cmd->body.shid,
  1819. &cmd->body.mobid, cmd->body.offsetInBytes);
  1820. }
  1821. /**
  1822. * vmw_cmd_dx_set_single_constant_buffer - Validate
  1823. * SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER command.
  1824. *
  1825. * @dev_priv: Pointer to a device private struct.
  1826. * @sw_context: The software context being used for this batch.
  1827. * @header: Pointer to the command header in the command stream.
  1828. */
  1829. static int
  1830. vmw_cmd_dx_set_single_constant_buffer(struct vmw_private *dev_priv,
  1831. struct vmw_sw_context *sw_context,
  1832. SVGA3dCmdHeader *header)
  1833. {
  1834. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetSingleConstantBuffer);
  1835. struct vmw_resource *res = NULL;
  1836. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1837. struct vmw_ctx_bindinfo_cb binding;
  1838. int ret;
  1839. if (!ctx_node)
  1840. return -EINVAL;
  1841. cmd = container_of(header, typeof(*cmd), header);
  1842. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1843. VMW_RES_DIRTY_NONE, user_surface_converter,
  1844. &cmd->body.sid, &res);
  1845. if (unlikely(ret != 0))
  1846. return ret;
  1847. if (!vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type) ||
  1848. cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
  1849. VMW_DEBUG_USER("Illegal const buffer shader %u slot %u.\n",
  1850. (unsigned int) cmd->body.type,
  1851. (unsigned int) cmd->body.slot);
  1852. return -EINVAL;
  1853. }
  1854. binding.bi.ctx = ctx_node->ctx;
  1855. binding.bi.res = res;
  1856. binding.bi.bt = vmw_ctx_binding_cb;
  1857. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1858. binding.offset = cmd->body.offsetInBytes;
  1859. binding.size = cmd->body.sizeInBytes;
  1860. binding.slot = cmd->body.slot;
  1861. vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot,
  1862. binding.slot);
  1863. return 0;
  1864. }
  1865. /**
  1866. * vmw_cmd_dx_set_constant_buffer_offset - Validate
  1867. * SVGA_3D_CMD_DX_SET_VS/PS/GS/HS/DS/CS_CONSTANT_BUFFER_OFFSET command.
  1868. *
  1869. * @dev_priv: Pointer to a device private struct.
  1870. * @sw_context: The software context being used for this batch.
  1871. * @header: Pointer to the command header in the command stream.
  1872. */
  1873. static int
  1874. vmw_cmd_dx_set_constant_buffer_offset(struct vmw_private *dev_priv,
  1875. struct vmw_sw_context *sw_context,
  1876. SVGA3dCmdHeader *header)
  1877. {
  1878. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetConstantBufferOffset);
  1879. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1880. u32 shader_slot;
  1881. if (!has_sm5_context(dev_priv))
  1882. return -EINVAL;
  1883. if (!ctx_node)
  1884. return -EINVAL;
  1885. cmd = container_of(header, typeof(*cmd), header);
  1886. if (cmd->body.slot >= SVGA3D_DX_MAX_CONSTBUFFERS) {
  1887. VMW_DEBUG_USER("Illegal const buffer slot %u.\n",
  1888. (unsigned int) cmd->body.slot);
  1889. return -EINVAL;
  1890. }
  1891. shader_slot = cmd->header.id - SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET;
  1892. vmw_binding_cb_offset_update(ctx_node->staged, shader_slot,
  1893. cmd->body.slot, cmd->body.offsetInBytes);
  1894. return 0;
  1895. }
  1896. /**
  1897. * vmw_cmd_dx_set_shader_res - Validate SVGA_3D_CMD_DX_SET_SHADER_RESOURCES
  1898. * command
  1899. *
  1900. * @dev_priv: Pointer to a device private struct.
  1901. * @sw_context: The software context being used for this batch.
  1902. * @header: Pointer to the command header in the command stream.
  1903. */
  1904. static int vmw_cmd_dx_set_shader_res(struct vmw_private *dev_priv,
  1905. struct vmw_sw_context *sw_context,
  1906. SVGA3dCmdHeader *header)
  1907. {
  1908. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShaderResources) =
  1909. container_of(header, typeof(*cmd), header);
  1910. u32 num_sr_view = (cmd->header.size - sizeof(cmd->body)) /
  1911. sizeof(SVGA3dShaderResourceViewId);
  1912. if ((u64) cmd->body.startView + (u64) num_sr_view >
  1913. (u64) SVGA3D_DX_MAX_SRVIEWS ||
  1914. !vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type)) {
  1915. VMW_DEBUG_USER("Invalid shader binding.\n");
  1916. return -EINVAL;
  1917. }
  1918. return vmw_view_bindings_add(sw_context, vmw_view_sr,
  1919. vmw_ctx_binding_sr,
  1920. cmd->body.type - SVGA3D_SHADERTYPE_MIN,
  1921. (void *) &cmd[1], num_sr_view,
  1922. cmd->body.startView);
  1923. }
  1924. /**
  1925. * vmw_cmd_dx_set_shader - Validate SVGA_3D_CMD_DX_SET_SHADER command
  1926. *
  1927. * @dev_priv: Pointer to a device private struct.
  1928. * @sw_context: The software context being used for this batch.
  1929. * @header: Pointer to the command header in the command stream.
  1930. */
  1931. static int vmw_cmd_dx_set_shader(struct vmw_private *dev_priv,
  1932. struct vmw_sw_context *sw_context,
  1933. SVGA3dCmdHeader *header)
  1934. {
  1935. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetShader);
  1936. struct vmw_resource *res = NULL;
  1937. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1938. struct vmw_ctx_bindinfo_shader binding;
  1939. int ret = 0;
  1940. if (!ctx_node)
  1941. return -EINVAL;
  1942. cmd = container_of(header, typeof(*cmd), header);
  1943. if (!vmw_shadertype_is_valid(dev_priv->sm_type, cmd->body.type)) {
  1944. VMW_DEBUG_USER("Illegal shader type %u.\n",
  1945. (unsigned int) cmd->body.type);
  1946. return -EINVAL;
  1947. }
  1948. if (cmd->body.shaderId != SVGA3D_INVALID_ID) {
  1949. res = vmw_shader_lookup(sw_context->man, cmd->body.shaderId, 0);
  1950. if (IS_ERR(res)) {
  1951. VMW_DEBUG_USER("Could not find shader for binding.\n");
  1952. return PTR_ERR(res);
  1953. }
  1954. ret = vmw_execbuf_res_val_add(sw_context, res,
  1955. VMW_RES_DIRTY_NONE,
  1956. vmw_val_add_flag_noctx);
  1957. if (ret)
  1958. return ret;
  1959. }
  1960. binding.bi.ctx = ctx_node->ctx;
  1961. binding.bi.res = res;
  1962. binding.bi.bt = vmw_ctx_binding_dx_shader;
  1963. binding.shader_slot = cmd->body.type - SVGA3D_SHADERTYPE_MIN;
  1964. vmw_binding_add(ctx_node->staged, &binding.bi, binding.shader_slot, 0);
  1965. return 0;
  1966. }
  1967. /**
  1968. * vmw_cmd_dx_set_vertex_buffers - Validates SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS
  1969. * command
  1970. *
  1971. * @dev_priv: Pointer to a device private struct.
  1972. * @sw_context: The software context being used for this batch.
  1973. * @header: Pointer to the command header in the command stream.
  1974. */
  1975. static int vmw_cmd_dx_set_vertex_buffers(struct vmw_private *dev_priv,
  1976. struct vmw_sw_context *sw_context,
  1977. SVGA3dCmdHeader *header)
  1978. {
  1979. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  1980. struct vmw_ctx_bindinfo_vb binding;
  1981. struct vmw_resource *res;
  1982. struct {
  1983. SVGA3dCmdHeader header;
  1984. SVGA3dCmdDXSetVertexBuffers body;
  1985. SVGA3dVertexBuffer buf[];
  1986. } *cmd;
  1987. int i, ret, num;
  1988. if (!ctx_node)
  1989. return -EINVAL;
  1990. cmd = container_of(header, typeof(*cmd), header);
  1991. num = (cmd->header.size - sizeof(cmd->body)) /
  1992. sizeof(SVGA3dVertexBuffer);
  1993. if ((u64)num + (u64)cmd->body.startBuffer >
  1994. (u64)SVGA3D_DX_MAX_VERTEXBUFFERS) {
  1995. VMW_DEBUG_USER("Invalid number of vertex buffers.\n");
  1996. return -EINVAL;
  1997. }
  1998. for (i = 0; i < num; i++) {
  1999. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2000. VMW_RES_DIRTY_NONE,
  2001. user_surface_converter,
  2002. &cmd->buf[i].sid, &res);
  2003. if (unlikely(ret != 0))
  2004. return ret;
  2005. binding.bi.ctx = ctx_node->ctx;
  2006. binding.bi.bt = vmw_ctx_binding_vb;
  2007. binding.bi.res = res;
  2008. binding.offset = cmd->buf[i].offset;
  2009. binding.stride = cmd->buf[i].stride;
  2010. binding.slot = i + cmd->body.startBuffer;
  2011. vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot);
  2012. }
  2013. return 0;
  2014. }
  2015. /**
  2016. * vmw_cmd_dx_set_index_buffer - Validate
  2017. * SVGA_3D_CMD_DX_IA_SET_INDEX_BUFFER command.
  2018. *
  2019. * @dev_priv: Pointer to a device private struct.
  2020. * @sw_context: The software context being used for this batch.
  2021. * @header: Pointer to the command header in the command stream.
  2022. */
  2023. static int vmw_cmd_dx_set_index_buffer(struct vmw_private *dev_priv,
  2024. struct vmw_sw_context *sw_context,
  2025. SVGA3dCmdHeader *header)
  2026. {
  2027. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2028. struct vmw_ctx_bindinfo_ib binding;
  2029. struct vmw_resource *res;
  2030. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetIndexBuffer);
  2031. int ret;
  2032. if (!ctx_node)
  2033. return -EINVAL;
  2034. cmd = container_of(header, typeof(*cmd), header);
  2035. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2036. VMW_RES_DIRTY_NONE, user_surface_converter,
  2037. &cmd->body.sid, &res);
  2038. if (unlikely(ret != 0))
  2039. return ret;
  2040. binding.bi.ctx = ctx_node->ctx;
  2041. binding.bi.res = res;
  2042. binding.bi.bt = vmw_ctx_binding_ib;
  2043. binding.offset = cmd->body.offset;
  2044. binding.format = cmd->body.format;
  2045. vmw_binding_add(ctx_node->staged, &binding.bi, 0, 0);
  2046. return 0;
  2047. }
  2048. /**
  2049. * vmw_cmd_dx_set_rendertargets - Validate SVGA_3D_CMD_DX_SET_RENDERTARGETS
  2050. * command
  2051. *
  2052. * @dev_priv: Pointer to a device private struct.
  2053. * @sw_context: The software context being used for this batch.
  2054. * @header: Pointer to the command header in the command stream.
  2055. */
  2056. static int vmw_cmd_dx_set_rendertargets(struct vmw_private *dev_priv,
  2057. struct vmw_sw_context *sw_context,
  2058. SVGA3dCmdHeader *header)
  2059. {
  2060. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXSetRenderTargets) =
  2061. container_of(header, typeof(*cmd), header);
  2062. u32 num_rt_view = (cmd->header.size - sizeof(cmd->body)) /
  2063. sizeof(SVGA3dRenderTargetViewId);
  2064. int ret;
  2065. if (num_rt_view > SVGA3D_DX_MAX_RENDER_TARGETS) {
  2066. VMW_DEBUG_USER("Invalid DX Rendertarget binding.\n");
  2067. return -EINVAL;
  2068. }
  2069. ret = vmw_view_bindings_add(sw_context, vmw_view_ds, vmw_ctx_binding_ds,
  2070. 0, &cmd->body.depthStencilViewId, 1, 0);
  2071. if (ret)
  2072. return ret;
  2073. return vmw_view_bindings_add(sw_context, vmw_view_rt,
  2074. vmw_ctx_binding_dx_rt, 0, (void *)&cmd[1],
  2075. num_rt_view, 0);
  2076. }
  2077. /**
  2078. * vmw_cmd_dx_clear_rendertarget_view - Validate
  2079. * SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW command
  2080. *
  2081. * @dev_priv: Pointer to a device private struct.
  2082. * @sw_context: The software context being used for this batch.
  2083. * @header: Pointer to the command header in the command stream.
  2084. */
  2085. static int vmw_cmd_dx_clear_rendertarget_view(struct vmw_private *dev_priv,
  2086. struct vmw_sw_context *sw_context,
  2087. SVGA3dCmdHeader *header)
  2088. {
  2089. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearRenderTargetView) =
  2090. container_of(header, typeof(*cmd), header);
  2091. struct vmw_resource *ret;
  2092. ret = vmw_view_id_val_add(sw_context, vmw_view_rt,
  2093. cmd->body.renderTargetViewId);
  2094. return PTR_ERR_OR_ZERO(ret);
  2095. }
  2096. /**
  2097. * vmw_cmd_dx_clear_depthstencil_view - Validate
  2098. * SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW command
  2099. *
  2100. * @dev_priv: Pointer to a device private struct.
  2101. * @sw_context: The software context being used for this batch.
  2102. * @header: Pointer to the command header in the command stream.
  2103. */
  2104. static int vmw_cmd_dx_clear_depthstencil_view(struct vmw_private *dev_priv,
  2105. struct vmw_sw_context *sw_context,
  2106. SVGA3dCmdHeader *header)
  2107. {
  2108. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXClearDepthStencilView) =
  2109. container_of(header, typeof(*cmd), header);
  2110. struct vmw_resource *ret;
  2111. ret = vmw_view_id_val_add(sw_context, vmw_view_ds,
  2112. cmd->body.depthStencilViewId);
  2113. return PTR_ERR_OR_ZERO(ret);
  2114. }
  2115. static int vmw_cmd_dx_view_define(struct vmw_private *dev_priv,
  2116. struct vmw_sw_context *sw_context,
  2117. SVGA3dCmdHeader *header)
  2118. {
  2119. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2120. struct vmw_resource *srf;
  2121. struct vmw_resource *res;
  2122. enum vmw_view_type view_type;
  2123. int ret;
  2124. /*
  2125. * This is based on the fact that all affected define commands have the
  2126. * same initial command body layout.
  2127. */
  2128. struct {
  2129. SVGA3dCmdHeader header;
  2130. uint32 defined_id;
  2131. uint32 sid;
  2132. } *cmd;
  2133. if (!ctx_node)
  2134. return -EINVAL;
  2135. view_type = vmw_view_cmd_to_type(header->id);
  2136. if (view_type == vmw_view_max)
  2137. return -EINVAL;
  2138. cmd = container_of(header, typeof(*cmd), header);
  2139. if (unlikely(cmd->sid == SVGA3D_INVALID_ID)) {
  2140. VMW_DEBUG_USER("Invalid surface id.\n");
  2141. return -EINVAL;
  2142. }
  2143. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2144. VMW_RES_DIRTY_NONE, user_surface_converter,
  2145. &cmd->sid, &srf);
  2146. if (unlikely(ret != 0))
  2147. return ret;
  2148. res = vmw_context_cotable(ctx_node->ctx, vmw_view_cotables[view_type]);
  2149. if (IS_ERR_OR_NULL(res))
  2150. return res ? PTR_ERR(res) : -EINVAL;
  2151. ret = vmw_cotable_notify(res, cmd->defined_id);
  2152. if (unlikely(ret != 0))
  2153. return ret;
  2154. return vmw_view_add(sw_context->man, ctx_node->ctx, srf, view_type,
  2155. cmd->defined_id, header,
  2156. header->size + sizeof(*header),
  2157. &sw_context->staged_cmd_res);
  2158. }
  2159. /**
  2160. * vmw_cmd_dx_set_so_targets - Validate SVGA_3D_CMD_DX_SET_SOTARGETS command.
  2161. *
  2162. * @dev_priv: Pointer to a device private struct.
  2163. * @sw_context: The software context being used for this batch.
  2164. * @header: Pointer to the command header in the command stream.
  2165. */
  2166. static int vmw_cmd_dx_set_so_targets(struct vmw_private *dev_priv,
  2167. struct vmw_sw_context *sw_context,
  2168. SVGA3dCmdHeader *header)
  2169. {
  2170. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2171. struct vmw_ctx_bindinfo_so_target binding;
  2172. struct vmw_resource *res;
  2173. struct {
  2174. SVGA3dCmdHeader header;
  2175. SVGA3dCmdDXSetSOTargets body;
  2176. SVGA3dSoTarget targets[];
  2177. } *cmd;
  2178. int i, ret, num;
  2179. if (!ctx_node)
  2180. return -EINVAL;
  2181. cmd = container_of(header, typeof(*cmd), header);
  2182. num = (cmd->header.size - sizeof(cmd->body)) / sizeof(SVGA3dSoTarget);
  2183. if (num > SVGA3D_DX_MAX_SOTARGETS) {
  2184. VMW_DEBUG_USER("Invalid DX SO binding.\n");
  2185. return -EINVAL;
  2186. }
  2187. for (i = 0; i < num; i++) {
  2188. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2189. VMW_RES_DIRTY_SET,
  2190. user_surface_converter,
  2191. &cmd->targets[i].sid, &res);
  2192. if (unlikely(ret != 0))
  2193. return ret;
  2194. binding.bi.ctx = ctx_node->ctx;
  2195. binding.bi.res = res;
  2196. binding.bi.bt = vmw_ctx_binding_so_target;
  2197. binding.offset = cmd->targets[i].offset;
  2198. binding.size = cmd->targets[i].sizeInBytes;
  2199. binding.slot = i;
  2200. vmw_binding_add(ctx_node->staged, &binding.bi, 0, binding.slot);
  2201. }
  2202. return 0;
  2203. }
  2204. static int vmw_cmd_dx_so_define(struct vmw_private *dev_priv,
  2205. struct vmw_sw_context *sw_context,
  2206. SVGA3dCmdHeader *header)
  2207. {
  2208. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2209. struct vmw_resource *res;
  2210. /*
  2211. * This is based on the fact that all affected define commands have
  2212. * the same initial command body layout.
  2213. */
  2214. struct {
  2215. SVGA3dCmdHeader header;
  2216. uint32 defined_id;
  2217. } *cmd;
  2218. enum vmw_so_type so_type;
  2219. int ret;
  2220. if (!ctx_node)
  2221. return -EINVAL;
  2222. so_type = vmw_so_cmd_to_type(header->id);
  2223. res = vmw_context_cotable(ctx_node->ctx, vmw_so_cotables[so_type]);
  2224. if (IS_ERR_OR_NULL(res))
  2225. return res ? PTR_ERR(res) : -EINVAL;
  2226. cmd = container_of(header, typeof(*cmd), header);
  2227. ret = vmw_cotable_notify(res, cmd->defined_id);
  2228. return ret;
  2229. }
  2230. /**
  2231. * vmw_cmd_dx_check_subresource - Validate SVGA_3D_CMD_DX_[X]_SUBRESOURCE
  2232. * command
  2233. *
  2234. * @dev_priv: Pointer to a device private struct.
  2235. * @sw_context: The software context being used for this batch.
  2236. * @header: Pointer to the command header in the command stream.
  2237. */
  2238. static int vmw_cmd_dx_check_subresource(struct vmw_private *dev_priv,
  2239. struct vmw_sw_context *sw_context,
  2240. SVGA3dCmdHeader *header)
  2241. {
  2242. struct {
  2243. SVGA3dCmdHeader header;
  2244. union {
  2245. SVGA3dCmdDXReadbackSubResource r_body;
  2246. SVGA3dCmdDXInvalidateSubResource i_body;
  2247. SVGA3dCmdDXUpdateSubResource u_body;
  2248. SVGA3dSurfaceId sid;
  2249. };
  2250. } *cmd;
  2251. BUILD_BUG_ON(offsetof(typeof(*cmd), r_body.sid) !=
  2252. offsetof(typeof(*cmd), sid));
  2253. BUILD_BUG_ON(offsetof(typeof(*cmd), i_body.sid) !=
  2254. offsetof(typeof(*cmd), sid));
  2255. BUILD_BUG_ON(offsetof(typeof(*cmd), u_body.sid) !=
  2256. offsetof(typeof(*cmd), sid));
  2257. cmd = container_of(header, typeof(*cmd), header);
  2258. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2259. VMW_RES_DIRTY_NONE, user_surface_converter,
  2260. &cmd->sid, NULL);
  2261. }
  2262. static int vmw_cmd_dx_cid_check(struct vmw_private *dev_priv,
  2263. struct vmw_sw_context *sw_context,
  2264. SVGA3dCmdHeader *header)
  2265. {
  2266. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2267. if (!ctx_node)
  2268. return -EINVAL;
  2269. return 0;
  2270. }
  2271. /**
  2272. * vmw_cmd_dx_view_remove - validate a view remove command and schedule the view
  2273. * resource for removal.
  2274. *
  2275. * @dev_priv: Pointer to a device private struct.
  2276. * @sw_context: The software context being used for this batch.
  2277. * @header: Pointer to the command header in the command stream.
  2278. *
  2279. * Check that the view exists, and if it was not created using this command
  2280. * batch, conditionally make this command a NOP.
  2281. */
  2282. static int vmw_cmd_dx_view_remove(struct vmw_private *dev_priv,
  2283. struct vmw_sw_context *sw_context,
  2284. SVGA3dCmdHeader *header)
  2285. {
  2286. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2287. struct {
  2288. SVGA3dCmdHeader header;
  2289. union vmw_view_destroy body;
  2290. } *cmd = container_of(header, typeof(*cmd), header);
  2291. enum vmw_view_type view_type = vmw_view_cmd_to_type(header->id);
  2292. struct vmw_resource *view;
  2293. int ret;
  2294. if (!ctx_node)
  2295. return -EINVAL;
  2296. ret = vmw_view_remove(sw_context->man, cmd->body.view_id, view_type,
  2297. &sw_context->staged_cmd_res, &view);
  2298. if (ret || !view)
  2299. return ret;
  2300. /*
  2301. * If the view wasn't created during this command batch, it might
  2302. * have been removed due to a context swapout, so add a
  2303. * relocation to conditionally make this command a NOP to avoid
  2304. * device errors.
  2305. */
  2306. return vmw_resource_relocation_add(sw_context, view,
  2307. vmw_ptr_diff(sw_context->buf_start,
  2308. &cmd->header.id),
  2309. vmw_res_rel_cond_nop);
  2310. }
  2311. /**
  2312. * vmw_cmd_dx_define_shader - Validate SVGA_3D_CMD_DX_DEFINE_SHADER command
  2313. *
  2314. * @dev_priv: Pointer to a device private struct.
  2315. * @sw_context: The software context being used for this batch.
  2316. * @header: Pointer to the command header in the command stream.
  2317. */
  2318. static int vmw_cmd_dx_define_shader(struct vmw_private *dev_priv,
  2319. struct vmw_sw_context *sw_context,
  2320. SVGA3dCmdHeader *header)
  2321. {
  2322. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2323. struct vmw_resource *res;
  2324. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDefineShader) =
  2325. container_of(header, typeof(*cmd), header);
  2326. int ret;
  2327. if (!ctx_node)
  2328. return -EINVAL;
  2329. res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_DXSHADER);
  2330. if (IS_ERR_OR_NULL(res))
  2331. return res ? PTR_ERR(res) : -EINVAL;
  2332. ret = vmw_cotable_notify(res, cmd->body.shaderId);
  2333. if (ret)
  2334. return ret;
  2335. return vmw_dx_shader_add(sw_context->man, ctx_node->ctx,
  2336. cmd->body.shaderId, cmd->body.type,
  2337. &sw_context->staged_cmd_res);
  2338. }
  2339. /**
  2340. * vmw_cmd_dx_destroy_shader - Validate SVGA_3D_CMD_DX_DESTROY_SHADER command
  2341. *
  2342. * @dev_priv: Pointer to a device private struct.
  2343. * @sw_context: The software context being used for this batch.
  2344. * @header: Pointer to the command header in the command stream.
  2345. */
  2346. static int vmw_cmd_dx_destroy_shader(struct vmw_private *dev_priv,
  2347. struct vmw_sw_context *sw_context,
  2348. SVGA3dCmdHeader *header)
  2349. {
  2350. struct vmw_ctx_validation_info *ctx_node = VMW_GET_CTX_NODE(sw_context);
  2351. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXDestroyShader) =
  2352. container_of(header, typeof(*cmd), header);
  2353. int ret;
  2354. if (!ctx_node)
  2355. return -EINVAL;
  2356. ret = vmw_shader_remove(sw_context->man, cmd->body.shaderId, 0,
  2357. &sw_context->staged_cmd_res);
  2358. return ret;
  2359. }
  2360. /**
  2361. * vmw_cmd_dx_bind_shader - Validate SVGA_3D_CMD_DX_BIND_SHADER command
  2362. *
  2363. * @dev_priv: Pointer to a device private struct.
  2364. * @sw_context: The software context being used for this batch.
  2365. * @header: Pointer to the command header in the command stream.
  2366. */
  2367. static int vmw_cmd_dx_bind_shader(struct vmw_private *dev_priv,
  2368. struct vmw_sw_context *sw_context,
  2369. SVGA3dCmdHeader *header)
  2370. {
  2371. struct vmw_resource *ctx;
  2372. struct vmw_resource *res;
  2373. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXBindShader) =
  2374. container_of(header, typeof(*cmd), header);
  2375. int ret;
  2376. if (cmd->body.cid != SVGA3D_INVALID_ID) {
  2377. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  2378. VMW_RES_DIRTY_SET,
  2379. user_context_converter, &cmd->body.cid,
  2380. &ctx);
  2381. if (ret)
  2382. return ret;
  2383. } else {
  2384. struct vmw_ctx_validation_info *ctx_node =
  2385. VMW_GET_CTX_NODE(sw_context);
  2386. if (!ctx_node)
  2387. return -EINVAL;
  2388. ctx = ctx_node->ctx;
  2389. }
  2390. res = vmw_shader_lookup(vmw_context_res_man(ctx), cmd->body.shid, 0);
  2391. if (IS_ERR(res)) {
  2392. VMW_DEBUG_USER("Could not find shader to bind.\n");
  2393. return PTR_ERR(res);
  2394. }
  2395. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
  2396. vmw_val_add_flag_noctx);
  2397. if (ret) {
  2398. VMW_DEBUG_USER("Error creating resource validation node.\n");
  2399. return ret;
  2400. }
  2401. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
  2402. &cmd->body.mobid,
  2403. cmd->body.offsetInBytes);
  2404. }
  2405. /**
  2406. * vmw_cmd_dx_genmips - Validate SVGA_3D_CMD_DX_GENMIPS command
  2407. *
  2408. * @dev_priv: Pointer to a device private struct.
  2409. * @sw_context: The software context being used for this batch.
  2410. * @header: Pointer to the command header in the command stream.
  2411. */
  2412. static int vmw_cmd_dx_genmips(struct vmw_private *dev_priv,
  2413. struct vmw_sw_context *sw_context,
  2414. SVGA3dCmdHeader *header)
  2415. {
  2416. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXGenMips) =
  2417. container_of(header, typeof(*cmd), header);
  2418. struct vmw_resource *view;
  2419. struct vmw_res_cache_entry *rcache;
  2420. view = vmw_view_id_val_add(sw_context, vmw_view_sr,
  2421. cmd->body.shaderResourceViewId);
  2422. if (IS_ERR(view))
  2423. return PTR_ERR(view);
  2424. /*
  2425. * Normally the shader-resource view is not gpu-dirtying, but for
  2426. * this particular command it is...
  2427. * So mark the last looked-up surface, which is the surface
  2428. * the view points to, gpu-dirty.
  2429. */
  2430. rcache = &sw_context->res_cache[vmw_res_surface];
  2431. vmw_validation_res_set_dirty(sw_context->ctx, rcache->private,
  2432. VMW_RES_DIRTY_SET);
  2433. return 0;
  2434. }
  2435. /**
  2436. * vmw_cmd_dx_transfer_from_buffer - Validate
  2437. * SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER command
  2438. *
  2439. * @dev_priv: Pointer to a device private struct.
  2440. * @sw_context: The software context being used for this batch.
  2441. * @header: Pointer to the command header in the command stream.
  2442. */
  2443. static int vmw_cmd_dx_transfer_from_buffer(struct vmw_private *dev_priv,
  2444. struct vmw_sw_context *sw_context,
  2445. SVGA3dCmdHeader *header)
  2446. {
  2447. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdDXTransferFromBuffer) =
  2448. container_of(header, typeof(*cmd), header);
  2449. int ret;
  2450. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2451. VMW_RES_DIRTY_NONE, user_surface_converter,
  2452. &cmd->body.srcSid, NULL);
  2453. if (ret != 0)
  2454. return ret;
  2455. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2456. VMW_RES_DIRTY_SET, user_surface_converter,
  2457. &cmd->body.destSid, NULL);
  2458. }
  2459. /**
  2460. * vmw_cmd_intra_surface_copy - Validate SVGA_3D_CMD_INTRA_SURFACE_COPY command
  2461. *
  2462. * @dev_priv: Pointer to a device private struct.
  2463. * @sw_context: The software context being used for this batch.
  2464. * @header: Pointer to the command header in the command stream.
  2465. */
  2466. static int vmw_cmd_intra_surface_copy(struct vmw_private *dev_priv,
  2467. struct vmw_sw_context *sw_context,
  2468. SVGA3dCmdHeader *header)
  2469. {
  2470. VMW_DECLARE_CMD_VAR(*cmd, SVGA3dCmdIntraSurfaceCopy) =
  2471. container_of(header, typeof(*cmd), header);
  2472. if (!(dev_priv->capabilities2 & SVGA_CAP2_INTRA_SURFACE_COPY))
  2473. return -EINVAL;
  2474. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2475. VMW_RES_DIRTY_SET, user_surface_converter,
  2476. &cmd->body.surface.sid, NULL);
  2477. }
  2478. static int vmw_cmd_sm5(struct vmw_private *dev_priv,
  2479. struct vmw_sw_context *sw_context,
  2480. SVGA3dCmdHeader *header)
  2481. {
  2482. if (!has_sm5_context(dev_priv))
  2483. return -EINVAL;
  2484. return 0;
  2485. }
  2486. static int vmw_cmd_sm5_view_define(struct vmw_private *dev_priv,
  2487. struct vmw_sw_context *sw_context,
  2488. SVGA3dCmdHeader *header)
  2489. {
  2490. if (!has_sm5_context(dev_priv))
  2491. return -EINVAL;
  2492. return vmw_cmd_dx_view_define(dev_priv, sw_context, header);
  2493. }
  2494. static int vmw_cmd_sm5_view_remove(struct vmw_private *dev_priv,
  2495. struct vmw_sw_context *sw_context,
  2496. SVGA3dCmdHeader *header)
  2497. {
  2498. if (!has_sm5_context(dev_priv))
  2499. return -EINVAL;
  2500. return vmw_cmd_dx_view_remove(dev_priv, sw_context, header);
  2501. }
  2502. static int vmw_cmd_clear_uav_uint(struct vmw_private *dev_priv,
  2503. struct vmw_sw_context *sw_context,
  2504. SVGA3dCmdHeader *header)
  2505. {
  2506. struct {
  2507. SVGA3dCmdHeader header;
  2508. SVGA3dCmdDXClearUAViewUint body;
  2509. } *cmd = container_of(header, typeof(*cmd), header);
  2510. struct vmw_resource *ret;
  2511. if (!has_sm5_context(dev_priv))
  2512. return -EINVAL;
  2513. ret = vmw_view_id_val_add(sw_context, vmw_view_ua,
  2514. cmd->body.uaViewId);
  2515. return PTR_ERR_OR_ZERO(ret);
  2516. }
  2517. static int vmw_cmd_clear_uav_float(struct vmw_private *dev_priv,
  2518. struct vmw_sw_context *sw_context,
  2519. SVGA3dCmdHeader *header)
  2520. {
  2521. struct {
  2522. SVGA3dCmdHeader header;
  2523. SVGA3dCmdDXClearUAViewFloat body;
  2524. } *cmd = container_of(header, typeof(*cmd), header);
  2525. struct vmw_resource *ret;
  2526. if (!has_sm5_context(dev_priv))
  2527. return -EINVAL;
  2528. ret = vmw_view_id_val_add(sw_context, vmw_view_ua,
  2529. cmd->body.uaViewId);
  2530. return PTR_ERR_OR_ZERO(ret);
  2531. }
  2532. static int vmw_cmd_set_uav(struct vmw_private *dev_priv,
  2533. struct vmw_sw_context *sw_context,
  2534. SVGA3dCmdHeader *header)
  2535. {
  2536. struct {
  2537. SVGA3dCmdHeader header;
  2538. SVGA3dCmdDXSetUAViews body;
  2539. } *cmd = container_of(header, typeof(*cmd), header);
  2540. u32 num_uav = (cmd->header.size - sizeof(cmd->body)) /
  2541. sizeof(SVGA3dUAViewId);
  2542. int ret;
  2543. if (!has_sm5_context(dev_priv))
  2544. return -EINVAL;
  2545. if (num_uav > vmw_max_num_uavs(dev_priv)) {
  2546. VMW_DEBUG_USER("Invalid UAV binding.\n");
  2547. return -EINVAL;
  2548. }
  2549. ret = vmw_view_bindings_add(sw_context, vmw_view_ua,
  2550. vmw_ctx_binding_uav, 0, (void *)&cmd[1],
  2551. num_uav, 0);
  2552. if (ret)
  2553. return ret;
  2554. vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 0,
  2555. cmd->body.uavSpliceIndex);
  2556. return ret;
  2557. }
  2558. static int vmw_cmd_set_cs_uav(struct vmw_private *dev_priv,
  2559. struct vmw_sw_context *sw_context,
  2560. SVGA3dCmdHeader *header)
  2561. {
  2562. struct {
  2563. SVGA3dCmdHeader header;
  2564. SVGA3dCmdDXSetCSUAViews body;
  2565. } *cmd = container_of(header, typeof(*cmd), header);
  2566. u32 num_uav = (cmd->header.size - sizeof(cmd->body)) /
  2567. sizeof(SVGA3dUAViewId);
  2568. int ret;
  2569. if (!has_sm5_context(dev_priv))
  2570. return -EINVAL;
  2571. if (num_uav > vmw_max_num_uavs(dev_priv)) {
  2572. VMW_DEBUG_USER("Invalid UAV binding.\n");
  2573. return -EINVAL;
  2574. }
  2575. ret = vmw_view_bindings_add(sw_context, vmw_view_ua,
  2576. vmw_ctx_binding_cs_uav, 0, (void *)&cmd[1],
  2577. num_uav, 0);
  2578. if (ret)
  2579. return ret;
  2580. vmw_binding_add_uav_index(sw_context->dx_ctx_node->staged, 1,
  2581. cmd->body.startIndex);
  2582. return ret;
  2583. }
  2584. static int vmw_cmd_dx_define_streamoutput(struct vmw_private *dev_priv,
  2585. struct vmw_sw_context *sw_context,
  2586. SVGA3dCmdHeader *header)
  2587. {
  2588. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2589. struct vmw_resource *res;
  2590. struct {
  2591. SVGA3dCmdHeader header;
  2592. SVGA3dCmdDXDefineStreamOutputWithMob body;
  2593. } *cmd = container_of(header, typeof(*cmd), header);
  2594. int ret;
  2595. if (!has_sm5_context(dev_priv))
  2596. return -EINVAL;
  2597. if (!ctx_node) {
  2598. DRM_ERROR("DX Context not set.\n");
  2599. return -EINVAL;
  2600. }
  2601. res = vmw_context_cotable(ctx_node->ctx, SVGA_COTABLE_STREAMOUTPUT);
  2602. if (IS_ERR_OR_NULL(res))
  2603. return res ? PTR_ERR(res) : -EINVAL;
  2604. ret = vmw_cotable_notify(res, cmd->body.soid);
  2605. if (ret)
  2606. return ret;
  2607. return vmw_dx_streamoutput_add(sw_context->man, ctx_node->ctx,
  2608. cmd->body.soid,
  2609. &sw_context->staged_cmd_res);
  2610. }
  2611. static int vmw_cmd_dx_destroy_streamoutput(struct vmw_private *dev_priv,
  2612. struct vmw_sw_context *sw_context,
  2613. SVGA3dCmdHeader *header)
  2614. {
  2615. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2616. struct vmw_resource *res;
  2617. struct {
  2618. SVGA3dCmdHeader header;
  2619. SVGA3dCmdDXDestroyStreamOutput body;
  2620. } *cmd = container_of(header, typeof(*cmd), header);
  2621. if (!ctx_node) {
  2622. DRM_ERROR("DX Context not set.\n");
  2623. return -EINVAL;
  2624. }
  2625. /*
  2626. * When device does not support SM5 then streamoutput with mob command is
  2627. * not available to user-space. Simply return in this case.
  2628. */
  2629. if (!has_sm5_context(dev_priv))
  2630. return 0;
  2631. /*
  2632. * With SM5 capable device if lookup fails then user-space probably used
  2633. * old streamoutput define command. Return without an error.
  2634. */
  2635. res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
  2636. cmd->body.soid);
  2637. if (IS_ERR(res))
  2638. return 0;
  2639. return vmw_dx_streamoutput_remove(sw_context->man, cmd->body.soid,
  2640. &sw_context->staged_cmd_res);
  2641. }
  2642. static int vmw_cmd_dx_bind_streamoutput(struct vmw_private *dev_priv,
  2643. struct vmw_sw_context *sw_context,
  2644. SVGA3dCmdHeader *header)
  2645. {
  2646. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2647. struct vmw_resource *res;
  2648. struct {
  2649. SVGA3dCmdHeader header;
  2650. SVGA3dCmdDXBindStreamOutput body;
  2651. } *cmd = container_of(header, typeof(*cmd), header);
  2652. int ret;
  2653. if (!has_sm5_context(dev_priv))
  2654. return -EINVAL;
  2655. if (!ctx_node) {
  2656. DRM_ERROR("DX Context not set.\n");
  2657. return -EINVAL;
  2658. }
  2659. res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
  2660. cmd->body.soid);
  2661. if (IS_ERR(res)) {
  2662. DRM_ERROR("Could not find streamoutput to bind.\n");
  2663. return PTR_ERR(res);
  2664. }
  2665. vmw_dx_streamoutput_set_size(res, cmd->body.sizeInBytes);
  2666. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
  2667. vmw_val_add_flag_noctx);
  2668. if (ret) {
  2669. DRM_ERROR("Error creating resource validation node.\n");
  2670. return ret;
  2671. }
  2672. return vmw_cmd_res_switch_backup(dev_priv, sw_context, res,
  2673. &cmd->body.mobid,
  2674. cmd->body.offsetInBytes);
  2675. }
  2676. static int vmw_cmd_dx_set_streamoutput(struct vmw_private *dev_priv,
  2677. struct vmw_sw_context *sw_context,
  2678. SVGA3dCmdHeader *header)
  2679. {
  2680. struct vmw_ctx_validation_info *ctx_node = sw_context->dx_ctx_node;
  2681. struct vmw_resource *res;
  2682. struct vmw_ctx_bindinfo_so binding;
  2683. struct {
  2684. SVGA3dCmdHeader header;
  2685. SVGA3dCmdDXSetStreamOutput body;
  2686. } *cmd = container_of(header, typeof(*cmd), header);
  2687. int ret;
  2688. if (!ctx_node) {
  2689. DRM_ERROR("DX Context not set.\n");
  2690. return -EINVAL;
  2691. }
  2692. if (cmd->body.soid == SVGA3D_INVALID_ID)
  2693. return 0;
  2694. /*
  2695. * When device does not support SM5 then streamoutput with mob command is
  2696. * not available to user-space. Simply return in this case.
  2697. */
  2698. if (!has_sm5_context(dev_priv))
  2699. return 0;
  2700. /*
  2701. * With SM5 capable device if lookup fails then user-space probably used
  2702. * old streamoutput define command. Return without an error.
  2703. */
  2704. res = vmw_dx_streamoutput_lookup(vmw_context_res_man(ctx_node->ctx),
  2705. cmd->body.soid);
  2706. if (IS_ERR(res)) {
  2707. return 0;
  2708. }
  2709. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_NONE,
  2710. vmw_val_add_flag_noctx);
  2711. if (ret) {
  2712. DRM_ERROR("Error creating resource validation node.\n");
  2713. return ret;
  2714. }
  2715. binding.bi.ctx = ctx_node->ctx;
  2716. binding.bi.res = res;
  2717. binding.bi.bt = vmw_ctx_binding_so;
  2718. binding.slot = 0; /* Only one SO set to context at a time. */
  2719. vmw_binding_add(sw_context->dx_ctx_node->staged, &binding.bi, 0,
  2720. binding.slot);
  2721. return ret;
  2722. }
  2723. static int vmw_cmd_indexed_instanced_indirect(struct vmw_private *dev_priv,
  2724. struct vmw_sw_context *sw_context,
  2725. SVGA3dCmdHeader *header)
  2726. {
  2727. struct vmw_draw_indexed_instanced_indirect_cmd {
  2728. SVGA3dCmdHeader header;
  2729. SVGA3dCmdDXDrawIndexedInstancedIndirect body;
  2730. } *cmd = container_of(header, typeof(*cmd), header);
  2731. if (!has_sm5_context(dev_priv))
  2732. return -EINVAL;
  2733. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2734. VMW_RES_DIRTY_NONE, user_surface_converter,
  2735. &cmd->body.argsBufferSid, NULL);
  2736. }
  2737. static int vmw_cmd_instanced_indirect(struct vmw_private *dev_priv,
  2738. struct vmw_sw_context *sw_context,
  2739. SVGA3dCmdHeader *header)
  2740. {
  2741. struct vmw_draw_instanced_indirect_cmd {
  2742. SVGA3dCmdHeader header;
  2743. SVGA3dCmdDXDrawInstancedIndirect body;
  2744. } *cmd = container_of(header, typeof(*cmd), header);
  2745. if (!has_sm5_context(dev_priv))
  2746. return -EINVAL;
  2747. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2748. VMW_RES_DIRTY_NONE, user_surface_converter,
  2749. &cmd->body.argsBufferSid, NULL);
  2750. }
  2751. static int vmw_cmd_dispatch_indirect(struct vmw_private *dev_priv,
  2752. struct vmw_sw_context *sw_context,
  2753. SVGA3dCmdHeader *header)
  2754. {
  2755. struct vmw_dispatch_indirect_cmd {
  2756. SVGA3dCmdHeader header;
  2757. SVGA3dCmdDXDispatchIndirect body;
  2758. } *cmd = container_of(header, typeof(*cmd), header);
  2759. if (!has_sm5_context(dev_priv))
  2760. return -EINVAL;
  2761. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  2762. VMW_RES_DIRTY_NONE, user_surface_converter,
  2763. &cmd->body.argsBufferSid, NULL);
  2764. }
  2765. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  2766. struct vmw_sw_context *sw_context,
  2767. void *buf, uint32_t *size)
  2768. {
  2769. uint32_t size_remaining = *size;
  2770. uint32_t cmd_id;
  2771. cmd_id = ((uint32_t *)buf)[0];
  2772. switch (cmd_id) {
  2773. case SVGA_CMD_UPDATE:
  2774. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  2775. break;
  2776. case SVGA_CMD_DEFINE_GMRFB:
  2777. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  2778. break;
  2779. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  2780. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2781. break;
  2782. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  2783. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  2784. break;
  2785. default:
  2786. VMW_DEBUG_USER("Unsupported SVGA command: %u.\n", cmd_id);
  2787. return -EINVAL;
  2788. }
  2789. if (*size > size_remaining) {
  2790. VMW_DEBUG_USER("Invalid SVGA command (size mismatch): %u.\n",
  2791. cmd_id);
  2792. return -EINVAL;
  2793. }
  2794. if (unlikely(!sw_context->kernel)) {
  2795. VMW_DEBUG_USER("Kernel only SVGA command: %u.\n", cmd_id);
  2796. return -EPERM;
  2797. }
  2798. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  2799. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  2800. return 0;
  2801. }
  2802. static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  2803. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  2804. false, false, false),
  2805. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  2806. false, false, false),
  2807. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  2808. true, false, false),
  2809. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  2810. true, false, false),
  2811. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  2812. true, false, false),
  2813. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  2814. false, false, false),
  2815. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  2816. false, false, false),
  2817. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  2818. true, false, false),
  2819. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  2820. true, false, false),
  2821. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  2822. true, false, false),
  2823. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  2824. &vmw_cmd_set_render_target_check, true, false, false),
  2825. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  2826. true, false, false),
  2827. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  2828. true, false, false),
  2829. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  2830. true, false, false),
  2831. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  2832. true, false, false),
  2833. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  2834. true, false, false),
  2835. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  2836. true, false, false),
  2837. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  2838. true, false, false),
  2839. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  2840. false, false, false),
  2841. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
  2842. true, false, false),
  2843. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
  2844. true, false, false),
  2845. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  2846. true, false, false),
  2847. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
  2848. true, false, false),
  2849. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  2850. true, false, false),
  2851. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  2852. true, false, false),
  2853. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  2854. true, false, false),
  2855. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  2856. true, false, false),
  2857. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  2858. true, false, false),
  2859. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  2860. true, false, false),
  2861. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  2862. &vmw_cmd_blt_surf_screen_check, false, false, false),
  2863. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  2864. false, false, false),
  2865. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  2866. false, false, false),
  2867. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  2868. false, false, false),
  2869. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  2870. false, false, false),
  2871. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  2872. false, false, false),
  2873. VMW_CMD_DEF(SVGA_3D_CMD_DEAD1, &vmw_cmd_invalid,
  2874. false, false, false),
  2875. VMW_CMD_DEF(SVGA_3D_CMD_DEAD2, &vmw_cmd_invalid,
  2876. false, false, false),
  2877. VMW_CMD_DEF(SVGA_3D_CMD_DEAD12, &vmw_cmd_invalid, false, false, false),
  2878. VMW_CMD_DEF(SVGA_3D_CMD_DEAD13, &vmw_cmd_invalid, false, false, false),
  2879. VMW_CMD_DEF(SVGA_3D_CMD_DEAD14, &vmw_cmd_invalid, false, false, false),
  2880. VMW_CMD_DEF(SVGA_3D_CMD_DEAD15, &vmw_cmd_invalid, false, false, false),
  2881. VMW_CMD_DEF(SVGA_3D_CMD_DEAD16, &vmw_cmd_invalid, false, false, false),
  2882. VMW_CMD_DEF(SVGA_3D_CMD_DEAD17, &vmw_cmd_invalid, false, false, false),
  2883. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  2884. false, false, true),
  2885. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  2886. false, false, true),
  2887. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  2888. false, false, true),
  2889. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  2890. false, false, true),
  2891. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB64, &vmw_cmd_invalid,
  2892. false, false, true),
  2893. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  2894. false, false, true),
  2895. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  2896. false, false, true),
  2897. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  2898. false, false, true),
  2899. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  2900. true, false, true),
  2901. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  2902. false, false, true),
  2903. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  2904. true, false, true),
  2905. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  2906. &vmw_cmd_update_gb_surface, true, false, true),
  2907. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  2908. &vmw_cmd_readback_gb_image, true, false, true),
  2909. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  2910. &vmw_cmd_readback_gb_surface, true, false, true),
  2911. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  2912. &vmw_cmd_invalidate_gb_image, true, false, true),
  2913. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  2914. &vmw_cmd_invalidate_gb_surface, true, false, true),
  2915. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  2916. false, false, true),
  2917. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  2918. false, false, true),
  2919. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  2920. false, false, true),
  2921. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  2922. false, false, true),
  2923. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  2924. false, false, true),
  2925. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  2926. false, false, true),
  2927. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  2928. true, false, true),
  2929. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  2930. false, false, true),
  2931. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  2932. false, false, false),
  2933. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  2934. true, false, true),
  2935. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  2936. true, false, true),
  2937. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  2938. true, false, true),
  2939. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  2940. true, false, true),
  2941. VMW_CMD_DEF(SVGA_3D_CMD_NOP_ERROR, &vmw_cmd_ok,
  2942. true, false, true),
  2943. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  2944. false, false, true),
  2945. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  2946. false, false, true),
  2947. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  2948. false, false, true),
  2949. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  2950. false, false, true),
  2951. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  2952. false, false, true),
  2953. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  2954. false, false, true),
  2955. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  2956. false, false, true),
  2957. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  2958. false, false, true),
  2959. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  2960. false, false, true),
  2961. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  2962. false, false, true),
  2963. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  2964. true, false, true),
  2965. VMW_CMD_DEF(SVGA_3D_CMD_GB_SCREEN_DMA, &vmw_cmd_invalid,
  2966. false, false, true),
  2967. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE_WITH_PITCH, &vmw_cmd_invalid,
  2968. false, false, true),
  2969. VMW_CMD_DEF(SVGA_3D_CMD_GB_MOB_FENCE, &vmw_cmd_invalid,
  2970. false, false, true),
  2971. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V2, &vmw_cmd_invalid,
  2972. false, false, true),
  2973. /* SM commands */
  2974. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_CONTEXT, &vmw_cmd_invalid,
  2975. false, false, true),
  2976. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_CONTEXT, &vmw_cmd_invalid,
  2977. false, false, true),
  2978. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_CONTEXT, &vmw_cmd_invalid,
  2979. false, false, true),
  2980. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_CONTEXT, &vmw_cmd_invalid,
  2981. false, false, true),
  2982. VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_CONTEXT, &vmw_cmd_invalid,
  2983. false, false, true),
  2984. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER,
  2985. &vmw_cmd_dx_set_single_constant_buffer, true, false, true),
  2986. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER_RESOURCES,
  2987. &vmw_cmd_dx_set_shader_res, true, false, true),
  2988. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SHADER, &vmw_cmd_dx_set_shader,
  2989. true, false, true),
  2990. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SAMPLERS, &vmw_cmd_dx_cid_check,
  2991. true, false, true),
  2992. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW, &vmw_cmd_dx_cid_check,
  2993. true, false, true),
  2994. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED, &vmw_cmd_dx_cid_check,
  2995. true, false, true),
  2996. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED, &vmw_cmd_dx_cid_check,
  2997. true, false, true),
  2998. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED,
  2999. &vmw_cmd_dx_cid_check, true, false, true),
  3000. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_AUTO, &vmw_cmd_dx_cid_check,
  3001. true, false, true),
  3002. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS,
  3003. &vmw_cmd_dx_set_vertex_buffers, true, false, true),
  3004. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INDEX_BUFFER,
  3005. &vmw_cmd_dx_set_index_buffer, true, false, true),
  3006. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RENDERTARGETS,
  3007. &vmw_cmd_dx_set_rendertargets, true, false, true),
  3008. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_BLEND_STATE, &vmw_cmd_dx_cid_check,
  3009. true, false, true),
  3010. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DEPTHSTENCIL_STATE,
  3011. &vmw_cmd_dx_cid_check, true, false, true),
  3012. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_RASTERIZER_STATE,
  3013. &vmw_cmd_dx_cid_check, true, false, true),
  3014. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_QUERY, &vmw_cmd_dx_define_query,
  3015. true, false, true),
  3016. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_QUERY, &vmw_cmd_dx_cid_check,
  3017. true, false, true),
  3018. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_QUERY, &vmw_cmd_dx_bind_query,
  3019. true, false, true),
  3020. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_QUERY_OFFSET,
  3021. &vmw_cmd_dx_cid_check, true, false, true),
  3022. VMW_CMD_DEF(SVGA_3D_CMD_DX_BEGIN_QUERY, &vmw_cmd_dx_cid_check,
  3023. true, false, true),
  3024. VMW_CMD_DEF(SVGA_3D_CMD_DX_END_QUERY, &vmw_cmd_dx_cid_check,
  3025. true, false, true),
  3026. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_QUERY, &vmw_cmd_invalid,
  3027. true, false, true),
  3028. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PREDICATION, &vmw_cmd_dx_cid_check,
  3029. true, false, true),
  3030. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VIEWPORTS, &vmw_cmd_dx_cid_check,
  3031. true, false, true),
  3032. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SCISSORRECTS, &vmw_cmd_dx_cid_check,
  3033. true, false, true),
  3034. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_RENDERTARGET_VIEW,
  3035. &vmw_cmd_dx_clear_rendertarget_view, true, false, true),
  3036. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_DEPTHSTENCIL_VIEW,
  3037. &vmw_cmd_dx_clear_depthstencil_view, true, false, true),
  3038. VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY, &vmw_cmd_invalid,
  3039. true, false, true),
  3040. VMW_CMD_DEF(SVGA_3D_CMD_DX_GENMIPS, &vmw_cmd_dx_genmips,
  3041. true, false, true),
  3042. VMW_CMD_DEF(SVGA_3D_CMD_DX_UPDATE_SUBRESOURCE,
  3043. &vmw_cmd_dx_check_subresource, true, false, true),
  3044. VMW_CMD_DEF(SVGA_3D_CMD_DX_READBACK_SUBRESOURCE,
  3045. &vmw_cmd_dx_check_subresource, true, false, true),
  3046. VMW_CMD_DEF(SVGA_3D_CMD_DX_INVALIDATE_SUBRESOURCE,
  3047. &vmw_cmd_dx_check_subresource, true, false, true),
  3048. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADERRESOURCE_VIEW,
  3049. &vmw_cmd_dx_view_define, true, false, true),
  3050. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADERRESOURCE_VIEW,
  3051. &vmw_cmd_dx_view_remove, true, false, true),
  3052. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RENDERTARGET_VIEW,
  3053. &vmw_cmd_dx_view_define, true, false, true),
  3054. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RENDERTARGET_VIEW,
  3055. &vmw_cmd_dx_view_remove, true, false, true),
  3056. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW,
  3057. &vmw_cmd_dx_view_define, true, false, true),
  3058. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_VIEW,
  3059. &vmw_cmd_dx_view_remove, true, false, true),
  3060. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_ELEMENTLAYOUT,
  3061. &vmw_cmd_dx_so_define, true, false, true),
  3062. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_ELEMENTLAYOUT,
  3063. &vmw_cmd_dx_cid_check, true, false, true),
  3064. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_BLEND_STATE,
  3065. &vmw_cmd_dx_so_define, true, false, true),
  3066. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_BLEND_STATE,
  3067. &vmw_cmd_dx_cid_check, true, false, true),
  3068. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_STATE,
  3069. &vmw_cmd_dx_so_define, true, false, true),
  3070. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_DEPTHSTENCIL_STATE,
  3071. &vmw_cmd_dx_cid_check, true, false, true),
  3072. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE,
  3073. &vmw_cmd_dx_so_define, true, false, true),
  3074. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_RASTERIZER_STATE,
  3075. &vmw_cmd_dx_cid_check, true, false, true),
  3076. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SAMPLER_STATE,
  3077. &vmw_cmd_dx_so_define, true, false, true),
  3078. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SAMPLER_STATE,
  3079. &vmw_cmd_dx_cid_check, true, false, true),
  3080. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_SHADER,
  3081. &vmw_cmd_dx_define_shader, true, false, true),
  3082. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_SHADER,
  3083. &vmw_cmd_dx_destroy_shader, true, false, true),
  3084. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_SHADER,
  3085. &vmw_cmd_dx_bind_shader, true, false, true),
  3086. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT,
  3087. &vmw_cmd_dx_so_define, true, false, true),
  3088. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_STREAMOUTPUT,
  3089. &vmw_cmd_dx_destroy_streamoutput, true, false, true),
  3090. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_STREAMOUTPUT,
  3091. &vmw_cmd_dx_set_streamoutput, true, false, true),
  3092. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_SOTARGETS,
  3093. &vmw_cmd_dx_set_so_targets, true, false, true),
  3094. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_INPUT_LAYOUT,
  3095. &vmw_cmd_dx_cid_check, true, false, true),
  3096. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_TOPOLOGY,
  3097. &vmw_cmd_dx_cid_check, true, false, true),
  3098. VMW_CMD_DEF(SVGA_3D_CMD_DX_BUFFER_COPY,
  3099. &vmw_cmd_buffer_copy_check, true, false, true),
  3100. VMW_CMD_DEF(SVGA_3D_CMD_DX_PRED_COPY_REGION,
  3101. &vmw_cmd_pred_copy_check, true, false, true),
  3102. VMW_CMD_DEF(SVGA_3D_CMD_DX_TRANSFER_FROM_BUFFER,
  3103. &vmw_cmd_dx_transfer_from_buffer,
  3104. true, false, true),
  3105. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_VS_CONSTANT_BUFFER_OFFSET,
  3106. &vmw_cmd_dx_set_constant_buffer_offset,
  3107. true, false, true),
  3108. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_PS_CONSTANT_BUFFER_OFFSET,
  3109. &vmw_cmd_dx_set_constant_buffer_offset,
  3110. true, false, true),
  3111. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_GS_CONSTANT_BUFFER_OFFSET,
  3112. &vmw_cmd_dx_set_constant_buffer_offset,
  3113. true, false, true),
  3114. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_HS_CONSTANT_BUFFER_OFFSET,
  3115. &vmw_cmd_dx_set_constant_buffer_offset,
  3116. true, false, true),
  3117. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_DS_CONSTANT_BUFFER_OFFSET,
  3118. &vmw_cmd_dx_set_constant_buffer_offset,
  3119. true, false, true),
  3120. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_CONSTANT_BUFFER_OFFSET,
  3121. &vmw_cmd_dx_set_constant_buffer_offset,
  3122. true, false, true),
  3123. VMW_CMD_DEF(SVGA_3D_CMD_INTRA_SURFACE_COPY, &vmw_cmd_intra_surface_copy,
  3124. true, false, true),
  3125. /*
  3126. * SM5 commands
  3127. */
  3128. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_UA_VIEW, &vmw_cmd_sm5_view_define,
  3129. true, false, true),
  3130. VMW_CMD_DEF(SVGA_3D_CMD_DX_DESTROY_UA_VIEW, &vmw_cmd_sm5_view_remove,
  3131. true, false, true),
  3132. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_UINT, &vmw_cmd_clear_uav_uint,
  3133. true, false, true),
  3134. VMW_CMD_DEF(SVGA_3D_CMD_DX_CLEAR_UA_VIEW_FLOAT,
  3135. &vmw_cmd_clear_uav_float, true, false, true),
  3136. VMW_CMD_DEF(SVGA_3D_CMD_DX_COPY_STRUCTURE_COUNT, &vmw_cmd_invalid, true,
  3137. false, true),
  3138. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_UA_VIEWS, &vmw_cmd_set_uav, true, false,
  3139. true),
  3140. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INDEXED_INSTANCED_INDIRECT,
  3141. &vmw_cmd_indexed_instanced_indirect, true, false, true),
  3142. VMW_CMD_DEF(SVGA_3D_CMD_DX_DRAW_INSTANCED_INDIRECT,
  3143. &vmw_cmd_instanced_indirect, true, false, true),
  3144. VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH, &vmw_cmd_sm5, true, false, true),
  3145. VMW_CMD_DEF(SVGA_3D_CMD_DX_DISPATCH_INDIRECT,
  3146. &vmw_cmd_dispatch_indirect, true, false, true),
  3147. VMW_CMD_DEF(SVGA_3D_CMD_DX_SET_CS_UA_VIEWS, &vmw_cmd_set_cs_uav, true,
  3148. false, true),
  3149. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_DEPTHSTENCIL_VIEW_V2,
  3150. &vmw_cmd_sm5_view_define, true, false, true),
  3151. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_STREAMOUTPUT_WITH_MOB,
  3152. &vmw_cmd_dx_define_streamoutput, true, false, true),
  3153. VMW_CMD_DEF(SVGA_3D_CMD_DX_BIND_STREAMOUTPUT,
  3154. &vmw_cmd_dx_bind_streamoutput, true, false, true),
  3155. VMW_CMD_DEF(SVGA_3D_CMD_DX_DEFINE_RASTERIZER_STATE_V2,
  3156. &vmw_cmd_dx_so_define, true, false, true),
  3157. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE_V4,
  3158. &vmw_cmd_invalid, false, false, true),
  3159. };
  3160. bool vmw_cmd_describe(const void *buf, u32 *size, char const **cmd)
  3161. {
  3162. u32 cmd_id = ((u32 *) buf)[0];
  3163. if (cmd_id >= SVGA_CMD_MAX) {
  3164. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  3165. const struct vmw_cmd_entry *entry;
  3166. *size = header->size + sizeof(SVGA3dCmdHeader);
  3167. cmd_id = header->id;
  3168. if (cmd_id >= SVGA_3D_CMD_MAX)
  3169. return false;
  3170. cmd_id -= SVGA_3D_CMD_BASE;
  3171. entry = &vmw_cmd_entries[cmd_id];
  3172. *cmd = entry->cmd_name;
  3173. return true;
  3174. }
  3175. switch (cmd_id) {
  3176. case SVGA_CMD_UPDATE:
  3177. *cmd = "SVGA_CMD_UPDATE";
  3178. *size = sizeof(u32) + sizeof(SVGAFifoCmdUpdate);
  3179. break;
  3180. case SVGA_CMD_DEFINE_GMRFB:
  3181. *cmd = "SVGA_CMD_DEFINE_GMRFB";
  3182. *size = sizeof(u32) + sizeof(SVGAFifoCmdDefineGMRFB);
  3183. break;
  3184. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  3185. *cmd = "SVGA_CMD_BLIT_GMRFB_TO_SCREEN";
  3186. *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  3187. break;
  3188. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  3189. *cmd = "SVGA_CMD_BLIT_SCREEN_TO_GMRFB";
  3190. *size = sizeof(u32) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  3191. break;
  3192. default:
  3193. *cmd = "UNKNOWN";
  3194. *size = 0;
  3195. return false;
  3196. }
  3197. return true;
  3198. }
  3199. static int vmw_cmd_check(struct vmw_private *dev_priv,
  3200. struct vmw_sw_context *sw_context, void *buf,
  3201. uint32_t *size)
  3202. {
  3203. uint32_t cmd_id;
  3204. uint32_t size_remaining = *size;
  3205. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  3206. int ret;
  3207. const struct vmw_cmd_entry *entry;
  3208. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  3209. cmd_id = ((uint32_t *)buf)[0];
  3210. /* Handle any none 3D commands */
  3211. if (unlikely(cmd_id < SVGA_CMD_MAX))
  3212. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  3213. cmd_id = header->id;
  3214. if (header->size > SVGA_CMD_MAX_DATASIZE) {
  3215. VMW_DEBUG_USER("SVGA3D command: %d is too big.\n",
  3216. cmd_id + SVGA_3D_CMD_BASE);
  3217. return -E2BIG;
  3218. }
  3219. *size = header->size + sizeof(SVGA3dCmdHeader);
  3220. cmd_id -= SVGA_3D_CMD_BASE;
  3221. if (unlikely(*size > size_remaining))
  3222. goto out_invalid;
  3223. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  3224. goto out_invalid;
  3225. entry = &vmw_cmd_entries[cmd_id];
  3226. if (unlikely(!entry->func))
  3227. goto out_invalid;
  3228. if (unlikely(!entry->user_allow && !sw_context->kernel))
  3229. goto out_privileged;
  3230. if (unlikely(entry->gb_disable && gb))
  3231. goto out_old;
  3232. if (unlikely(entry->gb_enable && !gb))
  3233. goto out_new;
  3234. ret = entry->func(dev_priv, sw_context, header);
  3235. if (unlikely(ret != 0)) {
  3236. VMW_DEBUG_USER("SVGA3D command: %d failed with error %d\n",
  3237. cmd_id + SVGA_3D_CMD_BASE, ret);
  3238. return ret;
  3239. }
  3240. return 0;
  3241. out_invalid:
  3242. VMW_DEBUG_USER("Invalid SVGA3D command: %d\n",
  3243. cmd_id + SVGA_3D_CMD_BASE);
  3244. return -EINVAL;
  3245. out_privileged:
  3246. VMW_DEBUG_USER("Privileged SVGA3D command: %d\n",
  3247. cmd_id + SVGA_3D_CMD_BASE);
  3248. return -EPERM;
  3249. out_old:
  3250. VMW_DEBUG_USER("Deprecated (disallowed) SVGA3D command: %d\n",
  3251. cmd_id + SVGA_3D_CMD_BASE);
  3252. return -EINVAL;
  3253. out_new:
  3254. VMW_DEBUG_USER("SVGA3D command: %d not supported by virtual device.\n",
  3255. cmd_id + SVGA_3D_CMD_BASE);
  3256. return -EINVAL;
  3257. }
  3258. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  3259. struct vmw_sw_context *sw_context, void *buf,
  3260. uint32_t size)
  3261. {
  3262. int32_t cur_size = size;
  3263. int ret;
  3264. sw_context->buf_start = buf;
  3265. while (cur_size > 0) {
  3266. size = cur_size;
  3267. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  3268. if (unlikely(ret != 0))
  3269. return ret;
  3270. buf = (void *)((unsigned long) buf + size);
  3271. cur_size -= size;
  3272. }
  3273. if (unlikely(cur_size != 0)) {
  3274. VMW_DEBUG_USER("Command verifier out of sync.\n");
  3275. return -EINVAL;
  3276. }
  3277. return 0;
  3278. }
  3279. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  3280. {
  3281. /* Memory is validation context memory, so no need to free it */
  3282. INIT_LIST_HEAD(&sw_context->bo_relocations);
  3283. }
  3284. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  3285. {
  3286. struct vmw_relocation *reloc;
  3287. struct ttm_buffer_object *bo;
  3288. list_for_each_entry(reloc, &sw_context->bo_relocations, head) {
  3289. bo = &reloc->vbo->tbo;
  3290. switch (bo->resource->mem_type) {
  3291. case TTM_PL_VRAM:
  3292. reloc->location->offset += bo->resource->start << PAGE_SHIFT;
  3293. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  3294. break;
  3295. case VMW_PL_GMR:
  3296. reloc->location->gmrId = bo->resource->start;
  3297. break;
  3298. case VMW_PL_MOB:
  3299. *reloc->mob_loc = bo->resource->start;
  3300. break;
  3301. default:
  3302. BUG();
  3303. }
  3304. }
  3305. vmw_free_relocations(sw_context);
  3306. }
  3307. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  3308. uint32_t size)
  3309. {
  3310. if (likely(sw_context->cmd_bounce_size >= size))
  3311. return 0;
  3312. if (sw_context->cmd_bounce_size == 0)
  3313. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  3314. while (sw_context->cmd_bounce_size < size) {
  3315. sw_context->cmd_bounce_size =
  3316. PAGE_ALIGN(sw_context->cmd_bounce_size +
  3317. (sw_context->cmd_bounce_size >> 1));
  3318. }
  3319. vfree(sw_context->cmd_bounce);
  3320. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  3321. if (sw_context->cmd_bounce == NULL) {
  3322. VMW_DEBUG_USER("Failed to allocate command bounce buffer.\n");
  3323. sw_context->cmd_bounce_size = 0;
  3324. return -ENOMEM;
  3325. }
  3326. return 0;
  3327. }
  3328. /*
  3329. * vmw_execbuf_fence_commands - create and submit a command stream fence
  3330. *
  3331. * Creates a fence object and submits a command stream marker.
  3332. * If this fails for some reason, We sync the fifo and return NULL.
  3333. * It is then safe to fence buffers with a NULL pointer.
  3334. *
  3335. * If @p_handle is not NULL @file_priv must also not be NULL. Creates a
  3336. * userspace handle if @p_handle is not NULL, otherwise not.
  3337. */
  3338. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  3339. struct vmw_private *dev_priv,
  3340. struct vmw_fence_obj **p_fence,
  3341. uint32_t *p_handle)
  3342. {
  3343. uint32_t sequence;
  3344. int ret;
  3345. bool synced = false;
  3346. /* p_handle implies file_priv. */
  3347. BUG_ON(p_handle != NULL && file_priv == NULL);
  3348. ret = vmw_cmd_send_fence(dev_priv, &sequence);
  3349. if (unlikely(ret != 0)) {
  3350. VMW_DEBUG_USER("Fence submission error. Syncing.\n");
  3351. synced = true;
  3352. }
  3353. if (p_handle != NULL)
  3354. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  3355. sequence, p_fence, p_handle);
  3356. else
  3357. ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
  3358. if (unlikely(ret != 0 && !synced)) {
  3359. (void) vmw_fallback_wait(dev_priv, false, false, sequence,
  3360. false, VMW_FENCE_WAIT_TIMEOUT);
  3361. *p_fence = NULL;
  3362. }
  3363. return ret;
  3364. }
  3365. /**
  3366. * vmw_execbuf_copy_fence_user - copy fence object information to user-space.
  3367. *
  3368. * @dev_priv: Pointer to a vmw_private struct.
  3369. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  3370. * @ret: Return value from fence object creation.
  3371. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to which
  3372. * the information should be copied.
  3373. * @fence: Pointer to the fenc object.
  3374. * @fence_handle: User-space fence handle.
  3375. * @out_fence_fd: exported file descriptor for the fence. -1 if not used
  3376. *
  3377. * This function copies fence information to user-space. If copying fails, the
  3378. * user-space struct drm_vmw_fence_rep::error member is hopefully left
  3379. * untouched, and if it's preloaded with an -EFAULT by user-space, the error
  3380. * will hopefully be detected.
  3381. *
  3382. * Also if copying fails, user-space will be unable to signal the fence object
  3383. * so we wait for it immediately, and then unreference the user-space reference.
  3384. */
  3385. int
  3386. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  3387. struct vmw_fpriv *vmw_fp, int ret,
  3388. struct drm_vmw_fence_rep __user *user_fence_rep,
  3389. struct vmw_fence_obj *fence, uint32_t fence_handle,
  3390. int32_t out_fence_fd)
  3391. {
  3392. struct drm_vmw_fence_rep fence_rep;
  3393. if (user_fence_rep == NULL)
  3394. return 0;
  3395. memset(&fence_rep, 0, sizeof(fence_rep));
  3396. fence_rep.error = ret;
  3397. fence_rep.fd = out_fence_fd;
  3398. if (ret == 0) {
  3399. BUG_ON(fence == NULL);
  3400. fence_rep.handle = fence_handle;
  3401. fence_rep.seqno = fence->base.seqno;
  3402. fence_rep.passed_seqno = vmw_fences_update(dev_priv->fman);
  3403. }
  3404. /*
  3405. * copy_to_user errors will be detected by user space not seeing
  3406. * fence_rep::error filled in. Typically user-space would have pre-set
  3407. * that member to -EFAULT.
  3408. */
  3409. ret = copy_to_user(user_fence_rep, &fence_rep,
  3410. sizeof(fence_rep));
  3411. /*
  3412. * User-space lost the fence object. We need to sync and unreference the
  3413. * handle.
  3414. */
  3415. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  3416. ttm_ref_object_base_unref(vmw_fp->tfile, fence_handle);
  3417. VMW_DEBUG_USER("Fence copy error. Syncing.\n");
  3418. (void) vmw_fence_obj_wait(fence, false, false,
  3419. VMW_FENCE_WAIT_TIMEOUT);
  3420. }
  3421. return ret ? -EFAULT : 0;
  3422. }
  3423. /**
  3424. * vmw_execbuf_submit_fifo - Patch a command batch and submit it using the fifo.
  3425. *
  3426. * @dev_priv: Pointer to a device private structure.
  3427. * @kernel_commands: Pointer to the unpatched command batch.
  3428. * @command_size: Size of the unpatched command batch.
  3429. * @sw_context: Structure holding the relocation lists.
  3430. *
  3431. * Side effects: If this function returns 0, then the command batch pointed to
  3432. * by @kernel_commands will have been modified.
  3433. */
  3434. static int vmw_execbuf_submit_fifo(struct vmw_private *dev_priv,
  3435. void *kernel_commands, u32 command_size,
  3436. struct vmw_sw_context *sw_context)
  3437. {
  3438. void *cmd;
  3439. if (sw_context->dx_ctx_node)
  3440. cmd = VMW_CMD_CTX_RESERVE(dev_priv, command_size,
  3441. sw_context->dx_ctx_node->ctx->id);
  3442. else
  3443. cmd = VMW_CMD_RESERVE(dev_priv, command_size);
  3444. if (!cmd)
  3445. return -ENOMEM;
  3446. vmw_apply_relocations(sw_context);
  3447. memcpy(cmd, kernel_commands, command_size);
  3448. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  3449. vmw_resource_relocations_free(&sw_context->res_relocations);
  3450. vmw_cmd_commit(dev_priv, command_size);
  3451. return 0;
  3452. }
  3453. /**
  3454. * vmw_execbuf_submit_cmdbuf - Patch a command batch and submit it using the
  3455. * command buffer manager.
  3456. *
  3457. * @dev_priv: Pointer to a device private structure.
  3458. * @header: Opaque handle to the command buffer allocation.
  3459. * @command_size: Size of the unpatched command batch.
  3460. * @sw_context: Structure holding the relocation lists.
  3461. *
  3462. * Side effects: If this function returns 0, then the command buffer represented
  3463. * by @header will have been modified.
  3464. */
  3465. static int vmw_execbuf_submit_cmdbuf(struct vmw_private *dev_priv,
  3466. struct vmw_cmdbuf_header *header,
  3467. u32 command_size,
  3468. struct vmw_sw_context *sw_context)
  3469. {
  3470. u32 id = ((sw_context->dx_ctx_node) ? sw_context->dx_ctx_node->ctx->id :
  3471. SVGA3D_INVALID_ID);
  3472. void *cmd = vmw_cmdbuf_reserve(dev_priv->cman, command_size, id, false,
  3473. header);
  3474. vmw_apply_relocations(sw_context);
  3475. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  3476. vmw_resource_relocations_free(&sw_context->res_relocations);
  3477. vmw_cmdbuf_commit(dev_priv->cman, command_size, header, false);
  3478. return 0;
  3479. }
  3480. /**
  3481. * vmw_execbuf_cmdbuf - Prepare, if possible, a user-space command batch for
  3482. * submission using a command buffer.
  3483. *
  3484. * @dev_priv: Pointer to a device private structure.
  3485. * @user_commands: User-space pointer to the commands to be submitted.
  3486. * @command_size: Size of the unpatched command batch.
  3487. * @header: Out parameter returning the opaque pointer to the command buffer.
  3488. *
  3489. * This function checks whether we can use the command buffer manager for
  3490. * submission and if so, creates a command buffer of suitable size and copies
  3491. * the user data into that buffer.
  3492. *
  3493. * On successful return, the function returns a pointer to the data in the
  3494. * command buffer and *@header is set to non-NULL.
  3495. *
  3496. * @kernel_commands: If command buffers could not be used, the function will
  3497. * return the value of @kernel_commands on function call. That value may be
  3498. * NULL. In that case, the value of *@header will be set to NULL.
  3499. *
  3500. * If an error is encountered, the function will return a pointer error value.
  3501. * If the function is interrupted by a signal while sleeping, it will return
  3502. * -ERESTARTSYS casted to a pointer error value.
  3503. */
  3504. static void *vmw_execbuf_cmdbuf(struct vmw_private *dev_priv,
  3505. void __user *user_commands,
  3506. void *kernel_commands, u32 command_size,
  3507. struct vmw_cmdbuf_header **header)
  3508. {
  3509. size_t cmdbuf_size;
  3510. int ret;
  3511. *header = NULL;
  3512. if (command_size > SVGA_CB_MAX_SIZE) {
  3513. VMW_DEBUG_USER("Command buffer is too large.\n");
  3514. return ERR_PTR(-EINVAL);
  3515. }
  3516. if (!dev_priv->cman || kernel_commands)
  3517. return kernel_commands;
  3518. /* If possible, add a little space for fencing. */
  3519. cmdbuf_size = command_size + 512;
  3520. cmdbuf_size = min_t(size_t, cmdbuf_size, SVGA_CB_MAX_SIZE);
  3521. kernel_commands = vmw_cmdbuf_alloc(dev_priv->cman, cmdbuf_size, true,
  3522. header);
  3523. if (IS_ERR(kernel_commands))
  3524. return kernel_commands;
  3525. ret = copy_from_user(kernel_commands, user_commands, command_size);
  3526. if (ret) {
  3527. VMW_DEBUG_USER("Failed copying commands.\n");
  3528. vmw_cmdbuf_header_free(*header);
  3529. *header = NULL;
  3530. return ERR_PTR(-EFAULT);
  3531. }
  3532. return kernel_commands;
  3533. }
  3534. static int vmw_execbuf_tie_context(struct vmw_private *dev_priv,
  3535. struct vmw_sw_context *sw_context,
  3536. uint32_t handle)
  3537. {
  3538. struct vmw_resource *res;
  3539. int ret;
  3540. unsigned int size;
  3541. if (handle == SVGA3D_INVALID_ID)
  3542. return 0;
  3543. size = vmw_execbuf_res_size(dev_priv, vmw_res_dx_context);
  3544. ret = vmw_validation_preload_res(sw_context->ctx, size);
  3545. if (ret)
  3546. return ret;
  3547. ret = vmw_user_resource_lookup_handle
  3548. (dev_priv, sw_context->fp->tfile, handle,
  3549. user_context_converter, &res);
  3550. if (ret != 0) {
  3551. VMW_DEBUG_USER("Could not find or user DX context 0x%08x.\n",
  3552. (unsigned int) handle);
  3553. return ret;
  3554. }
  3555. ret = vmw_execbuf_res_val_add(sw_context, res, VMW_RES_DIRTY_SET,
  3556. vmw_val_add_flag_none);
  3557. if (unlikely(ret != 0)) {
  3558. vmw_resource_unreference(&res);
  3559. return ret;
  3560. }
  3561. sw_context->dx_ctx_node = vmw_execbuf_info_from_res(sw_context, res);
  3562. sw_context->man = vmw_context_res_man(res);
  3563. vmw_resource_unreference(&res);
  3564. return 0;
  3565. }
  3566. int vmw_execbuf_process(struct drm_file *file_priv,
  3567. struct vmw_private *dev_priv,
  3568. void __user *user_commands, void *kernel_commands,
  3569. uint32_t command_size, uint64_t throttle_us,
  3570. uint32_t dx_context_handle,
  3571. struct drm_vmw_fence_rep __user *user_fence_rep,
  3572. struct vmw_fence_obj **out_fence, uint32_t flags)
  3573. {
  3574. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  3575. struct vmw_fence_obj *fence = NULL;
  3576. struct vmw_cmdbuf_header *header;
  3577. uint32_t handle = 0;
  3578. int ret;
  3579. int32_t out_fence_fd = -1;
  3580. struct sync_file *sync_file = NULL;
  3581. DECLARE_VAL_CONTEXT(val_ctx, sw_context, 1);
  3582. if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
  3583. out_fence_fd = get_unused_fd_flags(O_CLOEXEC);
  3584. if (out_fence_fd < 0) {
  3585. VMW_DEBUG_USER("Failed to get a fence fd.\n");
  3586. return out_fence_fd;
  3587. }
  3588. }
  3589. if (throttle_us) {
  3590. VMW_DEBUG_USER("Throttling is no longer supported.\n");
  3591. }
  3592. kernel_commands = vmw_execbuf_cmdbuf(dev_priv, user_commands,
  3593. kernel_commands, command_size,
  3594. &header);
  3595. if (IS_ERR(kernel_commands)) {
  3596. ret = PTR_ERR(kernel_commands);
  3597. goto out_free_fence_fd;
  3598. }
  3599. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  3600. if (ret) {
  3601. ret = -ERESTARTSYS;
  3602. goto out_free_header;
  3603. }
  3604. sw_context->kernel = false;
  3605. if (kernel_commands == NULL) {
  3606. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  3607. if (unlikely(ret != 0))
  3608. goto out_unlock;
  3609. ret = copy_from_user(sw_context->cmd_bounce, user_commands,
  3610. command_size);
  3611. if (unlikely(ret != 0)) {
  3612. ret = -EFAULT;
  3613. VMW_DEBUG_USER("Failed copying commands.\n");
  3614. goto out_unlock;
  3615. }
  3616. kernel_commands = sw_context->cmd_bounce;
  3617. } else if (!header) {
  3618. sw_context->kernel = true;
  3619. }
  3620. sw_context->filp = file_priv;
  3621. sw_context->fp = vmw_fpriv(file_priv);
  3622. INIT_LIST_HEAD(&sw_context->ctx_list);
  3623. sw_context->cur_query_bo = dev_priv->pinned_bo;
  3624. sw_context->last_query_ctx = NULL;
  3625. sw_context->needs_post_query_barrier = false;
  3626. sw_context->dx_ctx_node = NULL;
  3627. sw_context->dx_query_mob = NULL;
  3628. sw_context->dx_query_ctx = NULL;
  3629. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  3630. INIT_LIST_HEAD(&sw_context->res_relocations);
  3631. INIT_LIST_HEAD(&sw_context->bo_relocations);
  3632. if (sw_context->staged_bindings)
  3633. vmw_binding_state_reset(sw_context->staged_bindings);
  3634. INIT_LIST_HEAD(&sw_context->staged_cmd_res);
  3635. sw_context->ctx = &val_ctx;
  3636. ret = vmw_execbuf_tie_context(dev_priv, sw_context, dx_context_handle);
  3637. if (unlikely(ret != 0))
  3638. goto out_err_nores;
  3639. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  3640. command_size);
  3641. if (unlikely(ret != 0))
  3642. goto out_err_nores;
  3643. ret = vmw_resources_reserve(sw_context);
  3644. if (unlikely(ret != 0))
  3645. goto out_err_nores;
  3646. ret = vmw_validation_bo_reserve(&val_ctx, true);
  3647. if (unlikely(ret != 0))
  3648. goto out_err_nores;
  3649. ret = vmw_validation_bo_validate(&val_ctx, true);
  3650. if (unlikely(ret != 0))
  3651. goto out_err;
  3652. ret = vmw_validation_res_validate(&val_ctx, true);
  3653. if (unlikely(ret != 0))
  3654. goto out_err;
  3655. vmw_validation_drop_ht(&val_ctx);
  3656. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  3657. if (unlikely(ret != 0)) {
  3658. ret = -ERESTARTSYS;
  3659. goto out_err;
  3660. }
  3661. if (dev_priv->has_mob) {
  3662. ret = vmw_rebind_contexts(sw_context);
  3663. if (unlikely(ret != 0))
  3664. goto out_unlock_binding;
  3665. }
  3666. if (!header) {
  3667. ret = vmw_execbuf_submit_fifo(dev_priv, kernel_commands,
  3668. command_size, sw_context);
  3669. } else {
  3670. ret = vmw_execbuf_submit_cmdbuf(dev_priv, header, command_size,
  3671. sw_context);
  3672. header = NULL;
  3673. }
  3674. mutex_unlock(&dev_priv->binding_mutex);
  3675. if (ret)
  3676. goto out_err;
  3677. vmw_query_bo_switch_commit(dev_priv, sw_context);
  3678. ret = vmw_execbuf_fence_commands(file_priv, dev_priv, &fence,
  3679. (user_fence_rep) ? &handle : NULL);
  3680. /*
  3681. * This error is harmless, because if fence submission fails,
  3682. * vmw_fifo_send_fence will sync. The error will be propagated to
  3683. * user-space in @fence_rep
  3684. */
  3685. if (ret != 0)
  3686. VMW_DEBUG_USER("Fence submission error. Syncing.\n");
  3687. vmw_execbuf_bindings_commit(sw_context, false);
  3688. vmw_bind_dx_query_mob(sw_context);
  3689. vmw_validation_res_unreserve(&val_ctx, false);
  3690. vmw_validation_bo_fence(sw_context->ctx, fence);
  3691. if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid))
  3692. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  3693. /*
  3694. * If anything fails here, give up trying to export the fence and do a
  3695. * sync since the user mode will not be able to sync the fence itself.
  3696. * This ensures we are still functionally correct.
  3697. */
  3698. if (flags & DRM_VMW_EXECBUF_FLAG_EXPORT_FENCE_FD) {
  3699. sync_file = sync_file_create(&fence->base);
  3700. if (!sync_file) {
  3701. VMW_DEBUG_USER("Sync file create failed for fence\n");
  3702. put_unused_fd(out_fence_fd);
  3703. out_fence_fd = -1;
  3704. (void) vmw_fence_obj_wait(fence, false, false,
  3705. VMW_FENCE_WAIT_TIMEOUT);
  3706. }
  3707. }
  3708. ret = vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  3709. user_fence_rep, fence, handle, out_fence_fd);
  3710. if (sync_file) {
  3711. if (ret) {
  3712. /* usercopy of fence failed, put the file object */
  3713. fput(sync_file->file);
  3714. put_unused_fd(out_fence_fd);
  3715. } else {
  3716. /* Link the fence with the FD created earlier */
  3717. fd_install(out_fence_fd, sync_file->file);
  3718. }
  3719. }
  3720. /* Don't unreference when handing fence out */
  3721. if (unlikely(out_fence != NULL)) {
  3722. *out_fence = fence;
  3723. fence = NULL;
  3724. } else if (likely(fence != NULL)) {
  3725. vmw_fence_obj_unreference(&fence);
  3726. }
  3727. vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
  3728. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3729. /*
  3730. * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks
  3731. * in resource destruction paths.
  3732. */
  3733. vmw_validation_unref_lists(&val_ctx);
  3734. return ret;
  3735. out_unlock_binding:
  3736. mutex_unlock(&dev_priv->binding_mutex);
  3737. out_err:
  3738. vmw_validation_bo_backoff(&val_ctx);
  3739. out_err_nores:
  3740. vmw_execbuf_bindings_commit(sw_context, true);
  3741. vmw_validation_res_unreserve(&val_ctx, true);
  3742. vmw_resource_relocations_free(&sw_context->res_relocations);
  3743. vmw_free_relocations(sw_context);
  3744. if (unlikely(dev_priv->pinned_bo != NULL && !dev_priv->query_cid_valid))
  3745. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  3746. out_unlock:
  3747. vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
  3748. vmw_validation_drop_ht(&val_ctx);
  3749. WARN_ON(!list_empty(&sw_context->ctx_list));
  3750. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3751. /*
  3752. * Unreference resources outside of the cmdbuf_mutex to avoid deadlocks
  3753. * in resource destruction paths.
  3754. */
  3755. vmw_validation_unref_lists(&val_ctx);
  3756. out_free_header:
  3757. if (header)
  3758. vmw_cmdbuf_header_free(header);
  3759. out_free_fence_fd:
  3760. if (out_fence_fd >= 0)
  3761. put_unused_fd(out_fence_fd);
  3762. return ret;
  3763. }
  3764. /**
  3765. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  3766. *
  3767. * @dev_priv: The device private structure.
  3768. *
  3769. * This function is called to idle the fifo and unpin the query buffer if the
  3770. * normal way to do this hits an error, which should typically be extremely
  3771. * rare.
  3772. */
  3773. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  3774. {
  3775. VMW_DEBUG_USER("Can't unpin query buffer. Trying to recover.\n");
  3776. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  3777. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  3778. if (dev_priv->dummy_query_bo_pinned) {
  3779. vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
  3780. dev_priv->dummy_query_bo_pinned = false;
  3781. }
  3782. }
  3783. /**
  3784. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query
  3785. * bo.
  3786. *
  3787. * @dev_priv: The device private structure.
  3788. * @fence: If non-NULL should point to a struct vmw_fence_obj issued _after_ a
  3789. * query barrier that flushes all queries touching the current buffer pointed to
  3790. * by @dev_priv->pinned_bo
  3791. *
  3792. * This function should be used to unpin the pinned query bo, or as a query
  3793. * barrier when we need to make sure that all queries have finished before the
  3794. * next fifo command. (For example on hardware context destructions where the
  3795. * hardware may otherwise leak unfinished queries).
  3796. *
  3797. * This function does not return any failure codes, but make attempts to do safe
  3798. * unpinning in case of errors.
  3799. *
  3800. * The function will synchronize on the previous query barrier, and will thus
  3801. * not finish until that barrier has executed.
  3802. *
  3803. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread before
  3804. * calling this function.
  3805. */
  3806. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  3807. struct vmw_fence_obj *fence)
  3808. {
  3809. int ret = 0;
  3810. struct vmw_fence_obj *lfence = NULL;
  3811. DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
  3812. if (dev_priv->pinned_bo == NULL)
  3813. goto out_unlock;
  3814. vmw_bo_placement_set(dev_priv->pinned_bo,
  3815. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
  3816. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
  3817. ret = vmw_validation_add_bo(&val_ctx, dev_priv->pinned_bo);
  3818. if (ret)
  3819. goto out_no_reserve;
  3820. vmw_bo_placement_set(dev_priv->dummy_query_bo,
  3821. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM,
  3822. VMW_BO_DOMAIN_GMR | VMW_BO_DOMAIN_VRAM);
  3823. ret = vmw_validation_add_bo(&val_ctx, dev_priv->dummy_query_bo);
  3824. if (ret)
  3825. goto out_no_reserve;
  3826. ret = vmw_validation_bo_reserve(&val_ctx, false);
  3827. if (ret)
  3828. goto out_no_reserve;
  3829. if (dev_priv->query_cid_valid) {
  3830. BUG_ON(fence != NULL);
  3831. ret = vmw_cmd_emit_dummy_query(dev_priv, dev_priv->query_cid);
  3832. if (ret)
  3833. goto out_no_emit;
  3834. dev_priv->query_cid_valid = false;
  3835. }
  3836. vmw_bo_pin_reserved(dev_priv->pinned_bo, false);
  3837. if (dev_priv->dummy_query_bo_pinned) {
  3838. vmw_bo_pin_reserved(dev_priv->dummy_query_bo, false);
  3839. dev_priv->dummy_query_bo_pinned = false;
  3840. }
  3841. if (fence == NULL) {
  3842. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  3843. NULL);
  3844. fence = lfence;
  3845. }
  3846. vmw_validation_bo_fence(&val_ctx, fence);
  3847. if (lfence != NULL)
  3848. vmw_fence_obj_unreference(&lfence);
  3849. vmw_validation_unref_lists(&val_ctx);
  3850. vmw_bo_unreference(&dev_priv->pinned_bo);
  3851. out_unlock:
  3852. return;
  3853. out_no_emit:
  3854. vmw_validation_bo_backoff(&val_ctx);
  3855. out_no_reserve:
  3856. vmw_validation_unref_lists(&val_ctx);
  3857. vmw_execbuf_unpin_panic(dev_priv);
  3858. vmw_bo_unreference(&dev_priv->pinned_bo);
  3859. }
  3860. /**
  3861. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned query bo.
  3862. *
  3863. * @dev_priv: The device private structure.
  3864. *
  3865. * This function should be used to unpin the pinned query bo, or as a query
  3866. * barrier when we need to make sure that all queries have finished before the
  3867. * next fifo command. (For example on hardware context destructions where the
  3868. * hardware may otherwise leak unfinished queries).
  3869. *
  3870. * This function does not return any failure codes, but make attempts to do safe
  3871. * unpinning in case of errors.
  3872. *
  3873. * The function will synchronize on the previous query barrier, and will thus
  3874. * not finish until that barrier has executed.
  3875. */
  3876. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  3877. {
  3878. mutex_lock(&dev_priv->cmdbuf_mutex);
  3879. if (dev_priv->query_cid_valid)
  3880. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  3881. mutex_unlock(&dev_priv->cmdbuf_mutex);
  3882. }
  3883. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  3884. struct drm_file *file_priv)
  3885. {
  3886. struct vmw_private *dev_priv = vmw_priv(dev);
  3887. struct drm_vmw_execbuf_arg *arg = data;
  3888. int ret;
  3889. struct dma_fence *in_fence = NULL;
  3890. MKS_STAT_TIME_DECL(MKSSTAT_KERN_EXECBUF);
  3891. MKS_STAT_TIME_PUSH(MKSSTAT_KERN_EXECBUF);
  3892. /*
  3893. * Extend the ioctl argument while maintaining backwards compatibility:
  3894. * We take different code paths depending on the value of arg->version.
  3895. *
  3896. * Note: The ioctl argument is extended and zeropadded by core DRM.
  3897. */
  3898. if (unlikely(arg->version > DRM_VMW_EXECBUF_VERSION ||
  3899. arg->version == 0)) {
  3900. VMW_DEBUG_USER("Incorrect execbuf version.\n");
  3901. ret = -EINVAL;
  3902. goto mksstats_out;
  3903. }
  3904. switch (arg->version) {
  3905. case 1:
  3906. /* For v1 core DRM have extended + zeropadded the data */
  3907. arg->context_handle = (uint32_t) -1;
  3908. break;
  3909. case 2:
  3910. default:
  3911. /* For v2 and later core DRM would have correctly copied it */
  3912. break;
  3913. }
  3914. /* If imported a fence FD from elsewhere, then wait on it */
  3915. if (arg->flags & DRM_VMW_EXECBUF_FLAG_IMPORT_FENCE_FD) {
  3916. in_fence = sync_file_get_fence(arg->imported_fence_fd);
  3917. if (!in_fence) {
  3918. VMW_DEBUG_USER("Cannot get imported fence\n");
  3919. ret = -EINVAL;
  3920. goto mksstats_out;
  3921. }
  3922. ret = dma_fence_wait(in_fence, true);
  3923. if (ret)
  3924. goto out;
  3925. }
  3926. ret = vmw_execbuf_process(file_priv, dev_priv,
  3927. (void __user *)(unsigned long)arg->commands,
  3928. NULL, arg->command_size, arg->throttle_us,
  3929. arg->context_handle,
  3930. (void __user *)(unsigned long)arg->fence_rep,
  3931. NULL, arg->flags);
  3932. if (unlikely(ret != 0))
  3933. goto out;
  3934. out:
  3935. if (in_fence)
  3936. dma_fence_put(in_fence);
  3937. mksstats_out:
  3938. MKS_STAT_TIME_POP(MKSSTAT_KERN_EXECBUF);
  3939. return ret;
  3940. }