uapi.c 8.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /* Copyright (c) 2020 NVIDIA Corporation */
  3. #include <linux/host1x.h>
  4. #include <linux/iommu.h>
  5. #include <linux/list.h>
  6. #include <drm/drm_drv.h>
  7. #include <drm/drm_file.h>
  8. #include <drm/drm_utils.h>
  9. #include "drm.h"
  10. #include "uapi.h"
  11. static void tegra_drm_mapping_release(struct kref *ref)
  12. {
  13. struct tegra_drm_mapping *mapping =
  14. container_of(ref, struct tegra_drm_mapping, ref);
  15. host1x_bo_unpin(mapping->map);
  16. host1x_bo_put(mapping->bo);
  17. kfree(mapping);
  18. }
  19. void tegra_drm_mapping_put(struct tegra_drm_mapping *mapping)
  20. {
  21. kref_put(&mapping->ref, tegra_drm_mapping_release);
  22. }
  23. static void tegra_drm_channel_context_close(struct tegra_drm_context *context)
  24. {
  25. struct tegra_drm_mapping *mapping;
  26. unsigned long id;
  27. if (context->memory_context)
  28. host1x_memory_context_put(context->memory_context);
  29. xa_for_each(&context->mappings, id, mapping)
  30. tegra_drm_mapping_put(mapping);
  31. xa_destroy(&context->mappings);
  32. host1x_channel_put(context->channel);
  33. kfree(context);
  34. }
  35. void tegra_drm_uapi_close_file(struct tegra_drm_file *file)
  36. {
  37. struct tegra_drm_context *context;
  38. struct host1x_syncpt *sp;
  39. unsigned long id;
  40. xa_for_each(&file->contexts, id, context)
  41. tegra_drm_channel_context_close(context);
  42. xa_for_each(&file->syncpoints, id, sp)
  43. host1x_syncpt_put(sp);
  44. xa_destroy(&file->contexts);
  45. xa_destroy(&file->syncpoints);
  46. }
  47. static struct tegra_drm_client *tegra_drm_find_client(struct tegra_drm *tegra, u32 class)
  48. {
  49. struct tegra_drm_client *client;
  50. list_for_each_entry(client, &tegra->clients, list)
  51. if (client->base.class == class)
  52. return client;
  53. return NULL;
  54. }
  55. int tegra_drm_ioctl_channel_open(struct drm_device *drm, void *data, struct drm_file *file)
  56. {
  57. struct host1x *host = tegra_drm_to_host1x(drm->dev_private);
  58. struct tegra_drm_file *fpriv = file->driver_priv;
  59. struct tegra_drm *tegra = drm->dev_private;
  60. struct drm_tegra_channel_open *args = data;
  61. struct tegra_drm_client *client = NULL;
  62. struct tegra_drm_context *context;
  63. int err;
  64. if (args->flags)
  65. return -EINVAL;
  66. context = kzalloc_obj(*context);
  67. if (!context)
  68. return -ENOMEM;
  69. client = tegra_drm_find_client(tegra, args->host1x_class);
  70. if (!client) {
  71. err = -ENODEV;
  72. goto free;
  73. }
  74. if (client->shared_channel) {
  75. context->channel = host1x_channel_get(client->shared_channel);
  76. } else {
  77. context->channel = host1x_channel_request(&client->base);
  78. if (!context->channel) {
  79. err = -EBUSY;
  80. goto free;
  81. }
  82. }
  83. /* Only allocate context if the engine supports context isolation. */
  84. if (device_iommu_mapped(client->base.dev) && client->ops->can_use_memory_ctx) {
  85. bool supported;
  86. err = client->ops->can_use_memory_ctx(client, &supported);
  87. if (err)
  88. goto put_channel;
  89. if (supported) {
  90. struct pid *pid = get_task_pid(current, PIDTYPE_TGID);
  91. context->memory_context = host1x_memory_context_alloc(
  92. host, client->base.dev, pid);
  93. put_pid(pid);
  94. }
  95. if (IS_ERR(context->memory_context)) {
  96. if (PTR_ERR(context->memory_context) != -EOPNOTSUPP) {
  97. err = PTR_ERR(context->memory_context);
  98. goto put_channel;
  99. } else {
  100. /*
  101. * OK, HW does not support contexts or contexts
  102. * are disabled.
  103. */
  104. context->memory_context = NULL;
  105. }
  106. }
  107. }
  108. err = xa_alloc(&fpriv->contexts, &args->context, context, XA_LIMIT(1, U32_MAX),
  109. GFP_KERNEL);
  110. if (err < 0)
  111. goto put_memctx;
  112. context->client = client;
  113. xa_init_flags(&context->mappings, XA_FLAGS_ALLOC1);
  114. args->version = client->version;
  115. args->capabilities = 0;
  116. if (device_get_dma_attr(client->base.dev) == DEV_DMA_COHERENT)
  117. args->capabilities |= DRM_TEGRA_CHANNEL_CAP_CACHE_COHERENT;
  118. return 0;
  119. put_memctx:
  120. if (context->memory_context)
  121. host1x_memory_context_put(context->memory_context);
  122. put_channel:
  123. host1x_channel_put(context->channel);
  124. free:
  125. kfree(context);
  126. return err;
  127. }
  128. int tegra_drm_ioctl_channel_close(struct drm_device *drm, void *data, struct drm_file *file)
  129. {
  130. struct tegra_drm_file *fpriv = file->driver_priv;
  131. struct drm_tegra_channel_close *args = data;
  132. struct tegra_drm_context *context;
  133. mutex_lock(&fpriv->lock);
  134. context = xa_load(&fpriv->contexts, args->context);
  135. if (!context) {
  136. mutex_unlock(&fpriv->lock);
  137. return -EINVAL;
  138. }
  139. xa_erase(&fpriv->contexts, args->context);
  140. mutex_unlock(&fpriv->lock);
  141. tegra_drm_channel_context_close(context);
  142. return 0;
  143. }
  144. int tegra_drm_ioctl_channel_map(struct drm_device *drm, void *data, struct drm_file *file)
  145. {
  146. struct tegra_drm_file *fpriv = file->driver_priv;
  147. struct drm_tegra_channel_map *args = data;
  148. struct tegra_drm_mapping *mapping;
  149. struct tegra_drm_context *context;
  150. enum dma_data_direction direction;
  151. struct device *mapping_dev;
  152. int err = 0;
  153. if (args->flags & ~DRM_TEGRA_CHANNEL_MAP_READ_WRITE)
  154. return -EINVAL;
  155. mutex_lock(&fpriv->lock);
  156. context = xa_load(&fpriv->contexts, args->context);
  157. if (!context) {
  158. mutex_unlock(&fpriv->lock);
  159. return -EINVAL;
  160. }
  161. mapping = kzalloc_obj(*mapping);
  162. if (!mapping) {
  163. err = -ENOMEM;
  164. goto unlock;
  165. }
  166. kref_init(&mapping->ref);
  167. if (context->memory_context)
  168. mapping_dev = &context->memory_context->dev;
  169. else
  170. mapping_dev = context->client->base.dev;
  171. mapping->bo = tegra_gem_lookup(file, args->handle);
  172. if (!mapping->bo) {
  173. err = -EINVAL;
  174. goto free;
  175. }
  176. switch (args->flags & DRM_TEGRA_CHANNEL_MAP_READ_WRITE) {
  177. case DRM_TEGRA_CHANNEL_MAP_READ_WRITE:
  178. direction = DMA_BIDIRECTIONAL;
  179. break;
  180. case DRM_TEGRA_CHANNEL_MAP_WRITE:
  181. direction = DMA_FROM_DEVICE;
  182. break;
  183. case DRM_TEGRA_CHANNEL_MAP_READ:
  184. direction = DMA_TO_DEVICE;
  185. break;
  186. default:
  187. err = -EINVAL;
  188. goto put_gem;
  189. }
  190. mapping->map = host1x_bo_pin(mapping_dev, mapping->bo, direction, NULL);
  191. if (IS_ERR(mapping->map)) {
  192. err = PTR_ERR(mapping->map);
  193. goto put_gem;
  194. }
  195. mapping->iova = mapping->map->phys;
  196. mapping->iova_end = mapping->iova + host1x_to_tegra_bo(mapping->bo)->gem.size;
  197. err = xa_alloc(&context->mappings, &args->mapping, mapping, XA_LIMIT(1, U32_MAX),
  198. GFP_KERNEL);
  199. if (err < 0)
  200. goto unpin;
  201. mutex_unlock(&fpriv->lock);
  202. return 0;
  203. unpin:
  204. host1x_bo_unpin(mapping->map);
  205. put_gem:
  206. host1x_bo_put(mapping->bo);
  207. free:
  208. kfree(mapping);
  209. unlock:
  210. mutex_unlock(&fpriv->lock);
  211. return err;
  212. }
  213. int tegra_drm_ioctl_channel_unmap(struct drm_device *drm, void *data, struct drm_file *file)
  214. {
  215. struct tegra_drm_file *fpriv = file->driver_priv;
  216. struct drm_tegra_channel_unmap *args = data;
  217. struct tegra_drm_mapping *mapping;
  218. struct tegra_drm_context *context;
  219. mutex_lock(&fpriv->lock);
  220. context = xa_load(&fpriv->contexts, args->context);
  221. if (!context) {
  222. mutex_unlock(&fpriv->lock);
  223. return -EINVAL;
  224. }
  225. mapping = xa_erase(&context->mappings, args->mapping);
  226. mutex_unlock(&fpriv->lock);
  227. if (!mapping)
  228. return -EINVAL;
  229. tegra_drm_mapping_put(mapping);
  230. return 0;
  231. }
  232. int tegra_drm_ioctl_syncpoint_allocate(struct drm_device *drm, void *data, struct drm_file *file)
  233. {
  234. struct host1x *host1x = tegra_drm_to_host1x(drm->dev_private);
  235. struct tegra_drm_file *fpriv = file->driver_priv;
  236. struct drm_tegra_syncpoint_allocate *args = data;
  237. struct host1x_syncpt *sp;
  238. int err;
  239. if (args->id)
  240. return -EINVAL;
  241. sp = host1x_syncpt_alloc(host1x, HOST1X_SYNCPT_CLIENT_MANAGED, current->comm);
  242. if (!sp)
  243. return -EBUSY;
  244. args->id = host1x_syncpt_id(sp);
  245. err = xa_insert(&fpriv->syncpoints, args->id, sp, GFP_KERNEL);
  246. if (err) {
  247. host1x_syncpt_put(sp);
  248. return err;
  249. }
  250. return 0;
  251. }
  252. int tegra_drm_ioctl_syncpoint_free(struct drm_device *drm, void *data, struct drm_file *file)
  253. {
  254. struct tegra_drm_file *fpriv = file->driver_priv;
  255. struct drm_tegra_syncpoint_allocate *args = data;
  256. struct host1x_syncpt *sp;
  257. mutex_lock(&fpriv->lock);
  258. sp = xa_erase(&fpriv->syncpoints, args->id);
  259. mutex_unlock(&fpriv->lock);
  260. if (!sp)
  261. return -EINVAL;
  262. host1x_syncpt_put(sp);
  263. return 0;
  264. }
  265. int tegra_drm_ioctl_syncpoint_wait(struct drm_device *drm, void *data, struct drm_file *file)
  266. {
  267. struct host1x *host1x = tegra_drm_to_host1x(drm->dev_private);
  268. struct drm_tegra_syncpoint_wait *args = data;
  269. signed long timeout_jiffies;
  270. struct host1x_syncpt *sp;
  271. if (args->padding != 0)
  272. return -EINVAL;
  273. sp = host1x_syncpt_get_by_id_noref(host1x, args->id);
  274. if (!sp)
  275. return -EINVAL;
  276. timeout_jiffies = drm_timeout_abs_to_jiffies(args->timeout_ns);
  277. return host1x_syncpt_wait(sp, args->threshold, timeout_jiffies, &args->value);
  278. }