qxl_cmd.c 16 KB

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  1. /*
  2. * Copyright 2013 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Dave Airlie
  23. * Alon Levy
  24. */
  25. /* QXL cmd/ring handling */
  26. #include <linux/delay.h>
  27. #include <drm/drm_print.h>
  28. #include <drm/drm_util.h>
  29. #include "qxl_drv.h"
  30. #include "qxl_object.h"
  31. static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap);
  32. struct ring {
  33. struct qxl_ring_header header;
  34. uint8_t elements[];
  35. };
  36. struct qxl_ring {
  37. struct ring *ring;
  38. int element_size;
  39. int n_elements;
  40. int prod_notify;
  41. wait_queue_head_t *push_event;
  42. spinlock_t lock;
  43. };
  44. void qxl_ring_free(struct qxl_ring *ring)
  45. {
  46. kfree(ring);
  47. }
  48. struct qxl_ring *
  49. qxl_ring_create(struct qxl_ring_header *header,
  50. int element_size,
  51. int n_elements,
  52. int prod_notify,
  53. wait_queue_head_t *push_event)
  54. {
  55. struct qxl_ring *ring;
  56. ring = kmalloc_obj(*ring);
  57. if (!ring)
  58. return NULL;
  59. ring->ring = (struct ring *)header;
  60. ring->element_size = element_size;
  61. ring->n_elements = n_elements;
  62. ring->prod_notify = prod_notify;
  63. ring->push_event = push_event;
  64. spin_lock_init(&ring->lock);
  65. return ring;
  66. }
  67. static int qxl_check_header(struct qxl_ring *ring)
  68. {
  69. int ret;
  70. struct qxl_ring_header *header = &(ring->ring->header);
  71. unsigned long flags;
  72. spin_lock_irqsave(&ring->lock, flags);
  73. ret = header->prod - header->cons < header->num_items;
  74. if (ret == 0)
  75. header->notify_on_cons = header->cons + 1;
  76. spin_unlock_irqrestore(&ring->lock, flags);
  77. return ret;
  78. }
  79. int qxl_check_idle(struct qxl_ring *ring)
  80. {
  81. int ret;
  82. struct qxl_ring_header *header = &(ring->ring->header);
  83. unsigned long flags;
  84. spin_lock_irqsave(&ring->lock, flags);
  85. ret = header->prod == header->cons;
  86. spin_unlock_irqrestore(&ring->lock, flags);
  87. return ret;
  88. }
  89. int qxl_ring_push(struct qxl_ring *ring,
  90. const void *new_elt, bool interruptible)
  91. {
  92. struct qxl_ring_header *header = &(ring->ring->header);
  93. uint8_t *elt;
  94. int idx, ret;
  95. unsigned long flags;
  96. spin_lock_irqsave(&ring->lock, flags);
  97. if (header->prod - header->cons == header->num_items) {
  98. header->notify_on_cons = header->cons + 1;
  99. mb();
  100. spin_unlock_irqrestore(&ring->lock, flags);
  101. if (!drm_can_sleep()) {
  102. while (!qxl_check_header(ring))
  103. udelay(1);
  104. } else {
  105. if (interruptible) {
  106. ret = wait_event_interruptible(*ring->push_event,
  107. qxl_check_header(ring));
  108. if (ret)
  109. return ret;
  110. } else {
  111. wait_event(*ring->push_event,
  112. qxl_check_header(ring));
  113. }
  114. }
  115. spin_lock_irqsave(&ring->lock, flags);
  116. }
  117. idx = header->prod & (ring->n_elements - 1);
  118. elt = ring->ring->elements + idx * ring->element_size;
  119. memcpy((void *)elt, new_elt, ring->element_size);
  120. header->prod++;
  121. mb();
  122. if (header->prod == header->notify_on_prod)
  123. outb(0, ring->prod_notify);
  124. spin_unlock_irqrestore(&ring->lock, flags);
  125. return 0;
  126. }
  127. static bool qxl_ring_pop(struct qxl_ring *ring,
  128. void *element)
  129. {
  130. volatile struct qxl_ring_header *header = &(ring->ring->header);
  131. volatile uint8_t *ring_elt;
  132. int idx;
  133. unsigned long flags;
  134. spin_lock_irqsave(&ring->lock, flags);
  135. if (header->cons == header->prod) {
  136. header->notify_on_prod = header->cons + 1;
  137. spin_unlock_irqrestore(&ring->lock, flags);
  138. return false;
  139. }
  140. idx = header->cons & (ring->n_elements - 1);
  141. ring_elt = ring->ring->elements + idx * ring->element_size;
  142. memcpy(element, (void *)ring_elt, ring->element_size);
  143. header->cons++;
  144. spin_unlock_irqrestore(&ring->lock, flags);
  145. return true;
  146. }
  147. int
  148. qxl_push_command_ring_release(struct qxl_device *qdev, struct qxl_release *release,
  149. uint32_t type, bool interruptible)
  150. {
  151. struct qxl_command cmd;
  152. cmd.type = type;
  153. cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);
  154. return qxl_ring_push(qdev->command_ring, &cmd, interruptible);
  155. }
  156. int
  157. qxl_push_cursor_ring_release(struct qxl_device *qdev, struct qxl_release *release,
  158. uint32_t type, bool interruptible)
  159. {
  160. struct qxl_command cmd;
  161. cmd.type = type;
  162. cmd.data = qxl_bo_physical_address(qdev, release->release_bo, release->release_offset);
  163. return qxl_ring_push(qdev->cursor_ring, &cmd, interruptible);
  164. }
  165. bool qxl_queue_garbage_collect(struct qxl_device *qdev, bool flush)
  166. {
  167. if (!qxl_check_idle(qdev->release_ring)) {
  168. schedule_work(&qdev->gc_work);
  169. if (flush)
  170. flush_work(&qdev->gc_work);
  171. return true;
  172. }
  173. return false;
  174. }
  175. int qxl_garbage_collect(struct qxl_device *qdev)
  176. {
  177. struct qxl_release *release;
  178. uint64_t id, next_id;
  179. int i = 0;
  180. union qxl_release_info *info;
  181. while (qxl_ring_pop(qdev->release_ring, &id)) {
  182. DRM_DEBUG_DRIVER("popped %lld\n", id);
  183. while (id) {
  184. release = qxl_release_from_id_locked(qdev, id);
  185. if (release == NULL)
  186. break;
  187. info = qxl_release_map(qdev, release);
  188. next_id = info->next;
  189. qxl_release_unmap(qdev, release, info);
  190. DRM_DEBUG_DRIVER("popped %lld, next %lld\n", id,
  191. next_id);
  192. switch (release->type) {
  193. case QXL_RELEASE_DRAWABLE:
  194. case QXL_RELEASE_SURFACE_CMD:
  195. case QXL_RELEASE_CURSOR_CMD:
  196. break;
  197. default:
  198. DRM_ERROR("unexpected release type\n");
  199. break;
  200. }
  201. id = next_id;
  202. qxl_release_free(qdev, release);
  203. ++i;
  204. }
  205. }
  206. wake_up_all(&qdev->release_event);
  207. DRM_DEBUG_DRIVER("%d\n", i);
  208. return i;
  209. }
  210. int qxl_alloc_bo_reserved(struct qxl_device *qdev,
  211. struct qxl_release *release,
  212. unsigned long size,
  213. struct qxl_bo **_bo)
  214. {
  215. struct qxl_bo *bo;
  216. int ret;
  217. ret = qxl_bo_create(qdev, size, false /* not kernel - device */,
  218. false, QXL_GEM_DOMAIN_VRAM, 0, NULL, &bo);
  219. if (ret) {
  220. DRM_ERROR("failed to allocate VRAM BO\n");
  221. return ret;
  222. }
  223. ret = qxl_release_list_add(release, bo);
  224. if (ret)
  225. goto out_unref;
  226. *_bo = bo;
  227. return 0;
  228. out_unref:
  229. qxl_bo_unref(&bo);
  230. return ret;
  231. }
  232. static int wait_for_io_cmd_user(struct qxl_device *qdev, uint8_t val, long port, bool intr)
  233. {
  234. int irq_num;
  235. long addr = qdev->io_base + port;
  236. int ret;
  237. mutex_lock(&qdev->async_io_mutex);
  238. irq_num = atomic_read(&qdev->irq_received_io_cmd);
  239. if (qdev->last_sent_io_cmd > irq_num) {
  240. if (intr)
  241. ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
  242. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  243. else
  244. ret = wait_event_timeout(qdev->io_cmd_event,
  245. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  246. /* 0 is timeout, just bail the "hw" has gone away */
  247. if (ret <= 0)
  248. goto out;
  249. irq_num = atomic_read(&qdev->irq_received_io_cmd);
  250. }
  251. outb(val, addr);
  252. qdev->last_sent_io_cmd = irq_num + 1;
  253. if (intr)
  254. ret = wait_event_interruptible_timeout(qdev->io_cmd_event,
  255. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  256. else
  257. ret = wait_event_timeout(qdev->io_cmd_event,
  258. atomic_read(&qdev->irq_received_io_cmd) > irq_num, 5*HZ);
  259. out:
  260. if (ret > 0)
  261. ret = 0;
  262. mutex_unlock(&qdev->async_io_mutex);
  263. return ret;
  264. }
  265. static void wait_for_io_cmd(struct qxl_device *qdev, uint8_t val, long port)
  266. {
  267. int ret;
  268. restart:
  269. ret = wait_for_io_cmd_user(qdev, val, port, false);
  270. if (ret == -ERESTARTSYS)
  271. goto restart;
  272. }
  273. int qxl_io_update_area(struct qxl_device *qdev, struct qxl_bo *surf,
  274. const struct qxl_rect *area)
  275. {
  276. int surface_id;
  277. uint32_t surface_width, surface_height;
  278. int ret;
  279. if (!surf->hw_surf_alloc)
  280. DRM_ERROR("got io update area with no hw surface\n");
  281. if (surf->is_primary)
  282. surface_id = 0;
  283. else
  284. surface_id = surf->surface_id;
  285. surface_width = surf->surf.width;
  286. surface_height = surf->surf.height;
  287. if (area->left < 0 || area->top < 0 ||
  288. area->right > surface_width || area->bottom > surface_height)
  289. return -EINVAL;
  290. mutex_lock(&qdev->update_area_mutex);
  291. qdev->ram_header->update_area = *area;
  292. qdev->ram_header->update_surface = surface_id;
  293. ret = wait_for_io_cmd_user(qdev, 0, QXL_IO_UPDATE_AREA_ASYNC, true);
  294. mutex_unlock(&qdev->update_area_mutex);
  295. return ret;
  296. }
  297. void qxl_io_notify_oom(struct qxl_device *qdev)
  298. {
  299. outb(0, qdev->io_base + QXL_IO_NOTIFY_OOM);
  300. }
  301. void qxl_io_flush_release(struct qxl_device *qdev)
  302. {
  303. outb(0, qdev->io_base + QXL_IO_FLUSH_RELEASE);
  304. }
  305. void qxl_io_flush_surfaces(struct qxl_device *qdev)
  306. {
  307. wait_for_io_cmd(qdev, 0, QXL_IO_FLUSH_SURFACES_ASYNC);
  308. }
  309. void qxl_io_destroy_primary(struct qxl_device *qdev)
  310. {
  311. wait_for_io_cmd(qdev, 0, QXL_IO_DESTROY_PRIMARY_ASYNC);
  312. qdev->primary_bo->is_primary = false;
  313. drm_gem_object_put(&qdev->primary_bo->tbo.base);
  314. qdev->primary_bo = NULL;
  315. }
  316. void qxl_io_create_primary(struct qxl_device *qdev, struct qxl_bo *bo)
  317. {
  318. struct qxl_surface_create *create;
  319. if (WARN_ON(qdev->primary_bo))
  320. return;
  321. DRM_DEBUG_DRIVER("qdev %p, ram_header %p\n", qdev, qdev->ram_header);
  322. create = &qdev->ram_header->create_surface;
  323. create->format = bo->surf.format;
  324. create->width = bo->surf.width;
  325. create->height = bo->surf.height;
  326. create->stride = bo->surf.stride;
  327. create->mem = qxl_bo_physical_address(qdev, bo, 0);
  328. DRM_DEBUG_DRIVER("mem = %llx, from %p\n", create->mem, bo->kptr);
  329. create->flags = QXL_SURF_FLAG_KEEP_DATA;
  330. create->type = QXL_SURF_TYPE_PRIMARY;
  331. wait_for_io_cmd(qdev, 0, QXL_IO_CREATE_PRIMARY_ASYNC);
  332. qdev->primary_bo = bo;
  333. qdev->primary_bo->is_primary = true;
  334. drm_gem_object_get(&qdev->primary_bo->tbo.base);
  335. }
  336. void qxl_io_memslot_add(struct qxl_device *qdev, uint8_t id)
  337. {
  338. DRM_DEBUG_DRIVER("qxl_memslot_add %d\n", id);
  339. wait_for_io_cmd(qdev, id, QXL_IO_MEMSLOT_ADD_ASYNC);
  340. }
  341. void qxl_io_reset(struct qxl_device *qdev)
  342. {
  343. outb(0, qdev->io_base + QXL_IO_RESET);
  344. }
  345. void qxl_io_monitors_config(struct qxl_device *qdev)
  346. {
  347. wait_for_io_cmd(qdev, 0, QXL_IO_MONITORS_CONFIG_ASYNC);
  348. }
  349. int qxl_surface_id_alloc(struct qxl_device *qdev,
  350. struct qxl_bo *surf)
  351. {
  352. uint32_t handle;
  353. int idr_ret;
  354. again:
  355. idr_preload(GFP_ATOMIC);
  356. spin_lock(&qdev->surf_id_idr_lock);
  357. idr_ret = idr_alloc(&qdev->surf_id_idr, NULL, 1, 0, GFP_NOWAIT);
  358. spin_unlock(&qdev->surf_id_idr_lock);
  359. idr_preload_end();
  360. if (idr_ret < 0)
  361. return idr_ret;
  362. handle = idr_ret;
  363. if (handle >= qdev->rom->n_surfaces) {
  364. spin_lock(&qdev->surf_id_idr_lock);
  365. idr_remove(&qdev->surf_id_idr, handle);
  366. spin_unlock(&qdev->surf_id_idr_lock);
  367. qxl_reap_surface_id(qdev, 2);
  368. goto again;
  369. }
  370. surf->surface_id = handle;
  371. spin_lock(&qdev->surf_id_idr_lock);
  372. qdev->last_alloced_surf_id = handle;
  373. spin_unlock(&qdev->surf_id_idr_lock);
  374. return 0;
  375. }
  376. void qxl_surface_id_dealloc(struct qxl_device *qdev,
  377. uint32_t surface_id)
  378. {
  379. spin_lock(&qdev->surf_id_idr_lock);
  380. idr_remove(&qdev->surf_id_idr, surface_id);
  381. spin_unlock(&qdev->surf_id_idr_lock);
  382. }
  383. int qxl_hw_surface_alloc(struct qxl_device *qdev,
  384. struct qxl_bo *surf)
  385. {
  386. struct qxl_surface_cmd *cmd;
  387. struct qxl_release *release;
  388. int ret;
  389. if (surf->hw_surf_alloc)
  390. return 0;
  391. ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_CREATE,
  392. NULL,
  393. &release);
  394. if (ret)
  395. return ret;
  396. ret = qxl_release_reserve_list(release, true);
  397. if (ret) {
  398. qxl_release_free(qdev, release);
  399. return ret;
  400. }
  401. cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
  402. cmd->type = QXL_SURFACE_CMD_CREATE;
  403. cmd->flags = QXL_SURF_FLAG_KEEP_DATA;
  404. cmd->u.surface_create.format = surf->surf.format;
  405. cmd->u.surface_create.width = surf->surf.width;
  406. cmd->u.surface_create.height = surf->surf.height;
  407. cmd->u.surface_create.stride = surf->surf.stride;
  408. cmd->u.surface_create.data = qxl_bo_physical_address(qdev, surf, 0);
  409. cmd->surface_id = surf->surface_id;
  410. qxl_release_unmap(qdev, release, &cmd->release_info);
  411. surf->surf_create = release;
  412. /* no need to add a release to the fence for this surface bo,
  413. since it is only released when we ask to destroy the surface
  414. and it would never signal otherwise */
  415. qxl_release_fence_buffer_objects(release);
  416. qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
  417. surf->hw_surf_alloc = true;
  418. spin_lock(&qdev->surf_id_idr_lock);
  419. idr_replace(&qdev->surf_id_idr, surf, surf->surface_id);
  420. spin_unlock(&qdev->surf_id_idr_lock);
  421. return 0;
  422. }
  423. int qxl_hw_surface_dealloc(struct qxl_device *qdev,
  424. struct qxl_bo *surf)
  425. {
  426. struct qxl_surface_cmd *cmd;
  427. struct qxl_release *release;
  428. int ret;
  429. int id;
  430. if (!surf->hw_surf_alloc)
  431. return 0;
  432. ret = qxl_alloc_surface_release_reserved(qdev, QXL_SURFACE_CMD_DESTROY,
  433. surf->surf_create,
  434. &release);
  435. if (ret)
  436. return ret;
  437. surf->surf_create = NULL;
  438. /* remove the surface from the idr, but not the surface id yet */
  439. spin_lock(&qdev->surf_id_idr_lock);
  440. idr_replace(&qdev->surf_id_idr, NULL, surf->surface_id);
  441. spin_unlock(&qdev->surf_id_idr_lock);
  442. surf->hw_surf_alloc = false;
  443. id = surf->surface_id;
  444. surf->surface_id = 0;
  445. release->surface_release_id = id;
  446. cmd = (struct qxl_surface_cmd *)qxl_release_map(qdev, release);
  447. cmd->type = QXL_SURFACE_CMD_DESTROY;
  448. cmd->surface_id = id;
  449. qxl_release_unmap(qdev, release, &cmd->release_info);
  450. qxl_release_fence_buffer_objects(release);
  451. qxl_push_command_ring_release(qdev, release, QXL_CMD_SURFACE, false);
  452. return 0;
  453. }
  454. static int qxl_update_surface(struct qxl_device *qdev, struct qxl_bo *surf)
  455. {
  456. struct qxl_rect rect;
  457. int ret;
  458. /* if we are evicting, we need to make sure the surface is up
  459. to date */
  460. rect.left = 0;
  461. rect.right = surf->surf.width;
  462. rect.top = 0;
  463. rect.bottom = surf->surf.height;
  464. retry:
  465. ret = qxl_io_update_area(qdev, surf, &rect);
  466. if (ret == -ERESTARTSYS)
  467. goto retry;
  468. return ret;
  469. }
  470. static void qxl_surface_evict_locked(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area)
  471. {
  472. /* no need to update area if we are just freeing the surface normally */
  473. if (do_update_area)
  474. qxl_update_surface(qdev, surf);
  475. /* nuke the surface id at the hw */
  476. qxl_hw_surface_dealloc(qdev, surf);
  477. }
  478. void qxl_surface_evict(struct qxl_device *qdev, struct qxl_bo *surf, bool do_update_area)
  479. {
  480. mutex_lock(&qdev->surf_evict_mutex);
  481. qxl_surface_evict_locked(qdev, surf, do_update_area);
  482. mutex_unlock(&qdev->surf_evict_mutex);
  483. }
  484. static int qxl_reap_surf(struct qxl_device *qdev, struct qxl_bo *surf, bool stall)
  485. {
  486. long ret;
  487. ret = qxl_bo_reserve(surf);
  488. if (ret)
  489. return ret;
  490. if (stall)
  491. mutex_unlock(&qdev->surf_evict_mutex);
  492. if (stall) {
  493. ret = dma_resv_wait_timeout(surf->tbo.base.resv,
  494. DMA_RESV_USAGE_BOOKKEEP, true,
  495. 15 * HZ);
  496. if (ret > 0)
  497. ret = 0;
  498. else if (ret == 0)
  499. ret = -EBUSY;
  500. } else {
  501. ret = dma_resv_test_signaled(surf->tbo.base.resv,
  502. DMA_RESV_USAGE_BOOKKEEP);
  503. ret = ret ? -EBUSY : 0;
  504. }
  505. if (stall)
  506. mutex_lock(&qdev->surf_evict_mutex);
  507. if (ret) {
  508. qxl_bo_unreserve(surf);
  509. return ret;
  510. }
  511. qxl_surface_evict_locked(qdev, surf, true);
  512. qxl_bo_unreserve(surf);
  513. return 0;
  514. }
  515. static int qxl_reap_surface_id(struct qxl_device *qdev, int max_to_reap)
  516. {
  517. int num_reaped = 0;
  518. int i, ret;
  519. bool stall = false;
  520. int start = 0;
  521. mutex_lock(&qdev->surf_evict_mutex);
  522. again:
  523. spin_lock(&qdev->surf_id_idr_lock);
  524. start = qdev->last_alloced_surf_id + 1;
  525. spin_unlock(&qdev->surf_id_idr_lock);
  526. for (i = start; i < start + qdev->rom->n_surfaces; i++) {
  527. void *objptr;
  528. int surfid = i % qdev->rom->n_surfaces;
  529. /* this avoids the case where the objects is in the
  530. idr but has been evicted half way - its makes
  531. the idr lookup atomic with the eviction */
  532. spin_lock(&qdev->surf_id_idr_lock);
  533. objptr = idr_find(&qdev->surf_id_idr, surfid);
  534. spin_unlock(&qdev->surf_id_idr_lock);
  535. if (!objptr)
  536. continue;
  537. ret = qxl_reap_surf(qdev, objptr, stall);
  538. if (ret == 0)
  539. num_reaped++;
  540. if (num_reaped >= max_to_reap)
  541. break;
  542. }
  543. if (num_reaped == 0 && stall == false) {
  544. stall = true;
  545. goto again;
  546. }
  547. mutex_unlock(&qdev->surf_evict_mutex);
  548. if (num_reaped) {
  549. usleep_range(500, 1000);
  550. qxl_queue_garbage_collect(qdev, true);
  551. }
  552. return 0;
  553. }