msm_ringbuffer.h 3.8 KB

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  1. /* SPDX-License-Identifier: GPL-2.0-only */
  2. /*
  3. * Copyright (C) 2013 Red Hat
  4. * Author: Rob Clark <robdclark@gmail.com>
  5. */
  6. #ifndef __MSM_RINGBUFFER_H__
  7. #define __MSM_RINGBUFFER_H__
  8. #include "drm/gpu_scheduler.h"
  9. #include "msm_drv.h"
  10. #define rbmemptr(ring, member) \
  11. ((ring)->memptrs_iova + offsetof(struct msm_rbmemptrs, member))
  12. #define rbmemptr_stats(ring, index, member) \
  13. (rbmemptr((ring), stats) + \
  14. ((index) * sizeof(struct msm_gpu_submit_stats)) + \
  15. offsetof(struct msm_gpu_submit_stats, member))
  16. struct msm_gpu_submit_stats {
  17. u64 cpcycles_start;
  18. u64 cpcycles_end;
  19. u64 alwayson_start;
  20. u64 alwayson_end;
  21. };
  22. #define MSM_GPU_SUBMIT_STATS_COUNT 64
  23. struct msm_rbmemptrs {
  24. volatile uint32_t rptr;
  25. volatile uint32_t fence;
  26. /* Introduced on A7xx */
  27. volatile uint32_t bv_rptr;
  28. volatile uint32_t bv_fence;
  29. volatile struct msm_gpu_submit_stats stats[MSM_GPU_SUBMIT_STATS_COUNT];
  30. volatile u64 ttbr0;
  31. volatile u32 context_idr;
  32. };
  33. struct msm_cp_state {
  34. uint64_t ib1_base, ib2_base;
  35. uint32_t ib1_rem, ib2_rem;
  36. };
  37. struct msm_ringbuffer {
  38. struct msm_gpu *gpu;
  39. int id;
  40. struct drm_gem_object *bo;
  41. uint32_t *start, *end, *cur, *next;
  42. /*
  43. * The job scheduler for this ring.
  44. */
  45. struct drm_gpu_scheduler sched;
  46. /*
  47. * List of in-flight submits on this ring. Protected by submit_lock.
  48. *
  49. * Currently just submits that are already written into the ring, not
  50. * submits that are still in drm_gpu_scheduler's queues. At a later
  51. * step we could probably move to letting drm_gpu_scheduler manage
  52. * hangcheck detection and keep track of submit jobs that are in-
  53. * flight.
  54. */
  55. struct list_head submits;
  56. spinlock_t submit_lock;
  57. uint64_t iova;
  58. uint32_t hangcheck_fence;
  59. struct msm_rbmemptrs *memptrs;
  60. uint64_t memptrs_iova;
  61. struct msm_fence_context *fctx;
  62. /**
  63. * hangcheck_progress_retries:
  64. *
  65. * The number of extra hangcheck duration cycles that we have given
  66. * due to it appearing that the GPU is making forward progress.
  67. *
  68. * For GPU generations which support progress detection (see.
  69. * msm_gpu_funcs::progress()), if the GPU appears to be making progress
  70. * (ie. the CP has advanced in the command stream, we'll allow up to
  71. * DRM_MSM_HANGCHECK_PROGRESS_RETRIES expirations of the hangcheck timer
  72. * before killing the job. But to detect progress we need two sample
  73. * points, so the duration of the hangcheck timer is halved. In other
  74. * words we'll let the submit run for up to:
  75. *
  76. * (DRM_MSM_HANGCHECK_DEFAULT_PERIOD / 2) * (DRM_MSM_HANGCHECK_PROGRESS_RETRIES + 1)
  77. */
  78. int hangcheck_progress_retries;
  79. /**
  80. * last_cp_state: The state of the CP at the last call to gpu->progress()
  81. */
  82. struct msm_cp_state last_cp_state;
  83. /*
  84. * preempt_lock protects preemption and serializes wptr updates against
  85. * preemption. Can be aquired from irq context.
  86. */
  87. spinlock_t preempt_lock;
  88. /*
  89. * Whether we skipped writing wptr and it needs to be updated in the
  90. * future when the ring becomes current.
  91. */
  92. bool restore_wptr;
  93. /**
  94. * cur_ctx_seqno:
  95. *
  96. * The ctx->seqno value of the last context to submit to this ring
  97. * Tracked by seqno rather than pointer value to avoid dangling
  98. * pointers, and cases where a ctx can be freed and a new one created
  99. * with the same address.
  100. */
  101. int cur_ctx_seqno;
  102. };
  103. struct msm_ringbuffer *msm_ringbuffer_new(struct msm_gpu *gpu, int id,
  104. void *memptrs, uint64_t memptrs_iova);
  105. void msm_ringbuffer_destroy(struct msm_ringbuffer *ring);
  106. /* ringbuffer helpers (the parts that are same for a3xx/a2xx/z180..) */
  107. static inline void
  108. OUT_RING(struct msm_ringbuffer *ring, uint32_t data)
  109. {
  110. /*
  111. * ring->next points to the current command being written - it won't be
  112. * committed as ring->cur until the flush
  113. */
  114. if (ring->next == ring->end)
  115. ring->next = ring->start;
  116. *(ring->next++) = data;
  117. }
  118. #endif /* __MSM_RINGBUFFER_H__ */