dp_display.c 49 KB

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  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
  4. */
  5. #include <linux/module.h>
  6. #include <linux/slab.h>
  7. #include <linux/uaccess.h>
  8. #include <linux/debugfs.h>
  9. #include <linux/component.h>
  10. #include <linux/of_irq.h>
  11. #include <linux/phy/phy.h>
  12. #include <linux/delay.h>
  13. #include <linux/string_choices.h>
  14. #include <drm/display/drm_dp_aux_bus.h>
  15. #include <drm/display/drm_hdmi_audio_helper.h>
  16. #include <drm/drm_edid.h>
  17. #include "msm_drv.h"
  18. #include "msm_kms.h"
  19. #include "dp_ctrl.h"
  20. #include "dp_aux.h"
  21. #include "dp_reg.h"
  22. #include "dp_link.h"
  23. #include "dp_panel.h"
  24. #include "dp_display.h"
  25. #include "dp_drm.h"
  26. #include "dp_audio.h"
  27. #include "dp_debug.h"
  28. static bool psr_enabled = false;
  29. module_param(psr_enabled, bool, 0);
  30. MODULE_PARM_DESC(psr_enabled, "enable PSR for eDP and DP displays");
  31. #define HPD_STRING_SIZE 30
  32. enum {
  33. ISR_DISCONNECTED,
  34. ISR_CONNECT_PENDING,
  35. ISR_CONNECTED,
  36. ISR_HPD_REPLUG_COUNT,
  37. ISR_IRQ_HPD_PULSE_COUNT,
  38. ISR_HPD_LO_GLITH_COUNT,
  39. };
  40. /* event thread connection state */
  41. enum {
  42. ST_DISCONNECTED,
  43. ST_MAINLINK_READY,
  44. ST_CONNECTED,
  45. ST_DISCONNECT_PENDING,
  46. ST_DISPLAY_OFF,
  47. };
  48. enum {
  49. EV_NO_EVENT,
  50. /* hpd events */
  51. EV_HPD_PLUG_INT,
  52. EV_IRQ_HPD_INT,
  53. EV_HPD_UNPLUG_INT,
  54. EV_USER_NOTIFICATION,
  55. };
  56. #define EVENT_TIMEOUT (HZ/10) /* 100ms */
  57. #define DP_EVENT_Q_MAX 8
  58. #define DP_TIMEOUT_NONE 0
  59. #define WAIT_FOR_RESUME_TIMEOUT_JIFFIES (HZ / 2)
  60. struct msm_dp_event {
  61. u32 event_id;
  62. u32 data;
  63. u32 delay;
  64. };
  65. struct msm_dp_display_private {
  66. int irq;
  67. unsigned int id;
  68. /* state variables */
  69. bool core_initialized;
  70. bool phy_initialized;
  71. bool audio_supported;
  72. struct drm_device *drm_dev;
  73. struct drm_dp_aux *aux;
  74. struct msm_dp_link *link;
  75. struct msm_dp_panel *panel;
  76. struct msm_dp_ctrl *ctrl;
  77. struct msm_dp_display_mode msm_dp_mode;
  78. struct msm_dp msm_dp_display;
  79. /* wait for audio signaling */
  80. struct completion audio_comp;
  81. /* event related only access by event thread */
  82. struct mutex event_mutex;
  83. wait_queue_head_t event_q;
  84. u32 hpd_state;
  85. u32 event_pndx;
  86. u32 event_gndx;
  87. struct task_struct *ev_tsk;
  88. struct msm_dp_event event_list[DP_EVENT_Q_MAX];
  89. spinlock_t event_lock;
  90. bool wide_bus_supported;
  91. struct msm_dp_audio *audio;
  92. void __iomem *ahb_base;
  93. size_t ahb_len;
  94. void __iomem *aux_base;
  95. size_t aux_len;
  96. void __iomem *link_base;
  97. size_t link_len;
  98. void __iomem *p0_base;
  99. size_t p0_len;
  100. };
  101. struct msm_dp_desc {
  102. phys_addr_t io_start;
  103. unsigned int id;
  104. bool wide_bus_supported;
  105. };
  106. static const struct msm_dp_desc msm_dp_desc_glymur[] = {
  107. { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  108. { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  109. { .io_start = 0x0af64000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true },
  110. { .io_start = 0x0af6c000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true },
  111. {}
  112. };
  113. static const struct msm_dp_desc msm_dp_desc_sa8775p[] = {
  114. { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  115. { .io_start = 0x0af5c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  116. { .io_start = 0x22154000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  117. { .io_start = 0x2215c000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  118. {}
  119. };
  120. static const struct msm_dp_desc msm_dp_desc_sdm845[] = {
  121. { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0 },
  122. {}
  123. };
  124. static const struct msm_dp_desc msm_dp_desc_sc7180[] = {
  125. { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  126. {}
  127. };
  128. static const struct msm_dp_desc msm_dp_desc_sc7280[] = {
  129. { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  130. { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  131. {}
  132. };
  133. static const struct msm_dp_desc msm_dp_desc_sc8180x[] = {
  134. { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  135. { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  136. { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true },
  137. {}
  138. };
  139. static const struct msm_dp_desc msm_dp_desc_sc8280xp[] = {
  140. { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  141. { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  142. { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true },
  143. { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true },
  144. { .io_start = 0x22090000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  145. { .io_start = 0x22098000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  146. { .io_start = 0x2209a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true },
  147. { .io_start = 0x220a0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true },
  148. {}
  149. };
  150. static const struct msm_dp_desc msm_dp_desc_sm8650[] = {
  151. { .io_start = 0x0af54000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  152. {}
  153. };
  154. static const struct msm_dp_desc msm_dp_desc_x1e80100[] = {
  155. { .io_start = 0x0ae90000, .id = MSM_DP_CONTROLLER_0, .wide_bus_supported = true },
  156. { .io_start = 0x0ae98000, .id = MSM_DP_CONTROLLER_1, .wide_bus_supported = true },
  157. { .io_start = 0x0ae9a000, .id = MSM_DP_CONTROLLER_2, .wide_bus_supported = true },
  158. { .io_start = 0x0aea0000, .id = MSM_DP_CONTROLLER_3, .wide_bus_supported = true },
  159. {}
  160. };
  161. static const struct of_device_id msm_dp_dt_match[] = {
  162. { .compatible = "qcom,glymur-dp", .data = &msm_dp_desc_glymur },
  163. { .compatible = "qcom,sa8775p-dp", .data = &msm_dp_desc_sa8775p },
  164. { .compatible = "qcom,sc7180-dp", .data = &msm_dp_desc_sc7180 },
  165. { .compatible = "qcom,sc7280-dp", .data = &msm_dp_desc_sc7280 },
  166. { .compatible = "qcom,sc7280-edp", .data = &msm_dp_desc_sc7280 },
  167. { .compatible = "qcom,sc8180x-dp", .data = &msm_dp_desc_sc8180x },
  168. { .compatible = "qcom,sc8180x-edp", .data = &msm_dp_desc_sc8180x },
  169. { .compatible = "qcom,sc8280xp-dp", .data = &msm_dp_desc_sc8280xp },
  170. { .compatible = "qcom,sc8280xp-edp", .data = &msm_dp_desc_sc8280xp },
  171. { .compatible = "qcom,sdm845-dp", .data = &msm_dp_desc_sdm845 },
  172. { .compatible = "qcom,sm8350-dp", .data = &msm_dp_desc_sc7180 },
  173. { .compatible = "qcom,sm8650-dp", .data = &msm_dp_desc_sm8650 },
  174. { .compatible = "qcom,x1e80100-dp", .data = &msm_dp_desc_x1e80100 },
  175. {}
  176. };
  177. static struct msm_dp_display_private *dev_get_dp_display_private(struct device *dev)
  178. {
  179. struct msm_dp *dp = dev_get_drvdata(dev);
  180. return container_of(dp, struct msm_dp_display_private, msm_dp_display);
  181. }
  182. static int msm_dp_add_event(struct msm_dp_display_private *msm_dp_priv, u32 event,
  183. u32 data, u32 delay)
  184. {
  185. unsigned long flag;
  186. struct msm_dp_event *todo;
  187. int pndx;
  188. spin_lock_irqsave(&msm_dp_priv->event_lock, flag);
  189. pndx = msm_dp_priv->event_pndx + 1;
  190. pndx %= DP_EVENT_Q_MAX;
  191. if (pndx == msm_dp_priv->event_gndx) {
  192. pr_err("event_q is full: pndx=%d gndx=%d\n",
  193. msm_dp_priv->event_pndx, msm_dp_priv->event_gndx);
  194. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  195. return -EPERM;
  196. }
  197. todo = &msm_dp_priv->event_list[msm_dp_priv->event_pndx++];
  198. msm_dp_priv->event_pndx %= DP_EVENT_Q_MAX;
  199. todo->event_id = event;
  200. todo->data = data;
  201. todo->delay = delay;
  202. wake_up(&msm_dp_priv->event_q);
  203. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  204. return 0;
  205. }
  206. static int msm_dp_del_event(struct msm_dp_display_private *msm_dp_priv, u32 event)
  207. {
  208. unsigned long flag;
  209. struct msm_dp_event *todo;
  210. u32 gndx;
  211. spin_lock_irqsave(&msm_dp_priv->event_lock, flag);
  212. if (msm_dp_priv->event_pndx == msm_dp_priv->event_gndx) {
  213. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  214. return -ENOENT;
  215. }
  216. gndx = msm_dp_priv->event_gndx;
  217. while (msm_dp_priv->event_pndx != gndx) {
  218. todo = &msm_dp_priv->event_list[gndx];
  219. if (todo->event_id == event) {
  220. todo->event_id = EV_NO_EVENT; /* deleted */
  221. todo->delay = 0;
  222. }
  223. gndx++;
  224. gndx %= DP_EVENT_Q_MAX;
  225. }
  226. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  227. return 0;
  228. }
  229. void msm_dp_display_signal_audio_start(struct msm_dp *msm_dp_display)
  230. {
  231. struct msm_dp_display_private *dp;
  232. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  233. reinit_completion(&dp->audio_comp);
  234. }
  235. void msm_dp_display_signal_audio_complete(struct msm_dp *msm_dp_display)
  236. {
  237. struct msm_dp_display_private *dp;
  238. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  239. complete_all(&dp->audio_comp);
  240. }
  241. static int msm_dp_hpd_event_thread_start(struct msm_dp_display_private *msm_dp_priv);
  242. static int msm_dp_display_bind(struct device *dev, struct device *master,
  243. void *data)
  244. {
  245. int rc = 0;
  246. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  247. struct msm_drm_private *priv = dev_get_drvdata(master);
  248. struct drm_device *drm = priv->dev;
  249. dp->msm_dp_display.drm_dev = drm;
  250. priv->kms->dp[dp->id] = &dp->msm_dp_display;
  251. dp->drm_dev = drm;
  252. dp->aux->drm_dev = drm;
  253. rc = msm_dp_aux_register(dp->aux);
  254. if (rc) {
  255. DRM_ERROR("DRM DP AUX register failed\n");
  256. goto end;
  257. }
  258. rc = msm_dp_hpd_event_thread_start(dp);
  259. if (rc) {
  260. DRM_ERROR("Event thread create failed\n");
  261. goto end;
  262. }
  263. return 0;
  264. end:
  265. return rc;
  266. }
  267. static void msm_dp_display_unbind(struct device *dev, struct device *master,
  268. void *data)
  269. {
  270. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  271. struct msm_drm_private *priv = dev_get_drvdata(master);
  272. kthread_stop(dp->ev_tsk);
  273. of_dp_aux_depopulate_bus(dp->aux);
  274. msm_dp_aux_unregister(dp->aux);
  275. dp->drm_dev = NULL;
  276. dp->aux->drm_dev = NULL;
  277. priv->kms->dp[dp->id] = NULL;
  278. }
  279. static const struct component_ops msm_dp_display_comp_ops = {
  280. .bind = msm_dp_display_bind,
  281. .unbind = msm_dp_display_unbind,
  282. };
  283. static void msm_dp_display_send_hpd_event(struct msm_dp *msm_dp_display)
  284. {
  285. struct msm_dp_display_private *dp;
  286. struct drm_connector *connector;
  287. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  288. connector = dp->msm_dp_display.connector;
  289. drm_helper_hpd_irq_event(connector->dev);
  290. }
  291. static int msm_dp_display_send_hpd_notification(struct msm_dp_display_private *dp,
  292. bool hpd)
  293. {
  294. if ((hpd && dp->msm_dp_display.link_ready) ||
  295. (!hpd && !dp->msm_dp_display.link_ready)) {
  296. drm_dbg_dp(dp->drm_dev, "HPD already %s\n", str_on_off(hpd));
  297. return 0;
  298. }
  299. /* reset video pattern flag on disconnect */
  300. if (!hpd) {
  301. dp->panel->video_test = false;
  302. if (!dp->msm_dp_display.is_edp)
  303. drm_dp_set_subconnector_property(dp->msm_dp_display.connector,
  304. connector_status_disconnected,
  305. dp->panel->dpcd,
  306. dp->panel->downstream_ports);
  307. }
  308. dp->msm_dp_display.link_ready = hpd;
  309. drm_dbg_dp(dp->drm_dev, "type=%d hpd=%d\n",
  310. dp->msm_dp_display.connector_type, hpd);
  311. msm_dp_display_send_hpd_event(&dp->msm_dp_display);
  312. return 0;
  313. }
  314. static int msm_dp_display_lttpr_init(struct msm_dp_display_private *dp, u8 *dpcd)
  315. {
  316. int rc, lttpr_count;
  317. if (drm_dp_read_lttpr_common_caps(dp->aux, dpcd, dp->link->lttpr_common_caps))
  318. return 0;
  319. lttpr_count = drm_dp_lttpr_count(dp->link->lttpr_common_caps);
  320. rc = drm_dp_lttpr_init(dp->aux, lttpr_count);
  321. if (rc) {
  322. DRM_ERROR("failed to set LTTPRs transparency mode, rc=%d\n", rc);
  323. return 0;
  324. }
  325. return lttpr_count;
  326. }
  327. static int msm_dp_display_process_hpd_high(struct msm_dp_display_private *dp)
  328. {
  329. struct drm_connector *connector = dp->msm_dp_display.connector;
  330. const struct drm_display_info *info = &connector->display_info;
  331. int rc = 0;
  332. u8 dpcd[DP_RECEIVER_CAP_SIZE];
  333. rc = drm_dp_read_dpcd_caps(dp->aux, dpcd);
  334. if (rc)
  335. goto end;
  336. dp->link->lttpr_count = msm_dp_display_lttpr_init(dp, dpcd);
  337. rc = msm_dp_panel_read_sink_caps(dp->panel, connector);
  338. if (rc)
  339. goto end;
  340. msm_dp_link_process_request(dp->link);
  341. if (!dp->msm_dp_display.is_edp)
  342. drm_dp_set_subconnector_property(connector,
  343. connector_status_connected,
  344. dp->panel->dpcd,
  345. dp->panel->downstream_ports);
  346. dp->msm_dp_display.psr_supported = dp->panel->psr_cap.version && psr_enabled;
  347. dp->audio_supported = info->has_audio;
  348. msm_dp_panel_handle_sink_request(dp->panel);
  349. /*
  350. * set sink to normal operation mode -- D0
  351. * before dpcd read
  352. */
  353. msm_dp_link_psm_config(dp->link, &dp->panel->link_info, false);
  354. msm_dp_link_reset_phy_params_vx_px(dp->link);
  355. rc = msm_dp_ctrl_on_link(dp->ctrl);
  356. if (rc) {
  357. DRM_ERROR("failed to complete DP link training\n");
  358. goto end;
  359. }
  360. msm_dp_add_event(dp, EV_USER_NOTIFICATION, true, 0);
  361. end:
  362. return rc;
  363. }
  364. static void msm_dp_display_host_phy_init(struct msm_dp_display_private *dp)
  365. {
  366. drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n",
  367. dp->msm_dp_display.connector_type, dp->core_initialized,
  368. dp->phy_initialized);
  369. if (!dp->phy_initialized) {
  370. msm_dp_ctrl_phy_init(dp->ctrl);
  371. dp->phy_initialized = true;
  372. }
  373. }
  374. static void msm_dp_display_host_phy_exit(struct msm_dp_display_private *dp)
  375. {
  376. drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n",
  377. dp->msm_dp_display.connector_type, dp->core_initialized,
  378. dp->phy_initialized);
  379. if (dp->phy_initialized) {
  380. msm_dp_ctrl_phy_exit(dp->ctrl);
  381. dp->phy_initialized = false;
  382. }
  383. }
  384. static void msm_dp_display_host_init(struct msm_dp_display_private *dp)
  385. {
  386. drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n",
  387. dp->msm_dp_display.connector_type, dp->core_initialized,
  388. dp->phy_initialized);
  389. msm_dp_ctrl_core_clk_enable(dp->ctrl);
  390. msm_dp_ctrl_reset(dp->ctrl);
  391. msm_dp_ctrl_enable_irq(dp->ctrl);
  392. msm_dp_aux_init(dp->aux);
  393. dp->core_initialized = true;
  394. }
  395. static void msm_dp_display_host_deinit(struct msm_dp_display_private *dp)
  396. {
  397. drm_dbg_dp(dp->drm_dev, "type=%d core_init=%d phy_init=%d\n",
  398. dp->msm_dp_display.connector_type, dp->core_initialized,
  399. dp->phy_initialized);
  400. msm_dp_ctrl_reset(dp->ctrl);
  401. msm_dp_ctrl_disable_irq(dp->ctrl);
  402. msm_dp_aux_deinit(dp->aux);
  403. msm_dp_ctrl_core_clk_disable(dp->ctrl);
  404. dp->core_initialized = false;
  405. }
  406. static int msm_dp_display_usbpd_configure_cb(struct device *dev)
  407. {
  408. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  409. msm_dp_display_host_phy_init(dp);
  410. return msm_dp_display_process_hpd_high(dp);
  411. }
  412. static int msm_dp_display_notify_disconnect(struct device *dev)
  413. {
  414. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  415. msm_dp_add_event(dp, EV_USER_NOTIFICATION, false, 0);
  416. return 0;
  417. }
  418. static void msm_dp_display_handle_video_request(struct msm_dp_display_private *dp)
  419. {
  420. if (dp->link->sink_request & DP_TEST_LINK_VIDEO_PATTERN) {
  421. dp->panel->video_test = true;
  422. msm_dp_link_send_test_response(dp->link);
  423. }
  424. }
  425. static int msm_dp_display_handle_port_status_changed(struct msm_dp_display_private *dp)
  426. {
  427. int rc = 0;
  428. if (drm_dp_is_branch(dp->panel->dpcd) && dp->link->sink_count == 0) {
  429. drm_dbg_dp(dp->drm_dev, "sink count is zero, nothing to do\n");
  430. if (dp->hpd_state != ST_DISCONNECTED) {
  431. dp->hpd_state = ST_DISCONNECT_PENDING;
  432. msm_dp_add_event(dp, EV_USER_NOTIFICATION, false, 0);
  433. }
  434. } else {
  435. if (dp->hpd_state == ST_DISCONNECTED) {
  436. dp->hpd_state = ST_MAINLINK_READY;
  437. rc = msm_dp_display_process_hpd_high(dp);
  438. if (rc)
  439. dp->hpd_state = ST_DISCONNECTED;
  440. }
  441. }
  442. return rc;
  443. }
  444. static int msm_dp_display_handle_irq_hpd(struct msm_dp_display_private *dp)
  445. {
  446. u32 sink_request = dp->link->sink_request;
  447. drm_dbg_dp(dp->drm_dev, "%d\n", sink_request);
  448. if (dp->hpd_state == ST_DISCONNECTED) {
  449. if (sink_request & DP_LINK_STATUS_UPDATED) {
  450. drm_dbg_dp(dp->drm_dev, "Disconnected sink_request: %d\n",
  451. sink_request);
  452. DRM_ERROR("Disconnected, no DP_LINK_STATUS_UPDATED\n");
  453. return -EINVAL;
  454. }
  455. }
  456. msm_dp_ctrl_handle_sink_request(dp->ctrl);
  457. if (sink_request & DP_TEST_LINK_VIDEO_PATTERN)
  458. msm_dp_display_handle_video_request(dp);
  459. return 0;
  460. }
  461. static int msm_dp_display_usbpd_attention_cb(struct device *dev)
  462. {
  463. int rc = 0;
  464. u32 sink_request;
  465. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  466. /* check for any test request issued by sink */
  467. rc = msm_dp_link_process_request(dp->link);
  468. if (!rc) {
  469. sink_request = dp->link->sink_request;
  470. drm_dbg_dp(dp->drm_dev, "hpd_state=%d sink_request=%d\n",
  471. dp->hpd_state, sink_request);
  472. if (sink_request & DS_PORT_STATUS_CHANGED)
  473. rc = msm_dp_display_handle_port_status_changed(dp);
  474. else
  475. rc = msm_dp_display_handle_irq_hpd(dp);
  476. }
  477. return rc;
  478. }
  479. static int msm_dp_hpd_plug_handle(struct msm_dp_display_private *dp, u32 data)
  480. {
  481. u32 state;
  482. int ret;
  483. struct platform_device *pdev = dp->msm_dp_display.pdev;
  484. msm_dp_aux_enable_xfers(dp->aux, true);
  485. mutex_lock(&dp->event_mutex);
  486. state = dp->hpd_state;
  487. drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n",
  488. dp->msm_dp_display.connector_type, state);
  489. if (state == ST_DISPLAY_OFF) {
  490. mutex_unlock(&dp->event_mutex);
  491. return 0;
  492. }
  493. if (state == ST_MAINLINK_READY || state == ST_CONNECTED) {
  494. mutex_unlock(&dp->event_mutex);
  495. return 0;
  496. }
  497. if (state == ST_DISCONNECT_PENDING) {
  498. /* wait until ST_DISCONNECTED */
  499. msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 1); /* delay = 1 */
  500. mutex_unlock(&dp->event_mutex);
  501. return 0;
  502. }
  503. ret = pm_runtime_resume_and_get(&pdev->dev);
  504. if (ret) {
  505. DRM_ERROR("failed to pm_runtime_resume\n");
  506. mutex_unlock(&dp->event_mutex);
  507. return ret;
  508. }
  509. ret = msm_dp_display_usbpd_configure_cb(&pdev->dev);
  510. if (ret) { /* link train failed */
  511. dp->hpd_state = ST_DISCONNECTED;
  512. pm_runtime_put_sync(&pdev->dev);
  513. } else {
  514. dp->hpd_state = ST_MAINLINK_READY;
  515. }
  516. drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n",
  517. dp->msm_dp_display.connector_type, state);
  518. mutex_unlock(&dp->event_mutex);
  519. /* uevent will complete connection part */
  520. return 0;
  521. };
  522. static void msm_dp_display_handle_plugged_change(struct msm_dp *msm_dp_display,
  523. bool plugged)
  524. {
  525. struct msm_dp_display_private *dp;
  526. dp = container_of(msm_dp_display,
  527. struct msm_dp_display_private, msm_dp_display);
  528. /* notify audio subsystem only if sink supports audio */
  529. if (dp->audio_supported)
  530. drm_connector_hdmi_audio_plugged_notify(msm_dp_display->connector,
  531. plugged);
  532. }
  533. static int msm_dp_hpd_unplug_handle(struct msm_dp_display_private *dp, u32 data)
  534. {
  535. u32 state;
  536. struct platform_device *pdev = dp->msm_dp_display.pdev;
  537. msm_dp_aux_enable_xfers(dp->aux, false);
  538. mutex_lock(&dp->event_mutex);
  539. state = dp->hpd_state;
  540. drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n",
  541. dp->msm_dp_display.connector_type, state);
  542. /* unplugged, no more irq_hpd handle */
  543. msm_dp_del_event(dp, EV_IRQ_HPD_INT);
  544. if (state == ST_DISCONNECTED) {
  545. /* triggered by irq_hdp with sink_count = 0 */
  546. if (dp->link->sink_count == 0) {
  547. msm_dp_display_host_phy_exit(dp);
  548. }
  549. msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev);
  550. mutex_unlock(&dp->event_mutex);
  551. return 0;
  552. } else if (state == ST_DISCONNECT_PENDING) {
  553. mutex_unlock(&dp->event_mutex);
  554. return 0;
  555. } else if (state == ST_MAINLINK_READY) {
  556. msm_dp_ctrl_off_link(dp->ctrl);
  557. msm_dp_display_host_phy_exit(dp);
  558. dp->hpd_state = ST_DISCONNECTED;
  559. msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev);
  560. pm_runtime_put_sync(&pdev->dev);
  561. mutex_unlock(&dp->event_mutex);
  562. return 0;
  563. }
  564. /*
  565. * We don't need separate work for disconnect as
  566. * connect/attention interrupts are disabled
  567. */
  568. msm_dp_display_notify_disconnect(&dp->msm_dp_display.pdev->dev);
  569. if (state == ST_DISPLAY_OFF) {
  570. dp->hpd_state = ST_DISCONNECTED;
  571. } else {
  572. dp->hpd_state = ST_DISCONNECT_PENDING;
  573. }
  574. /* signal the disconnect event early to ensure proper teardown */
  575. msm_dp_display_handle_plugged_change(&dp->msm_dp_display, false);
  576. drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n",
  577. dp->msm_dp_display.connector_type, state);
  578. /* uevent will complete disconnection part */
  579. pm_runtime_put_sync(&pdev->dev);
  580. mutex_unlock(&dp->event_mutex);
  581. return 0;
  582. }
  583. static int msm_dp_irq_hpd_handle(struct msm_dp_display_private *dp, u32 data)
  584. {
  585. u32 state;
  586. mutex_lock(&dp->event_mutex);
  587. /* irq_hpd can happen at either connected or disconnected state */
  588. state = dp->hpd_state;
  589. drm_dbg_dp(dp->drm_dev, "Before, type=%d hpd_state=%d\n",
  590. dp->msm_dp_display.connector_type, state);
  591. if (state == ST_DISPLAY_OFF) {
  592. mutex_unlock(&dp->event_mutex);
  593. return 0;
  594. }
  595. if (state == ST_MAINLINK_READY || state == ST_DISCONNECT_PENDING) {
  596. /* wait until ST_CONNECTED */
  597. msm_dp_add_event(dp, EV_IRQ_HPD_INT, 0, 1); /* delay = 1 */
  598. mutex_unlock(&dp->event_mutex);
  599. return 0;
  600. }
  601. msm_dp_display_usbpd_attention_cb(&dp->msm_dp_display.pdev->dev);
  602. drm_dbg_dp(dp->drm_dev, "After, type=%d hpd_state=%d\n",
  603. dp->msm_dp_display.connector_type, state);
  604. mutex_unlock(&dp->event_mutex);
  605. return 0;
  606. }
  607. static void msm_dp_display_deinit_sub_modules(struct msm_dp_display_private *dp)
  608. {
  609. msm_dp_audio_put(dp->audio);
  610. msm_dp_panel_put(dp->panel);
  611. msm_dp_aux_put(dp->aux);
  612. }
  613. static int msm_dp_init_sub_modules(struct msm_dp_display_private *dp)
  614. {
  615. int rc = 0;
  616. struct device *dev = &dp->msm_dp_display.pdev->dev;
  617. struct phy *phy;
  618. phy = devm_phy_get(dev, "dp");
  619. if (IS_ERR(phy))
  620. return PTR_ERR(phy);
  621. rc = phy_set_mode_ext(phy, PHY_MODE_DP,
  622. dp->msm_dp_display.is_edp ? PHY_SUBMODE_EDP : PHY_SUBMODE_DP);
  623. if (rc) {
  624. DRM_ERROR("failed to set phy submode, rc = %d\n", rc);
  625. goto error;
  626. }
  627. dp->aux = msm_dp_aux_get(dev, phy, dp->msm_dp_display.is_edp, dp->aux_base);
  628. if (IS_ERR(dp->aux)) {
  629. rc = PTR_ERR(dp->aux);
  630. DRM_ERROR("failed to initialize aux, rc = %d\n", rc);
  631. dp->aux = NULL;
  632. goto error;
  633. }
  634. dp->link = msm_dp_link_get(dev, dp->aux);
  635. if (IS_ERR(dp->link)) {
  636. rc = PTR_ERR(dp->link);
  637. DRM_ERROR("failed to initialize link, rc = %d\n", rc);
  638. dp->link = NULL;
  639. goto error_link;
  640. }
  641. dp->panel = msm_dp_panel_get(dev, dp->aux, dp->link, dp->link_base, dp->p0_base);
  642. if (IS_ERR(dp->panel)) {
  643. rc = PTR_ERR(dp->panel);
  644. DRM_ERROR("failed to initialize panel, rc = %d\n", rc);
  645. dp->panel = NULL;
  646. goto error_link;
  647. }
  648. dp->ctrl = msm_dp_ctrl_get(dev, dp->link, dp->panel, dp->aux,
  649. phy, dp->ahb_base, dp->link_base);
  650. if (IS_ERR(dp->ctrl)) {
  651. rc = PTR_ERR(dp->ctrl);
  652. DRM_ERROR("failed to initialize ctrl, rc = %d\n", rc);
  653. dp->ctrl = NULL;
  654. goto error_ctrl;
  655. }
  656. dp->audio = msm_dp_audio_get(dp->msm_dp_display.pdev, dp->link_base);
  657. if (IS_ERR(dp->audio)) {
  658. rc = PTR_ERR(dp->audio);
  659. pr_err("failed to initialize audio, rc = %d\n", rc);
  660. dp->audio = NULL;
  661. goto error_ctrl;
  662. }
  663. return rc;
  664. error_ctrl:
  665. msm_dp_panel_put(dp->panel);
  666. error_link:
  667. msm_dp_aux_put(dp->aux);
  668. error:
  669. return rc;
  670. }
  671. static int msm_dp_display_set_mode(struct msm_dp *msm_dp_display,
  672. struct msm_dp_display_mode *mode)
  673. {
  674. struct msm_dp_display_private *dp;
  675. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  676. drm_mode_copy(&dp->panel->msm_dp_mode.drm_mode, &mode->drm_mode);
  677. dp->panel->msm_dp_mode.bpp = mode->bpp;
  678. dp->panel->msm_dp_mode.out_fmt_is_yuv_420 = mode->out_fmt_is_yuv_420;
  679. msm_dp_panel_init_panel_info(dp->panel);
  680. return 0;
  681. }
  682. static int msm_dp_display_enable(struct msm_dp_display_private *dp, bool force_link_train)
  683. {
  684. int rc = 0;
  685. struct msm_dp *msm_dp_display = &dp->msm_dp_display;
  686. drm_dbg_dp(dp->drm_dev, "sink_count=%d\n", dp->link->sink_count);
  687. if (msm_dp_display->power_on) {
  688. drm_dbg_dp(dp->drm_dev, "Link already setup, return\n");
  689. return 0;
  690. }
  691. rc = msm_dp_ctrl_on_stream(dp->ctrl, force_link_train);
  692. if (!rc)
  693. msm_dp_display->power_on = true;
  694. return rc;
  695. }
  696. static int msm_dp_display_post_enable(struct msm_dp *msm_dp_display)
  697. {
  698. struct msm_dp_display_private *dp;
  699. u32 rate;
  700. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  701. rate = dp->link->link_params.rate;
  702. if (dp->audio_supported) {
  703. dp->audio->bw_code = drm_dp_link_rate_to_bw_code(rate);
  704. dp->audio->lane_count = dp->link->link_params.num_lanes;
  705. }
  706. /* signal the connect event late to synchronize video and display */
  707. msm_dp_display_handle_plugged_change(msm_dp_display, true);
  708. if (msm_dp_display->psr_supported)
  709. msm_dp_ctrl_config_psr(dp->ctrl);
  710. return 0;
  711. }
  712. static int msm_dp_display_disable(struct msm_dp_display_private *dp)
  713. {
  714. struct msm_dp *msm_dp_display = &dp->msm_dp_display;
  715. if (!msm_dp_display->power_on)
  716. return 0;
  717. /* wait only if audio was enabled */
  718. if (msm_dp_display->audio_enabled) {
  719. /* signal the disconnect event */
  720. msm_dp_display_handle_plugged_change(msm_dp_display, false);
  721. if (!wait_for_completion_timeout(&dp->audio_comp,
  722. HZ * 5))
  723. DRM_ERROR("audio comp timeout\n");
  724. }
  725. msm_dp_display->audio_enabled = false;
  726. if (dp->link->sink_count == 0) {
  727. /*
  728. * irq_hpd with sink_count = 0
  729. * hdmi unplugged out of dongle
  730. */
  731. msm_dp_ctrl_off_link_stream(dp->ctrl);
  732. } else {
  733. /*
  734. * unplugged interrupt
  735. * dongle unplugged out of DUT
  736. */
  737. msm_dp_ctrl_off(dp->ctrl);
  738. msm_dp_display_host_phy_exit(dp);
  739. }
  740. msm_dp_display->power_on = false;
  741. drm_dbg_dp(dp->drm_dev, "sink count: %d\n", dp->link->sink_count);
  742. return 0;
  743. }
  744. /**
  745. * msm_dp_bridge_mode_valid - callback to determine if specified mode is valid
  746. * @bridge: Pointer to drm bridge structure
  747. * @info: display info
  748. * @mode: Pointer to drm mode structure
  749. * Returns: Validity status for specified mode
  750. */
  751. enum drm_mode_status msm_dp_bridge_mode_valid(struct drm_bridge *bridge,
  752. const struct drm_display_info *info,
  753. const struct drm_display_mode *mode)
  754. {
  755. const u32 num_components = 3, default_bpp = 24;
  756. struct msm_dp_display_private *msm_dp_display;
  757. struct msm_dp_link_info *link_info;
  758. u32 mode_rate_khz = 0, supported_rate_khz = 0, mode_bpp = 0;
  759. struct msm_dp *dp;
  760. int mode_pclk_khz = mode->clock;
  761. dp = to_dp_bridge(bridge)->msm_dp_display;
  762. if (!dp || !mode_pclk_khz || !dp->connector) {
  763. DRM_ERROR("invalid params\n");
  764. return -EINVAL;
  765. }
  766. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  767. link_info = &msm_dp_display->panel->link_info;
  768. if ((drm_mode_is_420_only(&dp->connector->display_info, mode) &&
  769. msm_dp_display->panel->vsc_sdp_supported) ||
  770. msm_dp_wide_bus_available(dp))
  771. mode_pclk_khz /= 2;
  772. if (mode_pclk_khz > DP_MAX_PIXEL_CLK_KHZ)
  773. return MODE_CLOCK_HIGH;
  774. mode_bpp = dp->connector->display_info.bpc * num_components;
  775. if (!mode_bpp)
  776. mode_bpp = default_bpp;
  777. mode_bpp = msm_dp_panel_get_mode_bpp(msm_dp_display->panel,
  778. mode_bpp, mode_pclk_khz);
  779. mode_rate_khz = mode_pclk_khz * mode_bpp;
  780. supported_rate_khz = link_info->num_lanes * link_info->rate * 8;
  781. if (mode_rate_khz > supported_rate_khz)
  782. return MODE_BAD;
  783. return MODE_OK;
  784. }
  785. int msm_dp_display_get_modes(struct msm_dp *dp)
  786. {
  787. struct msm_dp_display_private *msm_dp_display;
  788. if (!dp) {
  789. DRM_ERROR("invalid params\n");
  790. return 0;
  791. }
  792. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  793. return msm_dp_panel_get_modes(msm_dp_display->panel,
  794. dp->connector);
  795. }
  796. bool msm_dp_display_check_video_test(struct msm_dp *dp)
  797. {
  798. struct msm_dp_display_private *msm_dp_display;
  799. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  800. return msm_dp_display->panel->video_test;
  801. }
  802. int msm_dp_display_get_test_bpp(struct msm_dp *dp)
  803. {
  804. struct msm_dp_display_private *msm_dp_display;
  805. if (!dp) {
  806. DRM_ERROR("invalid params\n");
  807. return 0;
  808. }
  809. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  810. return msm_dp_link_bit_depth_to_bpp(
  811. msm_dp_display->link->test_video.test_bit_depth);
  812. }
  813. void msm_dp_snapshot(struct msm_disp_state *disp_state, struct msm_dp *dp)
  814. {
  815. struct msm_dp_display_private *msm_dp_display;
  816. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  817. /*
  818. * if we are reading registers we need the link clocks to be on
  819. * however till DP cable is connected this will not happen as we
  820. * do not know the resolution to power up with. Hence check the
  821. * power_on status before dumping DP registers to avoid crash due
  822. * to unclocked access
  823. */
  824. mutex_lock(&msm_dp_display->event_mutex);
  825. if (!dp->power_on) {
  826. mutex_unlock(&msm_dp_display->event_mutex);
  827. return;
  828. }
  829. msm_disp_snapshot_add_block(disp_state, msm_dp_display->ahb_len,
  830. msm_dp_display->ahb_base, "dp_ahb");
  831. msm_disp_snapshot_add_block(disp_state, msm_dp_display->aux_len,
  832. msm_dp_display->aux_base, "dp_aux");
  833. msm_disp_snapshot_add_block(disp_state, msm_dp_display->link_len,
  834. msm_dp_display->link_base, "dp_link");
  835. msm_disp_snapshot_add_block(disp_state, msm_dp_display->p0_len,
  836. msm_dp_display->p0_base, "dp_p0");
  837. mutex_unlock(&msm_dp_display->event_mutex);
  838. }
  839. void msm_dp_display_set_psr(struct msm_dp *msm_dp_display, bool enter)
  840. {
  841. struct msm_dp_display_private *dp;
  842. if (!msm_dp_display) {
  843. DRM_ERROR("invalid params\n");
  844. return;
  845. }
  846. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  847. msm_dp_ctrl_set_psr(dp->ctrl, enter);
  848. }
  849. static int hpd_event_thread(void *data)
  850. {
  851. struct msm_dp_display_private *msm_dp_priv;
  852. unsigned long flag;
  853. struct msm_dp_event *todo;
  854. int timeout_mode = 0;
  855. msm_dp_priv = (struct msm_dp_display_private *)data;
  856. while (1) {
  857. if (timeout_mode) {
  858. wait_event_timeout(msm_dp_priv->event_q,
  859. (msm_dp_priv->event_pndx == msm_dp_priv->event_gndx) ||
  860. kthread_should_stop(), EVENT_TIMEOUT);
  861. } else {
  862. wait_event_interruptible(msm_dp_priv->event_q,
  863. (msm_dp_priv->event_pndx != msm_dp_priv->event_gndx) ||
  864. kthread_should_stop());
  865. }
  866. if (kthread_should_stop())
  867. break;
  868. spin_lock_irqsave(&msm_dp_priv->event_lock, flag);
  869. todo = &msm_dp_priv->event_list[msm_dp_priv->event_gndx];
  870. if (todo->delay) {
  871. struct msm_dp_event *todo_next;
  872. msm_dp_priv->event_gndx++;
  873. msm_dp_priv->event_gndx %= DP_EVENT_Q_MAX;
  874. /* re enter delay event into q */
  875. todo_next = &msm_dp_priv->event_list[msm_dp_priv->event_pndx++];
  876. msm_dp_priv->event_pndx %= DP_EVENT_Q_MAX;
  877. todo_next->event_id = todo->event_id;
  878. todo_next->data = todo->data;
  879. todo_next->delay = todo->delay - 1;
  880. /* clean up older event */
  881. todo->event_id = EV_NO_EVENT;
  882. todo->delay = 0;
  883. /* switch to timeout mode */
  884. timeout_mode = 1;
  885. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  886. continue;
  887. }
  888. /* timeout with no events in q */
  889. if (msm_dp_priv->event_pndx == msm_dp_priv->event_gndx) {
  890. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  891. continue;
  892. }
  893. msm_dp_priv->event_gndx++;
  894. msm_dp_priv->event_gndx %= DP_EVENT_Q_MAX;
  895. timeout_mode = 0;
  896. spin_unlock_irqrestore(&msm_dp_priv->event_lock, flag);
  897. switch (todo->event_id) {
  898. case EV_HPD_PLUG_INT:
  899. msm_dp_hpd_plug_handle(msm_dp_priv, todo->data);
  900. break;
  901. case EV_HPD_UNPLUG_INT:
  902. msm_dp_hpd_unplug_handle(msm_dp_priv, todo->data);
  903. break;
  904. case EV_IRQ_HPD_INT:
  905. msm_dp_irq_hpd_handle(msm_dp_priv, todo->data);
  906. break;
  907. case EV_USER_NOTIFICATION:
  908. msm_dp_display_send_hpd_notification(msm_dp_priv,
  909. todo->data);
  910. break;
  911. default:
  912. break;
  913. }
  914. }
  915. return 0;
  916. }
  917. static int msm_dp_hpd_event_thread_start(struct msm_dp_display_private *msm_dp_priv)
  918. {
  919. /* set event q to empty */
  920. msm_dp_priv->event_gndx = 0;
  921. msm_dp_priv->event_pndx = 0;
  922. msm_dp_priv->ev_tsk = kthread_run(hpd_event_thread, msm_dp_priv, "dp_hpd_handler");
  923. if (IS_ERR(msm_dp_priv->ev_tsk))
  924. return PTR_ERR(msm_dp_priv->ev_tsk);
  925. return 0;
  926. }
  927. static irqreturn_t msm_dp_display_irq_handler(int irq, void *dev_id)
  928. {
  929. struct msm_dp_display_private *dp = dev_id;
  930. irqreturn_t ret = IRQ_NONE;
  931. u32 hpd_isr_status;
  932. if (!dp) {
  933. DRM_ERROR("invalid data\n");
  934. return IRQ_NONE;
  935. }
  936. hpd_isr_status = msm_dp_aux_get_hpd_intr_status(dp->aux);
  937. if (hpd_isr_status & 0x0F) {
  938. drm_dbg_dp(dp->drm_dev, "type=%d isr=0x%x\n",
  939. dp->msm_dp_display.connector_type, hpd_isr_status);
  940. /* hpd related interrupts */
  941. if (hpd_isr_status & DP_DP_HPD_PLUG_INT_MASK)
  942. msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0);
  943. if (hpd_isr_status & DP_DP_IRQ_HPD_INT_MASK) {
  944. msm_dp_add_event(dp, EV_IRQ_HPD_INT, 0, 0);
  945. }
  946. if (hpd_isr_status & DP_DP_HPD_REPLUG_INT_MASK) {
  947. msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
  948. msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 3);
  949. }
  950. if (hpd_isr_status & DP_DP_HPD_UNPLUG_INT_MASK)
  951. msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
  952. ret = IRQ_HANDLED;
  953. }
  954. /* DP controller isr */
  955. ret |= msm_dp_ctrl_isr(dp->ctrl);
  956. return ret;
  957. }
  958. static int msm_dp_display_request_irq(struct msm_dp_display_private *dp)
  959. {
  960. int rc = 0;
  961. struct platform_device *pdev = dp->msm_dp_display.pdev;
  962. dp->irq = platform_get_irq(pdev, 0);
  963. if (dp->irq < 0) {
  964. DRM_ERROR("failed to get irq\n");
  965. return dp->irq;
  966. }
  967. rc = devm_request_irq(&pdev->dev, dp->irq, msm_dp_display_irq_handler,
  968. IRQF_TRIGGER_HIGH|IRQF_NO_AUTOEN,
  969. "dp_display_isr", dp);
  970. if (rc < 0) {
  971. DRM_ERROR("failed to request IRQ%u: %d\n",
  972. dp->irq, rc);
  973. return rc;
  974. }
  975. return 0;
  976. }
  977. static const struct msm_dp_desc *msm_dp_display_get_desc(struct platform_device *pdev)
  978. {
  979. const struct msm_dp_desc *descs = of_device_get_match_data(&pdev->dev);
  980. struct resource *res;
  981. int i;
  982. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  983. if (!res)
  984. return NULL;
  985. for (i = 0; i < descs[i].io_start; i++) {
  986. if (descs[i].io_start == res->start)
  987. return &descs[i];
  988. }
  989. dev_err(&pdev->dev, "unknown displayport instance\n");
  990. return NULL;
  991. }
  992. static int msm_dp_display_probe_tail(struct device *dev)
  993. {
  994. struct msm_dp *dp = dev_get_drvdata(dev);
  995. int ret;
  996. /*
  997. * External bridges are mandatory for eDP interfaces: one has to
  998. * provide at least an eDP panel (which gets wrapped into panel-bridge).
  999. *
  1000. * For DisplayPort interfaces external bridges are optional, so
  1001. * silently ignore an error if one is not present (-ENODEV).
  1002. */
  1003. dp->next_bridge = devm_drm_of_get_bridge(&dp->pdev->dev, dp->pdev->dev.of_node, 1, 0);
  1004. if (IS_ERR(dp->next_bridge)) {
  1005. ret = PTR_ERR(dp->next_bridge);
  1006. dp->next_bridge = NULL;
  1007. if (dp->is_edp || ret != -ENODEV)
  1008. return ret;
  1009. }
  1010. ret = component_add(dev, &msm_dp_display_comp_ops);
  1011. if (ret)
  1012. DRM_ERROR("component add failed, rc=%d\n", ret);
  1013. return ret;
  1014. }
  1015. static int msm_dp_auxbus_done_probe(struct drm_dp_aux *aux)
  1016. {
  1017. return msm_dp_display_probe_tail(aux->dev);
  1018. }
  1019. static int msm_dp_display_get_connector_type(struct platform_device *pdev,
  1020. const struct msm_dp_desc *desc)
  1021. {
  1022. struct device_node *node = pdev->dev.of_node;
  1023. struct device_node *aux_bus = of_get_child_by_name(node, "aux-bus");
  1024. struct device_node *panel = of_get_child_by_name(aux_bus, "panel");
  1025. int connector_type;
  1026. if (panel)
  1027. connector_type = DRM_MODE_CONNECTOR_eDP;
  1028. else
  1029. connector_type = DRM_MODE_SUBCONNECTOR_DisplayPort;
  1030. of_node_put(panel);
  1031. of_node_put(aux_bus);
  1032. return connector_type;
  1033. }
  1034. static void __iomem *msm_dp_ioremap(struct platform_device *pdev, int idx, size_t *len)
  1035. {
  1036. struct resource *res;
  1037. void __iomem *base;
  1038. base = devm_platform_get_and_ioremap_resource(pdev, idx, &res);
  1039. if (!IS_ERR(base))
  1040. *len = resource_size(res);
  1041. return base;
  1042. }
  1043. #define DP_DEFAULT_AHB_OFFSET 0x0000
  1044. #define DP_DEFAULT_AHB_SIZE 0x0200
  1045. #define DP_DEFAULT_AUX_OFFSET 0x0200
  1046. #define DP_DEFAULT_AUX_SIZE 0x0200
  1047. #define DP_DEFAULT_LINK_OFFSET 0x0400
  1048. #define DP_DEFAULT_LINK_SIZE 0x0C00
  1049. #define DP_DEFAULT_P0_OFFSET 0x1000
  1050. #define DP_DEFAULT_P0_SIZE 0x0400
  1051. static int msm_dp_display_get_io(struct msm_dp_display_private *display)
  1052. {
  1053. struct platform_device *pdev = display->msm_dp_display.pdev;
  1054. display->ahb_base = msm_dp_ioremap(pdev, 0, &display->ahb_len);
  1055. if (IS_ERR(display->ahb_base))
  1056. return PTR_ERR(display->ahb_base);
  1057. display->aux_base = msm_dp_ioremap(pdev, 1, &display->aux_len);
  1058. if (IS_ERR(display->aux_base)) {
  1059. if (display->aux_base != ERR_PTR(-EINVAL)) {
  1060. DRM_ERROR("unable to remap aux region: %pe\n", display->aux_base);
  1061. return PTR_ERR(display->aux_base);
  1062. }
  1063. /*
  1064. * The initial binding had a single reg, but in order to
  1065. * support variation in the sub-region sizes this was split.
  1066. * msm_dp_ioremap() will fail with -EINVAL here if only a single
  1067. * reg is specified, so fill in the sub-region offsets and
  1068. * lengths based on this single region.
  1069. */
  1070. if (display->ahb_len < DP_DEFAULT_P0_OFFSET + DP_DEFAULT_P0_SIZE) {
  1071. DRM_ERROR("legacy memory region not large enough\n");
  1072. return -EINVAL;
  1073. }
  1074. display->ahb_len = DP_DEFAULT_AHB_SIZE;
  1075. display->aux_base = display->ahb_base + DP_DEFAULT_AUX_OFFSET;
  1076. display->aux_len = DP_DEFAULT_AUX_SIZE;
  1077. display->link_base = display->ahb_base + DP_DEFAULT_LINK_OFFSET;
  1078. display->link_len = DP_DEFAULT_LINK_SIZE;
  1079. display->p0_base = display->ahb_base + DP_DEFAULT_P0_OFFSET;
  1080. display->p0_len = DP_DEFAULT_P0_SIZE;
  1081. return 0;
  1082. }
  1083. display->link_base = msm_dp_ioremap(pdev, 2, &display->link_len);
  1084. if (IS_ERR(display->link_base)) {
  1085. DRM_ERROR("unable to remap link region: %pe\n", display->link_base);
  1086. return PTR_ERR(display->link_base);
  1087. }
  1088. display->p0_base = msm_dp_ioremap(pdev, 3, &display->p0_len);
  1089. if (IS_ERR(display->p0_base)) {
  1090. DRM_ERROR("unable to remap p0 region: %pe\n", display->p0_base);
  1091. return PTR_ERR(display->p0_base);
  1092. }
  1093. return 0;
  1094. }
  1095. static int msm_dp_display_probe(struct platform_device *pdev)
  1096. {
  1097. int rc = 0;
  1098. struct msm_dp_display_private *dp;
  1099. const struct msm_dp_desc *desc;
  1100. if (!pdev || !pdev->dev.of_node) {
  1101. DRM_ERROR("pdev not found\n");
  1102. return -ENODEV;
  1103. }
  1104. dp = devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL);
  1105. if (!dp)
  1106. return -ENOMEM;
  1107. desc = msm_dp_display_get_desc(pdev);
  1108. if (!desc)
  1109. return -EINVAL;
  1110. dp->msm_dp_display.pdev = pdev;
  1111. dp->id = desc->id;
  1112. dp->msm_dp_display.connector_type = msm_dp_display_get_connector_type(pdev, desc);
  1113. dp->wide_bus_supported = desc->wide_bus_supported;
  1114. dp->msm_dp_display.is_edp =
  1115. (dp->msm_dp_display.connector_type == DRM_MODE_CONNECTOR_eDP);
  1116. rc = msm_dp_display_get_io(dp);
  1117. if (rc)
  1118. return rc;
  1119. rc = msm_dp_init_sub_modules(dp);
  1120. if (rc) {
  1121. DRM_ERROR("init sub module failed\n");
  1122. return -EPROBE_DEFER;
  1123. }
  1124. /* setup event q */
  1125. mutex_init(&dp->event_mutex);
  1126. init_waitqueue_head(&dp->event_q);
  1127. spin_lock_init(&dp->event_lock);
  1128. /* Store DP audio handle inside DP display */
  1129. dp->msm_dp_display.msm_dp_audio = dp->audio;
  1130. init_completion(&dp->audio_comp);
  1131. platform_set_drvdata(pdev, &dp->msm_dp_display);
  1132. rc = devm_pm_runtime_enable(&pdev->dev);
  1133. if (rc)
  1134. goto err;
  1135. rc = msm_dp_display_request_irq(dp);
  1136. if (rc)
  1137. goto err;
  1138. if (dp->msm_dp_display.is_edp) {
  1139. rc = devm_of_dp_aux_populate_bus(dp->aux, msm_dp_auxbus_done_probe);
  1140. if (rc) {
  1141. DRM_ERROR("eDP auxbus population failed, rc=%d\n", rc);
  1142. goto err;
  1143. }
  1144. } else {
  1145. rc = msm_dp_display_probe_tail(&pdev->dev);
  1146. if (rc)
  1147. goto err;
  1148. }
  1149. return rc;
  1150. err:
  1151. msm_dp_display_deinit_sub_modules(dp);
  1152. return rc;
  1153. }
  1154. static void msm_dp_display_remove(struct platform_device *pdev)
  1155. {
  1156. struct msm_dp_display_private *dp = dev_get_dp_display_private(&pdev->dev);
  1157. component_del(&pdev->dev, &msm_dp_display_comp_ops);
  1158. msm_dp_display_deinit_sub_modules(dp);
  1159. platform_set_drvdata(pdev, NULL);
  1160. }
  1161. static int msm_dp_pm_runtime_suspend(struct device *dev)
  1162. {
  1163. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  1164. disable_irq(dp->irq);
  1165. if (dp->msm_dp_display.is_edp) {
  1166. msm_dp_display_host_phy_exit(dp);
  1167. msm_dp_aux_hpd_disable(dp->aux);
  1168. }
  1169. msm_dp_display_host_deinit(dp);
  1170. return 0;
  1171. }
  1172. static int msm_dp_pm_runtime_resume(struct device *dev)
  1173. {
  1174. struct msm_dp_display_private *dp = dev_get_dp_display_private(dev);
  1175. /*
  1176. * for eDP, host cotroller, HPD block and PHY are enabled here
  1177. * but with HPD irq disabled
  1178. *
  1179. * for DP, only host controller is enabled here.
  1180. * HPD block is enabled at msm_dp_bridge_hpd_enable()
  1181. * PHY will be enabled at plugin handler later
  1182. */
  1183. msm_dp_display_host_init(dp);
  1184. if (dp->msm_dp_display.is_edp) {
  1185. msm_dp_aux_hpd_enable(dp->aux);
  1186. msm_dp_display_host_phy_init(dp);
  1187. }
  1188. enable_irq(dp->irq);
  1189. return 0;
  1190. }
  1191. static const struct dev_pm_ops msm_dp_pm_ops = {
  1192. SET_RUNTIME_PM_OPS(msm_dp_pm_runtime_suspend, msm_dp_pm_runtime_resume, NULL)
  1193. SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
  1194. pm_runtime_force_resume)
  1195. };
  1196. static struct platform_driver msm_dp_display_driver = {
  1197. .probe = msm_dp_display_probe,
  1198. .remove = msm_dp_display_remove,
  1199. .driver = {
  1200. .name = "msm-dp-display",
  1201. .of_match_table = msm_dp_dt_match,
  1202. .suppress_bind_attrs = true,
  1203. .pm = &msm_dp_pm_ops,
  1204. },
  1205. };
  1206. int __init msm_dp_register(void)
  1207. {
  1208. int ret;
  1209. ret = platform_driver_register(&msm_dp_display_driver);
  1210. if (ret)
  1211. DRM_ERROR("Dp display driver register failed");
  1212. return ret;
  1213. }
  1214. void __exit msm_dp_unregister(void)
  1215. {
  1216. platform_driver_unregister(&msm_dp_display_driver);
  1217. }
  1218. bool msm_dp_is_yuv_420_enabled(const struct msm_dp *msm_dp_display,
  1219. const struct drm_display_mode *mode)
  1220. {
  1221. struct msm_dp_display_private *dp;
  1222. const struct drm_display_info *info;
  1223. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1224. info = &msm_dp_display->connector->display_info;
  1225. return dp->panel->vsc_sdp_supported && drm_mode_is_420_only(info, mode);
  1226. }
  1227. bool msm_dp_needs_periph_flush(const struct msm_dp *msm_dp_display,
  1228. const struct drm_display_mode *mode)
  1229. {
  1230. return msm_dp_is_yuv_420_enabled(msm_dp_display, mode);
  1231. }
  1232. bool msm_dp_wide_bus_available(const struct msm_dp *msm_dp_display)
  1233. {
  1234. struct msm_dp_display_private *dp;
  1235. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1236. if (dp->msm_dp_mode.out_fmt_is_yuv_420)
  1237. return false;
  1238. return dp->wide_bus_supported;
  1239. }
  1240. void msm_dp_display_debugfs_init(struct msm_dp *msm_dp_display, struct dentry *root, bool is_edp)
  1241. {
  1242. struct msm_dp_display_private *dp;
  1243. struct device *dev;
  1244. int rc;
  1245. dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1246. dev = &dp->msm_dp_display.pdev->dev;
  1247. rc = msm_dp_debug_init(dev, dp->panel, dp->link, dp->msm_dp_display.connector, root, is_edp);
  1248. if (rc)
  1249. DRM_ERROR("failed to initialize debug, rc = %d\n", rc);
  1250. }
  1251. int msm_dp_modeset_init(struct msm_dp *msm_dp_display, struct drm_device *dev,
  1252. struct drm_encoder *encoder, bool yuv_supported)
  1253. {
  1254. struct msm_dp_display_private *msm_dp_priv;
  1255. int ret;
  1256. msm_dp_display->drm_dev = dev;
  1257. msm_dp_priv = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1258. ret = msm_dp_bridge_init(msm_dp_display, dev, encoder, yuv_supported);
  1259. if (ret) {
  1260. DRM_DEV_ERROR(dev->dev,
  1261. "failed to create dp bridge: %d\n", ret);
  1262. return ret;
  1263. }
  1264. msm_dp_display->connector = msm_dp_drm_connector_init(msm_dp_display, encoder);
  1265. if (IS_ERR(msm_dp_display->connector)) {
  1266. ret = PTR_ERR(msm_dp_display->connector);
  1267. DRM_DEV_ERROR(dev->dev,
  1268. "failed to create dp connector: %d\n", ret);
  1269. msm_dp_display->connector = NULL;
  1270. return ret;
  1271. }
  1272. msm_dp_priv->panel->connector = msm_dp_display->connector;
  1273. return 0;
  1274. }
  1275. void msm_dp_bridge_atomic_enable(struct drm_bridge *drm_bridge,
  1276. struct drm_atomic_state *state)
  1277. {
  1278. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge);
  1279. struct msm_dp *dp = msm_dp_bridge->msm_dp_display;
  1280. int rc = 0;
  1281. struct msm_dp_display_private *msm_dp_display;
  1282. u32 hpd_state;
  1283. bool force_link_train = false;
  1284. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  1285. if (!msm_dp_display->msm_dp_mode.drm_mode.clock) {
  1286. DRM_ERROR("invalid params\n");
  1287. return;
  1288. }
  1289. if (dp->is_edp)
  1290. msm_dp_hpd_plug_handle(msm_dp_display, 0);
  1291. mutex_lock(&msm_dp_display->event_mutex);
  1292. if (pm_runtime_resume_and_get(&dp->pdev->dev)) {
  1293. DRM_ERROR("failed to pm_runtime_resume\n");
  1294. mutex_unlock(&msm_dp_display->event_mutex);
  1295. return;
  1296. }
  1297. hpd_state = msm_dp_display->hpd_state;
  1298. if (hpd_state != ST_DISPLAY_OFF && hpd_state != ST_MAINLINK_READY) {
  1299. mutex_unlock(&msm_dp_display->event_mutex);
  1300. return;
  1301. }
  1302. rc = msm_dp_display_set_mode(dp, &msm_dp_display->msm_dp_mode);
  1303. if (rc) {
  1304. DRM_ERROR("Failed to perform a mode set, rc=%d\n", rc);
  1305. mutex_unlock(&msm_dp_display->event_mutex);
  1306. return;
  1307. }
  1308. hpd_state = msm_dp_display->hpd_state;
  1309. if (hpd_state == ST_DISPLAY_OFF) {
  1310. msm_dp_display_host_phy_init(msm_dp_display);
  1311. force_link_train = true;
  1312. }
  1313. msm_dp_display_enable(msm_dp_display, force_link_train);
  1314. rc = msm_dp_display_post_enable(dp);
  1315. if (rc) {
  1316. DRM_ERROR("DP display post enable failed, rc=%d\n", rc);
  1317. msm_dp_display_disable(msm_dp_display);
  1318. }
  1319. /* completed connection */
  1320. msm_dp_display->hpd_state = ST_CONNECTED;
  1321. drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type);
  1322. mutex_unlock(&msm_dp_display->event_mutex);
  1323. }
  1324. void msm_dp_bridge_atomic_disable(struct drm_bridge *drm_bridge,
  1325. struct drm_atomic_state *state)
  1326. {
  1327. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge);
  1328. struct msm_dp *dp = msm_dp_bridge->msm_dp_display;
  1329. struct msm_dp_display_private *msm_dp_display;
  1330. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  1331. msm_dp_ctrl_push_idle(msm_dp_display->ctrl);
  1332. }
  1333. void msm_dp_bridge_atomic_post_disable(struct drm_bridge *drm_bridge,
  1334. struct drm_atomic_state *state)
  1335. {
  1336. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge);
  1337. struct msm_dp *dp = msm_dp_bridge->msm_dp_display;
  1338. u32 hpd_state;
  1339. struct msm_dp_display_private *msm_dp_display;
  1340. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  1341. if (dp->is_edp)
  1342. msm_dp_hpd_unplug_handle(msm_dp_display, 0);
  1343. mutex_lock(&msm_dp_display->event_mutex);
  1344. hpd_state = msm_dp_display->hpd_state;
  1345. if (hpd_state != ST_DISCONNECT_PENDING && hpd_state != ST_CONNECTED)
  1346. drm_dbg_dp(dp->drm_dev, "type=%d wrong hpd_state=%d\n",
  1347. dp->connector_type, hpd_state);
  1348. msm_dp_display_disable(msm_dp_display);
  1349. hpd_state = msm_dp_display->hpd_state;
  1350. if (hpd_state == ST_DISCONNECT_PENDING) {
  1351. /* completed disconnection */
  1352. msm_dp_display->hpd_state = ST_DISCONNECTED;
  1353. } else {
  1354. msm_dp_display->hpd_state = ST_DISPLAY_OFF;
  1355. }
  1356. drm_dbg_dp(dp->drm_dev, "type=%d Done\n", dp->connector_type);
  1357. pm_runtime_put_sync(&dp->pdev->dev);
  1358. mutex_unlock(&msm_dp_display->event_mutex);
  1359. }
  1360. void msm_dp_bridge_mode_set(struct drm_bridge *drm_bridge,
  1361. const struct drm_display_mode *mode,
  1362. const struct drm_display_mode *adjusted_mode)
  1363. {
  1364. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(drm_bridge);
  1365. struct msm_dp *dp = msm_dp_bridge->msm_dp_display;
  1366. struct msm_dp_display_private *msm_dp_display;
  1367. struct msm_dp_panel *msm_dp_panel;
  1368. msm_dp_display = container_of(dp, struct msm_dp_display_private, msm_dp_display);
  1369. msm_dp_panel = msm_dp_display->panel;
  1370. memset(&msm_dp_display->msm_dp_mode, 0x0, sizeof(struct msm_dp_display_mode));
  1371. if (msm_dp_display_check_video_test(dp))
  1372. msm_dp_display->msm_dp_mode.bpp = msm_dp_display_get_test_bpp(dp);
  1373. else /* Default num_components per pixel = 3 */
  1374. msm_dp_display->msm_dp_mode.bpp = dp->connector->display_info.bpc * 3;
  1375. if (!msm_dp_display->msm_dp_mode.bpp)
  1376. msm_dp_display->msm_dp_mode.bpp = 24; /* Default bpp */
  1377. drm_mode_copy(&msm_dp_display->msm_dp_mode.drm_mode, adjusted_mode);
  1378. msm_dp_display->msm_dp_mode.v_active_low =
  1379. !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NVSYNC);
  1380. msm_dp_display->msm_dp_mode.h_active_low =
  1381. !!(msm_dp_display->msm_dp_mode.drm_mode.flags & DRM_MODE_FLAG_NHSYNC);
  1382. msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 =
  1383. drm_mode_is_420_only(&dp->connector->display_info, adjusted_mode) &&
  1384. msm_dp_panel->vsc_sdp_supported;
  1385. /* populate wide_bus_support to different layers */
  1386. msm_dp_display->ctrl->wide_bus_en =
  1387. msm_dp_display->msm_dp_mode.out_fmt_is_yuv_420 ? false : msm_dp_display->wide_bus_supported;
  1388. }
  1389. void msm_dp_bridge_hpd_enable(struct drm_bridge *bridge)
  1390. {
  1391. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge);
  1392. struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display;
  1393. struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1394. /*
  1395. * this is for external DP with hpd irq enabled case,
  1396. * step-1: msm_dp_pm_runtime_resume() enable dp host only
  1397. * step-2: enable hdp block and have hpd irq enabled here
  1398. * step-3: waiting for plugin irq while phy is not initialized
  1399. * step-4: DP PHY is initialized at plugin handler before link training
  1400. *
  1401. */
  1402. mutex_lock(&dp->event_mutex);
  1403. if (pm_runtime_resume_and_get(&msm_dp_display->pdev->dev)) {
  1404. DRM_ERROR("failed to resume power\n");
  1405. mutex_unlock(&dp->event_mutex);
  1406. return;
  1407. }
  1408. msm_dp_aux_hpd_enable(dp->aux);
  1409. msm_dp_aux_hpd_intr_enable(dp->aux);
  1410. msm_dp_display->internal_hpd = true;
  1411. mutex_unlock(&dp->event_mutex);
  1412. }
  1413. void msm_dp_bridge_hpd_disable(struct drm_bridge *bridge)
  1414. {
  1415. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge);
  1416. struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display;
  1417. struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1418. mutex_lock(&dp->event_mutex);
  1419. msm_dp_aux_hpd_intr_disable(dp->aux);
  1420. msm_dp_aux_hpd_disable(dp->aux);
  1421. msm_dp_display->internal_hpd = false;
  1422. pm_runtime_put_sync(&msm_dp_display->pdev->dev);
  1423. mutex_unlock(&dp->event_mutex);
  1424. }
  1425. void msm_dp_bridge_hpd_notify(struct drm_bridge *bridge,
  1426. struct drm_connector *connector,
  1427. enum drm_connector_status status)
  1428. {
  1429. struct msm_dp_bridge *msm_dp_bridge = to_dp_bridge(bridge);
  1430. struct msm_dp *msm_dp_display = msm_dp_bridge->msm_dp_display;
  1431. struct msm_dp_display_private *dp = container_of(msm_dp_display, struct msm_dp_display_private, msm_dp_display);
  1432. /* Without next_bridge interrupts are handled by the DP core directly */
  1433. if (msm_dp_display->internal_hpd)
  1434. return;
  1435. if (!msm_dp_display->link_ready && status == connector_status_connected)
  1436. msm_dp_add_event(dp, EV_HPD_PLUG_INT, 0, 0);
  1437. else if (msm_dp_display->link_ready && status == connector_status_disconnected)
  1438. msm_dp_add_event(dp, EV_HPD_UNPLUG_INT, 0, 0);
  1439. }