i915_vma.c 59 KB

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  1. /*
  2. * Copyright © 2016 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21. * IN THE SOFTWARE.
  22. *
  23. */
  24. #include <linux/sched/mm.h>
  25. #include <linux/dma-fence-array.h>
  26. #include <drm/drm_gem.h>
  27. #include <drm/drm_print.h>
  28. #include "display/intel_fb.h"
  29. #include "display/intel_frontbuffer.h"
  30. #include "gem/i915_gem_lmem.h"
  31. #include "gem/i915_gem_object_frontbuffer.h"
  32. #include "gem/i915_gem_tiling.h"
  33. #include "gt/intel_engine.h"
  34. #include "gt/intel_engine_heartbeat.h"
  35. #include "gt/intel_gt.h"
  36. #include "gt/intel_gt_pm.h"
  37. #include "gt/intel_gt_requests.h"
  38. #include "gt/intel_tlb.h"
  39. #include "i915_drv.h"
  40. #include "i915_gem_evict.h"
  41. #include "i915_sw_fence_work.h"
  42. #include "i915_trace.h"
  43. #include "i915_vma.h"
  44. #include "i915_vma_resource.h"
  45. static inline void assert_vma_held_evict(const struct i915_vma *vma)
  46. {
  47. /*
  48. * We may be forced to unbind when the vm is dead, to clean it up.
  49. * This is the only exception to the requirement of the object lock
  50. * being held.
  51. */
  52. if (kref_read(&vma->vm->ref))
  53. assert_object_held_shared(vma->obj);
  54. }
  55. static struct kmem_cache *slab_vmas;
  56. static struct i915_vma *i915_vma_alloc(void)
  57. {
  58. return kmem_cache_zalloc(slab_vmas, GFP_KERNEL);
  59. }
  60. static void i915_vma_free(struct i915_vma *vma)
  61. {
  62. return kmem_cache_free(slab_vmas, vma);
  63. }
  64. #if IS_ENABLED(CONFIG_DRM_I915_ERRLOG_GEM) && IS_ENABLED(CONFIG_DRM_DEBUG_MM)
  65. #include <linux/stackdepot.h>
  66. static void vma_print_allocator(struct i915_vma *vma, const char *reason)
  67. {
  68. char buf[512];
  69. if (!vma->node.stack) {
  70. drm_dbg(vma->obj->base.dev,
  71. "vma.node [%08llx + %08llx] %s: unknown owner\n",
  72. vma->node.start, vma->node.size, reason);
  73. return;
  74. }
  75. stack_depot_snprint(vma->node.stack, buf, sizeof(buf), 0);
  76. drm_dbg(vma->obj->base.dev,
  77. "vma.node [%08llx + %08llx] %s: inserted at %s\n",
  78. vma->node.start, vma->node.size, reason, buf);
  79. }
  80. #else
  81. static void vma_print_allocator(struct i915_vma *vma, const char *reason)
  82. {
  83. }
  84. #endif
  85. static inline struct i915_vma *active_to_vma(struct i915_active *ref)
  86. {
  87. return container_of(ref, typeof(struct i915_vma), active);
  88. }
  89. static int __i915_vma_active(struct i915_active *ref)
  90. {
  91. struct i915_vma *vma = active_to_vma(ref);
  92. if (!i915_vma_tryget(vma))
  93. return -ENOENT;
  94. /*
  95. * Exclude global GTT VMA from holding a GT wakeref
  96. * while active, otherwise GPU never goes idle.
  97. */
  98. if (!i915_vma_is_ggtt(vma)) {
  99. /*
  100. * Since we and our _retire() counterpart can be
  101. * called asynchronously, storing a wakeref tracking
  102. * handle inside struct i915_vma is not safe, and
  103. * there is no other good place for that. Hence,
  104. * use untracked variants of intel_gt_pm_get/put().
  105. */
  106. intel_gt_pm_get_untracked(vma->vm->gt);
  107. }
  108. return 0;
  109. }
  110. static void __i915_vma_retire(struct i915_active *ref)
  111. {
  112. struct i915_vma *vma = active_to_vma(ref);
  113. if (!i915_vma_is_ggtt(vma)) {
  114. /*
  115. * Since we can be called from atomic contexts,
  116. * use an async variant of intel_gt_pm_put().
  117. */
  118. intel_gt_pm_put_async_untracked(vma->vm->gt);
  119. }
  120. i915_vma_put(vma);
  121. }
  122. static struct i915_vma *
  123. vma_create(struct drm_i915_gem_object *obj,
  124. struct i915_address_space *vm,
  125. const struct i915_gtt_view *view)
  126. {
  127. struct i915_vma *pos = ERR_PTR(-E2BIG);
  128. struct i915_vma *vma;
  129. struct rb_node *rb, **p;
  130. int err;
  131. /* The aliasing_ppgtt should never be used directly! */
  132. GEM_BUG_ON(vm == &vm->gt->ggtt->alias->vm);
  133. vma = i915_vma_alloc();
  134. if (vma == NULL)
  135. return ERR_PTR(-ENOMEM);
  136. vma->ops = &vm->vma_ops;
  137. vma->obj = obj;
  138. vma->size = obj->base.size;
  139. vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
  140. i915_active_init(&vma->active, __i915_vma_active, __i915_vma_retire, 0);
  141. /* Declare ourselves safe for use inside shrinkers */
  142. if (IS_ENABLED(CONFIG_LOCKDEP)) {
  143. fs_reclaim_acquire(GFP_KERNEL);
  144. might_lock(&vma->active.mutex);
  145. fs_reclaim_release(GFP_KERNEL);
  146. }
  147. INIT_LIST_HEAD(&vma->closed_link);
  148. INIT_LIST_HEAD(&vma->obj_link);
  149. RB_CLEAR_NODE(&vma->obj_node);
  150. if (view && view->type != I915_GTT_VIEW_NORMAL) {
  151. vma->gtt_view = *view;
  152. if (view->type == I915_GTT_VIEW_PARTIAL) {
  153. GEM_BUG_ON(range_overflows_t(u64,
  154. view->partial.offset,
  155. view->partial.size,
  156. obj->base.size >> PAGE_SHIFT));
  157. vma->size = view->partial.size;
  158. vma->size <<= PAGE_SHIFT;
  159. GEM_BUG_ON(vma->size > obj->base.size);
  160. } else if (view->type == I915_GTT_VIEW_ROTATED) {
  161. vma->size = intel_rotation_info_size(&view->rotated);
  162. vma->size <<= PAGE_SHIFT;
  163. } else if (view->type == I915_GTT_VIEW_REMAPPED) {
  164. vma->size = intel_remapped_info_size(&view->remapped);
  165. vma->size <<= PAGE_SHIFT;
  166. }
  167. }
  168. if (unlikely(vma->size > vm->total))
  169. goto err_vma;
  170. GEM_BUG_ON(!IS_ALIGNED(vma->size, I915_GTT_PAGE_SIZE));
  171. err = mutex_lock_interruptible(&vm->mutex);
  172. if (err) {
  173. pos = ERR_PTR(err);
  174. goto err_vma;
  175. }
  176. vma->vm = vm;
  177. list_add_tail(&vma->vm_link, &vm->unbound_list);
  178. spin_lock(&obj->vma.lock);
  179. if (i915_is_ggtt(vm)) {
  180. if (unlikely(overflows_type(vma->size, u32)))
  181. goto err_unlock;
  182. vma->fence_size = i915_gem_fence_size(vm->i915, vma->size,
  183. i915_gem_object_get_tiling(obj),
  184. i915_gem_object_get_stride(obj));
  185. if (unlikely(vma->fence_size < vma->size || /* overflow */
  186. vma->fence_size > vm->total))
  187. goto err_unlock;
  188. GEM_BUG_ON(!IS_ALIGNED(vma->fence_size, I915_GTT_MIN_ALIGNMENT));
  189. vma->fence_alignment = i915_gem_fence_alignment(vm->i915, vma->size,
  190. i915_gem_object_get_tiling(obj),
  191. i915_gem_object_get_stride(obj));
  192. GEM_BUG_ON(!is_power_of_2(vma->fence_alignment));
  193. __set_bit(I915_VMA_GGTT_BIT, __i915_vma_flags(vma));
  194. }
  195. rb = NULL;
  196. p = &obj->vma.tree.rb_node;
  197. while (*p) {
  198. long cmp;
  199. rb = *p;
  200. pos = rb_entry(rb, struct i915_vma, obj_node);
  201. /*
  202. * If the view already exists in the tree, another thread
  203. * already created a matching vma, so return the older instance
  204. * and dispose of ours.
  205. */
  206. cmp = i915_vma_compare(pos, vm, view);
  207. if (cmp < 0)
  208. p = &rb->rb_right;
  209. else if (cmp > 0)
  210. p = &rb->rb_left;
  211. else
  212. goto err_unlock;
  213. }
  214. rb_link_node(&vma->obj_node, rb, p);
  215. rb_insert_color(&vma->obj_node, &obj->vma.tree);
  216. if (i915_vma_is_ggtt(vma))
  217. /*
  218. * We put the GGTT vma at the start of the vma-list, followed
  219. * by the ppGGTT vma. This allows us to break early when
  220. * iterating over only the GGTT vma for an object, see
  221. * for_each_ggtt_vma()
  222. */
  223. list_add(&vma->obj_link, &obj->vma.list);
  224. else
  225. list_add_tail(&vma->obj_link, &obj->vma.list);
  226. spin_unlock(&obj->vma.lock);
  227. mutex_unlock(&vm->mutex);
  228. return vma;
  229. err_unlock:
  230. spin_unlock(&obj->vma.lock);
  231. list_del_init(&vma->vm_link);
  232. mutex_unlock(&vm->mutex);
  233. err_vma:
  234. i915_vma_free(vma);
  235. return pos;
  236. }
  237. static struct i915_vma *
  238. i915_vma_lookup(struct drm_i915_gem_object *obj,
  239. struct i915_address_space *vm,
  240. const struct i915_gtt_view *view)
  241. {
  242. struct rb_node *rb;
  243. rb = obj->vma.tree.rb_node;
  244. while (rb) {
  245. struct i915_vma *vma = rb_entry(rb, struct i915_vma, obj_node);
  246. long cmp;
  247. cmp = i915_vma_compare(vma, vm, view);
  248. if (cmp == 0)
  249. return vma;
  250. if (cmp < 0)
  251. rb = rb->rb_right;
  252. else
  253. rb = rb->rb_left;
  254. }
  255. return NULL;
  256. }
  257. /**
  258. * i915_vma_instance - return the singleton instance of the VMA
  259. * @obj: parent &struct drm_i915_gem_object to be mapped
  260. * @vm: address space in which the mapping is located
  261. * @view: additional mapping requirements
  262. *
  263. * i915_vma_instance() looks up an existing VMA of the @obj in the @vm with
  264. * the same @view characteristics. If a match is not found, one is created.
  265. * Once created, the VMA is kept until either the object is freed, or the
  266. * address space is closed.
  267. *
  268. * Returns the vma, or an error pointer.
  269. */
  270. struct i915_vma *
  271. i915_vma_instance(struct drm_i915_gem_object *obj,
  272. struct i915_address_space *vm,
  273. const struct i915_gtt_view *view)
  274. {
  275. struct i915_vma *vma;
  276. GEM_BUG_ON(view && !i915_is_ggtt_or_dpt(vm));
  277. GEM_BUG_ON(!kref_read(&vm->ref));
  278. spin_lock(&obj->vma.lock);
  279. vma = i915_vma_lookup(obj, vm, view);
  280. spin_unlock(&obj->vma.lock);
  281. /* vma_create() will resolve the race if another creates the vma */
  282. if (unlikely(!vma))
  283. vma = vma_create(obj, vm, view);
  284. GEM_BUG_ON(!IS_ERR(vma) && i915_vma_compare(vma, vm, view));
  285. return vma;
  286. }
  287. struct i915_vma_work {
  288. struct dma_fence_work base;
  289. struct i915_address_space *vm;
  290. struct i915_vm_pt_stash stash;
  291. struct i915_vma_resource *vma_res;
  292. struct drm_i915_gem_object *obj;
  293. struct i915_sw_dma_fence_cb cb;
  294. unsigned int pat_index;
  295. unsigned int flags;
  296. };
  297. static void __vma_bind(struct dma_fence_work *work)
  298. {
  299. struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
  300. struct i915_vma_resource *vma_res = vw->vma_res;
  301. /*
  302. * We are about the bind the object, which must mean we have already
  303. * signaled the work to potentially clear/move the pages underneath. If
  304. * something went wrong at that stage then the object should have
  305. * unknown_state set, in which case we need to skip the bind.
  306. */
  307. if (i915_gem_object_has_unknown_state(vw->obj))
  308. return;
  309. vma_res->ops->bind_vma(vma_res->vm, &vw->stash,
  310. vma_res, vw->pat_index, vw->flags);
  311. }
  312. static void __vma_release(struct dma_fence_work *work)
  313. {
  314. struct i915_vma_work *vw = container_of(work, typeof(*vw), base);
  315. if (vw->obj)
  316. i915_gem_object_put(vw->obj);
  317. i915_vm_free_pt_stash(vw->vm, &vw->stash);
  318. if (vw->vma_res)
  319. i915_vma_resource_put(vw->vma_res);
  320. }
  321. static const struct dma_fence_work_ops bind_ops = {
  322. .name = "bind",
  323. .work = __vma_bind,
  324. .release = __vma_release,
  325. };
  326. struct i915_vma_work *i915_vma_work(void)
  327. {
  328. struct i915_vma_work *vw;
  329. vw = kzalloc_obj(*vw);
  330. if (!vw)
  331. return NULL;
  332. dma_fence_work_init(&vw->base, &bind_ops);
  333. vw->base.dma.error = -EAGAIN; /* disable the worker by default */
  334. return vw;
  335. }
  336. int i915_vma_wait_for_bind(struct i915_vma *vma)
  337. {
  338. int err = 0;
  339. if (rcu_access_pointer(vma->active.excl.fence)) {
  340. struct dma_fence *fence;
  341. rcu_read_lock();
  342. fence = dma_fence_get_rcu_safe(&vma->active.excl.fence);
  343. rcu_read_unlock();
  344. if (fence) {
  345. err = dma_fence_wait(fence, true);
  346. dma_fence_put(fence);
  347. }
  348. }
  349. return err;
  350. }
  351. #if IS_ENABLED(CONFIG_DRM_I915_DEBUG_GEM)
  352. static int i915_vma_verify_bind_complete(struct i915_vma *vma)
  353. {
  354. struct dma_fence *fence = i915_active_fence_get(&vma->active.excl);
  355. int err;
  356. if (!fence)
  357. return 0;
  358. if (dma_fence_is_signaled(fence))
  359. err = fence->error;
  360. else
  361. err = -EBUSY;
  362. dma_fence_put(fence);
  363. return err;
  364. }
  365. #else
  366. #define i915_vma_verify_bind_complete(_vma) 0
  367. #endif
  368. I915_SELFTEST_EXPORT void
  369. i915_vma_resource_init_from_vma(struct i915_vma_resource *vma_res,
  370. struct i915_vma *vma)
  371. {
  372. struct drm_i915_gem_object *obj = vma->obj;
  373. i915_vma_resource_init(vma_res, vma->vm, vma->pages, &vma->page_sizes,
  374. obj->mm.rsgt, i915_gem_object_is_readonly(obj),
  375. i915_gem_object_is_lmem(obj), obj->mm.region,
  376. vma->ops, vma->private, __i915_vma_offset(vma),
  377. __i915_vma_size(vma), vma->size, vma->guard);
  378. }
  379. /**
  380. * i915_vma_bind - Sets up PTEs for an VMA in it's corresponding address space.
  381. * @vma: VMA to map
  382. * @pat_index: PAT index to set in PTE
  383. * @flags: flags like global or local mapping
  384. * @work: preallocated worker for allocating and binding the PTE
  385. * @vma_res: pointer to a preallocated vma resource. The resource is either
  386. * consumed or freed.
  387. *
  388. * DMA addresses are taken from the scatter-gather table of this object (or of
  389. * this VMA in case of non-default GGTT views) and PTE entries set up.
  390. * Note that DMA addresses are also the only part of the SG table we care about.
  391. */
  392. int i915_vma_bind(struct i915_vma *vma,
  393. unsigned int pat_index,
  394. u32 flags,
  395. struct i915_vma_work *work,
  396. struct i915_vma_resource *vma_res)
  397. {
  398. u32 bind_flags;
  399. u32 vma_flags;
  400. int ret;
  401. lockdep_assert_held(&vma->vm->mutex);
  402. GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
  403. GEM_BUG_ON(vma->size > i915_vma_size(vma));
  404. if (GEM_DEBUG_WARN_ON(range_overflows(vma->node.start,
  405. vma->node.size,
  406. vma->vm->total))) {
  407. i915_vma_resource_free(vma_res);
  408. return -ENODEV;
  409. }
  410. if (GEM_DEBUG_WARN_ON(!flags)) {
  411. i915_vma_resource_free(vma_res);
  412. return -EINVAL;
  413. }
  414. bind_flags = flags;
  415. bind_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
  416. vma_flags = atomic_read(&vma->flags);
  417. vma_flags &= I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND;
  418. bind_flags &= ~vma_flags;
  419. if (bind_flags == 0) {
  420. i915_vma_resource_free(vma_res);
  421. return 0;
  422. }
  423. GEM_BUG_ON(!atomic_read(&vma->pages_count));
  424. /* Wait for or await async unbinds touching our range */
  425. if (work && bind_flags & vma->vm->bind_async_flags)
  426. ret = i915_vma_resource_bind_dep_await(vma->vm,
  427. &work->base.chain,
  428. vma->node.start,
  429. vma->node.size,
  430. true,
  431. GFP_NOWAIT |
  432. __GFP_RETRY_MAYFAIL |
  433. __GFP_NOWARN);
  434. else
  435. ret = i915_vma_resource_bind_dep_sync(vma->vm, vma->node.start,
  436. vma->node.size, true);
  437. if (ret) {
  438. i915_vma_resource_free(vma_res);
  439. return ret;
  440. }
  441. if (vma->resource || !vma_res) {
  442. /* Rebinding with an additional I915_VMA_*_BIND */
  443. GEM_WARN_ON(!vma_flags);
  444. i915_vma_resource_free(vma_res);
  445. } else {
  446. i915_vma_resource_init_from_vma(vma_res, vma);
  447. vma->resource = vma_res;
  448. }
  449. trace_i915_vma_bind(vma, bind_flags);
  450. if (work && bind_flags & vma->vm->bind_async_flags) {
  451. struct dma_fence *prev;
  452. work->vma_res = i915_vma_resource_get(vma->resource);
  453. work->pat_index = pat_index;
  454. work->flags = bind_flags;
  455. /*
  456. * Note we only want to chain up to the migration fence on
  457. * the pages (not the object itself). As we don't track that,
  458. * yet, we have to use the exclusive fence instead.
  459. *
  460. * Also note that we do not want to track the async vma as
  461. * part of the obj->resv->excl_fence as it only affects
  462. * execution and not content or object's backing store lifetime.
  463. */
  464. prev = i915_active_set_exclusive(&vma->active, &work->base.dma);
  465. if (prev) {
  466. __i915_sw_fence_await_dma_fence(&work->base.chain,
  467. prev,
  468. &work->cb);
  469. dma_fence_put(prev);
  470. }
  471. work->base.dma.error = 0; /* enable the queue_work() */
  472. work->obj = i915_gem_object_get(vma->obj);
  473. } else {
  474. ret = i915_gem_object_wait_moving_fence(vma->obj, true);
  475. if (ret) {
  476. i915_vma_resource_free(vma->resource);
  477. vma->resource = NULL;
  478. return ret;
  479. }
  480. vma->ops->bind_vma(vma->vm, NULL, vma->resource, pat_index,
  481. bind_flags);
  482. }
  483. atomic_or(bind_flags, &vma->flags);
  484. return 0;
  485. }
  486. void __iomem *i915_vma_pin_iomap(struct i915_vma *vma)
  487. {
  488. void __iomem *ptr;
  489. int err;
  490. if (WARN_ON_ONCE(vma->obj->flags & I915_BO_ALLOC_GPU_ONLY))
  491. return IOMEM_ERR_PTR(-EINVAL);
  492. GEM_BUG_ON(!i915_vma_is_ggtt(vma));
  493. GEM_BUG_ON(!i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND));
  494. GEM_BUG_ON(i915_vma_verify_bind_complete(vma));
  495. ptr = READ_ONCE(vma->iomap);
  496. if (ptr == NULL) {
  497. /*
  498. * TODO: consider just using i915_gem_object_pin_map() for lmem
  499. * instead, which already supports mapping non-contiguous chunks
  500. * of pages, that way we can also drop the
  501. * I915_BO_ALLOC_CONTIGUOUS when allocating the object.
  502. */
  503. if (i915_gem_object_is_lmem(vma->obj)) {
  504. ptr = i915_gem_object_lmem_io_map(vma->obj, 0,
  505. vma->obj->base.size);
  506. } else if (i915_vma_is_map_and_fenceable(vma)) {
  507. ptr = io_mapping_map_wc(&i915_vm_to_ggtt(vma->vm)->iomap,
  508. i915_vma_offset(vma),
  509. i915_vma_size(vma));
  510. } else {
  511. ptr = (void __iomem *)
  512. i915_gem_object_pin_map(vma->obj, I915_MAP_WC);
  513. if (IS_ERR(ptr)) {
  514. err = PTR_ERR(ptr);
  515. goto err;
  516. }
  517. ptr = page_pack_bits(ptr, 1);
  518. }
  519. if (ptr == NULL) {
  520. err = -ENOMEM;
  521. goto err;
  522. }
  523. if (unlikely(cmpxchg(&vma->iomap, NULL, ptr))) {
  524. if (page_unmask_bits(ptr))
  525. __i915_gem_object_release_map(vma->obj);
  526. else
  527. io_mapping_unmap(ptr);
  528. ptr = vma->iomap;
  529. }
  530. }
  531. __i915_vma_pin(vma);
  532. err = i915_vma_pin_fence(vma);
  533. if (err)
  534. goto err_unpin;
  535. i915_vma_set_ggtt_write(vma);
  536. /* NB Access through the GTT requires the device to be awake. */
  537. return page_mask_bits(ptr);
  538. err_unpin:
  539. __i915_vma_unpin(vma);
  540. err:
  541. return IOMEM_ERR_PTR(err);
  542. }
  543. void i915_vma_flush_writes(struct i915_vma *vma)
  544. {
  545. if (i915_vma_unset_ggtt_write(vma))
  546. intel_gt_flush_ggtt_writes(vma->vm->gt);
  547. }
  548. void i915_vma_unpin_iomap(struct i915_vma *vma)
  549. {
  550. GEM_BUG_ON(vma->iomap == NULL);
  551. /* XXX We keep the mapping until __i915_vma_unbind()/evict() */
  552. i915_vma_flush_writes(vma);
  553. i915_vma_unpin_fence(vma);
  554. i915_vma_unpin(vma);
  555. }
  556. void i915_vma_unpin_and_release(struct i915_vma **p_vma, unsigned int flags)
  557. {
  558. struct i915_vma *vma;
  559. struct drm_i915_gem_object *obj;
  560. vma = fetch_and_zero(p_vma);
  561. if (!vma)
  562. return;
  563. obj = vma->obj;
  564. GEM_BUG_ON(!obj);
  565. i915_vma_unpin(vma);
  566. if (flags & I915_VMA_RELEASE_MAP)
  567. i915_gem_object_unpin_map(obj);
  568. i915_gem_object_put(obj);
  569. }
  570. bool i915_vma_misplaced(const struct i915_vma *vma,
  571. u64 size, u64 alignment, u64 flags)
  572. {
  573. if (!drm_mm_node_allocated(&vma->node))
  574. return false;
  575. if (test_bit(I915_VMA_ERROR_BIT, __i915_vma_flags(vma)))
  576. return true;
  577. if (i915_vma_size(vma) < size)
  578. return true;
  579. GEM_BUG_ON(alignment && !is_power_of_2(alignment));
  580. if (alignment && !IS_ALIGNED(i915_vma_offset(vma), alignment))
  581. return true;
  582. if (flags & PIN_MAPPABLE && !i915_vma_is_map_and_fenceable(vma))
  583. return true;
  584. if (flags & PIN_OFFSET_BIAS &&
  585. i915_vma_offset(vma) < (flags & PIN_OFFSET_MASK))
  586. return true;
  587. if (flags & PIN_OFFSET_FIXED &&
  588. i915_vma_offset(vma) != (flags & PIN_OFFSET_MASK))
  589. return true;
  590. if (flags & PIN_OFFSET_GUARD &&
  591. vma->guard < (flags & PIN_OFFSET_MASK))
  592. return true;
  593. return false;
  594. }
  595. void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
  596. {
  597. bool mappable, fenceable;
  598. GEM_BUG_ON(!i915_vma_is_ggtt(vma));
  599. GEM_BUG_ON(!vma->fence_size);
  600. fenceable = (i915_vma_size(vma) >= vma->fence_size &&
  601. IS_ALIGNED(i915_vma_offset(vma), vma->fence_alignment));
  602. mappable = i915_ggtt_offset(vma) + vma->fence_size <=
  603. i915_vm_to_ggtt(vma->vm)->mappable_end;
  604. if (mappable && fenceable)
  605. set_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
  606. else
  607. clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
  608. }
  609. bool i915_gem_valid_gtt_space(struct i915_vma *vma, unsigned long color)
  610. {
  611. struct drm_mm_node *node = &vma->node;
  612. struct drm_mm_node *other;
  613. /*
  614. * On some machines we have to be careful when putting differing types
  615. * of snoopable memory together to avoid the prefetcher crossing memory
  616. * domains and dying. During vm initialisation, we decide whether or not
  617. * these constraints apply and set the drm_mm.color_adjust
  618. * appropriately.
  619. */
  620. if (!i915_vm_has_cache_coloring(vma->vm))
  621. return true;
  622. /* Only valid to be called on an already inserted vma */
  623. GEM_BUG_ON(!drm_mm_node_allocated(node));
  624. GEM_BUG_ON(list_empty(&node->node_list));
  625. other = list_prev_entry(node, node_list);
  626. if (i915_node_color_differs(other, color) &&
  627. !drm_mm_hole_follows(other))
  628. return false;
  629. other = list_next_entry(node, node_list);
  630. if (i915_node_color_differs(other, color) &&
  631. !drm_mm_hole_follows(node))
  632. return false;
  633. return true;
  634. }
  635. /**
  636. * i915_vma_insert - finds a slot for the vma in its address space
  637. * @vma: the vma
  638. * @ww: An optional struct i915_gem_ww_ctx
  639. * @size: requested size in bytes (can be larger than the VMA)
  640. * @alignment: required alignment
  641. * @flags: mask of PIN_* flags to use
  642. *
  643. * First we try to allocate some free space that meets the requirements for
  644. * the VMA. Failing that, if the flags permit, it will evict an old VMA,
  645. * preferably the oldest idle entry to make room for the new VMA.
  646. *
  647. * Returns:
  648. * 0 on success, negative error code otherwise.
  649. */
  650. static int
  651. i915_vma_insert(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
  652. u64 size, u64 alignment, u64 flags)
  653. {
  654. unsigned long color, guard;
  655. u64 start, end;
  656. int ret;
  657. GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
  658. GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
  659. GEM_BUG_ON(hweight64(flags & (PIN_OFFSET_GUARD | PIN_OFFSET_FIXED | PIN_OFFSET_BIAS)) > 1);
  660. size = max(size, vma->size);
  661. alignment = max_t(typeof(alignment), alignment, vma->display_alignment);
  662. if (flags & PIN_MAPPABLE) {
  663. size = max_t(typeof(size), size, vma->fence_size);
  664. alignment = max_t(typeof(alignment),
  665. alignment, vma->fence_alignment);
  666. }
  667. GEM_BUG_ON(!IS_ALIGNED(size, I915_GTT_PAGE_SIZE));
  668. GEM_BUG_ON(!IS_ALIGNED(alignment, I915_GTT_MIN_ALIGNMENT));
  669. GEM_BUG_ON(!is_power_of_2(alignment));
  670. guard = vma->guard; /* retain guard across rebinds */
  671. if (flags & PIN_OFFSET_GUARD) {
  672. GEM_BUG_ON(overflows_type(flags & PIN_OFFSET_MASK, u32));
  673. guard = max_t(u32, guard, flags & PIN_OFFSET_MASK);
  674. }
  675. /*
  676. * As we align the node upon insertion, but the hardware gets
  677. * node.start + guard, the easiest way to make that work is
  678. * to make the guard a multiple of the alignment size.
  679. */
  680. guard = ALIGN(guard, alignment);
  681. start = flags & PIN_OFFSET_BIAS ? flags & PIN_OFFSET_MASK : 0;
  682. GEM_BUG_ON(!IS_ALIGNED(start, I915_GTT_PAGE_SIZE));
  683. end = vma->vm->total;
  684. if (flags & PIN_MAPPABLE)
  685. end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end);
  686. if (flags & PIN_ZONE_4G)
  687. end = min_t(u64, end, (1ULL << 32) - I915_GTT_PAGE_SIZE);
  688. GEM_BUG_ON(!IS_ALIGNED(end, I915_GTT_PAGE_SIZE));
  689. alignment = max(alignment, i915_vm_obj_min_alignment(vma->vm, vma->obj));
  690. /*
  691. * If binding the object/GGTT view requires more space than the entire
  692. * aperture has, reject it early before evicting everything in a vain
  693. * attempt to find space.
  694. */
  695. if (size > end - 2 * guard) {
  696. drm_dbg(vma->obj->base.dev,
  697. "Attempting to bind an object larger than the aperture: request=%llu > %s aperture=%llu\n",
  698. size, flags & PIN_MAPPABLE ? "mappable" : "total", end);
  699. return -ENOSPC;
  700. }
  701. color = 0;
  702. if (i915_vm_has_cache_coloring(vma->vm))
  703. color = vma->obj->pat_index;
  704. if (flags & PIN_OFFSET_FIXED) {
  705. u64 offset = flags & PIN_OFFSET_MASK;
  706. if (!IS_ALIGNED(offset, alignment) ||
  707. range_overflows(offset, size, end))
  708. return -EINVAL;
  709. /*
  710. * The caller knows not of the guard added by others and
  711. * requests for the offset of the start of its buffer
  712. * to be fixed, which may not be the same as the position
  713. * of the vma->node due to the guard pages.
  714. */
  715. if (offset < guard || offset + size > end - guard)
  716. return -ENOSPC;
  717. ret = i915_gem_gtt_reserve(vma->vm, ww, &vma->node,
  718. size + 2 * guard,
  719. offset - guard,
  720. color, flags);
  721. if (ret)
  722. return ret;
  723. } else {
  724. size += 2 * guard;
  725. /*
  726. * We only support huge gtt pages through the 48b PPGTT,
  727. * however we also don't want to force any alignment for
  728. * objects which need to be tightly packed into the low 32bits.
  729. *
  730. * Note that we assume that GGTT are limited to 4GiB for the
  731. * foreseeable future. See also i915_ggtt_offset().
  732. */
  733. if (upper_32_bits(end - 1) &&
  734. vma->page_sizes.sg > I915_GTT_PAGE_SIZE &&
  735. !HAS_64K_PAGES(vma->vm->i915)) {
  736. /*
  737. * We can't mix 64K and 4K PTEs in the same page-table
  738. * (2M block), and so to avoid the ugliness and
  739. * complexity of coloring we opt for just aligning 64K
  740. * objects to 2M.
  741. */
  742. u64 page_alignment =
  743. rounddown_pow_of_two(vma->page_sizes.sg |
  744. I915_GTT_PAGE_SIZE_2M);
  745. /*
  746. * Check we don't expand for the limited Global GTT
  747. * (mappable aperture is even more precious!). This
  748. * also checks that we exclude the aliasing-ppgtt.
  749. */
  750. GEM_BUG_ON(i915_vma_is_ggtt(vma));
  751. alignment = max(alignment, page_alignment);
  752. if (vma->page_sizes.sg & I915_GTT_PAGE_SIZE_64K)
  753. size = round_up(size, I915_GTT_PAGE_SIZE_2M);
  754. }
  755. ret = i915_gem_gtt_insert(vma->vm, ww, &vma->node,
  756. size, alignment, color,
  757. start, end, flags);
  758. if (ret)
  759. return ret;
  760. GEM_BUG_ON(vma->node.start < start);
  761. GEM_BUG_ON(vma->node.start + vma->node.size > end);
  762. }
  763. GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
  764. GEM_BUG_ON(!i915_gem_valid_gtt_space(vma, color));
  765. list_move_tail(&vma->vm_link, &vma->vm->bound_list);
  766. vma->guard = guard;
  767. return 0;
  768. }
  769. static void
  770. i915_vma_detach(struct i915_vma *vma)
  771. {
  772. GEM_BUG_ON(!drm_mm_node_allocated(&vma->node));
  773. GEM_BUG_ON(i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND | I915_VMA_LOCAL_BIND));
  774. /*
  775. * And finally now the object is completely decoupled from this
  776. * vma, we can drop its hold on the backing storage and allow
  777. * it to be reaped by the shrinker.
  778. */
  779. list_move_tail(&vma->vm_link, &vma->vm->unbound_list);
  780. }
  781. static bool try_qad_pin(struct i915_vma *vma, unsigned int flags)
  782. {
  783. unsigned int bound;
  784. bound = atomic_read(&vma->flags);
  785. if (flags & PIN_VALIDATE) {
  786. flags &= I915_VMA_BIND_MASK;
  787. return (flags & bound) == flags;
  788. }
  789. /* with the lock mandatory for unbind, we don't race here */
  790. flags &= I915_VMA_BIND_MASK;
  791. do {
  792. if (unlikely(flags & ~bound))
  793. return false;
  794. if (unlikely(bound & (I915_VMA_OVERFLOW | I915_VMA_ERROR)))
  795. return false;
  796. GEM_BUG_ON(((bound + 1) & I915_VMA_PIN_MASK) == 0);
  797. } while (!atomic_try_cmpxchg(&vma->flags, &bound, bound + 1));
  798. return true;
  799. }
  800. static struct scatterlist *
  801. rotate_pages(struct drm_i915_gem_object *obj, unsigned int offset,
  802. unsigned int width, unsigned int height,
  803. unsigned int src_stride, unsigned int dst_stride,
  804. struct sg_table *st, struct scatterlist *sg)
  805. {
  806. unsigned int column, row;
  807. pgoff_t src_idx;
  808. for (column = 0; column < width; column++) {
  809. unsigned int left;
  810. src_idx = src_stride * (height - 1) + column + offset;
  811. for (row = 0; row < height; row++) {
  812. st->nents++;
  813. /*
  814. * We don't need the pages, but need to initialize
  815. * the entries so the sg list can be happily traversed.
  816. * The only thing we need are DMA addresses.
  817. */
  818. sg_set_page(sg, NULL, I915_GTT_PAGE_SIZE, 0);
  819. sg_dma_address(sg) =
  820. i915_gem_object_get_dma_address(obj, src_idx);
  821. sg_dma_len(sg) = I915_GTT_PAGE_SIZE;
  822. sg = sg_next(sg);
  823. src_idx -= src_stride;
  824. }
  825. left = (dst_stride - height) * I915_GTT_PAGE_SIZE;
  826. if (!left)
  827. continue;
  828. st->nents++;
  829. /*
  830. * The DE ignores the PTEs for the padding tiles, the sg entry
  831. * here is just a convenience to indicate how many padding PTEs
  832. * to insert at this spot.
  833. */
  834. sg_set_page(sg, NULL, left, 0);
  835. sg_dma_address(sg) = 0;
  836. sg_dma_len(sg) = left;
  837. sg = sg_next(sg);
  838. }
  839. return sg;
  840. }
  841. static noinline struct sg_table *
  842. intel_rotate_pages(struct intel_rotation_info *rot_info,
  843. struct drm_i915_gem_object *obj)
  844. {
  845. unsigned int size = intel_rotation_info_size(rot_info);
  846. struct drm_i915_private *i915 = to_i915(obj->base.dev);
  847. struct sg_table *st;
  848. struct scatterlist *sg;
  849. int ret = -ENOMEM;
  850. int i;
  851. /* Allocate target SG list. */
  852. st = kmalloc_obj(*st);
  853. if (!st)
  854. goto err_st_alloc;
  855. ret = sg_alloc_table(st, size, GFP_KERNEL);
  856. if (ret)
  857. goto err_sg_alloc;
  858. st->nents = 0;
  859. sg = st->sgl;
  860. for (i = 0 ; i < ARRAY_SIZE(rot_info->plane); i++)
  861. sg = rotate_pages(obj, rot_info->plane[i].offset,
  862. rot_info->plane[i].width, rot_info->plane[i].height,
  863. rot_info->plane[i].src_stride,
  864. rot_info->plane[i].dst_stride,
  865. st, sg);
  866. return st;
  867. err_sg_alloc:
  868. kfree(st);
  869. err_st_alloc:
  870. drm_dbg(&i915->drm, "Failed to create rotated mapping for object size %zu! (%ux%u tiles, %u pages)\n",
  871. obj->base.size, rot_info->plane[0].width,
  872. rot_info->plane[0].height, size);
  873. return ERR_PTR(ret);
  874. }
  875. static struct scatterlist *
  876. add_padding_pages(unsigned int count,
  877. struct sg_table *st, struct scatterlist *sg)
  878. {
  879. st->nents++;
  880. /*
  881. * The DE ignores the PTEs for the padding tiles, the sg entry
  882. * here is just a convenience to indicate how many padding PTEs
  883. * to insert at this spot.
  884. */
  885. sg_set_page(sg, NULL, count * I915_GTT_PAGE_SIZE, 0);
  886. sg_dma_address(sg) = 0;
  887. sg_dma_len(sg) = count * I915_GTT_PAGE_SIZE;
  888. sg = sg_next(sg);
  889. return sg;
  890. }
  891. static struct scatterlist *
  892. remap_tiled_color_plane_pages(struct drm_i915_gem_object *obj,
  893. unsigned long offset, unsigned int alignment_pad,
  894. unsigned int width, unsigned int height,
  895. unsigned int src_stride, unsigned int dst_stride,
  896. struct sg_table *st, struct scatterlist *sg,
  897. unsigned int *gtt_offset)
  898. {
  899. unsigned int row;
  900. if (!width || !height)
  901. return sg;
  902. if (alignment_pad)
  903. sg = add_padding_pages(alignment_pad, st, sg);
  904. for (row = 0; row < height; row++) {
  905. unsigned int left = width * I915_GTT_PAGE_SIZE;
  906. while (left) {
  907. dma_addr_t addr;
  908. unsigned int length;
  909. /*
  910. * We don't need the pages, but need to initialize
  911. * the entries so the sg list can be happily traversed.
  912. * The only thing we need are DMA addresses.
  913. */
  914. addr = i915_gem_object_get_dma_address_len(obj, offset, &length);
  915. length = min(left, length);
  916. st->nents++;
  917. sg_set_page(sg, NULL, length, 0);
  918. sg_dma_address(sg) = addr;
  919. sg_dma_len(sg) = length;
  920. sg = sg_next(sg);
  921. offset += length / I915_GTT_PAGE_SIZE;
  922. left -= length;
  923. }
  924. offset += src_stride - width;
  925. left = (dst_stride - width) * I915_GTT_PAGE_SIZE;
  926. if (!left)
  927. continue;
  928. sg = add_padding_pages(left >> PAGE_SHIFT, st, sg);
  929. }
  930. *gtt_offset += alignment_pad + dst_stride * height;
  931. return sg;
  932. }
  933. static struct scatterlist *
  934. remap_contiguous_pages(struct drm_i915_gem_object *obj,
  935. pgoff_t obj_offset,
  936. unsigned int count,
  937. struct sg_table *st, struct scatterlist *sg)
  938. {
  939. struct scatterlist *iter;
  940. unsigned int offset;
  941. iter = i915_gem_object_get_sg_dma(obj, obj_offset, &offset);
  942. GEM_BUG_ON(!iter);
  943. do {
  944. unsigned int len;
  945. len = min(sg_dma_len(iter) - (offset << PAGE_SHIFT),
  946. count << PAGE_SHIFT);
  947. sg_set_page(sg, NULL, len, 0);
  948. sg_dma_address(sg) =
  949. sg_dma_address(iter) + (offset << PAGE_SHIFT);
  950. sg_dma_len(sg) = len;
  951. st->nents++;
  952. count -= len >> PAGE_SHIFT;
  953. if (count == 0)
  954. return sg;
  955. sg = __sg_next(sg);
  956. iter = __sg_next(iter);
  957. offset = 0;
  958. } while (1);
  959. }
  960. static struct scatterlist *
  961. remap_linear_color_plane_pages(struct drm_i915_gem_object *obj,
  962. pgoff_t obj_offset, unsigned int alignment_pad,
  963. unsigned int size,
  964. struct sg_table *st, struct scatterlist *sg,
  965. unsigned int *gtt_offset)
  966. {
  967. if (!size)
  968. return sg;
  969. if (alignment_pad)
  970. sg = add_padding_pages(alignment_pad, st, sg);
  971. sg = remap_contiguous_pages(obj, obj_offset, size, st, sg);
  972. sg = sg_next(sg);
  973. *gtt_offset += alignment_pad + size;
  974. return sg;
  975. }
  976. static struct scatterlist *
  977. remap_color_plane_pages(const struct intel_remapped_info *rem_info,
  978. struct drm_i915_gem_object *obj,
  979. int color_plane,
  980. struct sg_table *st, struct scatterlist *sg,
  981. unsigned int *gtt_offset)
  982. {
  983. unsigned int alignment_pad = 0;
  984. if (rem_info->plane_alignment)
  985. alignment_pad = ALIGN(*gtt_offset, rem_info->plane_alignment) - *gtt_offset;
  986. if (rem_info->plane[color_plane].linear)
  987. sg = remap_linear_color_plane_pages(obj,
  988. rem_info->plane[color_plane].offset,
  989. alignment_pad,
  990. rem_info->plane[color_plane].size,
  991. st, sg,
  992. gtt_offset);
  993. else
  994. sg = remap_tiled_color_plane_pages(obj,
  995. rem_info->plane[color_plane].offset,
  996. alignment_pad,
  997. rem_info->plane[color_plane].width,
  998. rem_info->plane[color_plane].height,
  999. rem_info->plane[color_plane].src_stride,
  1000. rem_info->plane[color_plane].dst_stride,
  1001. st, sg,
  1002. gtt_offset);
  1003. return sg;
  1004. }
  1005. static noinline struct sg_table *
  1006. intel_remap_pages(struct intel_remapped_info *rem_info,
  1007. struct drm_i915_gem_object *obj)
  1008. {
  1009. unsigned int size = intel_remapped_info_size(rem_info);
  1010. struct drm_i915_private *i915 = to_i915(obj->base.dev);
  1011. struct sg_table *st;
  1012. struct scatterlist *sg;
  1013. unsigned int gtt_offset = 0;
  1014. int ret = -ENOMEM;
  1015. int i;
  1016. /* Allocate target SG list. */
  1017. st = kmalloc_obj(*st);
  1018. if (!st)
  1019. goto err_st_alloc;
  1020. ret = sg_alloc_table(st, size, GFP_KERNEL);
  1021. if (ret)
  1022. goto err_sg_alloc;
  1023. st->nents = 0;
  1024. sg = st->sgl;
  1025. for (i = 0 ; i < ARRAY_SIZE(rem_info->plane); i++)
  1026. sg = remap_color_plane_pages(rem_info, obj, i, st, sg, &gtt_offset);
  1027. i915_sg_trim(st);
  1028. return st;
  1029. err_sg_alloc:
  1030. kfree(st);
  1031. err_st_alloc:
  1032. drm_dbg(&i915->drm, "Failed to create remapped mapping for object size %zu! (%ux%u tiles, %u pages)\n",
  1033. obj->base.size, rem_info->plane[0].width,
  1034. rem_info->plane[0].height, size);
  1035. return ERR_PTR(ret);
  1036. }
  1037. static noinline struct sg_table *
  1038. intel_partial_pages(const struct i915_gtt_view *view,
  1039. struct drm_i915_gem_object *obj)
  1040. {
  1041. struct sg_table *st;
  1042. struct scatterlist *sg;
  1043. unsigned int count = view->partial.size;
  1044. int ret = -ENOMEM;
  1045. st = kmalloc_obj(*st);
  1046. if (!st)
  1047. goto err_st_alloc;
  1048. ret = sg_alloc_table(st, count, GFP_KERNEL);
  1049. if (ret)
  1050. goto err_sg_alloc;
  1051. st->nents = 0;
  1052. sg = remap_contiguous_pages(obj, view->partial.offset, count, st, st->sgl);
  1053. sg_mark_end(sg);
  1054. i915_sg_trim(st); /* Drop any unused tail entries. */
  1055. return st;
  1056. err_sg_alloc:
  1057. kfree(st);
  1058. err_st_alloc:
  1059. return ERR_PTR(ret);
  1060. }
  1061. static int
  1062. __i915_vma_get_pages(struct i915_vma *vma)
  1063. {
  1064. struct sg_table *pages;
  1065. /*
  1066. * The vma->pages are only valid within the lifespan of the borrowed
  1067. * obj->mm.pages. When the obj->mm.pages sg_table is regenerated, so
  1068. * must be the vma->pages. A simple rule is that vma->pages must only
  1069. * be accessed when the obj->mm.pages are pinned.
  1070. */
  1071. GEM_BUG_ON(!i915_gem_object_has_pinned_pages(vma->obj));
  1072. switch (vma->gtt_view.type) {
  1073. default:
  1074. GEM_BUG_ON(vma->gtt_view.type);
  1075. fallthrough;
  1076. case I915_GTT_VIEW_NORMAL:
  1077. pages = vma->obj->mm.pages;
  1078. break;
  1079. case I915_GTT_VIEW_ROTATED:
  1080. pages =
  1081. intel_rotate_pages(&vma->gtt_view.rotated, vma->obj);
  1082. break;
  1083. case I915_GTT_VIEW_REMAPPED:
  1084. pages =
  1085. intel_remap_pages(&vma->gtt_view.remapped, vma->obj);
  1086. break;
  1087. case I915_GTT_VIEW_PARTIAL:
  1088. pages = intel_partial_pages(&vma->gtt_view, vma->obj);
  1089. break;
  1090. }
  1091. if (IS_ERR(pages)) {
  1092. drm_err(&vma->vm->i915->drm,
  1093. "Failed to get pages for VMA view type %u (%ld)!\n",
  1094. vma->gtt_view.type, PTR_ERR(pages));
  1095. return PTR_ERR(pages);
  1096. }
  1097. vma->pages = pages;
  1098. return 0;
  1099. }
  1100. I915_SELFTEST_EXPORT int i915_vma_get_pages(struct i915_vma *vma)
  1101. {
  1102. int err;
  1103. if (atomic_add_unless(&vma->pages_count, 1, 0))
  1104. return 0;
  1105. err = i915_gem_object_pin_pages(vma->obj);
  1106. if (err)
  1107. return err;
  1108. err = __i915_vma_get_pages(vma);
  1109. if (err)
  1110. goto err_unpin;
  1111. vma->page_sizes = vma->obj->mm.page_sizes;
  1112. atomic_inc(&vma->pages_count);
  1113. return 0;
  1114. err_unpin:
  1115. __i915_gem_object_unpin_pages(vma->obj);
  1116. return err;
  1117. }
  1118. void vma_invalidate_tlb(struct i915_address_space *vm, u32 *tlb)
  1119. {
  1120. struct intel_gt *gt;
  1121. int id;
  1122. if (!tlb)
  1123. return;
  1124. /*
  1125. * Before we release the pages that were bound by this vma, we
  1126. * must invalidate all the TLBs that may still have a reference
  1127. * back to our physical address. It only needs to be done once,
  1128. * so after updating the PTE to point away from the pages, record
  1129. * the most recent TLB invalidation seqno, and if we have not yet
  1130. * flushed the TLBs upon release, perform a full invalidation.
  1131. */
  1132. for_each_gt(gt, vm->i915, id)
  1133. WRITE_ONCE(tlb[id],
  1134. intel_gt_next_invalidate_tlb_full(gt));
  1135. }
  1136. static void __vma_put_pages(struct i915_vma *vma, unsigned int count)
  1137. {
  1138. /* We allocate under vma_get_pages, so beware the shrinker */
  1139. GEM_BUG_ON(atomic_read(&vma->pages_count) < count);
  1140. if (atomic_sub_return(count, &vma->pages_count) == 0) {
  1141. if (vma->pages != vma->obj->mm.pages) {
  1142. sg_free_table(vma->pages);
  1143. kfree(vma->pages);
  1144. }
  1145. vma->pages = NULL;
  1146. i915_gem_object_unpin_pages(vma->obj);
  1147. }
  1148. }
  1149. I915_SELFTEST_EXPORT void i915_vma_put_pages(struct i915_vma *vma)
  1150. {
  1151. if (atomic_add_unless(&vma->pages_count, -1, 1))
  1152. return;
  1153. __vma_put_pages(vma, 1);
  1154. }
  1155. static void vma_unbind_pages(struct i915_vma *vma)
  1156. {
  1157. unsigned int count;
  1158. lockdep_assert_held(&vma->vm->mutex);
  1159. /* The upper portion of pages_count is the number of bindings */
  1160. count = atomic_read(&vma->pages_count);
  1161. count >>= I915_VMA_PAGES_BIAS;
  1162. GEM_BUG_ON(!count);
  1163. __vma_put_pages(vma, count | count << I915_VMA_PAGES_BIAS);
  1164. }
  1165. int i915_vma_pin_ww(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
  1166. u64 size, u64 alignment, u64 flags)
  1167. {
  1168. struct i915_vma_work *work = NULL;
  1169. struct dma_fence *moving = NULL;
  1170. struct i915_vma_resource *vma_res = NULL;
  1171. intel_wakeref_t wakeref;
  1172. unsigned int bound;
  1173. int err;
  1174. assert_vma_held(vma);
  1175. GEM_BUG_ON(!ww);
  1176. BUILD_BUG_ON(PIN_GLOBAL != I915_VMA_GLOBAL_BIND);
  1177. BUILD_BUG_ON(PIN_USER != I915_VMA_LOCAL_BIND);
  1178. GEM_BUG_ON(!(flags & (PIN_USER | PIN_GLOBAL)));
  1179. /* First try and grab the pin without rebinding the vma */
  1180. if (try_qad_pin(vma, flags))
  1181. return 0;
  1182. err = i915_vma_get_pages(vma);
  1183. if (err)
  1184. return err;
  1185. /*
  1186. * In case of a global GTT, we must hold a runtime-pm wakeref
  1187. * while global PTEs are updated. In other cases, we hold
  1188. * the rpm reference while the VMA is active. Since runtime
  1189. * resume may require allocations, which are forbidden inside
  1190. * vm->mutex, get the first rpm wakeref outside of the mutex.
  1191. */
  1192. wakeref = intel_runtime_pm_get(&vma->vm->i915->runtime_pm);
  1193. if (flags & vma->vm->bind_async_flags) {
  1194. /* lock VM */
  1195. err = i915_vm_lock_objects(vma->vm, ww);
  1196. if (err)
  1197. goto err_rpm;
  1198. work = i915_vma_work();
  1199. if (!work) {
  1200. err = -ENOMEM;
  1201. goto err_rpm;
  1202. }
  1203. work->vm = vma->vm;
  1204. err = i915_gem_object_get_moving_fence(vma->obj, &moving);
  1205. if (err)
  1206. goto err_rpm;
  1207. dma_fence_work_chain(&work->base, moving);
  1208. /* Allocate enough page directories to used PTE */
  1209. if (vma->vm->allocate_va_range) {
  1210. err = i915_vm_alloc_pt_stash(vma->vm,
  1211. &work->stash,
  1212. vma->size);
  1213. if (err)
  1214. goto err_fence;
  1215. err = i915_vm_map_pt_stash(vma->vm, &work->stash);
  1216. if (err)
  1217. goto err_fence;
  1218. }
  1219. }
  1220. vma_res = i915_vma_resource_alloc();
  1221. if (IS_ERR(vma_res)) {
  1222. err = PTR_ERR(vma_res);
  1223. goto err_fence;
  1224. }
  1225. /*
  1226. * Differentiate between user/kernel vma inside the aliasing-ppgtt.
  1227. *
  1228. * We conflate the Global GTT with the user's vma when using the
  1229. * aliasing-ppgtt, but it is still vitally important to try and
  1230. * keep the use cases distinct. For example, userptr objects are
  1231. * not allowed inside the Global GTT as that will cause lock
  1232. * inversions when we have to evict them the mmu_notifier callbacks -
  1233. * but they are allowed to be part of the user ppGTT which can never
  1234. * be mapped. As such we try to give the distinct users of the same
  1235. * mutex, distinct lockclasses [equivalent to how we keep i915_ggtt
  1236. * and i915_ppgtt separate].
  1237. *
  1238. * NB this may cause us to mask real lock inversions -- while the
  1239. * code is safe today, lockdep may not be able to spot future
  1240. * transgressions.
  1241. */
  1242. err = mutex_lock_interruptible_nested(&vma->vm->mutex,
  1243. !(flags & PIN_GLOBAL));
  1244. if (err)
  1245. goto err_vma_res;
  1246. /* No more allocations allowed now we hold vm->mutex */
  1247. if (unlikely(i915_vma_is_closed(vma))) {
  1248. err = -ENOENT;
  1249. goto err_unlock;
  1250. }
  1251. bound = atomic_read(&vma->flags);
  1252. if (unlikely(bound & I915_VMA_ERROR)) {
  1253. err = -ENOMEM;
  1254. goto err_unlock;
  1255. }
  1256. if (unlikely(!((bound + 1) & I915_VMA_PIN_MASK))) {
  1257. err = -EAGAIN; /* pins are meant to be fairly temporary */
  1258. goto err_unlock;
  1259. }
  1260. if (unlikely(!(flags & ~bound & I915_VMA_BIND_MASK))) {
  1261. if (!(flags & PIN_VALIDATE))
  1262. __i915_vma_pin(vma);
  1263. goto err_unlock;
  1264. }
  1265. err = i915_active_acquire(&vma->active);
  1266. if (err)
  1267. goto err_unlock;
  1268. if (!(bound & I915_VMA_BIND_MASK)) {
  1269. err = i915_vma_insert(vma, ww, size, alignment, flags);
  1270. if (err)
  1271. goto err_active;
  1272. if (i915_is_ggtt(vma->vm))
  1273. __i915_vma_set_map_and_fenceable(vma);
  1274. }
  1275. GEM_BUG_ON(!vma->pages);
  1276. err = i915_vma_bind(vma,
  1277. vma->obj->pat_index,
  1278. flags, work, vma_res);
  1279. vma_res = NULL;
  1280. if (err)
  1281. goto err_remove;
  1282. /* There should only be at most 2 active bindings (user, global) */
  1283. GEM_BUG_ON(bound + I915_VMA_PAGES_ACTIVE < bound);
  1284. atomic_add(I915_VMA_PAGES_ACTIVE, &vma->pages_count);
  1285. list_move_tail(&vma->vm_link, &vma->vm->bound_list);
  1286. if (!(flags & PIN_VALIDATE)) {
  1287. __i915_vma_pin(vma);
  1288. GEM_BUG_ON(!i915_vma_is_pinned(vma));
  1289. }
  1290. GEM_BUG_ON(!i915_vma_is_bound(vma, flags));
  1291. GEM_BUG_ON(i915_vma_misplaced(vma, size, alignment, flags));
  1292. err_remove:
  1293. if (!i915_vma_is_bound(vma, I915_VMA_BIND_MASK)) {
  1294. i915_vma_detach(vma);
  1295. drm_mm_remove_node(&vma->node);
  1296. }
  1297. err_active:
  1298. i915_active_release(&vma->active);
  1299. err_unlock:
  1300. mutex_unlock(&vma->vm->mutex);
  1301. err_vma_res:
  1302. i915_vma_resource_free(vma_res);
  1303. err_fence:
  1304. if (work) {
  1305. /*
  1306. * When pinning VMA to GGTT on CHV or BXT with VTD enabled,
  1307. * commit VMA binding asynchronously to avoid risk of lock
  1308. * inversion among reservation_ww locks held here and
  1309. * cpu_hotplug_lock acquired from stop_machine(), which we
  1310. * wrap around GGTT updates when running in those environments.
  1311. */
  1312. if (i915_vma_is_ggtt(vma) &&
  1313. intel_vm_no_concurrent_access_wa(vma->vm->i915))
  1314. dma_fence_work_commit(&work->base);
  1315. else
  1316. dma_fence_work_commit_imm(&work->base);
  1317. }
  1318. err_rpm:
  1319. intel_runtime_pm_put(&vma->vm->i915->runtime_pm, wakeref);
  1320. if (moving)
  1321. dma_fence_put(moving);
  1322. i915_vma_put_pages(vma);
  1323. return err;
  1324. }
  1325. int i915_vma_pin(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
  1326. {
  1327. struct i915_gem_ww_ctx ww;
  1328. int err;
  1329. i915_gem_ww_ctx_init(&ww, true);
  1330. retry:
  1331. err = i915_gem_object_lock(vma->obj, &ww);
  1332. if (!err)
  1333. err = i915_vma_pin_ww(vma, &ww, size, alignment, flags);
  1334. if (err == -EDEADLK) {
  1335. err = i915_gem_ww_ctx_backoff(&ww);
  1336. if (!err)
  1337. goto retry;
  1338. }
  1339. i915_gem_ww_ctx_fini(&ww);
  1340. return err;
  1341. }
  1342. static void flush_idle_contexts(struct intel_gt *gt)
  1343. {
  1344. struct intel_engine_cs *engine;
  1345. enum intel_engine_id id;
  1346. for_each_engine(engine, gt, id)
  1347. intel_engine_flush_barriers(engine);
  1348. intel_gt_wait_for_idle(gt, MAX_SCHEDULE_TIMEOUT);
  1349. }
  1350. static int __i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
  1351. u32 align, unsigned int flags)
  1352. {
  1353. struct i915_address_space *vm = vma->vm;
  1354. struct intel_gt *gt;
  1355. struct i915_ggtt *ggtt = i915_vm_to_ggtt(vm);
  1356. int err;
  1357. do {
  1358. err = i915_vma_pin_ww(vma, ww, 0, align, flags | PIN_GLOBAL);
  1359. if (err != -ENOSPC) {
  1360. if (!err) {
  1361. err = i915_vma_wait_for_bind(vma);
  1362. if (err)
  1363. i915_vma_unpin(vma);
  1364. }
  1365. return err;
  1366. }
  1367. /* Unlike i915_vma_pin, we don't take no for an answer! */
  1368. list_for_each_entry(gt, &ggtt->gt_list, ggtt_link)
  1369. flush_idle_contexts(gt);
  1370. if (mutex_lock_interruptible(&vm->mutex) == 0) {
  1371. /*
  1372. * We pass NULL ww here, as we don't want to unbind
  1373. * locked objects when called from execbuf when pinning
  1374. * is removed. This would probably regress badly.
  1375. */
  1376. i915_gem_evict_vm(vm, NULL, NULL);
  1377. mutex_unlock(&vm->mutex);
  1378. }
  1379. } while (1);
  1380. }
  1381. int i915_ggtt_pin(struct i915_vma *vma, struct i915_gem_ww_ctx *ww,
  1382. u32 align, unsigned int flags)
  1383. {
  1384. struct i915_gem_ww_ctx _ww;
  1385. int err;
  1386. GEM_BUG_ON(!i915_vma_is_ggtt(vma));
  1387. if (ww)
  1388. return __i915_ggtt_pin(vma, ww, align, flags);
  1389. lockdep_assert_not_held(&vma->obj->base.resv->lock.base);
  1390. for_i915_gem_ww(&_ww, err, true) {
  1391. err = i915_gem_object_lock(vma->obj, &_ww);
  1392. if (!err)
  1393. err = __i915_ggtt_pin(vma, &_ww, align, flags);
  1394. }
  1395. return err;
  1396. }
  1397. /**
  1398. * i915_ggtt_clear_scanout - Clear scanout flag for all objects ggtt vmas
  1399. * @obj: i915 GEM object
  1400. * This function clears scanout flags for objects ggtt vmas. These flags are set
  1401. * when object is pinned for display use and this function to clear them all is
  1402. * targeted to be called by frontbuffer tracking code when the frontbuffer is
  1403. * about to be released.
  1404. */
  1405. void i915_ggtt_clear_scanout(struct drm_i915_gem_object *obj)
  1406. {
  1407. struct i915_vma *vma;
  1408. spin_lock(&obj->vma.lock);
  1409. for_each_ggtt_vma(vma, obj) {
  1410. i915_vma_clear_scanout(vma);
  1411. vma->display_alignment = I915_GTT_MIN_ALIGNMENT;
  1412. }
  1413. spin_unlock(&obj->vma.lock);
  1414. }
  1415. static void __vma_close(struct i915_vma *vma, struct intel_gt *gt)
  1416. {
  1417. /*
  1418. * We defer actually closing, unbinding and destroying the VMA until
  1419. * the next idle point, or if the object is freed in the meantime. By
  1420. * postponing the unbind, we allow for it to be resurrected by the
  1421. * client, avoiding the work required to rebind the VMA. This is
  1422. * advantageous for DRI, where the client/server pass objects
  1423. * between themselves, temporarily opening a local VMA to the
  1424. * object, and then closing it again. The same object is then reused
  1425. * on the next frame (or two, depending on the depth of the swap queue)
  1426. * causing us to rebind the VMA once more. This ends up being a lot
  1427. * of wasted work for the steady state.
  1428. */
  1429. GEM_BUG_ON(i915_vma_is_closed(vma));
  1430. list_add(&vma->closed_link, &gt->closed_vma);
  1431. }
  1432. void i915_vma_close(struct i915_vma *vma)
  1433. {
  1434. struct intel_gt *gt = vma->vm->gt;
  1435. unsigned long flags;
  1436. if (i915_vma_is_ggtt(vma))
  1437. return;
  1438. GEM_BUG_ON(!atomic_read(&vma->open_count));
  1439. if (atomic_dec_and_lock_irqsave(&vma->open_count,
  1440. &gt->closed_lock,
  1441. flags)) {
  1442. __vma_close(vma, gt);
  1443. spin_unlock_irqrestore(&gt->closed_lock, flags);
  1444. }
  1445. }
  1446. static void __i915_vma_remove_closed(struct i915_vma *vma)
  1447. {
  1448. list_del_init(&vma->closed_link);
  1449. }
  1450. void i915_vma_reopen(struct i915_vma *vma)
  1451. {
  1452. struct intel_gt *gt = vma->vm->gt;
  1453. spin_lock_irq(&gt->closed_lock);
  1454. if (i915_vma_is_closed(vma))
  1455. __i915_vma_remove_closed(vma);
  1456. spin_unlock_irq(&gt->closed_lock);
  1457. }
  1458. static void force_unbind(struct i915_vma *vma)
  1459. {
  1460. if (!drm_mm_node_allocated(&vma->node))
  1461. return;
  1462. atomic_and(~I915_VMA_PIN_MASK, &vma->flags);
  1463. WARN_ON(__i915_vma_unbind(vma));
  1464. GEM_BUG_ON(drm_mm_node_allocated(&vma->node));
  1465. }
  1466. static void release_references(struct i915_vma *vma, struct intel_gt *gt,
  1467. bool vm_ddestroy)
  1468. {
  1469. struct drm_i915_gem_object *obj = vma->obj;
  1470. GEM_BUG_ON(i915_vma_is_active(vma));
  1471. spin_lock(&obj->vma.lock);
  1472. list_del(&vma->obj_link);
  1473. if (!RB_EMPTY_NODE(&vma->obj_node))
  1474. rb_erase(&vma->obj_node, &obj->vma.tree);
  1475. spin_unlock(&obj->vma.lock);
  1476. spin_lock_irq(&gt->closed_lock);
  1477. __i915_vma_remove_closed(vma);
  1478. spin_unlock_irq(&gt->closed_lock);
  1479. if (vm_ddestroy)
  1480. i915_vm_resv_put(vma->vm);
  1481. i915_active_fini(&vma->active);
  1482. GEM_WARN_ON(vma->resource);
  1483. i915_vma_free(vma);
  1484. }
  1485. /*
  1486. * i915_vma_destroy_locked - Remove all weak reference to the vma and put
  1487. * the initial reference.
  1488. *
  1489. * This function should be called when it's decided the vma isn't needed
  1490. * anymore. The caller must assure that it doesn't race with another lookup
  1491. * plus destroy, typically by taking an appropriate reference.
  1492. *
  1493. * Current callsites are
  1494. * - __i915_gem_object_pages_fini()
  1495. * - __i915_vm_close() - Blocks the above function by taking a reference on
  1496. * the object.
  1497. * - __i915_vma_parked() - Blocks the above functions by taking a reference
  1498. * on the vm and a reference on the object. Also takes the object lock so
  1499. * destruction from __i915_vma_parked() can be blocked by holding the
  1500. * object lock. Since the object lock is only allowed from within i915 with
  1501. * an object refcount, holding the object lock also implicitly blocks the
  1502. * vma freeing from __i915_gem_object_pages_fini().
  1503. *
  1504. * Because of locks taken during destruction, a vma is also guaranteed to
  1505. * stay alive while the following locks are held if it was looked up while
  1506. * holding one of the locks:
  1507. * - vm->mutex
  1508. * - obj->vma.lock
  1509. * - gt->closed_lock
  1510. */
  1511. void i915_vma_destroy_locked(struct i915_vma *vma)
  1512. {
  1513. lockdep_assert_held(&vma->vm->mutex);
  1514. force_unbind(vma);
  1515. list_del_init(&vma->vm_link);
  1516. release_references(vma, vma->vm->gt, false);
  1517. }
  1518. void i915_vma_destroy(struct i915_vma *vma)
  1519. {
  1520. struct intel_gt *gt;
  1521. bool vm_ddestroy;
  1522. mutex_lock(&vma->vm->mutex);
  1523. force_unbind(vma);
  1524. list_del_init(&vma->vm_link);
  1525. vm_ddestroy = vma->vm_ddestroy;
  1526. vma->vm_ddestroy = false;
  1527. /* vma->vm may be freed when releasing vma->vm->mutex. */
  1528. gt = vma->vm->gt;
  1529. mutex_unlock(&vma->vm->mutex);
  1530. release_references(vma, gt, vm_ddestroy);
  1531. }
  1532. void i915_vma_parked(struct intel_gt *gt)
  1533. {
  1534. struct i915_vma *vma, *next;
  1535. LIST_HEAD(closed);
  1536. spin_lock_irq(&gt->closed_lock);
  1537. list_for_each_entry_safe(vma, next, &gt->closed_vma, closed_link) {
  1538. struct drm_i915_gem_object *obj = vma->obj;
  1539. struct i915_address_space *vm = vma->vm;
  1540. /* XXX All to avoid keeping a reference on i915_vma itself */
  1541. if (!kref_get_unless_zero(&obj->base.refcount))
  1542. continue;
  1543. if (!i915_vm_tryget(vm)) {
  1544. i915_gem_object_put(obj);
  1545. continue;
  1546. }
  1547. list_move(&vma->closed_link, &closed);
  1548. }
  1549. spin_unlock_irq(&gt->closed_lock);
  1550. /* As the GT is held idle, no vma can be reopened as we destroy them */
  1551. list_for_each_entry_safe(vma, next, &closed, closed_link) {
  1552. struct drm_i915_gem_object *obj = vma->obj;
  1553. struct i915_address_space *vm = vma->vm;
  1554. if (i915_gem_object_trylock(obj, NULL)) {
  1555. INIT_LIST_HEAD(&vma->closed_link);
  1556. i915_vma_destroy(vma);
  1557. i915_gem_object_unlock(obj);
  1558. } else {
  1559. /* back you go.. */
  1560. spin_lock_irq(&gt->closed_lock);
  1561. list_add(&vma->closed_link, &gt->closed_vma);
  1562. spin_unlock_irq(&gt->closed_lock);
  1563. }
  1564. i915_gem_object_put(obj);
  1565. i915_vm_put(vm);
  1566. }
  1567. }
  1568. static void __i915_vma_iounmap(struct i915_vma *vma)
  1569. {
  1570. GEM_BUG_ON(i915_vma_is_pinned(vma));
  1571. if (vma->iomap == NULL)
  1572. return;
  1573. if (page_unmask_bits(vma->iomap))
  1574. __i915_gem_object_release_map(vma->obj);
  1575. else
  1576. io_mapping_unmap(vma->iomap);
  1577. vma->iomap = NULL;
  1578. }
  1579. void i915_vma_revoke_mmap(struct i915_vma *vma)
  1580. {
  1581. struct drm_vma_offset_node *node;
  1582. u64 vma_offset;
  1583. if (!i915_vma_has_userfault(vma))
  1584. return;
  1585. GEM_BUG_ON(!i915_vma_is_map_and_fenceable(vma));
  1586. GEM_BUG_ON(!vma->obj->userfault_count);
  1587. node = &vma->mmo->vma_node;
  1588. vma_offset = vma->gtt_view.partial.offset << PAGE_SHIFT;
  1589. unmap_mapping_range(vma->vm->i915->drm.anon_inode->i_mapping,
  1590. drm_vma_node_offset_addr(node) + vma_offset,
  1591. vma->size,
  1592. 1);
  1593. i915_vma_unset_userfault(vma);
  1594. if (!--vma->obj->userfault_count)
  1595. list_del(&vma->obj->userfault_link);
  1596. }
  1597. static int
  1598. __i915_request_await_bind(struct i915_request *rq, struct i915_vma *vma)
  1599. {
  1600. return __i915_request_await_exclusive(rq, &vma->active);
  1601. }
  1602. static int __i915_vma_move_to_active(struct i915_vma *vma, struct i915_request *rq)
  1603. {
  1604. int err;
  1605. /* Wait for the vma to be bound before we start! */
  1606. err = __i915_request_await_bind(rq, vma);
  1607. if (err)
  1608. return err;
  1609. return i915_active_add_request(&vma->active, rq);
  1610. }
  1611. int _i915_vma_move_to_active(struct i915_vma *vma,
  1612. struct i915_request *rq,
  1613. struct dma_fence *fence,
  1614. unsigned int flags)
  1615. {
  1616. struct drm_i915_gem_object *obj = vma->obj;
  1617. int err;
  1618. assert_object_held(obj);
  1619. GEM_BUG_ON(!vma->pages);
  1620. if (!(flags & __EXEC_OBJECT_NO_REQUEST_AWAIT)) {
  1621. err = i915_request_await_object(rq, vma->obj, flags & EXEC_OBJECT_WRITE);
  1622. if (unlikely(err))
  1623. return err;
  1624. }
  1625. err = __i915_vma_move_to_active(vma, rq);
  1626. if (unlikely(err))
  1627. return err;
  1628. /*
  1629. * Reserve fences slot early to prevent an allocation after preparing
  1630. * the workload and associating fences with dma_resv.
  1631. */
  1632. if (fence && !(flags & __EXEC_OBJECT_NO_RESERVE)) {
  1633. struct dma_fence *curr;
  1634. int idx;
  1635. dma_fence_array_for_each(curr, idx, fence)
  1636. ;
  1637. err = dma_resv_reserve_fences(vma->obj->base.resv, idx);
  1638. if (unlikely(err))
  1639. return err;
  1640. }
  1641. if (flags & EXEC_OBJECT_WRITE) {
  1642. struct i915_frontbuffer *front;
  1643. front = i915_gem_object_frontbuffer_lookup(obj);
  1644. if (unlikely(front)) {
  1645. if (intel_frontbuffer_invalidate(&front->base, ORIGIN_CS))
  1646. i915_active_add_request(&front->write, rq);
  1647. i915_gem_object_frontbuffer_put(front);
  1648. }
  1649. }
  1650. if (fence) {
  1651. struct dma_fence *curr;
  1652. enum dma_resv_usage usage;
  1653. int idx;
  1654. if (flags & EXEC_OBJECT_WRITE) {
  1655. usage = DMA_RESV_USAGE_WRITE;
  1656. obj->write_domain = I915_GEM_DOMAIN_RENDER;
  1657. obj->read_domains = 0;
  1658. } else {
  1659. usage = DMA_RESV_USAGE_READ;
  1660. obj->write_domain = 0;
  1661. }
  1662. dma_fence_array_for_each(curr, idx, fence)
  1663. dma_resv_add_fence(vma->obj->base.resv, curr, usage);
  1664. }
  1665. if (flags & EXEC_OBJECT_NEEDS_FENCE && vma->fence)
  1666. i915_active_add_request(&vma->fence->active, rq);
  1667. obj->read_domains |= I915_GEM_GPU_DOMAINS;
  1668. obj->mm.dirty = true;
  1669. GEM_BUG_ON(!i915_vma_is_active(vma));
  1670. return 0;
  1671. }
  1672. struct dma_fence *__i915_vma_evict(struct i915_vma *vma, bool async)
  1673. {
  1674. struct i915_vma_resource *vma_res = vma->resource;
  1675. struct dma_fence *unbind_fence;
  1676. GEM_BUG_ON(i915_vma_is_pinned(vma));
  1677. assert_vma_held_evict(vma);
  1678. if (i915_vma_is_map_and_fenceable(vma)) {
  1679. /* Force a pagefault for domain tracking on next user access */
  1680. i915_vma_revoke_mmap(vma);
  1681. /*
  1682. * Check that we have flushed all writes through the GGTT
  1683. * before the unbind, other due to non-strict nature of those
  1684. * indirect writes they may end up referencing the GGTT PTE
  1685. * after the unbind.
  1686. *
  1687. * Note that we may be concurrently poking at the GGTT_WRITE
  1688. * bit from set-domain, as we mark all GGTT vma associated
  1689. * with an object. We know this is for another vma, as we
  1690. * are currently unbinding this one -- so if this vma will be
  1691. * reused, it will be refaulted and have its dirty bit set
  1692. * before the next write.
  1693. */
  1694. i915_vma_flush_writes(vma);
  1695. /* release the fence reg _after_ flushing */
  1696. i915_vma_revoke_fence(vma);
  1697. clear_bit(I915_VMA_CAN_FENCE_BIT, __i915_vma_flags(vma));
  1698. }
  1699. __i915_vma_iounmap(vma);
  1700. GEM_BUG_ON(vma->fence);
  1701. GEM_BUG_ON(i915_vma_has_userfault(vma));
  1702. /* Object backend must be async capable. */
  1703. GEM_WARN_ON(async && !vma->resource->bi.pages_rsgt);
  1704. /* If vm is not open, unbind is a nop. */
  1705. vma_res->needs_wakeref = i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND) &&
  1706. kref_read(&vma->vm->ref);
  1707. vma_res->skip_pte_rewrite = !kref_read(&vma->vm->ref) ||
  1708. vma->vm->skip_pte_rewrite;
  1709. trace_i915_vma_unbind(vma);
  1710. if (async)
  1711. unbind_fence = i915_vma_resource_unbind(vma_res,
  1712. vma->obj->mm.tlb);
  1713. else
  1714. unbind_fence = i915_vma_resource_unbind(vma_res, NULL);
  1715. vma->resource = NULL;
  1716. atomic_and(~(I915_VMA_BIND_MASK | I915_VMA_ERROR | I915_VMA_GGTT_WRITE),
  1717. &vma->flags);
  1718. i915_vma_detach(vma);
  1719. if (!async) {
  1720. if (unbind_fence) {
  1721. dma_fence_wait(unbind_fence, false);
  1722. dma_fence_put(unbind_fence);
  1723. unbind_fence = NULL;
  1724. }
  1725. vma_invalidate_tlb(vma->vm, vma->obj->mm.tlb);
  1726. }
  1727. /*
  1728. * Binding itself may not have completed until the unbind fence signals,
  1729. * so don't drop the pages until that happens, unless the resource is
  1730. * async_capable.
  1731. */
  1732. vma_unbind_pages(vma);
  1733. return unbind_fence;
  1734. }
  1735. int __i915_vma_unbind(struct i915_vma *vma)
  1736. {
  1737. int ret;
  1738. lockdep_assert_held(&vma->vm->mutex);
  1739. assert_vma_held_evict(vma);
  1740. if (!drm_mm_node_allocated(&vma->node))
  1741. return 0;
  1742. if (i915_vma_is_pinned(vma)) {
  1743. vma_print_allocator(vma, "is pinned");
  1744. return -EAGAIN;
  1745. }
  1746. /*
  1747. * After confirming that no one else is pinning this vma, wait for
  1748. * any laggards who may have crept in during the wait (through
  1749. * a residual pin skipping the vm->mutex) to complete.
  1750. */
  1751. ret = i915_vma_sync(vma);
  1752. if (ret)
  1753. return ret;
  1754. GEM_BUG_ON(i915_vma_is_active(vma));
  1755. __i915_vma_evict(vma, false);
  1756. drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */
  1757. return 0;
  1758. }
  1759. static struct dma_fence *__i915_vma_unbind_async(struct i915_vma *vma)
  1760. {
  1761. struct dma_fence *fence;
  1762. lockdep_assert_held(&vma->vm->mutex);
  1763. if (!drm_mm_node_allocated(&vma->node))
  1764. return NULL;
  1765. if (i915_vma_is_pinned(vma) ||
  1766. &vma->obj->mm.rsgt->table != vma->resource->bi.pages)
  1767. return ERR_PTR(-EAGAIN);
  1768. /*
  1769. * We probably need to replace this with awaiting the fences of the
  1770. * object's dma_resv when the vma active goes away. When doing that
  1771. * we need to be careful to not add the vma_resource unbind fence
  1772. * immediately to the object's dma_resv, because then unbinding
  1773. * the next vma from the object, in case there are many, will
  1774. * actually await the unbinding of the previous vmas, which is
  1775. * undesirable.
  1776. */
  1777. if (i915_sw_fence_await_active(&vma->resource->chain, &vma->active,
  1778. I915_ACTIVE_AWAIT_EXCL |
  1779. I915_ACTIVE_AWAIT_ACTIVE) < 0) {
  1780. return ERR_PTR(-EBUSY);
  1781. }
  1782. fence = __i915_vma_evict(vma, true);
  1783. drm_mm_remove_node(&vma->node); /* pairs with i915_vma_release() */
  1784. return fence;
  1785. }
  1786. int i915_vma_unbind(struct i915_vma *vma)
  1787. {
  1788. struct i915_address_space *vm = vma->vm;
  1789. intel_wakeref_t wakeref = NULL;
  1790. int err;
  1791. assert_object_held_shared(vma->obj);
  1792. /* Optimistic wait before taking the mutex */
  1793. err = i915_vma_sync(vma);
  1794. if (err)
  1795. return err;
  1796. if (!drm_mm_node_allocated(&vma->node))
  1797. return 0;
  1798. if (i915_vma_is_pinned(vma)) {
  1799. vma_print_allocator(vma, "is pinned");
  1800. return -EAGAIN;
  1801. }
  1802. if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
  1803. /* XXX not always required: nop_clear_range */
  1804. wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm);
  1805. err = mutex_lock_interruptible_nested(&vma->vm->mutex, !wakeref);
  1806. if (err)
  1807. goto out_rpm;
  1808. err = __i915_vma_unbind(vma);
  1809. mutex_unlock(&vm->mutex);
  1810. out_rpm:
  1811. if (wakeref)
  1812. intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref);
  1813. return err;
  1814. }
  1815. int i915_vma_unbind_async(struct i915_vma *vma, bool trylock_vm)
  1816. {
  1817. struct drm_i915_gem_object *obj = vma->obj;
  1818. struct i915_address_space *vm = vma->vm;
  1819. intel_wakeref_t wakeref = NULL;
  1820. struct dma_fence *fence;
  1821. int err;
  1822. /*
  1823. * We need the dma-resv lock since we add the
  1824. * unbind fence to the dma-resv object.
  1825. */
  1826. assert_object_held(obj);
  1827. if (!drm_mm_node_allocated(&vma->node))
  1828. return 0;
  1829. if (i915_vma_is_pinned(vma)) {
  1830. vma_print_allocator(vma, "is pinned");
  1831. return -EAGAIN;
  1832. }
  1833. if (!obj->mm.rsgt)
  1834. return -EBUSY;
  1835. err = dma_resv_reserve_fences(obj->base.resv, 2);
  1836. if (err)
  1837. return -EBUSY;
  1838. /*
  1839. * It would be great if we could grab this wakeref from the
  1840. * async unbind work if needed, but we can't because it uses
  1841. * kmalloc and it's in the dma-fence signalling critical path.
  1842. */
  1843. if (i915_vma_is_bound(vma, I915_VMA_GLOBAL_BIND))
  1844. wakeref = intel_runtime_pm_get(&vm->i915->runtime_pm);
  1845. if (trylock_vm && !mutex_trylock(&vm->mutex)) {
  1846. err = -EBUSY;
  1847. goto out_rpm;
  1848. } else if (!trylock_vm) {
  1849. err = mutex_lock_interruptible_nested(&vm->mutex, !wakeref);
  1850. if (err)
  1851. goto out_rpm;
  1852. }
  1853. fence = __i915_vma_unbind_async(vma);
  1854. mutex_unlock(&vm->mutex);
  1855. if (IS_ERR_OR_NULL(fence)) {
  1856. err = PTR_ERR_OR_ZERO(fence);
  1857. goto out_rpm;
  1858. }
  1859. dma_resv_add_fence(obj->base.resv, fence, DMA_RESV_USAGE_READ);
  1860. dma_fence_put(fence);
  1861. out_rpm:
  1862. if (wakeref)
  1863. intel_runtime_pm_put(&vm->i915->runtime_pm, wakeref);
  1864. return err;
  1865. }
  1866. int i915_vma_unbind_unlocked(struct i915_vma *vma)
  1867. {
  1868. int err;
  1869. i915_gem_object_lock(vma->obj, NULL);
  1870. err = i915_vma_unbind(vma);
  1871. i915_gem_object_unlock(vma->obj);
  1872. return err;
  1873. }
  1874. struct i915_vma *i915_vma_make_unshrinkable(struct i915_vma *vma)
  1875. {
  1876. i915_gem_object_make_unshrinkable(vma->obj);
  1877. return vma;
  1878. }
  1879. void i915_vma_make_shrinkable(struct i915_vma *vma)
  1880. {
  1881. i915_gem_object_make_shrinkable(vma->obj);
  1882. }
  1883. void i915_vma_make_purgeable(struct i915_vma *vma)
  1884. {
  1885. i915_gem_object_make_purgeable(vma->obj);
  1886. }
  1887. #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
  1888. #include "selftests/i915_vma.c"
  1889. #endif
  1890. void i915_vma_module_exit(void)
  1891. {
  1892. kmem_cache_destroy(slab_vmas);
  1893. }
  1894. int __init i915_vma_module_init(void)
  1895. {
  1896. slab_vmas = KMEM_CACHE(i915_vma, SLAB_HWCACHE_ALIGN);
  1897. if (!slab_vmas)
  1898. return -ENOMEM;
  1899. return 0;
  1900. }