i915_edram.c 1.1 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344
  1. // SPDX-License-Identifier: MIT
  2. /* Copyright © 2025 Intel Corporation */
  3. #include <drm/drm_print.h>
  4. #include "i915_drv.h"
  5. #include "i915_edram.h"
  6. #include "i915_reg.h"
  7. static u32 gen9_edram_size_mb(struct drm_i915_private *i915, u32 cap)
  8. {
  9. static const u8 ways[8] = { 4, 8, 12, 16, 16, 16, 16, 16 };
  10. static const u8 sets[4] = { 1, 1, 2, 2 };
  11. return EDRAM_NUM_BANKS(cap) *
  12. ways[EDRAM_WAYS_IDX(cap)] *
  13. sets[EDRAM_SETS_IDX(cap)];
  14. }
  15. void i915_edram_detect(struct drm_i915_private *i915)
  16. {
  17. u32 edram_cap = 0;
  18. if (!(IS_HASWELL(i915) || IS_BROADWELL(i915) || GRAPHICS_VER(i915) >= 9))
  19. return;
  20. edram_cap = intel_uncore_read_fw(&i915->uncore, HSW_EDRAM_CAP);
  21. /* NB: We can't write IDICR yet because we don't have gt funcs set up */
  22. if (!(edram_cap & EDRAM_ENABLED))
  23. return;
  24. /*
  25. * The needed capability bits for size calculation are not there with
  26. * pre gen9 so return 128MB always.
  27. */
  28. if (GRAPHICS_VER(i915) < 9)
  29. i915->edram_size_mb = 128;
  30. else
  31. i915->edram_size_mb = gen9_edram_size_mb(i915, edram_cap);
  32. drm_info(&i915->drm, "Found %uMB of eDRAM\n", i915->edram_size_mb);
  33. }