intel_context_sseu.c 2.1 KB

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  1. // SPDX-License-Identifier: MIT
  2. /*
  3. * Copyright © 2019 Intel Corporation
  4. */
  5. #include "i915_drv.h"
  6. #include "i915_vma.h"
  7. #include "intel_context.h"
  8. #include "intel_engine_pm.h"
  9. #include "intel_gpu_commands.h"
  10. #include "intel_lrc.h"
  11. #include "intel_lrc_reg.h"
  12. #include "intel_ring.h"
  13. #include "intel_sseu.h"
  14. static int gen8_emit_rpcs_config(struct i915_request *rq,
  15. const struct intel_context *ce,
  16. const struct intel_sseu sseu)
  17. {
  18. u64 offset;
  19. u32 *cs;
  20. cs = intel_ring_begin(rq, 4);
  21. if (IS_ERR(cs))
  22. return PTR_ERR(cs);
  23. offset = i915_ggtt_offset(ce->state) +
  24. LRC_STATE_OFFSET + CTX_R_PWR_CLK_STATE * 4;
  25. *cs++ = MI_STORE_DWORD_IMM_GEN4 | MI_USE_GGTT;
  26. *cs++ = lower_32_bits(offset);
  27. *cs++ = upper_32_bits(offset);
  28. *cs++ = intel_sseu_make_rpcs(rq->engine->gt, &sseu);
  29. intel_ring_advance(rq, cs);
  30. return 0;
  31. }
  32. static int
  33. gen8_modify_rpcs(struct intel_context *ce, const struct intel_sseu sseu)
  34. {
  35. struct i915_request *rq;
  36. int ret;
  37. lockdep_assert_held(&ce->pin_mutex);
  38. /*
  39. * If the context is not idle, we have to submit an ordered request to
  40. * modify its context image via the kernel context (writing to our own
  41. * image, or into the registers directory, does not stick). Pristine
  42. * and idle contexts will be configured on pinning.
  43. */
  44. if (!intel_context_pin_if_active(ce))
  45. return 0;
  46. rq = intel_engine_create_kernel_request(ce->engine);
  47. if (IS_ERR(rq)) {
  48. ret = PTR_ERR(rq);
  49. goto out_unpin;
  50. }
  51. /* Serialise with the remote context */
  52. ret = intel_context_prepare_remote_request(ce, rq);
  53. if (ret == 0)
  54. ret = gen8_emit_rpcs_config(rq, ce, sseu);
  55. i915_request_add(rq);
  56. out_unpin:
  57. intel_context_unpin(ce);
  58. return ret;
  59. }
  60. int
  61. intel_context_reconfigure_sseu(struct intel_context *ce,
  62. const struct intel_sseu sseu)
  63. {
  64. int ret;
  65. GEM_BUG_ON(GRAPHICS_VER(ce->engine->i915) < 8);
  66. ret = intel_context_lock_pinned(ce);
  67. if (ret)
  68. return ret;
  69. /* Nothing to do if unmodified. */
  70. if (!memcmp(&ce->sseu, &sseu, sizeof(sseu)))
  71. goto unlock;
  72. ret = gen8_modify_rpcs(ce, sseu);
  73. if (!ret)
  74. ce->sseu = sseu;
  75. unlock:
  76. intel_context_unlock_pinned(ce);
  77. return ret;
  78. }