fsl_dcu_drm_plane.c 6.1 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright 2015 Freescale Semiconductor, Inc.
  4. *
  5. * Freescale DCU drm device driver
  6. */
  7. #include <linux/regmap.h>
  8. #include <drm/drm_atomic.h>
  9. #include <drm/drm_atomic_helper.h>
  10. #include <drm/drm_crtc.h>
  11. #include <drm/drm_fb_dma_helper.h>
  12. #include <drm/drm_fourcc.h>
  13. #include <drm/drm_framebuffer.h>
  14. #include <drm/drm_gem_dma_helper.h>
  15. #include <drm/drm_plane_helper.h>
  16. #include <drm/drm_print.h>
  17. #include <drm/drm_probe_helper.h>
  18. #include "fsl_dcu_drm_drv.h"
  19. #include "fsl_dcu_drm_plane.h"
  20. static int fsl_dcu_drm_plane_index(struct drm_plane *plane)
  21. {
  22. struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
  23. unsigned int total_layer = fsl_dev->soc->total_layer;
  24. unsigned int index;
  25. index = drm_plane_index(plane);
  26. if (index < total_layer)
  27. return total_layer - index - 1;
  28. dev_err(fsl_dev->dev, "No more layer left\n");
  29. return -EINVAL;
  30. }
  31. static int fsl_dcu_drm_plane_atomic_check(struct drm_plane *plane,
  32. struct drm_atomic_state *state)
  33. {
  34. struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state,
  35. plane);
  36. struct drm_framebuffer *fb = new_plane_state->fb;
  37. if (!new_plane_state->fb || !new_plane_state->crtc)
  38. return 0;
  39. switch (fb->format->format) {
  40. case DRM_FORMAT_RGB565:
  41. case DRM_FORMAT_RGB888:
  42. case DRM_FORMAT_XRGB8888:
  43. case DRM_FORMAT_ARGB8888:
  44. case DRM_FORMAT_XRGB4444:
  45. case DRM_FORMAT_ARGB4444:
  46. case DRM_FORMAT_XRGB1555:
  47. case DRM_FORMAT_ARGB1555:
  48. case DRM_FORMAT_YUV422:
  49. return 0;
  50. default:
  51. return -EINVAL;
  52. }
  53. }
  54. static void fsl_dcu_drm_plane_atomic_disable(struct drm_plane *plane,
  55. struct drm_atomic_state *state)
  56. {
  57. struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
  58. unsigned int value;
  59. int index;
  60. index = fsl_dcu_drm_plane_index(plane);
  61. if (index < 0)
  62. return;
  63. regmap_read(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), &value);
  64. value &= ~DCU_LAYER_EN;
  65. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4), value);
  66. }
  67. static void fsl_dcu_drm_plane_atomic_update(struct drm_plane *plane,
  68. struct drm_atomic_state *state)
  69. {
  70. struct fsl_dcu_drm_device *fsl_dev = plane->dev->dev_private;
  71. struct drm_plane_state *new_state = drm_atomic_get_new_plane_state(state,
  72. plane);
  73. struct drm_framebuffer *fb = plane->state->fb;
  74. struct drm_gem_dma_object *gem;
  75. unsigned int alpha = DCU_LAYER_AB_NONE, bpp;
  76. int index;
  77. if (!fb)
  78. return;
  79. index = fsl_dcu_drm_plane_index(plane);
  80. if (index < 0)
  81. return;
  82. gem = drm_fb_dma_get_gem_obj(fb, 0);
  83. switch (fb->format->format) {
  84. case DRM_FORMAT_RGB565:
  85. bpp = FSL_DCU_RGB565;
  86. break;
  87. case DRM_FORMAT_RGB888:
  88. bpp = FSL_DCU_RGB888;
  89. break;
  90. case DRM_FORMAT_ARGB8888:
  91. alpha = DCU_LAYER_AB_WHOLE_FRAME;
  92. fallthrough;
  93. case DRM_FORMAT_XRGB8888:
  94. bpp = FSL_DCU_ARGB8888;
  95. break;
  96. case DRM_FORMAT_ARGB4444:
  97. alpha = DCU_LAYER_AB_WHOLE_FRAME;
  98. fallthrough;
  99. case DRM_FORMAT_XRGB4444:
  100. bpp = FSL_DCU_ARGB4444;
  101. break;
  102. case DRM_FORMAT_ARGB1555:
  103. alpha = DCU_LAYER_AB_WHOLE_FRAME;
  104. fallthrough;
  105. case DRM_FORMAT_XRGB1555:
  106. bpp = FSL_DCU_ARGB1555;
  107. break;
  108. case DRM_FORMAT_YUV422:
  109. bpp = FSL_DCU_YUV422;
  110. break;
  111. default:
  112. return;
  113. }
  114. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 1),
  115. DCU_LAYER_HEIGHT(new_state->crtc_h) |
  116. DCU_LAYER_WIDTH(new_state->crtc_w));
  117. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 2),
  118. DCU_LAYER_POSY(new_state->crtc_y) |
  119. DCU_LAYER_POSX(new_state->crtc_x));
  120. regmap_write(fsl_dev->regmap,
  121. DCU_CTRLDESCLN(index, 3), gem->dma_addr);
  122. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 4),
  123. DCU_LAYER_EN |
  124. DCU_LAYER_TRANS(0xff) |
  125. DCU_LAYER_BPP(bpp) |
  126. alpha);
  127. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 5),
  128. DCU_LAYER_CKMAX_R(0xFF) |
  129. DCU_LAYER_CKMAX_G(0xFF) |
  130. DCU_LAYER_CKMAX_B(0xFF));
  131. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 6),
  132. DCU_LAYER_CKMIN_R(0) |
  133. DCU_LAYER_CKMIN_G(0) |
  134. DCU_LAYER_CKMIN_B(0));
  135. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 7), 0);
  136. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 8),
  137. DCU_LAYER_FG_FCOLOR(0));
  138. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 9),
  139. DCU_LAYER_BG_BCOLOR(0));
  140. if (!strcmp(fsl_dev->soc->name, "ls1021a")) {
  141. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(index, 10),
  142. DCU_LAYER_POST_SKIP(0) |
  143. DCU_LAYER_PRE_SKIP(0));
  144. }
  145. return;
  146. }
  147. static const struct drm_plane_helper_funcs fsl_dcu_drm_plane_helper_funcs = {
  148. .atomic_check = fsl_dcu_drm_plane_atomic_check,
  149. .atomic_disable = fsl_dcu_drm_plane_atomic_disable,
  150. .atomic_update = fsl_dcu_drm_plane_atomic_update,
  151. };
  152. static const struct drm_plane_funcs fsl_dcu_drm_plane_funcs = {
  153. .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
  154. .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
  155. .destroy = drm_plane_helper_destroy,
  156. .disable_plane = drm_atomic_helper_disable_plane,
  157. .reset = drm_atomic_helper_plane_reset,
  158. .update_plane = drm_atomic_helper_update_plane,
  159. };
  160. static const u32 fsl_dcu_drm_plane_formats[] = {
  161. DRM_FORMAT_RGB565,
  162. DRM_FORMAT_RGB888,
  163. DRM_FORMAT_XRGB8888,
  164. DRM_FORMAT_ARGB8888,
  165. DRM_FORMAT_XRGB4444,
  166. DRM_FORMAT_ARGB4444,
  167. DRM_FORMAT_XRGB1555,
  168. DRM_FORMAT_ARGB1555,
  169. DRM_FORMAT_YUV422,
  170. };
  171. void fsl_dcu_drm_init_planes(struct drm_device *dev)
  172. {
  173. struct fsl_dcu_drm_device *fsl_dev = dev->dev_private;
  174. int i, j;
  175. for (i = 0; i < fsl_dev->soc->total_layer; i++) {
  176. for (j = 1; j <= fsl_dev->soc->layer_regs; j++)
  177. regmap_write(fsl_dev->regmap, DCU_CTRLDESCLN(i, j), 0);
  178. }
  179. }
  180. struct drm_plane *fsl_dcu_drm_primary_create_plane(struct drm_device *dev)
  181. {
  182. struct drm_plane *primary;
  183. int ret;
  184. primary = kzalloc_obj(*primary);
  185. if (!primary) {
  186. DRM_DEBUG_KMS("Failed to allocate primary plane\n");
  187. return NULL;
  188. }
  189. /* possible_crtc's will be filled in later by crtc_init */
  190. ret = drm_universal_plane_init(dev, primary, 0,
  191. &fsl_dcu_drm_plane_funcs,
  192. fsl_dcu_drm_plane_formats,
  193. ARRAY_SIZE(fsl_dcu_drm_plane_formats),
  194. NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
  195. if (ret) {
  196. kfree(primary);
  197. primary = NULL;
  198. }
  199. drm_plane_helper_add(primary, &fsl_dcu_drm_plane_helper_funcs);
  200. return primary;
  201. }