exynos_drm_ipp.c 25 KB

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  1. /*
  2. * Copyright (C) 2017 Samsung Electronics Co.Ltd
  3. * Authors:
  4. * Marek Szyprowski <m.szyprowski@samsung.com>
  5. *
  6. * Exynos DRM Image Post Processing (IPP) related functions
  7. *
  8. * Permission is hereby granted, free of charge, to any person obtaining a
  9. * copy of this software and associated documentation files (the "Software"),
  10. * to deal in the Software without restriction, including without limitation
  11. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12. * and/or sell copies of the Software, and to permit persons to whom the
  13. * Software is furnished to do so, subject to the following conditions:
  14. *
  15. * The above copyright notice and this permission notice shall be included in
  16. * all copies or substantial portions of the Software.
  17. */
  18. #include <linux/uaccess.h>
  19. #include <drm/drm_blend.h>
  20. #include <drm/drm_file.h>
  21. #include <drm/drm_fourcc.h>
  22. #include <drm/drm_mode.h>
  23. #include <drm/drm_print.h>
  24. #include <drm/exynos_drm.h>
  25. #include "exynos_drm_drv.h"
  26. #include "exynos_drm_gem.h"
  27. #include "exynos_drm_ipp.h"
  28. static int num_ipp;
  29. static LIST_HEAD(ipp_list);
  30. /**
  31. * exynos_drm_ipp_register - Register a new picture processor hardware module
  32. * @dev: DRM device
  33. * @ipp: ipp module to init
  34. * @funcs: callbacks for the new ipp object
  35. * @caps: bitmask of ipp capabilities (%DRM_EXYNOS_IPP_CAP_*)
  36. * @formats: array of supported formats
  37. * @num_formats: size of the supported formats array
  38. * @name: name (for debugging purposes)
  39. *
  40. * Initializes a ipp module.
  41. *
  42. * Returns:
  43. * Zero on success, error code on failure.
  44. */
  45. int exynos_drm_ipp_register(struct device *dev, struct exynos_drm_ipp *ipp,
  46. const struct exynos_drm_ipp_funcs *funcs, unsigned int caps,
  47. const struct exynos_drm_ipp_formats *formats,
  48. unsigned int num_formats, const char *name)
  49. {
  50. WARN_ON(!ipp);
  51. WARN_ON(!funcs);
  52. WARN_ON(!formats);
  53. WARN_ON(!num_formats);
  54. spin_lock_init(&ipp->lock);
  55. INIT_LIST_HEAD(&ipp->todo_list);
  56. init_waitqueue_head(&ipp->done_wq);
  57. ipp->dev = dev;
  58. ipp->funcs = funcs;
  59. ipp->capabilities = caps;
  60. ipp->name = name;
  61. ipp->formats = formats;
  62. ipp->num_formats = num_formats;
  63. /* ipp_list modification is serialized by component framework */
  64. list_add_tail(&ipp->head, &ipp_list);
  65. ipp->id = num_ipp++;
  66. DRM_DEV_DEBUG_DRIVER(dev, "Registered ipp %d\n", ipp->id);
  67. return 0;
  68. }
  69. /**
  70. * exynos_drm_ipp_unregister - Unregister the picture processor module
  71. * @dev: DRM device
  72. * @ipp: ipp module
  73. */
  74. void exynos_drm_ipp_unregister(struct device *dev,
  75. struct exynos_drm_ipp *ipp)
  76. {
  77. WARN_ON(ipp->task);
  78. WARN_ON(!list_empty(&ipp->todo_list));
  79. list_del(&ipp->head);
  80. }
  81. /**
  82. * exynos_drm_ipp_get_res_ioctl - enumerate all ipp modules
  83. * @dev: DRM device
  84. * @data: ioctl data
  85. * @file_priv: DRM file info
  86. *
  87. * Construct a list of ipp ids.
  88. *
  89. * Called by the user via ioctl.
  90. *
  91. * Returns:
  92. * Zero on success, negative errno on failure.
  93. */
  94. int exynos_drm_ipp_get_res_ioctl(struct drm_device *dev, void *data,
  95. struct drm_file *file_priv)
  96. {
  97. struct drm_exynos_ioctl_ipp_get_res *resp = data;
  98. struct exynos_drm_ipp *ipp;
  99. uint32_t __user *ipp_ptr = (uint32_t __user *)
  100. (unsigned long)resp->ipp_id_ptr;
  101. unsigned int count = num_ipp, copied = 0;
  102. /*
  103. * This ioctl is called twice, once to determine how much space is
  104. * needed, and the 2nd time to fill it.
  105. */
  106. if (count && resp->count_ipps >= count) {
  107. list_for_each_entry(ipp, &ipp_list, head) {
  108. if (put_user(ipp->id, ipp_ptr + copied))
  109. return -EFAULT;
  110. copied++;
  111. }
  112. }
  113. resp->count_ipps = count;
  114. return 0;
  115. }
  116. static inline struct exynos_drm_ipp *__ipp_get(uint32_t id)
  117. {
  118. struct exynos_drm_ipp *ipp;
  119. list_for_each_entry(ipp, &ipp_list, head)
  120. if (ipp->id == id)
  121. return ipp;
  122. return NULL;
  123. }
  124. /**
  125. * exynos_drm_ipp_get_caps_ioctl - get ipp module capabilities and formats
  126. * @dev: DRM device
  127. * @data: ioctl data
  128. * @file_priv: DRM file info
  129. *
  130. * Construct a structure describing ipp module capabilities.
  131. *
  132. * Called by the user via ioctl.
  133. *
  134. * Returns:
  135. * Zero on success, negative errno on failure.
  136. */
  137. int exynos_drm_ipp_get_caps_ioctl(struct drm_device *dev, void *data,
  138. struct drm_file *file_priv)
  139. {
  140. struct drm_exynos_ioctl_ipp_get_caps *resp = data;
  141. void __user *ptr = (void __user *)(unsigned long)resp->formats_ptr;
  142. struct exynos_drm_ipp *ipp;
  143. int i;
  144. ipp = __ipp_get(resp->ipp_id);
  145. if (!ipp)
  146. return -ENOENT;
  147. resp->ipp_id = ipp->id;
  148. resp->capabilities = ipp->capabilities;
  149. /*
  150. * This ioctl is called twice, once to determine how much space is
  151. * needed, and the 2nd time to fill it.
  152. */
  153. if (resp->formats_count >= ipp->num_formats) {
  154. for (i = 0; i < ipp->num_formats; i++) {
  155. struct drm_exynos_ipp_format tmp = {
  156. .fourcc = ipp->formats[i].fourcc,
  157. .type = ipp->formats[i].type,
  158. .modifier = ipp->formats[i].modifier,
  159. };
  160. if (copy_to_user(ptr, &tmp, sizeof(tmp)))
  161. return -EFAULT;
  162. ptr += sizeof(tmp);
  163. }
  164. }
  165. resp->formats_count = ipp->num_formats;
  166. return 0;
  167. }
  168. static inline const struct exynos_drm_ipp_formats *__ipp_format_get(
  169. struct exynos_drm_ipp *ipp, uint32_t fourcc,
  170. uint64_t mod, unsigned int type)
  171. {
  172. int i;
  173. for (i = 0; i < ipp->num_formats; i++) {
  174. if ((ipp->formats[i].type & type) &&
  175. ipp->formats[i].fourcc == fourcc &&
  176. ipp->formats[i].modifier == mod)
  177. return &ipp->formats[i];
  178. }
  179. return NULL;
  180. }
  181. /**
  182. * exynos_drm_ipp_get_limits_ioctl - get ipp module limits
  183. * @dev: DRM device
  184. * @data: ioctl data
  185. * @file_priv: DRM file info
  186. *
  187. * Construct a structure describing ipp module limitations for provided
  188. * picture format.
  189. *
  190. * Called by the user via ioctl.
  191. *
  192. * Returns:
  193. * Zero on success, negative errno on failure.
  194. */
  195. int exynos_drm_ipp_get_limits_ioctl(struct drm_device *dev, void *data,
  196. struct drm_file *file_priv)
  197. {
  198. struct drm_exynos_ioctl_ipp_get_limits *resp = data;
  199. void __user *ptr = (void __user *)(unsigned long)resp->limits_ptr;
  200. const struct exynos_drm_ipp_formats *format;
  201. struct exynos_drm_ipp *ipp;
  202. if (resp->type != DRM_EXYNOS_IPP_FORMAT_SOURCE &&
  203. resp->type != DRM_EXYNOS_IPP_FORMAT_DESTINATION)
  204. return -EINVAL;
  205. ipp = __ipp_get(resp->ipp_id);
  206. if (!ipp)
  207. return -ENOENT;
  208. format = __ipp_format_get(ipp, resp->fourcc, resp->modifier,
  209. resp->type);
  210. if (!format)
  211. return -EINVAL;
  212. /*
  213. * This ioctl is called twice, once to determine how much space is
  214. * needed, and the 2nd time to fill it.
  215. */
  216. if (format->num_limits && resp->limits_count >= format->num_limits)
  217. if (copy_to_user((void __user *)ptr, format->limits,
  218. sizeof(*format->limits) * format->num_limits))
  219. return -EFAULT;
  220. resp->limits_count = format->num_limits;
  221. return 0;
  222. }
  223. struct drm_pending_exynos_ipp_event {
  224. struct drm_pending_event base;
  225. struct drm_exynos_ipp_event event;
  226. };
  227. static inline struct exynos_drm_ipp_task *
  228. exynos_drm_ipp_task_alloc(struct exynos_drm_ipp *ipp)
  229. {
  230. struct exynos_drm_ipp_task *task;
  231. task = kzalloc_obj(*task);
  232. if (!task)
  233. return NULL;
  234. task->dev = ipp->dev;
  235. task->ipp = ipp;
  236. /* some defaults */
  237. task->src.rect.w = task->dst.rect.w = UINT_MAX;
  238. task->src.rect.h = task->dst.rect.h = UINT_MAX;
  239. task->transform.rotation = DRM_MODE_ROTATE_0;
  240. DRM_DEV_DEBUG_DRIVER(task->dev, "Allocated task %p\n", task);
  241. return task;
  242. }
  243. static const struct exynos_drm_param_map {
  244. unsigned int id;
  245. unsigned int size;
  246. unsigned int offset;
  247. } exynos_drm_ipp_params_maps[] = {
  248. {
  249. DRM_EXYNOS_IPP_TASK_BUFFER | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE,
  250. sizeof(struct drm_exynos_ipp_task_buffer),
  251. offsetof(struct exynos_drm_ipp_task, src.buf),
  252. }, {
  253. DRM_EXYNOS_IPP_TASK_BUFFER |
  254. DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION,
  255. sizeof(struct drm_exynos_ipp_task_buffer),
  256. offsetof(struct exynos_drm_ipp_task, dst.buf),
  257. }, {
  258. DRM_EXYNOS_IPP_TASK_RECTANGLE | DRM_EXYNOS_IPP_TASK_TYPE_SOURCE,
  259. sizeof(struct drm_exynos_ipp_task_rect),
  260. offsetof(struct exynos_drm_ipp_task, src.rect),
  261. }, {
  262. DRM_EXYNOS_IPP_TASK_RECTANGLE |
  263. DRM_EXYNOS_IPP_TASK_TYPE_DESTINATION,
  264. sizeof(struct drm_exynos_ipp_task_rect),
  265. offsetof(struct exynos_drm_ipp_task, dst.rect),
  266. }, {
  267. DRM_EXYNOS_IPP_TASK_TRANSFORM,
  268. sizeof(struct drm_exynos_ipp_task_transform),
  269. offsetof(struct exynos_drm_ipp_task, transform),
  270. }, {
  271. DRM_EXYNOS_IPP_TASK_ALPHA,
  272. sizeof(struct drm_exynos_ipp_task_alpha),
  273. offsetof(struct exynos_drm_ipp_task, alpha),
  274. },
  275. };
  276. static int exynos_drm_ipp_task_set(struct exynos_drm_ipp_task *task,
  277. struct drm_exynos_ioctl_ipp_commit *arg)
  278. {
  279. const struct exynos_drm_param_map *map = exynos_drm_ipp_params_maps;
  280. void __user *params = (void __user *)(unsigned long)arg->params_ptr;
  281. unsigned int size = arg->params_size;
  282. uint32_t id;
  283. int i;
  284. while (size) {
  285. if (get_user(id, (uint32_t __user *)params))
  286. return -EFAULT;
  287. for (i = 0; i < ARRAY_SIZE(exynos_drm_ipp_params_maps); i++)
  288. if (map[i].id == id)
  289. break;
  290. if (i == ARRAY_SIZE(exynos_drm_ipp_params_maps) ||
  291. map[i].size > size)
  292. return -EINVAL;
  293. if (copy_from_user((void *)task + map[i].offset, params,
  294. map[i].size))
  295. return -EFAULT;
  296. params += map[i].size;
  297. size -= map[i].size;
  298. }
  299. DRM_DEV_DEBUG_DRIVER(task->dev,
  300. "Got task %p configuration from userspace\n",
  301. task);
  302. return 0;
  303. }
  304. static int exynos_drm_ipp_task_setup_buffer(struct exynos_drm_ipp_buffer *buf,
  305. struct drm_file *filp)
  306. {
  307. int ret = 0;
  308. int i;
  309. /* get GEM buffers and check their size */
  310. for (i = 0; i < buf->format->num_planes; i++) {
  311. unsigned int height = (i == 0) ? buf->buf.height :
  312. DIV_ROUND_UP(buf->buf.height, buf->format->vsub);
  313. unsigned long size = height * buf->buf.pitch[i];
  314. struct exynos_drm_gem *gem = exynos_drm_gem_get(filp,
  315. buf->buf.gem_id[i]);
  316. if (!gem) {
  317. ret = -ENOENT;
  318. goto gem_free;
  319. }
  320. buf->exynos_gem[i] = gem;
  321. if (size + buf->buf.offset[i] > buf->exynos_gem[i]->size) {
  322. i++;
  323. ret = -EINVAL;
  324. goto gem_free;
  325. }
  326. buf->dma_addr[i] = buf->exynos_gem[i]->dma_addr +
  327. buf->buf.offset[i];
  328. }
  329. return 0;
  330. gem_free:
  331. while (i--) {
  332. exynos_drm_gem_put(buf->exynos_gem[i]);
  333. buf->exynos_gem[i] = NULL;
  334. }
  335. return ret;
  336. }
  337. static void exynos_drm_ipp_task_release_buf(struct exynos_drm_ipp_buffer *buf)
  338. {
  339. int i;
  340. if (!buf->exynos_gem[0])
  341. return;
  342. for (i = 0; i < buf->format->num_planes; i++)
  343. exynos_drm_gem_put(buf->exynos_gem[i]);
  344. }
  345. static void exynos_drm_ipp_task_free(struct exynos_drm_ipp *ipp,
  346. struct exynos_drm_ipp_task *task)
  347. {
  348. DRM_DEV_DEBUG_DRIVER(task->dev, "Freeing task %p\n", task);
  349. exynos_drm_ipp_task_release_buf(&task->src);
  350. exynos_drm_ipp_task_release_buf(&task->dst);
  351. if (task->event)
  352. drm_event_cancel_free(ipp->drm_dev, &task->event->base);
  353. kfree(task);
  354. }
  355. struct drm_ipp_limit {
  356. struct drm_exynos_ipp_limit_val h;
  357. struct drm_exynos_ipp_limit_val v;
  358. };
  359. enum drm_ipp_size_id {
  360. IPP_LIMIT_BUFFER, IPP_LIMIT_AREA, IPP_LIMIT_ROTATED, IPP_LIMIT_MAX
  361. };
  362. static const enum drm_exynos_ipp_limit_type limit_id_fallback[IPP_LIMIT_MAX][4] = {
  363. [IPP_LIMIT_BUFFER] = { DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  364. [IPP_LIMIT_AREA] = { DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
  365. DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  366. [IPP_LIMIT_ROTATED] = { DRM_EXYNOS_IPP_LIMIT_SIZE_ROTATED,
  367. DRM_EXYNOS_IPP_LIMIT_SIZE_AREA,
  368. DRM_EXYNOS_IPP_LIMIT_SIZE_BUFFER },
  369. };
  370. static inline void __limit_set_val(unsigned int *ptr, unsigned int val)
  371. {
  372. if (!*ptr)
  373. *ptr = val;
  374. }
  375. static void __get_size_limit(const struct drm_exynos_ipp_limit *limits,
  376. unsigned int num_limits, enum drm_ipp_size_id id,
  377. struct drm_ipp_limit *res)
  378. {
  379. const struct drm_exynos_ipp_limit *l = limits;
  380. int i = 0;
  381. memset(res, 0, sizeof(*res));
  382. for (i = 0; limit_id_fallback[id][i]; i++)
  383. for (l = limits; l - limits < num_limits; l++) {
  384. if (((l->type & DRM_EXYNOS_IPP_LIMIT_TYPE_MASK) !=
  385. DRM_EXYNOS_IPP_LIMIT_TYPE_SIZE) ||
  386. ((l->type & DRM_EXYNOS_IPP_LIMIT_SIZE_MASK) !=
  387. limit_id_fallback[id][i]))
  388. continue;
  389. __limit_set_val(&res->h.min, l->h.min);
  390. __limit_set_val(&res->h.max, l->h.max);
  391. __limit_set_val(&res->h.align, l->h.align);
  392. __limit_set_val(&res->v.min, l->v.min);
  393. __limit_set_val(&res->v.max, l->v.max);
  394. __limit_set_val(&res->v.align, l->v.align);
  395. }
  396. }
  397. static inline bool __align_check(unsigned int val, unsigned int align)
  398. {
  399. if (align && (val & (align - 1))) {
  400. DRM_DEBUG_DRIVER("Value %d exceeds HW limits (align %d)\n",
  401. val, align);
  402. return false;
  403. }
  404. return true;
  405. }
  406. static inline bool __size_limit_check(unsigned int val,
  407. struct drm_exynos_ipp_limit_val *l)
  408. {
  409. if ((l->min && val < l->min) || (l->max && val > l->max)) {
  410. DRM_DEBUG_DRIVER("Value %d exceeds HW limits (min %d, max %d)\n",
  411. val, l->min, l->max);
  412. return false;
  413. }
  414. return __align_check(val, l->align);
  415. }
  416. static int exynos_drm_ipp_check_size_limits(struct exynos_drm_ipp_buffer *buf,
  417. const struct drm_exynos_ipp_limit *limits, unsigned int num_limits,
  418. bool rotate, bool swap)
  419. {
  420. enum drm_ipp_size_id id = rotate ? IPP_LIMIT_ROTATED : IPP_LIMIT_AREA;
  421. struct drm_ipp_limit l;
  422. struct drm_exynos_ipp_limit_val *lh = &l.h, *lv = &l.v;
  423. int real_width = buf->buf.pitch[0] / buf->format->cpp[0];
  424. if (!limits)
  425. return 0;
  426. __get_size_limit(limits, num_limits, IPP_LIMIT_BUFFER, &l);
  427. if (!__size_limit_check(real_width, &l.h) ||
  428. !__size_limit_check(buf->buf.height, &l.v))
  429. return -EINVAL;
  430. if (swap) {
  431. lv = &l.h;
  432. lh = &l.v;
  433. }
  434. __get_size_limit(limits, num_limits, id, &l);
  435. if (!__size_limit_check(buf->rect.w, lh) ||
  436. !__align_check(buf->rect.x, lh->align) ||
  437. !__size_limit_check(buf->rect.h, lv) ||
  438. !__align_check(buf->rect.y, lv->align))
  439. return -EINVAL;
  440. return 0;
  441. }
  442. static inline bool __scale_limit_check(unsigned int src, unsigned int dst,
  443. unsigned int min, unsigned int max)
  444. {
  445. if ((max && (dst << 16) > src * max) ||
  446. (min && (dst << 16) < src * min)) {
  447. DRM_DEBUG_DRIVER("Scale from %d to %d exceeds HW limits (ratio min %d.%05d, max %d.%05d)\n",
  448. src, dst,
  449. min >> 16, 100000 * (min & 0xffff) / (1 << 16),
  450. max >> 16, 100000 * (max & 0xffff) / (1 << 16));
  451. return false;
  452. }
  453. return true;
  454. }
  455. static int exynos_drm_ipp_check_scale_limits(
  456. struct drm_exynos_ipp_task_rect *src,
  457. struct drm_exynos_ipp_task_rect *dst,
  458. const struct drm_exynos_ipp_limit *limits,
  459. unsigned int num_limits, bool swap)
  460. {
  461. const struct drm_exynos_ipp_limit_val *lh, *lv;
  462. int dw, dh;
  463. for (; num_limits; limits++, num_limits--)
  464. if ((limits->type & DRM_EXYNOS_IPP_LIMIT_TYPE_MASK) ==
  465. DRM_EXYNOS_IPP_LIMIT_TYPE_SCALE)
  466. break;
  467. if (!num_limits)
  468. return 0;
  469. lh = (!swap) ? &limits->h : &limits->v;
  470. lv = (!swap) ? &limits->v : &limits->h;
  471. dw = (!swap) ? dst->w : dst->h;
  472. dh = (!swap) ? dst->h : dst->w;
  473. if (!__scale_limit_check(src->w, dw, lh->min, lh->max) ||
  474. !__scale_limit_check(src->h, dh, lv->min, lv->max))
  475. return -EINVAL;
  476. return 0;
  477. }
  478. static int exynos_drm_ipp_check_format(struct exynos_drm_ipp_task *task,
  479. struct exynos_drm_ipp_buffer *buf,
  480. struct exynos_drm_ipp_buffer *src,
  481. struct exynos_drm_ipp_buffer *dst,
  482. bool rotate, bool swap)
  483. {
  484. const struct exynos_drm_ipp_formats *fmt;
  485. int ret, i;
  486. fmt = __ipp_format_get(task->ipp, buf->buf.fourcc, buf->buf.modifier,
  487. buf == src ? DRM_EXYNOS_IPP_FORMAT_SOURCE :
  488. DRM_EXYNOS_IPP_FORMAT_DESTINATION);
  489. if (!fmt) {
  490. DRM_DEV_DEBUG_DRIVER(task->dev,
  491. "Task %p: %s format not supported\n",
  492. task, buf == src ? "src" : "dst");
  493. return -EINVAL;
  494. }
  495. /* basic checks */
  496. if (buf->buf.width == 0 || buf->buf.height == 0)
  497. return -EINVAL;
  498. buf->format = drm_format_info(buf->buf.fourcc);
  499. for (i = 0; i < buf->format->num_planes; i++) {
  500. unsigned int width = (i == 0) ? buf->buf.width :
  501. DIV_ROUND_UP(buf->buf.width, buf->format->hsub);
  502. if (buf->buf.pitch[i] == 0)
  503. buf->buf.pitch[i] = width * buf->format->cpp[i];
  504. if (buf->buf.pitch[i] < width * buf->format->cpp[i])
  505. return -EINVAL;
  506. if (!buf->buf.gem_id[i])
  507. return -ENOENT;
  508. }
  509. /* pitch for additional planes must match */
  510. if (buf->format->num_planes > 2 &&
  511. buf->buf.pitch[1] != buf->buf.pitch[2])
  512. return -EINVAL;
  513. /* check driver limits */
  514. ret = exynos_drm_ipp_check_size_limits(buf, fmt->limits,
  515. fmt->num_limits,
  516. rotate,
  517. buf == dst ? swap : false);
  518. if (ret)
  519. return ret;
  520. ret = exynos_drm_ipp_check_scale_limits(&src->rect, &dst->rect,
  521. fmt->limits,
  522. fmt->num_limits, swap);
  523. return ret;
  524. }
  525. static int exynos_drm_ipp_task_check(struct exynos_drm_ipp_task *task)
  526. {
  527. struct exynos_drm_ipp *ipp = task->ipp;
  528. struct exynos_drm_ipp_buffer *src = &task->src, *dst = &task->dst;
  529. unsigned int rotation = task->transform.rotation;
  530. int ret = 0;
  531. bool swap = drm_rotation_90_or_270(rotation);
  532. bool rotate = (rotation != DRM_MODE_ROTATE_0);
  533. bool scale = false;
  534. DRM_DEV_DEBUG_DRIVER(task->dev, "Checking task %p\n", task);
  535. if (src->rect.w == UINT_MAX)
  536. src->rect.w = src->buf.width;
  537. if (src->rect.h == UINT_MAX)
  538. src->rect.h = src->buf.height;
  539. if (dst->rect.w == UINT_MAX)
  540. dst->rect.w = dst->buf.width;
  541. if (dst->rect.h == UINT_MAX)
  542. dst->rect.h = dst->buf.height;
  543. if (src->rect.x + src->rect.w > (src->buf.width) ||
  544. src->rect.y + src->rect.h > (src->buf.height) ||
  545. dst->rect.x + dst->rect.w > (dst->buf.width) ||
  546. dst->rect.y + dst->rect.h > (dst->buf.height)) {
  547. DRM_DEV_DEBUG_DRIVER(task->dev,
  548. "Task %p: defined area is outside provided buffers\n",
  549. task);
  550. return -EINVAL;
  551. }
  552. if ((!swap && (src->rect.w != dst->rect.w ||
  553. src->rect.h != dst->rect.h)) ||
  554. (swap && (src->rect.w != dst->rect.h ||
  555. src->rect.h != dst->rect.w)))
  556. scale = true;
  557. if ((!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CROP) &&
  558. (src->rect.x || src->rect.y || dst->rect.x || dst->rect.y)) ||
  559. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_ROTATE) && rotate) ||
  560. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_SCALE) && scale) ||
  561. (!(ipp->capabilities & DRM_EXYNOS_IPP_CAP_CONVERT) &&
  562. src->buf.fourcc != dst->buf.fourcc)) {
  563. DRM_DEV_DEBUG_DRIVER(task->dev, "Task %p: hw capabilities exceeded\n",
  564. task);
  565. return -EINVAL;
  566. }
  567. ret = exynos_drm_ipp_check_format(task, src, src, dst, rotate, swap);
  568. if (ret)
  569. return ret;
  570. ret = exynos_drm_ipp_check_format(task, dst, src, dst, false, swap);
  571. if (ret)
  572. return ret;
  573. DRM_DEV_DEBUG_DRIVER(ipp->dev, "Task %p: all checks done.\n",
  574. task);
  575. return ret;
  576. }
  577. static int exynos_drm_ipp_task_setup_buffers(struct exynos_drm_ipp_task *task,
  578. struct drm_file *filp)
  579. {
  580. struct exynos_drm_ipp_buffer *src = &task->src, *dst = &task->dst;
  581. int ret = 0;
  582. DRM_DEV_DEBUG_DRIVER(task->dev, "Setting buffer for task %p\n",
  583. task);
  584. ret = exynos_drm_ipp_task_setup_buffer(src, filp);
  585. if (ret) {
  586. DRM_DEV_DEBUG_DRIVER(task->dev,
  587. "Task %p: src buffer setup failed\n",
  588. task);
  589. return ret;
  590. }
  591. ret = exynos_drm_ipp_task_setup_buffer(dst, filp);
  592. if (ret) {
  593. DRM_DEV_DEBUG_DRIVER(task->dev,
  594. "Task %p: dst buffer setup failed\n",
  595. task);
  596. return ret;
  597. }
  598. DRM_DEV_DEBUG_DRIVER(task->dev, "Task %p: buffers prepared.\n",
  599. task);
  600. return ret;
  601. }
  602. static int exynos_drm_ipp_event_create(struct exynos_drm_ipp_task *task,
  603. struct drm_file *file_priv, uint64_t user_data)
  604. {
  605. struct drm_pending_exynos_ipp_event *e = NULL;
  606. int ret;
  607. e = kzalloc_obj(*e);
  608. if (!e)
  609. return -ENOMEM;
  610. e->event.base.type = DRM_EXYNOS_IPP_EVENT;
  611. e->event.base.length = sizeof(e->event);
  612. e->event.user_data = user_data;
  613. ret = drm_event_reserve_init(task->ipp->drm_dev, file_priv, &e->base,
  614. &e->event.base);
  615. if (ret)
  616. goto free;
  617. task->event = e;
  618. return 0;
  619. free:
  620. kfree(e);
  621. return ret;
  622. }
  623. static void exynos_drm_ipp_event_send(struct exynos_drm_ipp_task *task)
  624. {
  625. struct timespec64 now;
  626. ktime_get_ts64(&now);
  627. task->event->event.tv_sec = now.tv_sec;
  628. task->event->event.tv_usec = now.tv_nsec / NSEC_PER_USEC;
  629. task->event->event.sequence = atomic_inc_return(&task->ipp->sequence);
  630. drm_send_event(task->ipp->drm_dev, &task->event->base);
  631. }
  632. static int exynos_drm_ipp_task_cleanup(struct exynos_drm_ipp_task *task)
  633. {
  634. int ret = task->ret;
  635. if (ret == 0 && task->event) {
  636. exynos_drm_ipp_event_send(task);
  637. /* ensure event won't be canceled on task free */
  638. task->event = NULL;
  639. }
  640. exynos_drm_ipp_task_free(task->ipp, task);
  641. return ret;
  642. }
  643. static void exynos_drm_ipp_cleanup_work(struct work_struct *work)
  644. {
  645. struct exynos_drm_ipp_task *task = container_of(work,
  646. struct exynos_drm_ipp_task, cleanup_work);
  647. exynos_drm_ipp_task_cleanup(task);
  648. }
  649. static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp);
  650. /**
  651. * exynos_drm_ipp_task_done - finish given task and set return code
  652. * @task: ipp task to finish
  653. * @ret: error code or 0 if operation has been performed successfully
  654. */
  655. void exynos_drm_ipp_task_done(struct exynos_drm_ipp_task *task, int ret)
  656. {
  657. struct exynos_drm_ipp *ipp = task->ipp;
  658. unsigned long flags;
  659. DRM_DEV_DEBUG_DRIVER(task->dev, "ipp: %d, task %p done: %d\n",
  660. ipp->id, task, ret);
  661. spin_lock_irqsave(&ipp->lock, flags);
  662. if (ipp->task == task)
  663. ipp->task = NULL;
  664. task->flags |= DRM_EXYNOS_IPP_TASK_DONE;
  665. task->ret = ret;
  666. spin_unlock_irqrestore(&ipp->lock, flags);
  667. exynos_drm_ipp_next_task(ipp);
  668. wake_up(&ipp->done_wq);
  669. if (task->flags & DRM_EXYNOS_IPP_TASK_ASYNC) {
  670. INIT_WORK(&task->cleanup_work, exynos_drm_ipp_cleanup_work);
  671. schedule_work(&task->cleanup_work);
  672. }
  673. }
  674. static void exynos_drm_ipp_next_task(struct exynos_drm_ipp *ipp)
  675. {
  676. struct exynos_drm_ipp_task *task;
  677. unsigned long flags;
  678. int ret;
  679. DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, try to run new task\n",
  680. ipp->id);
  681. spin_lock_irqsave(&ipp->lock, flags);
  682. if (ipp->task || list_empty(&ipp->todo_list)) {
  683. spin_unlock_irqrestore(&ipp->lock, flags);
  684. return;
  685. }
  686. task = list_first_entry(&ipp->todo_list, struct exynos_drm_ipp_task,
  687. head);
  688. list_del_init(&task->head);
  689. ipp->task = task;
  690. spin_unlock_irqrestore(&ipp->lock, flags);
  691. DRM_DEV_DEBUG_DRIVER(ipp->dev,
  692. "ipp: %d, selected task %p to run\n", ipp->id,
  693. task);
  694. ret = ipp->funcs->commit(ipp, task);
  695. if (ret)
  696. exynos_drm_ipp_task_done(task, ret);
  697. }
  698. static void exynos_drm_ipp_schedule_task(struct exynos_drm_ipp *ipp,
  699. struct exynos_drm_ipp_task *task)
  700. {
  701. unsigned long flags;
  702. spin_lock_irqsave(&ipp->lock, flags);
  703. list_add(&task->head, &ipp->todo_list);
  704. spin_unlock_irqrestore(&ipp->lock, flags);
  705. exynos_drm_ipp_next_task(ipp);
  706. }
  707. static void exynos_drm_ipp_task_abort(struct exynos_drm_ipp *ipp,
  708. struct exynos_drm_ipp_task *task)
  709. {
  710. unsigned long flags;
  711. spin_lock_irqsave(&ipp->lock, flags);
  712. if (task->flags & DRM_EXYNOS_IPP_TASK_DONE) {
  713. /* already completed task */
  714. exynos_drm_ipp_task_cleanup(task);
  715. } else if (ipp->task != task) {
  716. /* task has not been scheduled for execution yet */
  717. list_del_init(&task->head);
  718. exynos_drm_ipp_task_cleanup(task);
  719. } else {
  720. /*
  721. * currently processed task, call abort() and perform
  722. * cleanup with async worker
  723. */
  724. task->flags |= DRM_EXYNOS_IPP_TASK_ASYNC;
  725. spin_unlock_irqrestore(&ipp->lock, flags);
  726. if (ipp->funcs->abort)
  727. ipp->funcs->abort(ipp, task);
  728. return;
  729. }
  730. spin_unlock_irqrestore(&ipp->lock, flags);
  731. }
  732. /**
  733. * exynos_drm_ipp_commit_ioctl - perform image processing operation
  734. * @dev: DRM device
  735. * @data: ioctl data
  736. * @file_priv: DRM file info
  737. *
  738. * Construct a ipp task from the set of properties provided from the user
  739. * and try to schedule it to framebuffer processor hardware.
  740. *
  741. * Called by the user via ioctl.
  742. *
  743. * Returns:
  744. * Zero on success, negative errno on failure.
  745. */
  746. int exynos_drm_ipp_commit_ioctl(struct drm_device *dev, void *data,
  747. struct drm_file *file_priv)
  748. {
  749. struct drm_exynos_ioctl_ipp_commit *arg = data;
  750. struct exynos_drm_ipp *ipp;
  751. struct exynos_drm_ipp_task *task;
  752. int ret = 0;
  753. if ((arg->flags & ~DRM_EXYNOS_IPP_FLAGS) || arg->reserved)
  754. return -EINVAL;
  755. /* can't test and expect an event at the same time */
  756. if ((arg->flags & DRM_EXYNOS_IPP_FLAG_TEST_ONLY) &&
  757. (arg->flags & DRM_EXYNOS_IPP_FLAG_EVENT))
  758. return -EINVAL;
  759. ipp = __ipp_get(arg->ipp_id);
  760. if (!ipp)
  761. return -ENOENT;
  762. task = exynos_drm_ipp_task_alloc(ipp);
  763. if (!task)
  764. return -ENOMEM;
  765. ret = exynos_drm_ipp_task_set(task, arg);
  766. if (ret)
  767. goto free;
  768. ret = exynos_drm_ipp_task_check(task);
  769. if (ret)
  770. goto free;
  771. ret = exynos_drm_ipp_task_setup_buffers(task, file_priv);
  772. if (ret || arg->flags & DRM_EXYNOS_IPP_FLAG_TEST_ONLY)
  773. goto free;
  774. if (arg->flags & DRM_EXYNOS_IPP_FLAG_EVENT) {
  775. ret = exynos_drm_ipp_event_create(task, file_priv,
  776. arg->user_data);
  777. if (ret)
  778. goto free;
  779. }
  780. /*
  781. * Queue task for processing on the hardware. task object will be
  782. * then freed after exynos_drm_ipp_task_done()
  783. */
  784. if (arg->flags & DRM_EXYNOS_IPP_FLAG_NONBLOCK) {
  785. DRM_DEV_DEBUG_DRIVER(ipp->dev,
  786. "ipp: %d, nonblocking processing task %p\n",
  787. ipp->id, task);
  788. task->flags |= DRM_EXYNOS_IPP_TASK_ASYNC;
  789. exynos_drm_ipp_schedule_task(task->ipp, task);
  790. ret = 0;
  791. } else {
  792. DRM_DEV_DEBUG_DRIVER(ipp->dev, "ipp: %d, processing task %p\n",
  793. ipp->id, task);
  794. exynos_drm_ipp_schedule_task(ipp, task);
  795. ret = wait_event_interruptible(ipp->done_wq,
  796. task->flags & DRM_EXYNOS_IPP_TASK_DONE);
  797. if (ret)
  798. exynos_drm_ipp_task_abort(ipp, task);
  799. else
  800. ret = exynos_drm_ipp_task_cleanup(task);
  801. }
  802. return ret;
  803. free:
  804. exynos_drm_ipp_task_free(ipp, task);
  805. return ret;
  806. }