sii902x.c 35 KB

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  1. // SPDX-License-Identifier: GPL-2.0-or-later
  2. /*
  3. * Copyright (C) 2018 Renesas Electronics
  4. *
  5. * Copyright (C) 2016 Atmel
  6. * Bo Shen <voice.shen@atmel.com>
  7. *
  8. * Authors: Bo Shen <voice.shen@atmel.com>
  9. * Boris Brezillon <boris.brezillon@free-electrons.com>
  10. * Wu, Songjun <Songjun.Wu@atmel.com>
  11. *
  12. * Copyright (C) 2010-2011 Freescale Semiconductor, Inc. All Rights Reserved.
  13. */
  14. #include <linux/gpio/consumer.h>
  15. #include <linux/i2c-mux.h>
  16. #include <linux/i2c.h>
  17. #include <linux/media-bus-format.h>
  18. #include <linux/module.h>
  19. #include <linux/regmap.h>
  20. #include <linux/regulator/consumer.h>
  21. #include <linux/clk.h>
  22. #include <drm/drm_atomic_helper.h>
  23. #include <drm/drm_bridge.h>
  24. #include <drm/drm_drv.h>
  25. #include <drm/drm_edid.h>
  26. #include <drm/drm_print.h>
  27. #include <drm/drm_probe_helper.h>
  28. #include <sound/hdmi-codec.h>
  29. #define SII902X_TPI_VIDEO_DATA 0x0
  30. #define SII902X_TPI_PIXEL_REPETITION 0x8
  31. #define SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT BIT(5)
  32. #define SII902X_TPI_AVI_PIXEL_REP_RISING_EDGE BIT(4)
  33. #define SII902X_TPI_AVI_PIXEL_REP_4X 3
  34. #define SII902X_TPI_AVI_PIXEL_REP_2X 1
  35. #define SII902X_TPI_AVI_PIXEL_REP_NONE 0
  36. #define SII902X_TPI_CLK_RATIO_HALF (0 << 6)
  37. #define SII902X_TPI_CLK_RATIO_1X (1 << 6)
  38. #define SII902X_TPI_CLK_RATIO_2X (2 << 6)
  39. #define SII902X_TPI_CLK_RATIO_4X (3 << 6)
  40. #define SII902X_TPI_AVI_IN_FORMAT 0x9
  41. #define SII902X_TPI_AVI_INPUT_BITMODE_12BIT BIT(7)
  42. #define SII902X_TPI_AVI_INPUT_DITHER BIT(6)
  43. #define SII902X_TPI_AVI_INPUT_RANGE_LIMITED (2 << 2)
  44. #define SII902X_TPI_AVI_INPUT_RANGE_FULL (1 << 2)
  45. #define SII902X_TPI_AVI_INPUT_RANGE_AUTO (0 << 2)
  46. #define SII902X_TPI_AVI_INPUT_COLORSPACE_BLACK (3 << 0)
  47. #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV422 (2 << 0)
  48. #define SII902X_TPI_AVI_INPUT_COLORSPACE_YUV444 (1 << 0)
  49. #define SII902X_TPI_AVI_INPUT_COLORSPACE_RGB (0 << 0)
  50. #define SII902X_TPI_AVI_INFOFRAME 0x0c
  51. #define SII902X_SYS_CTRL_DATA 0x1a
  52. #define SII902X_SYS_CTRL_PWR_DWN BIT(4)
  53. #define SII902X_SYS_CTRL_AV_MUTE BIT(3)
  54. #define SII902X_SYS_CTRL_DDC_BUS_REQ BIT(2)
  55. #define SII902X_SYS_CTRL_DDC_BUS_GRTD BIT(1)
  56. #define SII902X_SYS_CTRL_OUTPUT_MODE BIT(0)
  57. #define SII902X_SYS_CTRL_OUTPUT_HDMI 1
  58. #define SII902X_SYS_CTRL_OUTPUT_DVI 0
  59. #define SII902X_REG_CHIPID(n) (0x1b + (n))
  60. #define SII902X_PWR_STATE_CTRL 0x1e
  61. #define SII902X_AVI_POWER_STATE_MSK GENMASK(1, 0)
  62. #define SII902X_AVI_POWER_STATE_D(l) ((l) & SII902X_AVI_POWER_STATE_MSK)
  63. /* Audio */
  64. #define SII902X_TPI_I2S_ENABLE_MAPPING_REG 0x1f
  65. #define SII902X_TPI_I2S_CONFIG_FIFO0 (0 << 0)
  66. #define SII902X_TPI_I2S_CONFIG_FIFO1 (1 << 0)
  67. #define SII902X_TPI_I2S_CONFIG_FIFO2 (2 << 0)
  68. #define SII902X_TPI_I2S_CONFIG_FIFO3 (3 << 0)
  69. #define SII902X_TPI_I2S_LEFT_RIGHT_SWAP (1 << 2)
  70. #define SII902X_TPI_I2S_AUTO_DOWNSAMPLE (1 << 3)
  71. #define SII902X_TPI_I2S_SELECT_SD0 (0 << 4)
  72. #define SII902X_TPI_I2S_SELECT_SD1 (1 << 4)
  73. #define SII902X_TPI_I2S_SELECT_SD2 (2 << 4)
  74. #define SII902X_TPI_I2S_SELECT_SD3 (3 << 4)
  75. #define SII902X_TPI_I2S_FIFO_ENABLE (1 << 7)
  76. #define SII902X_TPI_I2S_INPUT_CONFIG_REG 0x20
  77. #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES (0 << 0)
  78. #define SII902X_TPI_I2S_FIRST_BIT_SHIFT_NO (1 << 0)
  79. #define SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST (0 << 1)
  80. #define SII902X_TPI_I2S_SD_DIRECTION_LSB_FIRST (1 << 1)
  81. #define SII902X_TPI_I2S_SD_JUSTIFY_LEFT (0 << 2)
  82. #define SII902X_TPI_I2S_SD_JUSTIFY_RIGHT (1 << 2)
  83. #define SII902X_TPI_I2S_WS_POLARITY_LOW (0 << 3)
  84. #define SII902X_TPI_I2S_WS_POLARITY_HIGH (1 << 3)
  85. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_128 (0 << 4)
  86. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_256 (1 << 4)
  87. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_384 (2 << 4)
  88. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_512 (3 << 4)
  89. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_768 (4 << 4)
  90. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1024 (5 << 4)
  91. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_1152 (6 << 4)
  92. #define SII902X_TPI_I2S_MCLK_MULTIPLIER_192 (7 << 4)
  93. #define SII902X_TPI_I2S_SCK_EDGE_FALLING (0 << 7)
  94. #define SII902X_TPI_I2S_SCK_EDGE_RISING (1 << 7)
  95. #define SII902X_TPI_I2S_STRM_HDR_BASE 0x21
  96. #define SII902X_TPI_I2S_STRM_HDR_SIZE 5
  97. #define SII902X_TPI_AUDIO_CONFIG_BYTE2_REG 0x26
  98. #define SII902X_TPI_AUDIO_CODING_STREAM_HEADER (0 << 0)
  99. #define SII902X_TPI_AUDIO_CODING_PCM (1 << 0)
  100. #define SII902X_TPI_AUDIO_CODING_AC3 (2 << 0)
  101. #define SII902X_TPI_AUDIO_CODING_MPEG1 (3 << 0)
  102. #define SII902X_TPI_AUDIO_CODING_MP3 (4 << 0)
  103. #define SII902X_TPI_AUDIO_CODING_MPEG2 (5 << 0)
  104. #define SII902X_TPI_AUDIO_CODING_AAC (6 << 0)
  105. #define SII902X_TPI_AUDIO_CODING_DTS (7 << 0)
  106. #define SII902X_TPI_AUDIO_CODING_ATRAC (8 << 0)
  107. #define SII902X_TPI_AUDIO_MUTE_DISABLE (0 << 4)
  108. #define SII902X_TPI_AUDIO_MUTE_ENABLE (1 << 4)
  109. #define SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS (0 << 5)
  110. #define SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS (1 << 5)
  111. #define SII902X_TPI_AUDIO_INTERFACE_DISABLE (0 << 6)
  112. #define SII902X_TPI_AUDIO_INTERFACE_SPDIF (1 << 6)
  113. #define SII902X_TPI_AUDIO_INTERFACE_I2S (2 << 6)
  114. #define SII902X_TPI_AUDIO_CONFIG_BYTE3_REG 0x27
  115. #define SII902X_TPI_AUDIO_FREQ_STREAM (0 << 3)
  116. #define SII902X_TPI_AUDIO_FREQ_32KHZ (1 << 3)
  117. #define SII902X_TPI_AUDIO_FREQ_44KHZ (2 << 3)
  118. #define SII902X_TPI_AUDIO_FREQ_48KHZ (3 << 3)
  119. #define SII902X_TPI_AUDIO_FREQ_88KHZ (4 << 3)
  120. #define SII902X_TPI_AUDIO_FREQ_96KHZ (5 << 3)
  121. #define SII902X_TPI_AUDIO_FREQ_176KHZ (6 << 3)
  122. #define SII902X_TPI_AUDIO_FREQ_192KHZ (7 << 3)
  123. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_STREAM (0 << 6)
  124. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_16 (1 << 6)
  125. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_20 (2 << 6)
  126. #define SII902X_TPI_AUDIO_SAMPLE_SIZE_24 (3 << 6)
  127. #define SII902X_TPI_AUDIO_CONFIG_BYTE4_REG 0x28
  128. #define SII902X_INT_ENABLE 0x3c
  129. #define SII902X_INT_STATUS 0x3d
  130. #define SII902X_HOTPLUG_EVENT BIT(0)
  131. #define SII902X_PLUGGED_STATUS BIT(2)
  132. #define SII902X_REG_TPI_RQB 0xc7
  133. /* Indirect internal register access */
  134. #define SII902X_IND_SET_PAGE 0xbc
  135. #define SII902X_IND_OFFSET 0xbd
  136. #define SII902X_IND_VALUE 0xbe
  137. #define SII902X_TPI_MISC_INFOFRAME_BASE 0xbf
  138. #define SII902X_TPI_MISC_INFOFRAME_END 0xde
  139. #define SII902X_TPI_MISC_INFOFRAME_SIZE \
  140. (SII902X_TPI_MISC_INFOFRAME_END - SII902X_TPI_MISC_INFOFRAME_BASE)
  141. #define SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS 500
  142. #define SII902X_AUDIO_PORT_INDEX 3
  143. /*
  144. * The maximum resolution supported by the HDMI bridge is 1080p@60Hz
  145. * and 1920x1200 requiring a pixel clock of 165MHz and the minimum
  146. * resolution supported is 480p@60Hz requiring a pixel clock of 25MHz
  147. */
  148. #define SII902X_MIN_PIXEL_CLOCK_KHZ 25000
  149. #define SII902X_MAX_PIXEL_CLOCK_KHZ 165000
  150. struct sii902x {
  151. struct i2c_client *i2c;
  152. struct regmap *regmap;
  153. struct drm_bridge bridge;
  154. struct drm_connector connector;
  155. struct gpio_desc *reset_gpio;
  156. struct i2c_mux_core *i2cmux;
  157. u32 bus_width;
  158. /*
  159. * Mutex protects audio and video functions from interfering
  160. * each other, by keeping their i2c command sequences atomic.
  161. */
  162. struct mutex mutex;
  163. struct sii902x_audio {
  164. struct platform_device *pdev;
  165. struct clk *mclk;
  166. u32 i2s_fifo_sequence[4];
  167. } audio;
  168. };
  169. static int sii902x_read_unlocked(struct i2c_client *i2c, u8 reg, u8 *val)
  170. {
  171. union i2c_smbus_data data;
  172. int ret;
  173. ret = __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
  174. I2C_SMBUS_READ, reg, I2C_SMBUS_BYTE_DATA, &data);
  175. if (ret < 0)
  176. return ret;
  177. *val = data.byte;
  178. return 0;
  179. }
  180. static int sii902x_write_unlocked(struct i2c_client *i2c, u8 reg, u8 val)
  181. {
  182. union i2c_smbus_data data;
  183. data.byte = val;
  184. return __i2c_smbus_xfer(i2c->adapter, i2c->addr, i2c->flags,
  185. I2C_SMBUS_WRITE, reg, I2C_SMBUS_BYTE_DATA,
  186. &data);
  187. }
  188. static int sii902x_update_bits_unlocked(struct i2c_client *i2c, u8 reg, u8 mask,
  189. u8 val)
  190. {
  191. int ret;
  192. u8 status;
  193. ret = sii902x_read_unlocked(i2c, reg, &status);
  194. if (ret)
  195. return ret;
  196. status &= ~mask;
  197. status |= val & mask;
  198. return sii902x_write_unlocked(i2c, reg, status);
  199. }
  200. static inline struct sii902x *bridge_to_sii902x(struct drm_bridge *bridge)
  201. {
  202. return container_of(bridge, struct sii902x, bridge);
  203. }
  204. static inline struct sii902x *connector_to_sii902x(struct drm_connector *con)
  205. {
  206. return container_of(con, struct sii902x, connector);
  207. }
  208. static void sii902x_reset(struct sii902x *sii902x)
  209. {
  210. if (!sii902x->reset_gpio)
  211. return;
  212. gpiod_set_value_cansleep(sii902x->reset_gpio, 1);
  213. /* The datasheet says treset-min = 100us. Make it 150us to be sure. */
  214. usleep_range(150, 200);
  215. gpiod_set_value_cansleep(sii902x->reset_gpio, 0);
  216. }
  217. static enum drm_connector_status sii902x_detect(struct sii902x *sii902x)
  218. {
  219. unsigned int status;
  220. mutex_lock(&sii902x->mutex);
  221. regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
  222. mutex_unlock(&sii902x->mutex);
  223. return (status & SII902X_PLUGGED_STATUS) ?
  224. connector_status_connected : connector_status_disconnected;
  225. }
  226. static enum drm_connector_status
  227. sii902x_connector_detect(struct drm_connector *connector, bool force)
  228. {
  229. struct sii902x *sii902x = connector_to_sii902x(connector);
  230. return sii902x_detect(sii902x);
  231. }
  232. static const struct drm_connector_funcs sii902x_connector_funcs = {
  233. .detect = sii902x_connector_detect,
  234. .fill_modes = drm_helper_probe_single_connector_modes,
  235. .destroy = drm_connector_cleanup,
  236. .reset = drm_atomic_helper_connector_reset,
  237. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  238. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  239. };
  240. static const struct drm_edid *sii902x_edid_read(struct sii902x *sii902x,
  241. struct drm_connector *connector)
  242. {
  243. const struct drm_edid *drm_edid;
  244. mutex_lock(&sii902x->mutex);
  245. drm_edid = drm_edid_read_ddc(connector, sii902x->i2cmux->adapter[0]);
  246. mutex_unlock(&sii902x->mutex);
  247. return drm_edid;
  248. }
  249. static int sii902x_get_modes(struct drm_connector *connector)
  250. {
  251. struct sii902x *sii902x = connector_to_sii902x(connector);
  252. const struct drm_edid *drm_edid;
  253. int num = 0;
  254. drm_edid = sii902x_edid_read(sii902x, connector);
  255. drm_edid_connector_update(connector, drm_edid);
  256. if (drm_edid) {
  257. num = drm_edid_connector_add_modes(connector);
  258. drm_edid_free(drm_edid);
  259. }
  260. return num;
  261. }
  262. static const struct drm_connector_helper_funcs sii902x_connector_helper_funcs = {
  263. .get_modes = sii902x_get_modes,
  264. };
  265. static void sii902x_bridge_atomic_disable(struct drm_bridge *bridge,
  266. struct drm_atomic_state *state)
  267. {
  268. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  269. mutex_lock(&sii902x->mutex);
  270. regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
  271. SII902X_SYS_CTRL_PWR_DWN,
  272. SII902X_SYS_CTRL_PWR_DWN);
  273. mutex_unlock(&sii902x->mutex);
  274. }
  275. static void sii902x_bridge_atomic_enable(struct drm_bridge *bridge,
  276. struct drm_atomic_state *state)
  277. {
  278. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  279. struct drm_connector *connector;
  280. u8 output_mode = SII902X_SYS_CTRL_OUTPUT_DVI;
  281. connector = drm_atomic_get_new_connector_for_encoder(state, bridge->encoder);
  282. if (connector && connector->display_info.is_hdmi)
  283. output_mode = SII902X_SYS_CTRL_OUTPUT_HDMI;
  284. mutex_lock(&sii902x->mutex);
  285. regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
  286. SII902X_SYS_CTRL_OUTPUT_MODE, output_mode);
  287. regmap_update_bits(sii902x->regmap, SII902X_PWR_STATE_CTRL,
  288. SII902X_AVI_POWER_STATE_MSK,
  289. SII902X_AVI_POWER_STATE_D(0));
  290. regmap_update_bits(sii902x->regmap, SII902X_SYS_CTRL_DATA,
  291. SII902X_SYS_CTRL_PWR_DWN, 0);
  292. mutex_unlock(&sii902x->mutex);
  293. }
  294. static void sii902x_bridge_mode_set(struct drm_bridge *bridge,
  295. const struct drm_display_mode *mode,
  296. const struct drm_display_mode *adj)
  297. {
  298. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  299. struct regmap *regmap = sii902x->regmap;
  300. u8 buf[HDMI_INFOFRAME_SIZE(AVI)];
  301. struct hdmi_avi_infoframe frame;
  302. u16 pixel_clock_10kHz = adj->clock / 10;
  303. int ret;
  304. buf[0] = pixel_clock_10kHz & 0xff;
  305. buf[1] = pixel_clock_10kHz >> 8;
  306. buf[2] = drm_mode_vrefresh(adj);
  307. buf[3] = 0x00;
  308. buf[4] = adj->hdisplay;
  309. buf[5] = adj->hdisplay >> 8;
  310. buf[6] = adj->vdisplay;
  311. buf[7] = adj->vdisplay >> 8;
  312. buf[8] = SII902X_TPI_CLK_RATIO_1X | SII902X_TPI_AVI_PIXEL_REP_NONE |
  313. SII902X_TPI_AVI_PIXEL_REP_BUS_24BIT;
  314. buf[9] = SII902X_TPI_AVI_INPUT_RANGE_AUTO |
  315. SII902X_TPI_AVI_INPUT_COLORSPACE_RGB;
  316. mutex_lock(&sii902x->mutex);
  317. ret = regmap_bulk_write(regmap, SII902X_TPI_VIDEO_DATA, buf, 10);
  318. if (ret)
  319. goto out;
  320. ret = drm_hdmi_avi_infoframe_from_display_mode(&frame,
  321. &sii902x->connector, adj);
  322. if (ret < 0) {
  323. DRM_ERROR("couldn't fill AVI infoframe\n");
  324. goto out;
  325. }
  326. ret = hdmi_avi_infoframe_pack(&frame, buf, sizeof(buf));
  327. if (ret < 0) {
  328. DRM_ERROR("failed to pack AVI infoframe: %d\n", ret);
  329. goto out;
  330. }
  331. /* Do not send the infoframe header, but keep the CRC field. */
  332. regmap_bulk_write(regmap, SII902X_TPI_AVI_INFOFRAME,
  333. buf + HDMI_INFOFRAME_HEADER_SIZE - 1,
  334. HDMI_AVI_INFOFRAME_SIZE + 1);
  335. out:
  336. mutex_unlock(&sii902x->mutex);
  337. }
  338. static int sii902x_bridge_attach(struct drm_bridge *bridge,
  339. struct drm_encoder *encoder,
  340. enum drm_bridge_attach_flags flags)
  341. {
  342. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  343. u32 bus_format = MEDIA_BUS_FMT_RGB888_1X24;
  344. struct drm_device *drm = bridge->dev;
  345. int ret;
  346. if (flags & DRM_BRIDGE_ATTACH_NO_CONNECTOR)
  347. return drm_bridge_attach(encoder, sii902x->bridge.next_bridge,
  348. bridge, flags);
  349. drm_connector_helper_add(&sii902x->connector,
  350. &sii902x_connector_helper_funcs);
  351. if (!drm_core_check_feature(drm, DRIVER_ATOMIC)) {
  352. dev_err(&sii902x->i2c->dev,
  353. "sii902x driver is only compatible with DRM devices supporting atomic updates\n");
  354. return -ENOTSUPP;
  355. }
  356. ret = drm_connector_init(drm, &sii902x->connector,
  357. &sii902x_connector_funcs,
  358. DRM_MODE_CONNECTOR_HDMIA);
  359. if (ret)
  360. return ret;
  361. if (sii902x->i2c->irq > 0)
  362. sii902x->connector.polled = DRM_CONNECTOR_POLL_HPD;
  363. else
  364. sii902x->connector.polled = DRM_CONNECTOR_POLL_CONNECT;
  365. ret = drm_display_info_set_bus_formats(&sii902x->connector.display_info,
  366. &bus_format, 1);
  367. if (ret)
  368. return ret;
  369. drm_connector_attach_encoder(&sii902x->connector, encoder);
  370. return 0;
  371. }
  372. static enum drm_connector_status
  373. sii902x_bridge_detect(struct drm_bridge *bridge, struct drm_connector *connector)
  374. {
  375. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  376. return sii902x_detect(sii902x);
  377. }
  378. static const struct drm_edid *sii902x_bridge_edid_read(struct drm_bridge *bridge,
  379. struct drm_connector *connector)
  380. {
  381. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  382. return sii902x_edid_read(sii902x, connector);
  383. }
  384. static u32 *sii902x_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
  385. struct drm_bridge_state *bridge_state,
  386. struct drm_crtc_state *crtc_state,
  387. struct drm_connector_state *conn_state,
  388. u32 output_fmt,
  389. unsigned int *num_input_fmts)
  390. {
  391. struct sii902x *sii902x = bridge_to_sii902x(bridge);
  392. u32 *input_fmts;
  393. *num_input_fmts = 0;
  394. input_fmts = kcalloc(1, sizeof(*input_fmts), GFP_KERNEL);
  395. if (!input_fmts)
  396. return NULL;
  397. switch (sii902x->bus_width) {
  398. case 16:
  399. input_fmts[0] = MEDIA_BUS_FMT_RGB565_1X16;
  400. break;
  401. case 18:
  402. input_fmts[0] = MEDIA_BUS_FMT_RGB666_1X18;
  403. break;
  404. case 24:
  405. input_fmts[0] = MEDIA_BUS_FMT_RGB888_1X24;
  406. break;
  407. default:
  408. return NULL;
  409. }
  410. *num_input_fmts = 1;
  411. return input_fmts;
  412. }
  413. static int sii902x_bridge_atomic_check(struct drm_bridge *bridge,
  414. struct drm_bridge_state *bridge_state,
  415. struct drm_crtc_state *crtc_state,
  416. struct drm_connector_state *conn_state)
  417. {
  418. if (crtc_state->mode.clock < SII902X_MIN_PIXEL_CLOCK_KHZ ||
  419. crtc_state->mode.clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
  420. return -EINVAL;
  421. /*
  422. * There might be flags negotiation supported in future but
  423. * set the bus flags in atomic_check statically for now.
  424. */
  425. bridge_state->input_bus_cfg.flags = bridge->timings->input_bus_flags;
  426. return 0;
  427. }
  428. static enum drm_mode_status
  429. sii902x_bridge_mode_valid(struct drm_bridge *bridge,
  430. const struct drm_display_info *info,
  431. const struct drm_display_mode *mode)
  432. {
  433. if (mode->clock < SII902X_MIN_PIXEL_CLOCK_KHZ)
  434. return MODE_CLOCK_LOW;
  435. if (mode->clock > SII902X_MAX_PIXEL_CLOCK_KHZ)
  436. return MODE_CLOCK_HIGH;
  437. return MODE_OK;
  438. }
  439. static const struct drm_bridge_funcs sii902x_bridge_funcs = {
  440. .attach = sii902x_bridge_attach,
  441. .mode_set = sii902x_bridge_mode_set,
  442. .atomic_disable = sii902x_bridge_atomic_disable,
  443. .atomic_enable = sii902x_bridge_atomic_enable,
  444. .detect = sii902x_bridge_detect,
  445. .edid_read = sii902x_bridge_edid_read,
  446. .atomic_reset = drm_atomic_helper_bridge_reset,
  447. .atomic_duplicate_state = drm_atomic_helper_bridge_duplicate_state,
  448. .atomic_destroy_state = drm_atomic_helper_bridge_destroy_state,
  449. .atomic_get_input_bus_fmts = sii902x_bridge_atomic_get_input_bus_fmts,
  450. .atomic_check = sii902x_bridge_atomic_check,
  451. .mode_valid = sii902x_bridge_mode_valid,
  452. };
  453. static int sii902x_mute(struct sii902x *sii902x, bool mute)
  454. {
  455. struct device *dev = &sii902x->i2c->dev;
  456. unsigned int val = mute ? SII902X_TPI_AUDIO_MUTE_ENABLE :
  457. SII902X_TPI_AUDIO_MUTE_DISABLE;
  458. dev_dbg(dev, "%s: %s\n", __func__, mute ? "Muted" : "Unmuted");
  459. return regmap_update_bits(sii902x->regmap,
  460. SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
  461. SII902X_TPI_AUDIO_MUTE_ENABLE, val);
  462. }
  463. static const int sii902x_mclk_div_table[] = {
  464. 128, 256, 384, 512, 768, 1024, 1152, 192 };
  465. static int sii902x_select_mclk_div(u8 *i2s_config_reg, unsigned int rate,
  466. unsigned int mclk)
  467. {
  468. int div = mclk / rate;
  469. int distance = 100000;
  470. u8 i, nearest = 0;
  471. for (i = 0; i < ARRAY_SIZE(sii902x_mclk_div_table); i++) {
  472. unsigned int d = abs(div - sii902x_mclk_div_table[i]);
  473. if (d >= distance)
  474. continue;
  475. nearest = i;
  476. distance = d;
  477. if (d == 0)
  478. break;
  479. }
  480. *i2s_config_reg |= nearest << 4;
  481. return sii902x_mclk_div_table[nearest];
  482. }
  483. static const struct sii902x_sample_freq {
  484. u32 freq;
  485. u8 val;
  486. } sii902x_sample_freq[] = {
  487. { .freq = 32000, .val = SII902X_TPI_AUDIO_FREQ_32KHZ },
  488. { .freq = 44000, .val = SII902X_TPI_AUDIO_FREQ_44KHZ },
  489. { .freq = 48000, .val = SII902X_TPI_AUDIO_FREQ_48KHZ },
  490. { .freq = 88000, .val = SII902X_TPI_AUDIO_FREQ_88KHZ },
  491. { .freq = 96000, .val = SII902X_TPI_AUDIO_FREQ_96KHZ },
  492. { .freq = 176000, .val = SII902X_TPI_AUDIO_FREQ_176KHZ },
  493. { .freq = 192000, .val = SII902X_TPI_AUDIO_FREQ_192KHZ },
  494. };
  495. static int sii902x_audio_hw_params(struct device *dev, void *data,
  496. struct hdmi_codec_daifmt *daifmt,
  497. struct hdmi_codec_params *params)
  498. {
  499. struct sii902x *sii902x = dev_get_drvdata(dev);
  500. u8 i2s_config_reg = SII902X_TPI_I2S_SD_DIRECTION_MSB_FIRST;
  501. u8 config_byte2_reg = (SII902X_TPI_AUDIO_INTERFACE_I2S |
  502. SII902X_TPI_AUDIO_MUTE_ENABLE |
  503. SII902X_TPI_AUDIO_CODING_PCM);
  504. u8 config_byte3_reg = 0;
  505. u8 infoframe_buf[HDMI_INFOFRAME_SIZE(AUDIO)];
  506. unsigned long mclk_rate;
  507. int i, ret;
  508. if (daifmt->bit_clk_provider || daifmt->frame_clk_provider) {
  509. dev_dbg(dev, "%s: I2S clock provider mode not supported\n",
  510. __func__);
  511. return -EINVAL;
  512. }
  513. switch (daifmt->fmt) {
  514. case HDMI_I2S:
  515. i2s_config_reg |= SII902X_TPI_I2S_FIRST_BIT_SHIFT_YES |
  516. SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
  517. break;
  518. case HDMI_RIGHT_J:
  519. i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_RIGHT;
  520. break;
  521. case HDMI_LEFT_J:
  522. i2s_config_reg |= SII902X_TPI_I2S_SD_JUSTIFY_LEFT;
  523. break;
  524. default:
  525. dev_dbg(dev, "%s: Unsupported i2s format %u\n", __func__,
  526. daifmt->fmt);
  527. return -EINVAL;
  528. }
  529. if (daifmt->bit_clk_inv)
  530. i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_FALLING;
  531. else
  532. i2s_config_reg |= SII902X_TPI_I2S_SCK_EDGE_RISING;
  533. if (daifmt->frame_clk_inv)
  534. i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_LOW;
  535. else
  536. i2s_config_reg |= SII902X_TPI_I2S_WS_POLARITY_HIGH;
  537. if (params->channels > 2)
  538. config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_8_CHANNELS;
  539. else
  540. config_byte2_reg |= SII902X_TPI_AUDIO_LAYOUT_2_CHANNELS;
  541. switch (params->sample_width) {
  542. case 16:
  543. config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_16;
  544. break;
  545. case 20:
  546. config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_20;
  547. break;
  548. case 24:
  549. case 32:
  550. config_byte3_reg |= SII902X_TPI_AUDIO_SAMPLE_SIZE_24;
  551. break;
  552. default:
  553. dev_err(dev, "%s: Unsupported sample width %u\n", __func__,
  554. params->sample_width);
  555. return -EINVAL;
  556. }
  557. for (i = 0; i < ARRAY_SIZE(sii902x_sample_freq); i++) {
  558. if (params->sample_rate == sii902x_sample_freq[i].freq) {
  559. config_byte3_reg |= sii902x_sample_freq[i].val;
  560. break;
  561. }
  562. }
  563. ret = clk_prepare_enable(sii902x->audio.mclk);
  564. if (ret) {
  565. dev_err(dev, "Enabling mclk failed: %d\n", ret);
  566. return ret;
  567. }
  568. if (sii902x->audio.mclk) {
  569. mclk_rate = clk_get_rate(sii902x->audio.mclk);
  570. ret = sii902x_select_mclk_div(&i2s_config_reg,
  571. params->sample_rate, mclk_rate);
  572. if (mclk_rate != ret * params->sample_rate)
  573. dev_dbg(dev, "Inaccurate reference clock (%ld/%d != %u)\n",
  574. mclk_rate, ret, params->sample_rate);
  575. }
  576. mutex_lock(&sii902x->mutex);
  577. ret = regmap_write(sii902x->regmap,
  578. SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
  579. config_byte2_reg);
  580. if (ret < 0)
  581. goto out;
  582. ret = regmap_write(sii902x->regmap, SII902X_TPI_I2S_INPUT_CONFIG_REG,
  583. i2s_config_reg);
  584. if (ret)
  585. goto out;
  586. for (i = 0; i < ARRAY_SIZE(sii902x->audio.i2s_fifo_sequence) &&
  587. sii902x->audio.i2s_fifo_sequence[i]; i++)
  588. regmap_write(sii902x->regmap,
  589. SII902X_TPI_I2S_ENABLE_MAPPING_REG,
  590. sii902x->audio.i2s_fifo_sequence[i]);
  591. ret = regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE3_REG,
  592. config_byte3_reg);
  593. if (ret)
  594. goto out;
  595. ret = regmap_bulk_write(sii902x->regmap, SII902X_TPI_I2S_STRM_HDR_BASE,
  596. params->iec.status,
  597. min((size_t) SII902X_TPI_I2S_STRM_HDR_SIZE,
  598. sizeof(params->iec.status)));
  599. if (ret)
  600. goto out;
  601. ret = hdmi_audio_infoframe_pack(&params->cea, infoframe_buf,
  602. sizeof(infoframe_buf));
  603. if (ret < 0) {
  604. dev_err(dev, "%s: Failed to pack audio infoframe: %d\n",
  605. __func__, ret);
  606. goto out;
  607. }
  608. ret = regmap_bulk_write(sii902x->regmap,
  609. SII902X_TPI_MISC_INFOFRAME_BASE,
  610. infoframe_buf,
  611. min(ret, SII902X_TPI_MISC_INFOFRAME_SIZE));
  612. if (ret)
  613. goto out;
  614. /* Decode Level 0 Packets */
  615. ret = regmap_write(sii902x->regmap, SII902X_IND_SET_PAGE, 0x02);
  616. if (ret)
  617. goto out;
  618. ret = regmap_write(sii902x->regmap, SII902X_IND_OFFSET, 0x24);
  619. if (ret)
  620. goto out;
  621. ret = regmap_write(sii902x->regmap, SII902X_IND_VALUE, 0x02);
  622. if (ret)
  623. goto out;
  624. dev_dbg(dev, "%s: hdmi audio enabled\n", __func__);
  625. out:
  626. mutex_unlock(&sii902x->mutex);
  627. if (ret) {
  628. clk_disable_unprepare(sii902x->audio.mclk);
  629. dev_err(dev, "%s: hdmi audio enable failed: %d\n", __func__,
  630. ret);
  631. }
  632. return ret;
  633. }
  634. static void sii902x_audio_shutdown(struct device *dev, void *data)
  635. {
  636. struct sii902x *sii902x = dev_get_drvdata(dev);
  637. mutex_lock(&sii902x->mutex);
  638. regmap_write(sii902x->regmap, SII902X_TPI_AUDIO_CONFIG_BYTE2_REG,
  639. SII902X_TPI_AUDIO_INTERFACE_DISABLE);
  640. mutex_unlock(&sii902x->mutex);
  641. clk_disable_unprepare(sii902x->audio.mclk);
  642. }
  643. static int sii902x_audio_mute(struct device *dev, void *data,
  644. bool enable, int direction)
  645. {
  646. struct sii902x *sii902x = dev_get_drvdata(dev);
  647. mutex_lock(&sii902x->mutex);
  648. sii902x_mute(sii902x, enable);
  649. mutex_unlock(&sii902x->mutex);
  650. return 0;
  651. }
  652. static int sii902x_audio_get_eld(struct device *dev, void *data,
  653. uint8_t *buf, size_t len)
  654. {
  655. struct sii902x *sii902x = dev_get_drvdata(dev);
  656. mutex_lock(&sii902x->mutex);
  657. memcpy(buf, sii902x->connector.eld,
  658. min(sizeof(sii902x->connector.eld), len));
  659. mutex_unlock(&sii902x->mutex);
  660. return 0;
  661. }
  662. static int sii902x_audio_get_dai_id(struct snd_soc_component *component,
  663. struct device_node *endpoint,
  664. void *data)
  665. {
  666. struct of_endpoint of_ep;
  667. int ret;
  668. ret = of_graph_parse_endpoint(endpoint, &of_ep);
  669. if (ret < 0)
  670. return ret;
  671. /*
  672. * HDMI sound should be located at reg = <3>
  673. * Return expected DAI index 0.
  674. */
  675. if (of_ep.port == SII902X_AUDIO_PORT_INDEX)
  676. return 0;
  677. return -EINVAL;
  678. }
  679. static const struct hdmi_codec_ops sii902x_audio_codec_ops = {
  680. .hw_params = sii902x_audio_hw_params,
  681. .audio_shutdown = sii902x_audio_shutdown,
  682. .mute_stream = sii902x_audio_mute,
  683. .get_eld = sii902x_audio_get_eld,
  684. .get_dai_id = sii902x_audio_get_dai_id,
  685. };
  686. static int sii902x_audio_codec_init(struct sii902x *sii902x,
  687. struct device *dev)
  688. {
  689. static const u8 audio_fifo_id[] = {
  690. SII902X_TPI_I2S_CONFIG_FIFO0,
  691. SII902X_TPI_I2S_CONFIG_FIFO1,
  692. SII902X_TPI_I2S_CONFIG_FIFO2,
  693. SII902X_TPI_I2S_CONFIG_FIFO3,
  694. };
  695. static const u8 i2s_lane_id[] = {
  696. SII902X_TPI_I2S_SELECT_SD0,
  697. SII902X_TPI_I2S_SELECT_SD1,
  698. SII902X_TPI_I2S_SELECT_SD2,
  699. SII902X_TPI_I2S_SELECT_SD3,
  700. };
  701. struct hdmi_codec_pdata codec_data = {
  702. .ops = &sii902x_audio_codec_ops,
  703. .i2s = 1, /* Only i2s support for now. */
  704. .spdif = 0,
  705. .max_i2s_channels = 0,
  706. .no_capture_mute = 1,
  707. };
  708. u8 lanes[4];
  709. int num_lanes, i;
  710. if (!of_property_present(dev->of_node, "#sound-dai-cells")) {
  711. dev_dbg(dev, "%s: No \"#sound-dai-cells\", no audio\n",
  712. __func__);
  713. return 0;
  714. }
  715. num_lanes = of_property_read_variable_u8_array(dev->of_node,
  716. "sil,i2s-data-lanes",
  717. lanes, 1,
  718. ARRAY_SIZE(lanes));
  719. if (num_lanes == -EINVAL) {
  720. dev_dbg(dev,
  721. "%s: No \"sil,i2s-data-lanes\", use default <0>\n",
  722. __func__);
  723. num_lanes = 1;
  724. lanes[0] = 0;
  725. } else if (num_lanes < 0) {
  726. dev_err(dev,
  727. "%s: Error getting \"sil,i2s-data-lanes\": %d\n",
  728. __func__, num_lanes);
  729. return num_lanes;
  730. }
  731. codec_data.max_i2s_channels = 2 * num_lanes;
  732. for (i = 0; i < num_lanes; i++)
  733. sii902x->audio.i2s_fifo_sequence[i] |= audio_fifo_id[i] |
  734. i2s_lane_id[lanes[i]] | SII902X_TPI_I2S_FIFO_ENABLE;
  735. sii902x->audio.mclk = devm_clk_get_optional(dev, "mclk");
  736. if (IS_ERR(sii902x->audio.mclk)) {
  737. dev_err(dev, "%s: No clock (audio mclk) found: %ld\n",
  738. __func__, PTR_ERR(sii902x->audio.mclk));
  739. return PTR_ERR(sii902x->audio.mclk);
  740. }
  741. sii902x->audio.pdev = platform_device_register_data(
  742. dev, HDMI_CODEC_DRV_NAME, PLATFORM_DEVID_AUTO,
  743. &codec_data, sizeof(codec_data));
  744. return PTR_ERR_OR_ZERO(sii902x->audio.pdev);
  745. }
  746. static const struct regmap_range sii902x_volatile_ranges[] = {
  747. { .range_min = 0, .range_max = 0xff },
  748. };
  749. static const struct regmap_access_table sii902x_volatile_table = {
  750. .yes_ranges = sii902x_volatile_ranges,
  751. .n_yes_ranges = ARRAY_SIZE(sii902x_volatile_ranges),
  752. };
  753. static const struct regmap_config sii902x_regmap_config = {
  754. .reg_bits = 8,
  755. .val_bits = 8,
  756. .disable_locking = true, /* struct sii902x mutex should be enough */
  757. .max_register = SII902X_TPI_MISC_INFOFRAME_END,
  758. .volatile_table = &sii902x_volatile_table,
  759. .cache_type = REGCACHE_NONE,
  760. };
  761. static irqreturn_t sii902x_interrupt(int irq, void *data)
  762. {
  763. struct sii902x *sii902x = data;
  764. unsigned int status = 0;
  765. mutex_lock(&sii902x->mutex);
  766. regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
  767. regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
  768. mutex_unlock(&sii902x->mutex);
  769. if ((status & SII902X_HOTPLUG_EVENT) && sii902x->bridge.dev) {
  770. drm_helper_hpd_irq_event(sii902x->bridge.dev);
  771. drm_bridge_hpd_notify(&sii902x->bridge, (status & SII902X_PLUGGED_STATUS)
  772. ? connector_status_connected
  773. : connector_status_disconnected);
  774. }
  775. return IRQ_HANDLED;
  776. }
  777. /*
  778. * The purpose of sii902x_i2c_bypass_select is to enable the pass through
  779. * mode of the HDMI transmitter. Do not use regmap from within this function,
  780. * only use sii902x_*_unlocked functions to read/modify/write registers.
  781. * We are holding the parent adapter lock here, keep this in mind before
  782. * adding more i2c transactions.
  783. *
  784. * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
  785. * in this driver, we need to make sure that we only touch 0x1A[2:1] from
  786. * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
  787. * we leave the remaining bits as we have found them.
  788. */
  789. static int sii902x_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id)
  790. {
  791. struct sii902x *sii902x = i2c_mux_priv(mux);
  792. struct device *dev = &sii902x->i2c->dev;
  793. unsigned long timeout;
  794. u8 status;
  795. int ret;
  796. ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  797. SII902X_SYS_CTRL_DDC_BUS_REQ,
  798. SII902X_SYS_CTRL_DDC_BUS_REQ);
  799. if (ret)
  800. return ret;
  801. timeout = jiffies +
  802. msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
  803. do {
  804. ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  805. &status);
  806. if (ret)
  807. return ret;
  808. } while (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
  809. time_before(jiffies, timeout));
  810. if (!(status & SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
  811. dev_err(dev, "Failed to acquire the i2c bus\n");
  812. return -ETIMEDOUT;
  813. }
  814. return sii902x_write_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  815. status);
  816. }
  817. /*
  818. * The purpose of sii902x_i2c_bypass_deselect is to disable the pass through
  819. * mode of the HDMI transmitter. Do not use regmap from within this function,
  820. * only use sii902x_*_unlocked functions to read/modify/write registers.
  821. * We are holding the parent adapter lock here, keep this in mind before
  822. * adding more i2c transactions.
  823. *
  824. * Also, since SII902X_SYS_CTRL_DATA is used with regmap_update_bits elsewhere
  825. * in this driver, we need to make sure that we only touch 0x1A[2:1] from
  826. * within sii902x_i2c_bypass_select and sii902x_i2c_bypass_deselect, and that
  827. * we leave the remaining bits as we have found them.
  828. */
  829. static int sii902x_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id)
  830. {
  831. struct sii902x *sii902x = i2c_mux_priv(mux);
  832. struct device *dev = &sii902x->i2c->dev;
  833. unsigned long timeout;
  834. unsigned int retries;
  835. u8 status;
  836. int ret;
  837. /*
  838. * When the HDMI transmitter is in pass through mode, we need an
  839. * (undocumented) additional delay between STOP and START conditions
  840. * to guarantee the bus won't get stuck.
  841. */
  842. udelay(30);
  843. /*
  844. * Sometimes the I2C bus can stall after failure to use the
  845. * EDID channel. Retry a few times to see if things clear
  846. * up, else continue anyway.
  847. */
  848. retries = 5;
  849. do {
  850. ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  851. &status);
  852. retries--;
  853. } while (ret && retries);
  854. if (ret) {
  855. dev_err(dev, "failed to read status (%d)\n", ret);
  856. return ret;
  857. }
  858. ret = sii902x_update_bits_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  859. SII902X_SYS_CTRL_DDC_BUS_REQ |
  860. SII902X_SYS_CTRL_DDC_BUS_GRTD, 0);
  861. if (ret)
  862. return ret;
  863. timeout = jiffies +
  864. msecs_to_jiffies(SII902X_I2C_BUS_ACQUISITION_TIMEOUT_MS);
  865. do {
  866. ret = sii902x_read_unlocked(sii902x->i2c, SII902X_SYS_CTRL_DATA,
  867. &status);
  868. if (ret)
  869. return ret;
  870. } while (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
  871. SII902X_SYS_CTRL_DDC_BUS_GRTD) &&
  872. time_before(jiffies, timeout));
  873. if (status & (SII902X_SYS_CTRL_DDC_BUS_REQ |
  874. SII902X_SYS_CTRL_DDC_BUS_GRTD)) {
  875. dev_err(dev, "failed to release the i2c bus\n");
  876. return -ETIMEDOUT;
  877. }
  878. return 0;
  879. }
  880. static const struct drm_bridge_timings default_sii902x_timings = {
  881. .input_bus_flags = DRM_BUS_FLAG_PIXDATA_SAMPLE_NEGEDGE
  882. | DRM_BUS_FLAG_SYNC_SAMPLE_NEGEDGE
  883. | DRM_BUS_FLAG_DE_HIGH,
  884. };
  885. static int sii902x_init(struct sii902x *sii902x)
  886. {
  887. struct device *dev = &sii902x->i2c->dev;
  888. unsigned int status = 0;
  889. u8 chipid[4];
  890. int ret;
  891. sii902x_reset(sii902x);
  892. ret = regmap_write(sii902x->regmap, SII902X_REG_TPI_RQB, 0x0);
  893. if (ret)
  894. return ret;
  895. ret = regmap_bulk_read(sii902x->regmap, SII902X_REG_CHIPID(0),
  896. &chipid, 4);
  897. if (ret) {
  898. dev_err(dev, "regmap_read failed %d\n", ret);
  899. return ret;
  900. }
  901. if (chipid[0] != 0xb0) {
  902. dev_err(dev, "Invalid chipid: %02x (expecting 0xb0)\n",
  903. chipid[0]);
  904. return -EINVAL;
  905. }
  906. /* Clear all pending interrupts */
  907. regmap_read(sii902x->regmap, SII902X_INT_STATUS, &status);
  908. regmap_write(sii902x->regmap, SII902X_INT_STATUS, status);
  909. if (sii902x->i2c->irq > 0) {
  910. regmap_write(sii902x->regmap, SII902X_INT_ENABLE,
  911. SII902X_HOTPLUG_EVENT);
  912. ret = devm_request_threaded_irq(dev, sii902x->i2c->irq, NULL,
  913. sii902x_interrupt,
  914. IRQF_ONESHOT, dev_name(dev),
  915. sii902x);
  916. if (ret)
  917. return ret;
  918. }
  919. ret = sii902x_audio_codec_init(sii902x, dev);
  920. if (ret)
  921. return ret;
  922. i2c_set_clientdata(sii902x->i2c, sii902x);
  923. sii902x->i2cmux = i2c_mux_alloc(sii902x->i2c->adapter, dev,
  924. 1, 0, I2C_MUX_GATE,
  925. sii902x_i2c_bypass_select,
  926. sii902x_i2c_bypass_deselect);
  927. if (!sii902x->i2cmux) {
  928. ret = -ENOMEM;
  929. goto err_unreg_audio;
  930. }
  931. sii902x->i2cmux->priv = sii902x;
  932. ret = i2c_mux_add_adapter(sii902x->i2cmux, 0, 0);
  933. if (ret)
  934. goto err_unreg_audio;
  935. sii902x->bridge.of_node = dev->of_node;
  936. sii902x->bridge.timings = &default_sii902x_timings;
  937. sii902x->bridge.ops = DRM_BRIDGE_OP_DETECT | DRM_BRIDGE_OP_EDID;
  938. sii902x->bridge.type = DRM_MODE_CONNECTOR_HDMIA;
  939. if (sii902x->i2c->irq > 0)
  940. sii902x->bridge.ops |= DRM_BRIDGE_OP_HPD;
  941. drm_bridge_add(&sii902x->bridge);
  942. return 0;
  943. err_unreg_audio:
  944. if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
  945. platform_device_unregister(sii902x->audio.pdev);
  946. return ret;
  947. }
  948. static int sii902x_probe(struct i2c_client *client)
  949. {
  950. struct device *dev = &client->dev;
  951. struct device_node *endpoint;
  952. struct sii902x *sii902x;
  953. static const char * const supplies[] = {"iovcc", "cvcc12"};
  954. int ret;
  955. ret = i2c_check_functionality(client->adapter,
  956. I2C_FUNC_SMBUS_BYTE_DATA);
  957. if (!ret) {
  958. dev_err(dev, "I2C adapter not suitable\n");
  959. return -EIO;
  960. }
  961. sii902x = devm_drm_bridge_alloc(dev, struct sii902x, bridge, &sii902x_bridge_funcs);
  962. if (IS_ERR(sii902x))
  963. return PTR_ERR(sii902x);
  964. sii902x->i2c = client;
  965. sii902x->regmap = devm_regmap_init_i2c(client, &sii902x_regmap_config);
  966. if (IS_ERR(sii902x->regmap))
  967. return PTR_ERR(sii902x->regmap);
  968. sii902x->reset_gpio = devm_gpiod_get_optional(dev, "reset",
  969. GPIOD_OUT_LOW);
  970. if (IS_ERR(sii902x->reset_gpio)) {
  971. dev_err(dev, "Failed to retrieve/request reset gpio: %ld\n",
  972. PTR_ERR(sii902x->reset_gpio));
  973. return PTR_ERR(sii902x->reset_gpio);
  974. }
  975. sii902x->bus_width = 24;
  976. endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 0, -1);
  977. if (endpoint)
  978. of_property_read_u32(endpoint, "bus-width", &sii902x->bus_width);
  979. endpoint = of_graph_get_endpoint_by_regs(dev->of_node, 1, -1);
  980. if (endpoint) {
  981. struct device_node *remote = of_graph_get_remote_port_parent(endpoint);
  982. of_node_put(endpoint);
  983. if (!remote) {
  984. dev_err(dev, "Endpoint in port@1 unconnected\n");
  985. return -ENODEV;
  986. }
  987. if (!of_device_is_available(remote)) {
  988. dev_err(dev, "port@1 remote device is disabled\n");
  989. of_node_put(remote);
  990. return -ENODEV;
  991. }
  992. sii902x->bridge.next_bridge = of_drm_find_and_get_bridge(remote);
  993. of_node_put(remote);
  994. if (!sii902x->bridge.next_bridge)
  995. return dev_err_probe(dev, -EPROBE_DEFER,
  996. "Failed to find remote bridge\n");
  997. }
  998. mutex_init(&sii902x->mutex);
  999. ret = devm_regulator_bulk_get_enable(dev, ARRAY_SIZE(supplies), supplies);
  1000. if (ret < 0)
  1001. return dev_err_probe(dev, ret, "Failed to enable supplies");
  1002. return sii902x_init(sii902x);
  1003. }
  1004. static void sii902x_remove(struct i2c_client *client)
  1005. {
  1006. struct sii902x *sii902x = i2c_get_clientdata(client);
  1007. drm_bridge_remove(&sii902x->bridge);
  1008. i2c_mux_del_adapters(sii902x->i2cmux);
  1009. if (!PTR_ERR_OR_ZERO(sii902x->audio.pdev))
  1010. platform_device_unregister(sii902x->audio.pdev);
  1011. }
  1012. static const struct of_device_id sii902x_dt_ids[] = {
  1013. { .compatible = "sil,sii9022", },
  1014. { }
  1015. };
  1016. MODULE_DEVICE_TABLE(of, sii902x_dt_ids);
  1017. static const struct i2c_device_id sii902x_i2c_ids[] = {
  1018. { "sii9022" },
  1019. { }
  1020. };
  1021. MODULE_DEVICE_TABLE(i2c, sii902x_i2c_ids);
  1022. static struct i2c_driver sii902x_driver = {
  1023. .probe = sii902x_probe,
  1024. .remove = sii902x_remove,
  1025. .driver = {
  1026. .name = "sii902x",
  1027. .of_match_table = sii902x_dt_ids,
  1028. },
  1029. .id_table = sii902x_i2c_ids,
  1030. };
  1031. module_i2c_driver(sii902x_driver);
  1032. MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
  1033. MODULE_DESCRIPTION("SII902x RGB -> HDMI bridges");
  1034. MODULE_LICENSE("GPL");