dfl-afu-error.c 6.2 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Driver for FPGA Accelerated Function Unit (AFU) Error Reporting
  4. *
  5. * Copyright 2019 Intel Corporation, Inc.
  6. *
  7. * Authors:
  8. * Wu Hao <hao.wu@linux.intel.com>
  9. * Xiao Guangrong <guangrong.xiao@linux.intel.com>
  10. * Joseph Grecco <joe.grecco@intel.com>
  11. * Enno Luebbers <enno.luebbers@intel.com>
  12. * Tim Whisonant <tim.whisonant@intel.com>
  13. * Ananda Ravuri <ananda.ravuri@intel.com>
  14. * Mitchel Henry <henry.mitchel@intel.com>
  15. */
  16. #include <linux/fpga-dfl.h>
  17. #include <linux/uaccess.h>
  18. #include "dfl-afu.h"
  19. #define PORT_ERROR_MASK 0x8
  20. #define PORT_ERROR 0x10
  21. #define PORT_FIRST_ERROR 0x18
  22. #define PORT_MALFORMED_REQ0 0x20
  23. #define PORT_MALFORMED_REQ1 0x28
  24. #define ERROR_MASK GENMASK_ULL(63, 0)
  25. /* mask or unmask port errors by the error mask register. */
  26. static void __afu_port_err_mask(struct dfl_feature_dev_data *fdata, bool mask)
  27. {
  28. void __iomem *base;
  29. base = dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR);
  30. writeq(mask ? ERROR_MASK : 0, base + PORT_ERROR_MASK);
  31. }
  32. static void afu_port_err_mask(struct device *dev, bool mask)
  33. {
  34. struct dfl_feature_dev_data *fdata = to_dfl_feature_dev_data(dev);
  35. mutex_lock(&fdata->lock);
  36. __afu_port_err_mask(fdata, mask);
  37. mutex_unlock(&fdata->lock);
  38. }
  39. /* clear port errors. */
  40. static int afu_port_err_clear(struct device *dev, u64 err)
  41. {
  42. struct dfl_feature_dev_data *fdata = to_dfl_feature_dev_data(dev);
  43. void __iomem *base_err, *base_hdr;
  44. int enable_ret = 0, ret = -EBUSY;
  45. u64 v;
  46. base_err = dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR);
  47. base_hdr = dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_HEADER);
  48. mutex_lock(&fdata->lock);
  49. /*
  50. * clear Port Errors
  51. *
  52. * - Check for AP6 State
  53. * - Halt Port by keeping Port in reset
  54. * - Set PORT Error mask to all 1 to mask errors
  55. * - Clear all errors
  56. * - Set Port mask to all 0 to enable errors
  57. * - All errors start capturing new errors
  58. * - Enable Port by pulling the port out of reset
  59. */
  60. /* if device is still in AP6 power state, can not clear any error. */
  61. v = readq(base_hdr + PORT_HDR_STS);
  62. if (FIELD_GET(PORT_STS_PWR_STATE, v) == PORT_STS_PWR_STATE_AP6) {
  63. dev_err(dev, "Could not clear errors, device in AP6 state.\n");
  64. goto done;
  65. }
  66. /* Halt Port by keeping Port in reset */
  67. ret = __afu_port_disable(fdata);
  68. if (ret)
  69. goto done;
  70. /* Mask all errors */
  71. __afu_port_err_mask(fdata, true);
  72. /* Clear errors if err input matches with current port errors.*/
  73. v = readq(base_err + PORT_ERROR);
  74. if (v == err) {
  75. writeq(v, base_err + PORT_ERROR);
  76. v = readq(base_err + PORT_FIRST_ERROR);
  77. writeq(v, base_err + PORT_FIRST_ERROR);
  78. } else {
  79. dev_warn(dev, "%s: received 0x%llx, expected 0x%llx\n",
  80. __func__, v, err);
  81. ret = -EINVAL;
  82. }
  83. /* Clear mask */
  84. __afu_port_err_mask(fdata, false);
  85. /* Enable the Port by clearing the reset */
  86. enable_ret = __afu_port_enable(fdata);
  87. done:
  88. mutex_unlock(&fdata->lock);
  89. return enable_ret ? enable_ret : ret;
  90. }
  91. static ssize_t errors_show(struct device *dev, struct device_attribute *attr,
  92. char *buf)
  93. {
  94. struct dfl_feature_dev_data *fdata = to_dfl_feature_dev_data(dev);
  95. void __iomem *base;
  96. u64 error;
  97. base = dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR);
  98. mutex_lock(&fdata->lock);
  99. error = readq(base + PORT_ERROR);
  100. mutex_unlock(&fdata->lock);
  101. return sprintf(buf, "0x%llx\n", (unsigned long long)error);
  102. }
  103. static ssize_t errors_store(struct device *dev, struct device_attribute *attr,
  104. const char *buff, size_t count)
  105. {
  106. u64 value;
  107. int ret;
  108. if (kstrtou64(buff, 0, &value))
  109. return -EINVAL;
  110. ret = afu_port_err_clear(dev, value);
  111. return ret ? ret : count;
  112. }
  113. static DEVICE_ATTR_RW(errors);
  114. static ssize_t first_error_show(struct device *dev,
  115. struct device_attribute *attr, char *buf)
  116. {
  117. struct dfl_feature_dev_data *fdata = to_dfl_feature_dev_data(dev);
  118. void __iomem *base;
  119. u64 error;
  120. base = dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR);
  121. mutex_lock(&fdata->lock);
  122. error = readq(base + PORT_FIRST_ERROR);
  123. mutex_unlock(&fdata->lock);
  124. return sprintf(buf, "0x%llx\n", (unsigned long long)error);
  125. }
  126. static DEVICE_ATTR_RO(first_error);
  127. static ssize_t first_malformed_req_show(struct device *dev,
  128. struct device_attribute *attr,
  129. char *buf)
  130. {
  131. struct dfl_feature_dev_data *fdata = to_dfl_feature_dev_data(dev);
  132. void __iomem *base;
  133. u64 req0, req1;
  134. base = dfl_get_feature_ioaddr_by_id(fdata, PORT_FEATURE_ID_ERROR);
  135. mutex_lock(&fdata->lock);
  136. req0 = readq(base + PORT_MALFORMED_REQ0);
  137. req1 = readq(base + PORT_MALFORMED_REQ1);
  138. mutex_unlock(&fdata->lock);
  139. return sprintf(buf, "0x%016llx%016llx\n",
  140. (unsigned long long)req1, (unsigned long long)req0);
  141. }
  142. static DEVICE_ATTR_RO(first_malformed_req);
  143. static struct attribute *port_err_attrs[] = {
  144. &dev_attr_errors.attr,
  145. &dev_attr_first_error.attr,
  146. &dev_attr_first_malformed_req.attr,
  147. NULL,
  148. };
  149. static umode_t port_err_attrs_visible(struct kobject *kobj,
  150. struct attribute *attr, int n)
  151. {
  152. struct device *dev = kobj_to_dev(kobj);
  153. struct dfl_feature_dev_data *fdata;
  154. fdata = to_dfl_feature_dev_data(dev);
  155. /*
  156. * sysfs entries are visible only if related private feature is
  157. * enumerated.
  158. */
  159. if (!dfl_get_feature_by_id(fdata, PORT_FEATURE_ID_ERROR))
  160. return 0;
  161. return attr->mode;
  162. }
  163. const struct attribute_group port_err_group = {
  164. .name = "errors",
  165. .attrs = port_err_attrs,
  166. .is_visible = port_err_attrs_visible,
  167. };
  168. static int port_err_init(struct platform_device *pdev,
  169. struct dfl_feature *feature)
  170. {
  171. afu_port_err_mask(&pdev->dev, false);
  172. return 0;
  173. }
  174. static void port_err_uinit(struct platform_device *pdev,
  175. struct dfl_feature *feature)
  176. {
  177. afu_port_err_mask(&pdev->dev, true);
  178. }
  179. static long
  180. port_err_ioctl(struct platform_device *pdev, struct dfl_feature *feature,
  181. unsigned int cmd, unsigned long arg)
  182. {
  183. switch (cmd) {
  184. case DFL_FPGA_PORT_ERR_GET_IRQ_NUM:
  185. return dfl_feature_ioctl_get_num_irqs(pdev, feature, arg);
  186. case DFL_FPGA_PORT_ERR_SET_IRQ:
  187. return dfl_feature_ioctl_set_irq(pdev, feature, arg);
  188. default:
  189. dev_dbg(&pdev->dev, "%x cmd not handled", cmd);
  190. return -ENODEV;
  191. }
  192. }
  193. const struct dfl_feature_id port_err_id_table[] = {
  194. {.id = PORT_FEATURE_ID_ERROR,},
  195. {0,}
  196. };
  197. const struct dfl_feature_ops port_err_ops = {
  198. .init = port_err_init,
  199. .uinit = port_err_uinit,
  200. .ioctl = port_err_ioctl,
  201. };