ghes_edac.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574
  1. // SPDX-License-Identifier: GPL-2.0-only
  2. /*
  3. * GHES/EDAC Linux driver
  4. *
  5. * Copyright (c) 2013 by Mauro Carvalho Chehab
  6. *
  7. * Red Hat Inc. https://www.redhat.com
  8. */
  9. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  10. #include <acpi/ghes.h>
  11. #include <linux/edac.h>
  12. #include <linux/dmi.h>
  13. #include "edac_module.h"
  14. #include <ras/ras_event.h>
  15. #include <linux/notifier.h>
  16. #include <linux/string.h>
  17. #define OTHER_DETAIL_LEN 400
  18. struct ghes_pvt {
  19. struct mem_ctl_info *mci;
  20. /* Buffers for the error handling routine */
  21. char other_detail[OTHER_DETAIL_LEN];
  22. char msg[80];
  23. };
  24. static refcount_t ghes_refcount = REFCOUNT_INIT(0);
  25. /*
  26. * Access to ghes_pvt must be protected by ghes_lock. The spinlock
  27. * also provides the necessary (implicit) memory barrier for the SMP
  28. * case to make the pointer visible on another CPU.
  29. */
  30. static struct ghes_pvt *ghes_pvt;
  31. /*
  32. * This driver's representation of the system hardware, as collected
  33. * from DMI.
  34. */
  35. static struct ghes_hw_desc {
  36. int num_dimms;
  37. struct dimm_info *dimms;
  38. } ghes_hw;
  39. /* GHES registration mutex */
  40. static DEFINE_MUTEX(ghes_reg_mutex);
  41. /*
  42. * Sync with other, potentially concurrent callers of
  43. * ghes_edac_report_mem_error(). We don't know what the
  44. * "inventive" firmware would do.
  45. */
  46. static DEFINE_SPINLOCK(ghes_lock);
  47. static bool system_scanned;
  48. static struct list_head *ghes_devs;
  49. /* Memory Device - Type 17 of SMBIOS spec */
  50. struct memdev_dmi_entry {
  51. u8 type;
  52. u8 length;
  53. u16 handle;
  54. u16 phys_mem_array_handle;
  55. u16 mem_err_info_handle;
  56. u16 total_width;
  57. u16 data_width;
  58. u16 size;
  59. u8 form_factor;
  60. u8 device_set;
  61. u8 device_locator;
  62. u8 bank_locator;
  63. u8 memory_type;
  64. u16 type_detail;
  65. u16 speed;
  66. u8 manufacturer;
  67. u8 serial_number;
  68. u8 asset_tag;
  69. u8 part_number;
  70. u8 attributes;
  71. u32 extended_size;
  72. u16 conf_mem_clk_speed;
  73. } __attribute__((__packed__));
  74. static struct dimm_info *find_dimm_by_handle(struct mem_ctl_info *mci, u16 handle)
  75. {
  76. struct dimm_info *dimm;
  77. mci_for_each_dimm(mci, dimm) {
  78. if (dimm->smbios_handle == handle)
  79. return dimm;
  80. }
  81. return NULL;
  82. }
  83. static void dimm_setup_label(struct dimm_info *dimm, u16 handle)
  84. {
  85. const char *bank = NULL, *device = NULL;
  86. dmi_memdev_name(handle, &bank, &device);
  87. /*
  88. * Set to a NULL string when both bank and device are zero. In this case,
  89. * the label assigned by default will be preserved.
  90. */
  91. snprintf(dimm->label, sizeof(dimm->label), "%s%s%s",
  92. (bank && *bank) ? bank : "",
  93. (bank && *bank && device && *device) ? " " : "",
  94. (device && *device) ? device : "");
  95. }
  96. static void assign_dmi_dimm_info(struct dimm_info *dimm, struct memdev_dmi_entry *entry)
  97. {
  98. u16 rdr_mask = BIT(7) | BIT(13);
  99. if (entry->size == 0xffff) {
  100. pr_info("Can't get DIMM%i size\n", dimm->idx);
  101. dimm->nr_pages = MiB_TO_PAGES(32);/* Unknown */
  102. } else if (entry->size == 0x7fff) {
  103. dimm->nr_pages = MiB_TO_PAGES(entry->extended_size);
  104. } else {
  105. if (entry->size & BIT(15))
  106. dimm->nr_pages = MiB_TO_PAGES((entry->size & 0x7fff) << 10);
  107. else
  108. dimm->nr_pages = MiB_TO_PAGES(entry->size);
  109. }
  110. switch (entry->memory_type) {
  111. case 0x12:
  112. if (entry->type_detail & BIT(13))
  113. dimm->mtype = MEM_RDDR;
  114. else
  115. dimm->mtype = MEM_DDR;
  116. break;
  117. case 0x13:
  118. if (entry->type_detail & BIT(13))
  119. dimm->mtype = MEM_RDDR2;
  120. else
  121. dimm->mtype = MEM_DDR2;
  122. break;
  123. case 0x14:
  124. dimm->mtype = MEM_FB_DDR2;
  125. break;
  126. case 0x18:
  127. if (entry->type_detail & BIT(12))
  128. dimm->mtype = MEM_NVDIMM;
  129. else if (entry->type_detail & BIT(13))
  130. dimm->mtype = MEM_RDDR3;
  131. else
  132. dimm->mtype = MEM_DDR3;
  133. break;
  134. case 0x1a:
  135. if (entry->type_detail & BIT(12))
  136. dimm->mtype = MEM_NVDIMM;
  137. else if (entry->type_detail & BIT(13))
  138. dimm->mtype = MEM_RDDR4;
  139. else
  140. dimm->mtype = MEM_DDR4;
  141. break;
  142. default:
  143. if (entry->type_detail & BIT(6))
  144. dimm->mtype = MEM_RMBS;
  145. else if ((entry->type_detail & rdr_mask) == rdr_mask)
  146. dimm->mtype = MEM_RDR;
  147. else if (entry->type_detail & BIT(7))
  148. dimm->mtype = MEM_SDR;
  149. else if (entry->type_detail & BIT(9))
  150. dimm->mtype = MEM_EDO;
  151. else
  152. dimm->mtype = MEM_UNKNOWN;
  153. }
  154. /*
  155. * Actually, we can only detect if the memory has bits for
  156. * checksum or not
  157. */
  158. if (entry->total_width == entry->data_width)
  159. dimm->edac_mode = EDAC_NONE;
  160. else
  161. dimm->edac_mode = EDAC_SECDED;
  162. dimm->dtype = DEV_UNKNOWN;
  163. dimm->grain = 128; /* Likely, worse case */
  164. dimm_setup_label(dimm, entry->handle);
  165. if (dimm->nr_pages) {
  166. edac_dbg(1, "DIMM%i: %s size = %d MB%s\n",
  167. dimm->idx, edac_mem_types[dimm->mtype],
  168. PAGES_TO_MiB(dimm->nr_pages),
  169. (dimm->edac_mode != EDAC_NONE) ? "(ECC)" : "");
  170. edac_dbg(2, "\ttype %d, detail 0x%02x, width %d(total %d)\n",
  171. entry->memory_type, entry->type_detail,
  172. entry->total_width, entry->data_width);
  173. }
  174. dimm->smbios_handle = entry->handle;
  175. }
  176. static void enumerate_dimms(const struct dmi_header *dh, void *arg)
  177. {
  178. struct memdev_dmi_entry *entry = (struct memdev_dmi_entry *)dh;
  179. struct ghes_hw_desc *hw = (struct ghes_hw_desc *)arg;
  180. struct dimm_info *d;
  181. if (dh->type != DMI_ENTRY_MEM_DEVICE)
  182. return;
  183. /* Enlarge the array with additional 16 */
  184. if (!hw->num_dimms || !(hw->num_dimms % 16)) {
  185. struct dimm_info *new;
  186. new = krealloc_array(hw->dimms, hw->num_dimms + 16,
  187. sizeof(struct dimm_info), GFP_KERNEL);
  188. if (!new) {
  189. WARN_ON_ONCE(1);
  190. return;
  191. }
  192. hw->dimms = new;
  193. }
  194. d = &hw->dimms[hw->num_dimms];
  195. d->idx = hw->num_dimms;
  196. assign_dmi_dimm_info(d, entry);
  197. hw->num_dimms++;
  198. }
  199. static void ghes_scan_system(void)
  200. {
  201. if (system_scanned)
  202. return;
  203. dmi_walk(enumerate_dimms, &ghes_hw);
  204. system_scanned = true;
  205. }
  206. static int print_mem_error_other_detail(const struct cper_sec_mem_err *mem, char *msg,
  207. const char *location, unsigned int len)
  208. {
  209. u32 n;
  210. if (!msg)
  211. return 0;
  212. n = 0;
  213. len -= 1;
  214. n += scnprintf(msg + n, len - n, "APEI location: %s ", location);
  215. if (!(mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS))
  216. goto out;
  217. n += scnprintf(msg + n, len - n, "status(0x%016llx): ", mem->error_status);
  218. n += scnprintf(msg + n, len - n, "%s ", cper_mem_err_status_str(mem->error_status));
  219. out:
  220. msg[n] = '\0';
  221. return n;
  222. }
  223. static int ghes_edac_report_mem_error(struct notifier_block *nb,
  224. unsigned long val, void *data)
  225. {
  226. struct cper_sec_mem_err *mem_err = (struct cper_sec_mem_err *)data;
  227. struct cper_mem_err_compact cmem;
  228. struct edac_raw_error_desc *e;
  229. struct mem_ctl_info *mci;
  230. unsigned long sev = val;
  231. struct ghes_pvt *pvt;
  232. unsigned long flags;
  233. char *p;
  234. /*
  235. * We can do the locking below because GHES defers error processing
  236. * from NMI to IRQ context. Whenever that changes, we'd at least
  237. * know.
  238. */
  239. if (WARN_ON_ONCE(in_nmi()))
  240. return NOTIFY_OK;
  241. spin_lock_irqsave(&ghes_lock, flags);
  242. pvt = ghes_pvt;
  243. if (!pvt)
  244. goto unlock;
  245. mci = pvt->mci;
  246. e = &mci->error_desc;
  247. /* Cleans the error report buffer */
  248. memset(e, 0, sizeof (*e));
  249. e->error_count = 1;
  250. e->grain = 1;
  251. e->msg = pvt->msg;
  252. e->other_detail = pvt->other_detail;
  253. e->top_layer = -1;
  254. e->mid_layer = -1;
  255. e->low_layer = -1;
  256. *pvt->other_detail = '\0';
  257. *pvt->msg = '\0';
  258. switch (sev) {
  259. case GHES_SEV_CORRECTED:
  260. e->type = HW_EVENT_ERR_CORRECTED;
  261. break;
  262. case GHES_SEV_RECOVERABLE:
  263. e->type = HW_EVENT_ERR_UNCORRECTED;
  264. break;
  265. case GHES_SEV_PANIC:
  266. e->type = HW_EVENT_ERR_FATAL;
  267. break;
  268. default:
  269. case GHES_SEV_NO:
  270. e->type = HW_EVENT_ERR_INFO;
  271. }
  272. edac_dbg(1, "error validation_bits: 0x%08llx\n",
  273. (long long)mem_err->validation_bits);
  274. /* Error type, mapped on e->msg */
  275. if (mem_err->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
  276. u8 etype = mem_err->error_type;
  277. p = pvt->msg;
  278. p += snprintf(p, sizeof(pvt->msg), "%s", cper_mem_err_type_str(etype));
  279. } else {
  280. strscpy(pvt->msg, "unknown error");
  281. }
  282. /* Error address */
  283. if (mem_err->validation_bits & CPER_MEM_VALID_PA) {
  284. e->page_frame_number = PHYS_PFN(mem_err->physical_addr);
  285. e->offset_in_page = offset_in_page(mem_err->physical_addr);
  286. }
  287. /* Error grain */
  288. if (mem_err->validation_bits & CPER_MEM_VALID_PA_MASK)
  289. e->grain = ~mem_err->physical_addr_mask + 1;
  290. /* Memory error location, mapped on e->location */
  291. p = e->location;
  292. cper_mem_err_pack(mem_err, &cmem);
  293. p += cper_mem_err_location(&cmem, p);
  294. if (mem_err->validation_bits & CPER_MEM_VALID_MODULE_HANDLE) {
  295. struct dimm_info *dimm;
  296. p += cper_dimm_err_location(&cmem, p);
  297. dimm = find_dimm_by_handle(mci, mem_err->mem_dev_handle);
  298. if (dimm) {
  299. e->top_layer = dimm->idx;
  300. strscpy(e->label, dimm->label);
  301. }
  302. }
  303. if (p > e->location)
  304. *(p - 1) = '\0';
  305. if (!*e->label)
  306. strscpy(e->label, "unknown memory");
  307. /* All other fields are mapped on e->other_detail */
  308. p = pvt->other_detail;
  309. p += print_mem_error_other_detail(mem_err, p, e->location, OTHER_DETAIL_LEN);
  310. if (p > pvt->other_detail)
  311. *(p - 1) = '\0';
  312. edac_raw_mc_handle_error(e);
  313. unlock:
  314. spin_unlock_irqrestore(&ghes_lock, flags);
  315. return NOTIFY_OK;
  316. }
  317. static struct notifier_block ghes_edac_mem_err_nb = {
  318. .notifier_call = ghes_edac_report_mem_error,
  319. .priority = 0,
  320. };
  321. static int ghes_edac_register(struct device *dev)
  322. {
  323. bool fake = false;
  324. struct mem_ctl_info *mci;
  325. struct ghes_pvt *pvt;
  326. struct edac_mc_layer layers[1];
  327. unsigned long flags;
  328. int rc = 0;
  329. /* finish another registration/unregistration instance first */
  330. mutex_lock(&ghes_reg_mutex);
  331. /*
  332. * We have only one logical memory controller to which all DIMMs belong.
  333. */
  334. if (refcount_inc_not_zero(&ghes_refcount))
  335. goto unlock;
  336. ghes_scan_system();
  337. /* Check if we've got a bogus BIOS */
  338. if (!ghes_hw.num_dimms) {
  339. fake = true;
  340. ghes_hw.num_dimms = 1;
  341. }
  342. layers[0].type = EDAC_MC_LAYER_ALL_MEM;
  343. layers[0].size = ghes_hw.num_dimms;
  344. layers[0].is_virt_csrow = true;
  345. mci = edac_mc_alloc(0, ARRAY_SIZE(layers), layers, sizeof(struct ghes_pvt));
  346. if (!mci) {
  347. pr_info("Can't allocate memory for EDAC data\n");
  348. rc = -ENOMEM;
  349. goto unlock;
  350. }
  351. pvt = mci->pvt_info;
  352. pvt->mci = mci;
  353. mci->pdev = dev;
  354. mci->mtype_cap = MEM_FLAG_EMPTY;
  355. mci->edac_ctl_cap = EDAC_FLAG_NONE;
  356. mci->edac_cap = EDAC_FLAG_NONE;
  357. mci->mod_name = "ghes_edac.c";
  358. mci->ctl_name = "ghes_edac";
  359. mci->dev_name = "ghes";
  360. if (fake) {
  361. pr_info("This system has a very crappy BIOS: It doesn't even list the DIMMS.\n");
  362. pr_info("Its SMBIOS info is wrong. It is doubtful that the error report would\n");
  363. pr_info("work on such system. Use this driver with caution\n");
  364. }
  365. pr_info("This system has %d DIMM sockets.\n", ghes_hw.num_dimms);
  366. if (!fake) {
  367. struct dimm_info *src, *dst;
  368. int i = 0;
  369. mci_for_each_dimm(mci, dst) {
  370. src = &ghes_hw.dimms[i];
  371. dst->idx = src->idx;
  372. dst->smbios_handle = src->smbios_handle;
  373. dst->nr_pages = src->nr_pages;
  374. dst->mtype = src->mtype;
  375. dst->edac_mode = src->edac_mode;
  376. dst->dtype = src->dtype;
  377. dst->grain = src->grain;
  378. /*
  379. * If no src->label, preserve default label assigned
  380. * from EDAC core.
  381. */
  382. if (strlen(src->label))
  383. memcpy(dst->label, src->label, sizeof(src->label));
  384. i++;
  385. }
  386. } else {
  387. struct dimm_info *dimm = edac_get_dimm(mci, 0, 0, 0);
  388. dimm->nr_pages = 1;
  389. dimm->grain = 128;
  390. dimm->mtype = MEM_UNKNOWN;
  391. dimm->dtype = DEV_UNKNOWN;
  392. dimm->edac_mode = EDAC_SECDED;
  393. }
  394. rc = edac_mc_add_mc(mci);
  395. if (rc < 0) {
  396. pr_info("Can't register with the EDAC core\n");
  397. edac_mc_free(mci);
  398. rc = -ENODEV;
  399. goto unlock;
  400. }
  401. spin_lock_irqsave(&ghes_lock, flags);
  402. ghes_pvt = pvt;
  403. spin_unlock_irqrestore(&ghes_lock, flags);
  404. ghes_register_report_chain(&ghes_edac_mem_err_nb);
  405. /* only set on success */
  406. refcount_set(&ghes_refcount, 1);
  407. unlock:
  408. /* Not needed anymore */
  409. kfree(ghes_hw.dimms);
  410. ghes_hw.dimms = NULL;
  411. mutex_unlock(&ghes_reg_mutex);
  412. return rc;
  413. }
  414. static void ghes_edac_unregister(struct ghes *ghes)
  415. {
  416. struct mem_ctl_info *mci;
  417. unsigned long flags;
  418. mutex_lock(&ghes_reg_mutex);
  419. system_scanned = false;
  420. memset(&ghes_hw, 0, sizeof(struct ghes_hw_desc));
  421. if (!refcount_dec_and_test(&ghes_refcount))
  422. goto unlock;
  423. /*
  424. * Wait for the irq handler being finished.
  425. */
  426. spin_lock_irqsave(&ghes_lock, flags);
  427. mci = ghes_pvt ? ghes_pvt->mci : NULL;
  428. ghes_pvt = NULL;
  429. spin_unlock_irqrestore(&ghes_lock, flags);
  430. if (!mci)
  431. goto unlock;
  432. mci = edac_mc_del_mc(mci->pdev);
  433. if (mci)
  434. edac_mc_free(mci);
  435. ghes_unregister_report_chain(&ghes_edac_mem_err_nb);
  436. unlock:
  437. mutex_unlock(&ghes_reg_mutex);
  438. }
  439. static int __init ghes_edac_init(void)
  440. {
  441. struct ghes *g, *g_tmp;
  442. ghes_devs = ghes_get_devices();
  443. if (!ghes_devs)
  444. return -ENODEV;
  445. if (list_empty(ghes_devs)) {
  446. pr_info("GHES probing device list is empty\n");
  447. return -ENODEV;
  448. }
  449. list_for_each_entry_safe(g, g_tmp, ghes_devs, elist) {
  450. ghes_edac_register(g->dev);
  451. }
  452. return 0;
  453. }
  454. module_init(ghes_edac_init);
  455. static void __exit ghes_edac_exit(void)
  456. {
  457. struct ghes *g, *g_tmp;
  458. list_for_each_entry_safe(g, g_tmp, ghes_devs, elist) {
  459. ghes_edac_unregister(g);
  460. }
  461. }
  462. module_exit(ghes_edac_exit);
  463. MODULE_LICENSE("GPL");
  464. MODULE_DESCRIPTION("Output ACPI APEI/GHES BIOS detected errors via EDAC");