safexcel_hash.c 84 KB

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  1. // SPDX-License-Identifier: GPL-2.0
  2. /*
  3. * Copyright (C) 2017 Marvell
  4. *
  5. * Antoine Tenart <antoine.tenart@free-electrons.com>
  6. */
  7. #include <crypto/aes.h>
  8. #include <crypto/hmac.h>
  9. #include <crypto/md5.h>
  10. #include <crypto/sha1.h>
  11. #include <crypto/sha2.h>
  12. #include <crypto/sha3.h>
  13. #include <crypto/skcipher.h>
  14. #include <crypto/sm3.h>
  15. #include <crypto/internal/cipher.h>
  16. #include <linux/device.h>
  17. #include <linux/dma-mapping.h>
  18. #include <linux/dmapool.h>
  19. #include "safexcel.h"
  20. struct safexcel_ahash_ctx {
  21. struct safexcel_context base;
  22. u32 alg;
  23. u8 key_sz;
  24. bool cbcmac;
  25. bool do_fallback;
  26. bool fb_init_done;
  27. bool fb_do_setkey;
  28. struct aes_enckey *aes;
  29. struct crypto_ahash *fback;
  30. struct crypto_shash *shpre;
  31. struct shash_desc *shdesc;
  32. };
  33. struct safexcel_ahash_req {
  34. bool last_req;
  35. bool finish;
  36. bool hmac;
  37. bool needs_inv;
  38. bool hmac_zlen;
  39. bool len_is_le;
  40. bool not_first;
  41. bool xcbcmac;
  42. int nents;
  43. dma_addr_t result_dma;
  44. u32 digest;
  45. u8 state_sz; /* expected state size, only set once */
  46. u8 block_sz; /* block size, only set once */
  47. u8 digest_sz; /* output digest size, only set once */
  48. __le32 state[SHA3_512_BLOCK_SIZE /
  49. sizeof(__le32)] __aligned(sizeof(__le32));
  50. u64 len;
  51. u64 processed;
  52. u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32));
  53. dma_addr_t cache_dma;
  54. unsigned int cache_sz;
  55. u8 cache_next[HASH_CACHE_SIZE] __aligned(sizeof(u32));
  56. };
  57. static inline u64 safexcel_queued_len(struct safexcel_ahash_req *req)
  58. {
  59. return req->len - req->processed;
  60. }
  61. static void safexcel_hash_token(struct safexcel_command_desc *cdesc,
  62. u32 input_length, u32 result_length,
  63. bool cbcmac)
  64. {
  65. struct safexcel_token *token =
  66. (struct safexcel_token *)cdesc->control_data.token;
  67. token[0].opcode = EIP197_TOKEN_OPCODE_DIRECTION;
  68. token[0].packet_length = input_length;
  69. token[0].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  70. input_length &= 15;
  71. if (unlikely(cbcmac && input_length)) {
  72. token[0].stat = 0;
  73. token[1].opcode = EIP197_TOKEN_OPCODE_INSERT;
  74. token[1].packet_length = 16 - input_length;
  75. token[1].stat = EIP197_TOKEN_STAT_LAST_HASH;
  76. token[1].instructions = EIP197_TOKEN_INS_TYPE_HASH;
  77. } else {
  78. token[0].stat = EIP197_TOKEN_STAT_LAST_HASH;
  79. eip197_noop_token(&token[1]);
  80. }
  81. token[2].opcode = EIP197_TOKEN_OPCODE_INSERT;
  82. token[2].stat = EIP197_TOKEN_STAT_LAST_HASH |
  83. EIP197_TOKEN_STAT_LAST_PACKET;
  84. token[2].packet_length = result_length;
  85. token[2].instructions = EIP197_TOKEN_INS_TYPE_OUTPUT |
  86. EIP197_TOKEN_INS_INSERT_HASH_DIGEST;
  87. eip197_noop_token(&token[3]);
  88. }
  89. static void safexcel_context_control(struct safexcel_ahash_ctx *ctx,
  90. struct safexcel_ahash_req *req,
  91. struct safexcel_command_desc *cdesc)
  92. {
  93. struct safexcel_crypto_priv *priv = ctx->base.priv;
  94. u64 count = 0;
  95. cdesc->control_data.control0 = ctx->alg;
  96. cdesc->control_data.control1 = 0;
  97. /*
  98. * Copy the input digest if needed, and setup the context
  99. * fields. Do this now as we need it to setup the first command
  100. * descriptor.
  101. */
  102. if (unlikely(req->digest == CONTEXT_CONTROL_DIGEST_XCM)) {
  103. if (req->xcbcmac)
  104. memcpy(ctx->base.ctxr->data, &ctx->base.ipad, ctx->key_sz);
  105. else
  106. memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
  107. if (!req->finish && req->xcbcmac)
  108. cdesc->control_data.control0 |=
  109. CONTEXT_CONTROL_DIGEST_XCM |
  110. CONTEXT_CONTROL_TYPE_HASH_OUT |
  111. CONTEXT_CONTROL_NO_FINISH_HASH |
  112. CONTEXT_CONTROL_SIZE(req->state_sz /
  113. sizeof(u32));
  114. else
  115. cdesc->control_data.control0 |=
  116. CONTEXT_CONTROL_DIGEST_XCM |
  117. CONTEXT_CONTROL_TYPE_HASH_OUT |
  118. CONTEXT_CONTROL_SIZE(req->state_sz /
  119. sizeof(u32));
  120. return;
  121. } else if (!req->processed) {
  122. /* First - and possibly only - block of basic hash only */
  123. if (req->finish)
  124. cdesc->control_data.control0 |= req->digest |
  125. CONTEXT_CONTROL_TYPE_HASH_OUT |
  126. CONTEXT_CONTROL_RESTART_HASH |
  127. /* ensure its not 0! */
  128. CONTEXT_CONTROL_SIZE(1);
  129. else
  130. cdesc->control_data.control0 |= req->digest |
  131. CONTEXT_CONTROL_TYPE_HASH_OUT |
  132. CONTEXT_CONTROL_RESTART_HASH |
  133. CONTEXT_CONTROL_NO_FINISH_HASH |
  134. /* ensure its not 0! */
  135. CONTEXT_CONTROL_SIZE(1);
  136. return;
  137. }
  138. /* Hash continuation or HMAC, setup (inner) digest from state */
  139. memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
  140. if (req->finish) {
  141. /* Compute digest count for hash/HMAC finish operations */
  142. if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
  143. req->hmac_zlen || (req->processed != req->block_sz)) {
  144. count = req->processed / EIP197_COUNTER_BLOCK_SIZE;
  145. /* This is a hardware limitation, as the
  146. * counter must fit into an u32. This represents
  147. * a fairly big amount of input data, so we
  148. * shouldn't see this.
  149. */
  150. if (unlikely(count & 0xffffffff00000000ULL)) {
  151. dev_warn(priv->dev,
  152. "Input data is too big\n");
  153. return;
  154. }
  155. }
  156. if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
  157. /* Special case: zero length HMAC */
  158. req->hmac_zlen ||
  159. /* PE HW < 4.4 cannot do HMAC continue, fake using hash */
  160. (req->processed != req->block_sz)) {
  161. /* Basic hash continue operation, need digest + cnt */
  162. cdesc->control_data.control0 |=
  163. CONTEXT_CONTROL_SIZE((req->state_sz >> 2) + 1) |
  164. CONTEXT_CONTROL_TYPE_HASH_OUT |
  165. CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  166. /* For zero-len HMAC, don't finalize, already padded! */
  167. if (req->hmac_zlen)
  168. cdesc->control_data.control0 |=
  169. CONTEXT_CONTROL_NO_FINISH_HASH;
  170. cdesc->control_data.control1 |=
  171. CONTEXT_CONTROL_DIGEST_CNT;
  172. ctx->base.ctxr->data[req->state_sz >> 2] =
  173. cpu_to_le32(count);
  174. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  175. /* Clear zero-length HMAC flag for next operation! */
  176. req->hmac_zlen = false;
  177. } else { /* HMAC */
  178. /* Need outer digest for HMAC finalization */
  179. memcpy(ctx->base.ctxr->data + (req->state_sz >> 2),
  180. &ctx->base.opad, req->state_sz);
  181. /* Single pass HMAC - no digest count */
  182. cdesc->control_data.control0 |=
  183. CONTEXT_CONTROL_SIZE(req->state_sz >> 1) |
  184. CONTEXT_CONTROL_TYPE_HASH_OUT |
  185. CONTEXT_CONTROL_DIGEST_HMAC;
  186. }
  187. } else { /* Hash continuation, do not finish yet */
  188. cdesc->control_data.control0 |=
  189. CONTEXT_CONTROL_SIZE(req->state_sz >> 2) |
  190. CONTEXT_CONTROL_DIGEST_PRECOMPUTED |
  191. CONTEXT_CONTROL_TYPE_HASH_OUT |
  192. CONTEXT_CONTROL_NO_FINISH_HASH;
  193. }
  194. }
  195. static int safexcel_ahash_enqueue(struct ahash_request *areq);
  196. static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv,
  197. int ring,
  198. struct crypto_async_request *async,
  199. bool *should_complete, int *ret)
  200. {
  201. struct safexcel_result_desc *rdesc;
  202. struct ahash_request *areq = ahash_request_cast(async);
  203. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  204. struct safexcel_ahash_req *sreq = ahash_request_ctx_dma(areq);
  205. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  206. u64 cache_len;
  207. *ret = 0;
  208. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  209. if (IS_ERR(rdesc)) {
  210. dev_err(priv->dev,
  211. "hash: result: could not retrieve the result descriptor\n");
  212. *ret = PTR_ERR(rdesc);
  213. } else {
  214. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  215. }
  216. safexcel_complete(priv, ring);
  217. if (sreq->nents) {
  218. dma_unmap_sg(priv->dev, areq->src,
  219. sg_nents_for_len(areq->src, areq->nbytes),
  220. DMA_TO_DEVICE);
  221. sreq->nents = 0;
  222. }
  223. if (sreq->result_dma) {
  224. dma_unmap_single(priv->dev, sreq->result_dma, sreq->digest_sz,
  225. DMA_FROM_DEVICE);
  226. sreq->result_dma = 0;
  227. }
  228. if (sreq->cache_dma) {
  229. dma_unmap_single(priv->dev, sreq->cache_dma, sreq->cache_sz,
  230. DMA_TO_DEVICE);
  231. sreq->cache_dma = 0;
  232. sreq->cache_sz = 0;
  233. }
  234. if (sreq->finish) {
  235. if (sreq->hmac &&
  236. (sreq->digest != CONTEXT_CONTROL_DIGEST_HMAC)) {
  237. /* Faking HMAC using hash - need to do outer hash */
  238. memcpy(sreq->cache, sreq->state,
  239. crypto_ahash_digestsize(ahash));
  240. memcpy(sreq->state, &ctx->base.opad, sreq->digest_sz);
  241. sreq->len = sreq->block_sz +
  242. crypto_ahash_digestsize(ahash);
  243. sreq->processed = sreq->block_sz;
  244. sreq->hmac = 0;
  245. if (priv->flags & EIP197_TRC_CACHE)
  246. ctx->base.needs_inv = true;
  247. areq->nbytes = 0;
  248. safexcel_ahash_enqueue(areq);
  249. *should_complete = false; /* Not done yet */
  250. return 1;
  251. }
  252. memcpy(areq->result, sreq->state,
  253. crypto_ahash_digestsize(ahash));
  254. }
  255. cache_len = safexcel_queued_len(sreq);
  256. if (cache_len)
  257. memcpy(sreq->cache, sreq->cache_next, cache_len);
  258. *should_complete = true;
  259. return 1;
  260. }
  261. static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
  262. int *commands, int *results)
  263. {
  264. struct ahash_request *areq = ahash_request_cast(async);
  265. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  266. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  267. struct safexcel_crypto_priv *priv = ctx->base.priv;
  268. struct safexcel_command_desc *cdesc, *first_cdesc = NULL;
  269. struct safexcel_result_desc *rdesc;
  270. struct scatterlist *sg;
  271. struct safexcel_token *dmmy;
  272. int i, extra = 0, n_cdesc = 0, ret = 0, cache_len, skip = 0;
  273. u64 queued, len;
  274. queued = safexcel_queued_len(req);
  275. if (queued <= HASH_CACHE_SIZE)
  276. cache_len = queued;
  277. else
  278. cache_len = queued - areq->nbytes;
  279. if (!req->finish && !req->last_req) {
  280. /* If this is not the last request and the queued data does not
  281. * fit into full cache blocks, cache it for the next send call.
  282. */
  283. extra = queued & (HASH_CACHE_SIZE - 1);
  284. /* If this is not the last request and the queued data
  285. * is a multiple of a block, cache the last one for now.
  286. */
  287. if (!extra)
  288. extra = HASH_CACHE_SIZE;
  289. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  290. req->cache_next, extra,
  291. areq->nbytes - extra);
  292. queued -= extra;
  293. if (!queued) {
  294. *commands = 0;
  295. *results = 0;
  296. return 0;
  297. }
  298. extra = 0;
  299. }
  300. if (unlikely(req->xcbcmac && req->processed > AES_BLOCK_SIZE)) {
  301. if (unlikely(cache_len < AES_BLOCK_SIZE)) {
  302. /*
  303. * Cache contains less than 1 full block, complete.
  304. */
  305. extra = AES_BLOCK_SIZE - cache_len;
  306. if (queued > cache_len) {
  307. /* More data follows: borrow bytes */
  308. u64 tmp = queued - cache_len;
  309. skip = min_t(u64, tmp, extra);
  310. sg_pcopy_to_buffer(areq->src,
  311. sg_nents(areq->src),
  312. req->cache + cache_len,
  313. skip, 0);
  314. }
  315. extra -= skip;
  316. memset(req->cache + cache_len + skip, 0, extra);
  317. if (!ctx->cbcmac && extra) {
  318. // 10- padding for XCBCMAC & CMAC
  319. req->cache[cache_len + skip] = 0x80;
  320. // HW will use K2 iso K3 - compensate!
  321. for (i = 0; i < AES_BLOCK_SIZE / 4; i++) {
  322. u32 *cache = (void *)req->cache;
  323. u32 *ipad = ctx->base.ipad.word;
  324. u32 x;
  325. x = ipad[i] ^ ipad[i + 4];
  326. cache[i] ^= swab32(x);
  327. }
  328. }
  329. cache_len = AES_BLOCK_SIZE;
  330. queued = queued + extra;
  331. }
  332. /* XCBC continue: XOR previous result into 1st word */
  333. crypto_xor(req->cache, (const u8 *)req->state, AES_BLOCK_SIZE);
  334. }
  335. len = queued;
  336. /* Add a command descriptor for the cached data, if any */
  337. if (cache_len) {
  338. req->cache_dma = dma_map_single(priv->dev, req->cache,
  339. cache_len, DMA_TO_DEVICE);
  340. if (dma_mapping_error(priv->dev, req->cache_dma))
  341. return -EINVAL;
  342. req->cache_sz = cache_len;
  343. first_cdesc = safexcel_add_cdesc(priv, ring, 1,
  344. (cache_len == len),
  345. req->cache_dma, cache_len,
  346. len, ctx->base.ctxr_dma,
  347. &dmmy);
  348. if (IS_ERR(first_cdesc)) {
  349. ret = PTR_ERR(first_cdesc);
  350. goto unmap_cache;
  351. }
  352. n_cdesc++;
  353. queued -= cache_len;
  354. if (!queued)
  355. goto send_command;
  356. }
  357. /* Now handle the current ahash request buffer(s) */
  358. req->nents = dma_map_sg(priv->dev, areq->src,
  359. sg_nents_for_len(areq->src,
  360. areq->nbytes),
  361. DMA_TO_DEVICE);
  362. if (!req->nents) {
  363. ret = -ENOMEM;
  364. goto cdesc_rollback;
  365. }
  366. for_each_sg(areq->src, sg, req->nents, i) {
  367. int sglen = sg_dma_len(sg);
  368. if (unlikely(sglen <= skip)) {
  369. skip -= sglen;
  370. continue;
  371. }
  372. /* Do not overflow the request */
  373. if ((queued + skip) <= sglen)
  374. sglen = queued;
  375. else
  376. sglen -= skip;
  377. cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc,
  378. !(queued - sglen),
  379. sg_dma_address(sg) + skip, sglen,
  380. len, ctx->base.ctxr_dma, &dmmy);
  381. if (IS_ERR(cdesc)) {
  382. ret = PTR_ERR(cdesc);
  383. goto unmap_sg;
  384. }
  385. if (!n_cdesc)
  386. first_cdesc = cdesc;
  387. n_cdesc++;
  388. queued -= sglen;
  389. if (!queued)
  390. break;
  391. skip = 0;
  392. }
  393. send_command:
  394. /* Setup the context options */
  395. safexcel_context_control(ctx, req, first_cdesc);
  396. /* Add the token */
  397. safexcel_hash_token(first_cdesc, len, req->digest_sz, ctx->cbcmac);
  398. req->result_dma = dma_map_single(priv->dev, req->state, req->digest_sz,
  399. DMA_FROM_DEVICE);
  400. if (dma_mapping_error(priv->dev, req->result_dma)) {
  401. ret = -EINVAL;
  402. goto unmap_sg;
  403. }
  404. /* Add a result descriptor */
  405. rdesc = safexcel_add_rdesc(priv, ring, 1, 1, req->result_dma,
  406. req->digest_sz);
  407. if (IS_ERR(rdesc)) {
  408. ret = PTR_ERR(rdesc);
  409. goto unmap_result;
  410. }
  411. safexcel_rdr_req_set(priv, ring, rdesc, &areq->base);
  412. req->processed += len - extra;
  413. *commands = n_cdesc;
  414. *results = 1;
  415. return 0;
  416. unmap_result:
  417. dma_unmap_single(priv->dev, req->result_dma, req->digest_sz,
  418. DMA_FROM_DEVICE);
  419. unmap_sg:
  420. if (req->nents) {
  421. dma_unmap_sg(priv->dev, areq->src,
  422. sg_nents_for_len(areq->src, areq->nbytes),
  423. DMA_TO_DEVICE);
  424. req->nents = 0;
  425. }
  426. cdesc_rollback:
  427. for (i = 0; i < n_cdesc; i++)
  428. safexcel_ring_rollback_wptr(priv, &priv->ring[ring].cdr);
  429. unmap_cache:
  430. if (req->cache_dma) {
  431. dma_unmap_single(priv->dev, req->cache_dma, req->cache_sz,
  432. DMA_TO_DEVICE);
  433. req->cache_dma = 0;
  434. req->cache_sz = 0;
  435. }
  436. return ret;
  437. }
  438. static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
  439. int ring,
  440. struct crypto_async_request *async,
  441. bool *should_complete, int *ret)
  442. {
  443. struct safexcel_result_desc *rdesc;
  444. struct ahash_request *areq = ahash_request_cast(async);
  445. struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
  446. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
  447. int enq_ret;
  448. *ret = 0;
  449. rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
  450. if (IS_ERR(rdesc)) {
  451. dev_err(priv->dev,
  452. "hash: invalidate: could not retrieve the result descriptor\n");
  453. *ret = PTR_ERR(rdesc);
  454. } else {
  455. *ret = safexcel_rdesc_check_errors(priv, rdesc);
  456. }
  457. safexcel_complete(priv, ring);
  458. if (ctx->base.exit_inv) {
  459. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  460. ctx->base.ctxr_dma);
  461. *should_complete = true;
  462. return 1;
  463. }
  464. ring = safexcel_select_ring(priv);
  465. ctx->base.ring = ring;
  466. spin_lock_bh(&priv->ring[ring].queue_lock);
  467. enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
  468. spin_unlock_bh(&priv->ring[ring].queue_lock);
  469. if (enq_ret != -EINPROGRESS)
  470. *ret = enq_ret;
  471. queue_work(priv->ring[ring].workqueue,
  472. &priv->ring[ring].work_data.work);
  473. *should_complete = false;
  474. return 1;
  475. }
  476. static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
  477. struct crypto_async_request *async,
  478. bool *should_complete, int *ret)
  479. {
  480. struct ahash_request *areq = ahash_request_cast(async);
  481. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  482. int err;
  483. BUG_ON(!(priv->flags & EIP197_TRC_CACHE) && req->needs_inv);
  484. if (req->needs_inv) {
  485. req->needs_inv = false;
  486. err = safexcel_handle_inv_result(priv, ring, async,
  487. should_complete, ret);
  488. } else {
  489. err = safexcel_handle_req_result(priv, ring, async,
  490. should_complete, ret);
  491. }
  492. return err;
  493. }
  494. static int safexcel_ahash_send_inv(struct crypto_async_request *async,
  495. int ring, int *commands, int *results)
  496. {
  497. struct ahash_request *areq = ahash_request_cast(async);
  498. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  499. int ret;
  500. ret = safexcel_invalidate_cache(async, ctx->base.priv,
  501. ctx->base.ctxr_dma, ring);
  502. if (unlikely(ret))
  503. return ret;
  504. *commands = 1;
  505. *results = 1;
  506. return 0;
  507. }
  508. static int safexcel_ahash_send(struct crypto_async_request *async,
  509. int ring, int *commands, int *results)
  510. {
  511. struct ahash_request *areq = ahash_request_cast(async);
  512. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  513. int ret;
  514. if (req->needs_inv)
  515. ret = safexcel_ahash_send_inv(async, ring, commands, results);
  516. else
  517. ret = safexcel_ahash_send_req(async, ring, commands, results);
  518. return ret;
  519. }
  520. static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm)
  521. {
  522. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  523. struct safexcel_crypto_priv *priv = ctx->base.priv;
  524. EIP197_REQUEST_ON_STACK(req, ahash, EIP197_AHASH_REQ_SIZE);
  525. struct safexcel_ahash_req *rctx = ahash_request_ctx_dma(req);
  526. DECLARE_CRYPTO_WAIT(result);
  527. int ring = ctx->base.ring;
  528. int err;
  529. memset(req, 0, EIP197_AHASH_REQ_SIZE);
  530. /* create invalidation request */
  531. init_completion(&result.completion);
  532. ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
  533. crypto_req_done, &result);
  534. ahash_request_set_tfm(req, __crypto_ahash_cast(tfm));
  535. ctx = crypto_tfm_ctx(req->base.tfm);
  536. ctx->base.exit_inv = true;
  537. rctx->needs_inv = true;
  538. spin_lock_bh(&priv->ring[ring].queue_lock);
  539. crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
  540. spin_unlock_bh(&priv->ring[ring].queue_lock);
  541. queue_work(priv->ring[ring].workqueue,
  542. &priv->ring[ring].work_data.work);
  543. err = crypto_wait_req(-EINPROGRESS, &result);
  544. if (err) {
  545. dev_warn(priv->dev, "hash: completion error (%d)\n", err);
  546. return err;
  547. }
  548. return 0;
  549. }
  550. /* safexcel_ahash_cache: cache data until at least one request can be sent to
  551. * the engine, aka. when there is at least 1 block size in the pipe.
  552. */
  553. static int safexcel_ahash_cache(struct ahash_request *areq)
  554. {
  555. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  556. u64 cache_len;
  557. /* cache_len: everything accepted by the driver but not sent yet,
  558. * tot sz handled by update() - last req sz - tot sz handled by send()
  559. */
  560. cache_len = safexcel_queued_len(req);
  561. /*
  562. * In case there isn't enough bytes to proceed (less than a
  563. * block size), cache the data until we have enough.
  564. */
  565. if (cache_len + areq->nbytes <= HASH_CACHE_SIZE) {
  566. sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
  567. req->cache + cache_len,
  568. areq->nbytes, 0);
  569. return 0;
  570. }
  571. /* We couldn't cache all the data */
  572. return -E2BIG;
  573. }
  574. static int safexcel_ahash_enqueue(struct ahash_request *areq)
  575. {
  576. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  577. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  578. struct safexcel_crypto_priv *priv = ctx->base.priv;
  579. int ret, ring;
  580. req->needs_inv = false;
  581. if (ctx->base.ctxr) {
  582. if (priv->flags & EIP197_TRC_CACHE && !ctx->base.needs_inv &&
  583. /* invalidate for *any* non-XCBC continuation */
  584. ((req->not_first && !req->xcbcmac) ||
  585. /* invalidate if (i)digest changed */
  586. memcmp(ctx->base.ctxr->data, req->state, req->state_sz) ||
  587. /* invalidate for HMAC finish with odigest changed */
  588. (req->finish && req->hmac &&
  589. memcmp(ctx->base.ctxr->data + (req->state_sz>>2),
  590. &ctx->base.opad, req->state_sz))))
  591. /*
  592. * We're still setting needs_inv here, even though it is
  593. * cleared right away, because the needs_inv flag can be
  594. * set in other functions and we want to keep the same
  595. * logic.
  596. */
  597. ctx->base.needs_inv = true;
  598. if (ctx->base.needs_inv) {
  599. ctx->base.needs_inv = false;
  600. req->needs_inv = true;
  601. }
  602. } else {
  603. ctx->base.ring = safexcel_select_ring(priv);
  604. ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
  605. EIP197_GFP_FLAGS(areq->base),
  606. &ctx->base.ctxr_dma);
  607. if (!ctx->base.ctxr)
  608. return -ENOMEM;
  609. }
  610. req->not_first = true;
  611. ring = ctx->base.ring;
  612. spin_lock_bh(&priv->ring[ring].queue_lock);
  613. ret = crypto_enqueue_request(&priv->ring[ring].queue, &areq->base);
  614. spin_unlock_bh(&priv->ring[ring].queue_lock);
  615. queue_work(priv->ring[ring].workqueue,
  616. &priv->ring[ring].work_data.work);
  617. return ret;
  618. }
  619. static int safexcel_ahash_update(struct ahash_request *areq)
  620. {
  621. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  622. int ret;
  623. /* If the request is 0 length, do nothing */
  624. if (!areq->nbytes)
  625. return 0;
  626. /* Add request to the cache if it fits */
  627. ret = safexcel_ahash_cache(areq);
  628. /* Update total request length */
  629. req->len += areq->nbytes;
  630. /* If not all data could fit into the cache, go process the excess.
  631. * Also go process immediately for an HMAC IV precompute, which
  632. * will never be finished at all, but needs to be processed anyway.
  633. */
  634. if ((ret && !req->finish) || req->last_req)
  635. return safexcel_ahash_enqueue(areq);
  636. return 0;
  637. }
  638. static int safexcel_ahash_final(struct ahash_request *areq)
  639. {
  640. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  641. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  642. req->finish = true;
  643. if (unlikely(!req->len && !areq->nbytes)) {
  644. /*
  645. * If we have an overall 0 length *hash* request:
  646. * The HW cannot do 0 length hash, so we provide the correct
  647. * result directly here.
  648. */
  649. if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5)
  650. memcpy(areq->result, md5_zero_message_hash,
  651. MD5_DIGEST_SIZE);
  652. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA1)
  653. memcpy(areq->result, sha1_zero_message_hash,
  654. SHA1_DIGEST_SIZE);
  655. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA224)
  656. memcpy(areq->result, sha224_zero_message_hash,
  657. SHA224_DIGEST_SIZE);
  658. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA256)
  659. memcpy(areq->result, sha256_zero_message_hash,
  660. SHA256_DIGEST_SIZE);
  661. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA384)
  662. memcpy(areq->result, sha384_zero_message_hash,
  663. SHA384_DIGEST_SIZE);
  664. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA512)
  665. memcpy(areq->result, sha512_zero_message_hash,
  666. SHA512_DIGEST_SIZE);
  667. else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SM3) {
  668. memcpy(areq->result,
  669. EIP197_SM3_ZEROM_HASH, SM3_DIGEST_SIZE);
  670. }
  671. return 0;
  672. } else if (unlikely(req->digest == CONTEXT_CONTROL_DIGEST_XCM &&
  673. ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5 &&
  674. req->len == sizeof(u32) && !areq->nbytes)) {
  675. /* Zero length CRC32 */
  676. memcpy(areq->result, &ctx->base.ipad, sizeof(u32));
  677. return 0;
  678. } else if (unlikely(ctx->cbcmac && req->len == AES_BLOCK_SIZE &&
  679. !areq->nbytes)) {
  680. /* Zero length CBC MAC */
  681. memset(areq->result, 0, AES_BLOCK_SIZE);
  682. return 0;
  683. } else if (unlikely(req->xcbcmac && req->len == AES_BLOCK_SIZE &&
  684. !areq->nbytes)) {
  685. /* Zero length (X)CBC/CMAC */
  686. int i;
  687. for (i = 0; i < AES_BLOCK_SIZE / sizeof(u32); i++) {
  688. u32 *result = (void *)areq->result;
  689. /* K3 */
  690. result[i] = swab32(ctx->base.ipad.word[i + 4]);
  691. }
  692. areq->result[0] ^= 0x80; // 10- padding
  693. aes_encrypt(ctx->aes, areq->result, areq->result);
  694. return 0;
  695. } else if (unlikely(req->hmac &&
  696. (req->len == req->block_sz) &&
  697. !areq->nbytes)) {
  698. /*
  699. * If we have an overall 0 length *HMAC* request:
  700. * For HMAC, we need to finalize the inner digest
  701. * and then perform the outer hash.
  702. */
  703. /* generate pad block in the cache */
  704. /* start with a hash block of all zeroes */
  705. memset(req->cache, 0, req->block_sz);
  706. /* set the first byte to 0x80 to 'append a 1 bit' */
  707. req->cache[0] = 0x80;
  708. /* add the length in bits in the last 2 bytes */
  709. if (req->len_is_le) {
  710. /* Little endian length word (e.g. MD5) */
  711. req->cache[req->block_sz-8] = (req->block_sz << 3) &
  712. 255;
  713. req->cache[req->block_sz-7] = (req->block_sz >> 5);
  714. } else {
  715. /* Big endian length word (e.g. any SHA) */
  716. req->cache[req->block_sz-2] = (req->block_sz >> 5);
  717. req->cache[req->block_sz-1] = (req->block_sz << 3) &
  718. 255;
  719. }
  720. req->len += req->block_sz; /* plus 1 hash block */
  721. /* Set special zero-length HMAC flag */
  722. req->hmac_zlen = true;
  723. /* Finalize HMAC */
  724. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  725. } else if (req->hmac) {
  726. /* Finalize HMAC */
  727. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  728. }
  729. return safexcel_ahash_enqueue(areq);
  730. }
  731. static int safexcel_ahash_finup(struct ahash_request *areq)
  732. {
  733. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  734. req->finish = true;
  735. safexcel_ahash_update(areq);
  736. return safexcel_ahash_final(areq);
  737. }
  738. static int safexcel_ahash_export(struct ahash_request *areq, void *out)
  739. {
  740. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  741. struct safexcel_ahash_export_state *export = out;
  742. export->len = req->len;
  743. export->processed = req->processed;
  744. export->digest = req->digest;
  745. memcpy(export->state, req->state, req->state_sz);
  746. memcpy(export->cache, req->cache, HASH_CACHE_SIZE);
  747. return 0;
  748. }
  749. static int safexcel_ahash_import(struct ahash_request *areq, const void *in)
  750. {
  751. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  752. const struct safexcel_ahash_export_state *export = in;
  753. int ret;
  754. ret = crypto_ahash_init(areq);
  755. if (ret)
  756. return ret;
  757. req->len = export->len;
  758. req->processed = export->processed;
  759. req->digest = export->digest;
  760. memcpy(req->cache, export->cache, HASH_CACHE_SIZE);
  761. memcpy(req->state, export->state, req->state_sz);
  762. return 0;
  763. }
  764. static int safexcel_ahash_cra_init(struct crypto_tfm *tfm)
  765. {
  766. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  767. struct safexcel_alg_template *tmpl =
  768. container_of(__crypto_ahash_alg(tfm->__crt_alg),
  769. struct safexcel_alg_template, alg.ahash);
  770. ctx->base.priv = tmpl->priv;
  771. ctx->base.send = safexcel_ahash_send;
  772. ctx->base.handle_result = safexcel_handle_result;
  773. ctx->fb_do_setkey = false;
  774. crypto_ahash_set_reqsize_dma(__crypto_ahash_cast(tfm),
  775. sizeof(struct safexcel_ahash_req));
  776. return 0;
  777. }
  778. static int safexcel_sha1_init(struct ahash_request *areq)
  779. {
  780. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  781. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  782. memset(req, 0, sizeof(*req));
  783. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  784. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  785. req->state_sz = SHA1_DIGEST_SIZE;
  786. req->digest_sz = SHA1_DIGEST_SIZE;
  787. req->block_sz = SHA1_BLOCK_SIZE;
  788. return 0;
  789. }
  790. static int safexcel_sha1_digest(struct ahash_request *areq)
  791. {
  792. int ret = safexcel_sha1_init(areq);
  793. if (ret)
  794. return ret;
  795. return safexcel_ahash_finup(areq);
  796. }
  797. static void safexcel_ahash_cra_exit(struct crypto_tfm *tfm)
  798. {
  799. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  800. struct safexcel_crypto_priv *priv = ctx->base.priv;
  801. int ret;
  802. /* context not allocated, skip invalidation */
  803. if (!ctx->base.ctxr)
  804. return;
  805. if (priv->flags & EIP197_TRC_CACHE) {
  806. ret = safexcel_ahash_exit_inv(tfm);
  807. if (ret)
  808. dev_warn(priv->dev, "hash: invalidation error %d\n", ret);
  809. } else {
  810. dma_pool_free(priv->context_pool, ctx->base.ctxr,
  811. ctx->base.ctxr_dma);
  812. }
  813. }
  814. struct safexcel_alg_template safexcel_alg_sha1 = {
  815. .type = SAFEXCEL_ALG_TYPE_AHASH,
  816. .algo_mask = SAFEXCEL_ALG_SHA1,
  817. .alg.ahash = {
  818. .init = safexcel_sha1_init,
  819. .update = safexcel_ahash_update,
  820. .final = safexcel_ahash_final,
  821. .finup = safexcel_ahash_finup,
  822. .digest = safexcel_sha1_digest,
  823. .export = safexcel_ahash_export,
  824. .import = safexcel_ahash_import,
  825. .halg = {
  826. .digestsize = SHA1_DIGEST_SIZE,
  827. .statesize = sizeof(struct safexcel_ahash_export_state),
  828. .base = {
  829. .cra_name = "sha1",
  830. .cra_driver_name = "safexcel-sha1",
  831. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  832. .cra_flags = CRYPTO_ALG_ASYNC |
  833. CRYPTO_ALG_ALLOCATES_MEMORY |
  834. CRYPTO_ALG_KERN_DRIVER_ONLY,
  835. .cra_blocksize = SHA1_BLOCK_SIZE,
  836. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  837. .cra_init = safexcel_ahash_cra_init,
  838. .cra_exit = safexcel_ahash_cra_exit,
  839. .cra_module = THIS_MODULE,
  840. },
  841. },
  842. },
  843. };
  844. static int safexcel_hmac_sha1_init(struct ahash_request *areq)
  845. {
  846. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  847. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  848. memset(req, 0, sizeof(*req));
  849. /* Start from ipad precompute */
  850. memcpy(req->state, &ctx->base.ipad, SHA1_DIGEST_SIZE);
  851. /* Already processed the key^ipad part now! */
  852. req->len = SHA1_BLOCK_SIZE;
  853. req->processed = SHA1_BLOCK_SIZE;
  854. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
  855. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  856. req->state_sz = SHA1_DIGEST_SIZE;
  857. req->digest_sz = SHA1_DIGEST_SIZE;
  858. req->block_sz = SHA1_BLOCK_SIZE;
  859. req->hmac = true;
  860. return 0;
  861. }
  862. static int safexcel_hmac_sha1_digest(struct ahash_request *areq)
  863. {
  864. int ret = safexcel_hmac_sha1_init(areq);
  865. if (ret)
  866. return ret;
  867. return safexcel_ahash_finup(areq);
  868. }
  869. static int safexcel_hmac_init_pad(struct ahash_request *areq,
  870. unsigned int blocksize, const u8 *key,
  871. unsigned int keylen, u8 *ipad, u8 *opad)
  872. {
  873. DECLARE_CRYPTO_WAIT(result);
  874. struct scatterlist sg;
  875. int ret, i;
  876. u8 *keydup;
  877. if (keylen <= blocksize) {
  878. memcpy(ipad, key, keylen);
  879. } else {
  880. keydup = kmemdup(key, keylen, GFP_KERNEL);
  881. if (!keydup)
  882. return -ENOMEM;
  883. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  884. crypto_req_done, &result);
  885. sg_init_one(&sg, keydup, keylen);
  886. ahash_request_set_crypt(areq, &sg, ipad, keylen);
  887. ret = crypto_ahash_digest(areq);
  888. ret = crypto_wait_req(ret, &result);
  889. /* Avoid leaking */
  890. kfree_sensitive(keydup);
  891. if (ret)
  892. return ret;
  893. keylen = crypto_ahash_digestsize(crypto_ahash_reqtfm(areq));
  894. }
  895. memset(ipad + keylen, 0, blocksize - keylen);
  896. memcpy(opad, ipad, blocksize);
  897. for (i = 0; i < blocksize; i++) {
  898. ipad[i] ^= HMAC_IPAD_VALUE;
  899. opad[i] ^= HMAC_OPAD_VALUE;
  900. }
  901. return 0;
  902. }
  903. static int safexcel_hmac_init_iv(struct ahash_request *areq,
  904. unsigned int blocksize, u8 *pad, void *state)
  905. {
  906. struct safexcel_ahash_req *req;
  907. DECLARE_CRYPTO_WAIT(result);
  908. struct scatterlist sg;
  909. int ret;
  910. ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
  911. crypto_req_done, &result);
  912. sg_init_one(&sg, pad, blocksize);
  913. ahash_request_set_crypt(areq, &sg, pad, blocksize);
  914. ret = crypto_ahash_init(areq);
  915. if (ret)
  916. return ret;
  917. req = ahash_request_ctx_dma(areq);
  918. req->hmac = true;
  919. req->last_req = true;
  920. ret = crypto_ahash_update(areq);
  921. ret = crypto_wait_req(ret, &result);
  922. return ret ?: crypto_ahash_export(areq, state);
  923. }
  924. static int __safexcel_hmac_setkey(const char *alg, const u8 *key,
  925. unsigned int keylen,
  926. void *istate, void *ostate)
  927. {
  928. struct ahash_request *areq;
  929. struct crypto_ahash *tfm;
  930. unsigned int blocksize;
  931. u8 *ipad, *opad;
  932. int ret;
  933. tfm = crypto_alloc_ahash(alg, 0, 0);
  934. if (IS_ERR(tfm))
  935. return PTR_ERR(tfm);
  936. areq = ahash_request_alloc(tfm, GFP_KERNEL);
  937. if (!areq) {
  938. ret = -ENOMEM;
  939. goto free_ahash;
  940. }
  941. crypto_ahash_clear_flags(tfm, ~0);
  942. blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
  943. ipad = kcalloc(2, blocksize, GFP_KERNEL);
  944. if (!ipad) {
  945. ret = -ENOMEM;
  946. goto free_request;
  947. }
  948. opad = ipad + blocksize;
  949. ret = safexcel_hmac_init_pad(areq, blocksize, key, keylen, ipad, opad);
  950. if (ret)
  951. goto free_ipad;
  952. ret = safexcel_hmac_init_iv(areq, blocksize, ipad, istate);
  953. if (ret)
  954. goto free_ipad;
  955. ret = safexcel_hmac_init_iv(areq, blocksize, opad, ostate);
  956. free_ipad:
  957. kfree(ipad);
  958. free_request:
  959. ahash_request_free(areq);
  960. free_ahash:
  961. crypto_free_ahash(tfm);
  962. return ret;
  963. }
  964. int safexcel_hmac_setkey(struct safexcel_context *base, const u8 *key,
  965. unsigned int keylen, const char *alg,
  966. unsigned int state_sz)
  967. {
  968. struct safexcel_crypto_priv *priv = base->priv;
  969. struct safexcel_ahash_export_state istate, ostate;
  970. int ret;
  971. ret = __safexcel_hmac_setkey(alg, key, keylen, &istate, &ostate);
  972. if (ret)
  973. return ret;
  974. if (priv->flags & EIP197_TRC_CACHE && base->ctxr &&
  975. (memcmp(&base->ipad, istate.state, state_sz) ||
  976. memcmp(&base->opad, ostate.state, state_sz)))
  977. base->needs_inv = true;
  978. memcpy(&base->ipad, &istate.state, state_sz);
  979. memcpy(&base->opad, &ostate.state, state_sz);
  980. return 0;
  981. }
  982. static int safexcel_hmac_alg_setkey(struct crypto_ahash *tfm, const u8 *key,
  983. unsigned int keylen, const char *alg,
  984. unsigned int state_sz)
  985. {
  986. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  987. return safexcel_hmac_setkey(&ctx->base, key, keylen, alg, state_sz);
  988. }
  989. static int safexcel_hmac_sha1_setkey(struct crypto_ahash *tfm, const u8 *key,
  990. unsigned int keylen)
  991. {
  992. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha1",
  993. SHA1_DIGEST_SIZE);
  994. }
  995. struct safexcel_alg_template safexcel_alg_hmac_sha1 = {
  996. .type = SAFEXCEL_ALG_TYPE_AHASH,
  997. .algo_mask = SAFEXCEL_ALG_SHA1,
  998. .alg.ahash = {
  999. .init = safexcel_hmac_sha1_init,
  1000. .update = safexcel_ahash_update,
  1001. .final = safexcel_ahash_final,
  1002. .finup = safexcel_ahash_finup,
  1003. .digest = safexcel_hmac_sha1_digest,
  1004. .setkey = safexcel_hmac_sha1_setkey,
  1005. .export = safexcel_ahash_export,
  1006. .import = safexcel_ahash_import,
  1007. .halg = {
  1008. .digestsize = SHA1_DIGEST_SIZE,
  1009. .statesize = sizeof(struct safexcel_ahash_export_state),
  1010. .base = {
  1011. .cra_name = "hmac(sha1)",
  1012. .cra_driver_name = "safexcel-hmac-sha1",
  1013. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1014. .cra_flags = CRYPTO_ALG_ASYNC |
  1015. CRYPTO_ALG_ALLOCATES_MEMORY |
  1016. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1017. .cra_blocksize = SHA1_BLOCK_SIZE,
  1018. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1019. .cra_init = safexcel_ahash_cra_init,
  1020. .cra_exit = safexcel_ahash_cra_exit,
  1021. .cra_module = THIS_MODULE,
  1022. },
  1023. },
  1024. },
  1025. };
  1026. static int safexcel_sha256_init(struct ahash_request *areq)
  1027. {
  1028. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1029. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1030. memset(req, 0, sizeof(*req));
  1031. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  1032. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1033. req->state_sz = SHA256_DIGEST_SIZE;
  1034. req->digest_sz = SHA256_DIGEST_SIZE;
  1035. req->block_sz = SHA256_BLOCK_SIZE;
  1036. return 0;
  1037. }
  1038. static int safexcel_sha256_digest(struct ahash_request *areq)
  1039. {
  1040. int ret = safexcel_sha256_init(areq);
  1041. if (ret)
  1042. return ret;
  1043. return safexcel_ahash_finup(areq);
  1044. }
  1045. struct safexcel_alg_template safexcel_alg_sha256 = {
  1046. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1047. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1048. .alg.ahash = {
  1049. .init = safexcel_sha256_init,
  1050. .update = safexcel_ahash_update,
  1051. .final = safexcel_ahash_final,
  1052. .finup = safexcel_ahash_finup,
  1053. .digest = safexcel_sha256_digest,
  1054. .export = safexcel_ahash_export,
  1055. .import = safexcel_ahash_import,
  1056. .halg = {
  1057. .digestsize = SHA256_DIGEST_SIZE,
  1058. .statesize = sizeof(struct safexcel_ahash_export_state),
  1059. .base = {
  1060. .cra_name = "sha256",
  1061. .cra_driver_name = "safexcel-sha256",
  1062. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1063. .cra_flags = CRYPTO_ALG_ASYNC |
  1064. CRYPTO_ALG_ALLOCATES_MEMORY |
  1065. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1066. .cra_blocksize = SHA256_BLOCK_SIZE,
  1067. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1068. .cra_init = safexcel_ahash_cra_init,
  1069. .cra_exit = safexcel_ahash_cra_exit,
  1070. .cra_module = THIS_MODULE,
  1071. },
  1072. },
  1073. },
  1074. };
  1075. static int safexcel_sha224_init(struct ahash_request *areq)
  1076. {
  1077. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1078. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1079. memset(req, 0, sizeof(*req));
  1080. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  1081. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1082. req->state_sz = SHA256_DIGEST_SIZE;
  1083. req->digest_sz = SHA256_DIGEST_SIZE;
  1084. req->block_sz = SHA256_BLOCK_SIZE;
  1085. return 0;
  1086. }
  1087. static int safexcel_sha224_digest(struct ahash_request *areq)
  1088. {
  1089. int ret = safexcel_sha224_init(areq);
  1090. if (ret)
  1091. return ret;
  1092. return safexcel_ahash_finup(areq);
  1093. }
  1094. struct safexcel_alg_template safexcel_alg_sha224 = {
  1095. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1096. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1097. .alg.ahash = {
  1098. .init = safexcel_sha224_init,
  1099. .update = safexcel_ahash_update,
  1100. .final = safexcel_ahash_final,
  1101. .finup = safexcel_ahash_finup,
  1102. .digest = safexcel_sha224_digest,
  1103. .export = safexcel_ahash_export,
  1104. .import = safexcel_ahash_import,
  1105. .halg = {
  1106. .digestsize = SHA224_DIGEST_SIZE,
  1107. .statesize = sizeof(struct safexcel_ahash_export_state),
  1108. .base = {
  1109. .cra_name = "sha224",
  1110. .cra_driver_name = "safexcel-sha224",
  1111. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1112. .cra_flags = CRYPTO_ALG_ASYNC |
  1113. CRYPTO_ALG_ALLOCATES_MEMORY |
  1114. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1115. .cra_blocksize = SHA224_BLOCK_SIZE,
  1116. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1117. .cra_init = safexcel_ahash_cra_init,
  1118. .cra_exit = safexcel_ahash_cra_exit,
  1119. .cra_module = THIS_MODULE,
  1120. },
  1121. },
  1122. },
  1123. };
  1124. static int safexcel_hmac_sha224_setkey(struct crypto_ahash *tfm, const u8 *key,
  1125. unsigned int keylen)
  1126. {
  1127. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha224",
  1128. SHA256_DIGEST_SIZE);
  1129. }
  1130. static int safexcel_hmac_sha224_init(struct ahash_request *areq)
  1131. {
  1132. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1133. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1134. memset(req, 0, sizeof(*req));
  1135. /* Start from ipad precompute */
  1136. memcpy(req->state, &ctx->base.ipad, SHA256_DIGEST_SIZE);
  1137. /* Already processed the key^ipad part now! */
  1138. req->len = SHA256_BLOCK_SIZE;
  1139. req->processed = SHA256_BLOCK_SIZE;
  1140. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
  1141. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1142. req->state_sz = SHA256_DIGEST_SIZE;
  1143. req->digest_sz = SHA256_DIGEST_SIZE;
  1144. req->block_sz = SHA256_BLOCK_SIZE;
  1145. req->hmac = true;
  1146. return 0;
  1147. }
  1148. static int safexcel_hmac_sha224_digest(struct ahash_request *areq)
  1149. {
  1150. int ret = safexcel_hmac_sha224_init(areq);
  1151. if (ret)
  1152. return ret;
  1153. return safexcel_ahash_finup(areq);
  1154. }
  1155. struct safexcel_alg_template safexcel_alg_hmac_sha224 = {
  1156. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1157. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1158. .alg.ahash = {
  1159. .init = safexcel_hmac_sha224_init,
  1160. .update = safexcel_ahash_update,
  1161. .final = safexcel_ahash_final,
  1162. .finup = safexcel_ahash_finup,
  1163. .digest = safexcel_hmac_sha224_digest,
  1164. .setkey = safexcel_hmac_sha224_setkey,
  1165. .export = safexcel_ahash_export,
  1166. .import = safexcel_ahash_import,
  1167. .halg = {
  1168. .digestsize = SHA224_DIGEST_SIZE,
  1169. .statesize = sizeof(struct safexcel_ahash_export_state),
  1170. .base = {
  1171. .cra_name = "hmac(sha224)",
  1172. .cra_driver_name = "safexcel-hmac-sha224",
  1173. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1174. .cra_flags = CRYPTO_ALG_ASYNC |
  1175. CRYPTO_ALG_ALLOCATES_MEMORY |
  1176. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1177. .cra_blocksize = SHA224_BLOCK_SIZE,
  1178. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1179. .cra_init = safexcel_ahash_cra_init,
  1180. .cra_exit = safexcel_ahash_cra_exit,
  1181. .cra_module = THIS_MODULE,
  1182. },
  1183. },
  1184. },
  1185. };
  1186. static int safexcel_hmac_sha256_setkey(struct crypto_ahash *tfm, const u8 *key,
  1187. unsigned int keylen)
  1188. {
  1189. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha256",
  1190. SHA256_DIGEST_SIZE);
  1191. }
  1192. static int safexcel_hmac_sha256_init(struct ahash_request *areq)
  1193. {
  1194. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1195. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1196. memset(req, 0, sizeof(*req));
  1197. /* Start from ipad precompute */
  1198. memcpy(req->state, &ctx->base.ipad, SHA256_DIGEST_SIZE);
  1199. /* Already processed the key^ipad part now! */
  1200. req->len = SHA256_BLOCK_SIZE;
  1201. req->processed = SHA256_BLOCK_SIZE;
  1202. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
  1203. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1204. req->state_sz = SHA256_DIGEST_SIZE;
  1205. req->digest_sz = SHA256_DIGEST_SIZE;
  1206. req->block_sz = SHA256_BLOCK_SIZE;
  1207. req->hmac = true;
  1208. return 0;
  1209. }
  1210. static int safexcel_hmac_sha256_digest(struct ahash_request *areq)
  1211. {
  1212. int ret = safexcel_hmac_sha256_init(areq);
  1213. if (ret)
  1214. return ret;
  1215. return safexcel_ahash_finup(areq);
  1216. }
  1217. struct safexcel_alg_template safexcel_alg_hmac_sha256 = {
  1218. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1219. .algo_mask = SAFEXCEL_ALG_SHA2_256,
  1220. .alg.ahash = {
  1221. .init = safexcel_hmac_sha256_init,
  1222. .update = safexcel_ahash_update,
  1223. .final = safexcel_ahash_final,
  1224. .finup = safexcel_ahash_finup,
  1225. .digest = safexcel_hmac_sha256_digest,
  1226. .setkey = safexcel_hmac_sha256_setkey,
  1227. .export = safexcel_ahash_export,
  1228. .import = safexcel_ahash_import,
  1229. .halg = {
  1230. .digestsize = SHA256_DIGEST_SIZE,
  1231. .statesize = sizeof(struct safexcel_ahash_export_state),
  1232. .base = {
  1233. .cra_name = "hmac(sha256)",
  1234. .cra_driver_name = "safexcel-hmac-sha256",
  1235. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1236. .cra_flags = CRYPTO_ALG_ASYNC |
  1237. CRYPTO_ALG_ALLOCATES_MEMORY |
  1238. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1239. .cra_blocksize = SHA256_BLOCK_SIZE,
  1240. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1241. .cra_init = safexcel_ahash_cra_init,
  1242. .cra_exit = safexcel_ahash_cra_exit,
  1243. .cra_module = THIS_MODULE,
  1244. },
  1245. },
  1246. },
  1247. };
  1248. static int safexcel_sha512_init(struct ahash_request *areq)
  1249. {
  1250. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1251. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1252. memset(req, 0, sizeof(*req));
  1253. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
  1254. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1255. req->state_sz = SHA512_DIGEST_SIZE;
  1256. req->digest_sz = SHA512_DIGEST_SIZE;
  1257. req->block_sz = SHA512_BLOCK_SIZE;
  1258. return 0;
  1259. }
  1260. static int safexcel_sha512_digest(struct ahash_request *areq)
  1261. {
  1262. int ret = safexcel_sha512_init(areq);
  1263. if (ret)
  1264. return ret;
  1265. return safexcel_ahash_finup(areq);
  1266. }
  1267. struct safexcel_alg_template safexcel_alg_sha512 = {
  1268. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1269. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1270. .alg.ahash = {
  1271. .init = safexcel_sha512_init,
  1272. .update = safexcel_ahash_update,
  1273. .final = safexcel_ahash_final,
  1274. .finup = safexcel_ahash_finup,
  1275. .digest = safexcel_sha512_digest,
  1276. .export = safexcel_ahash_export,
  1277. .import = safexcel_ahash_import,
  1278. .halg = {
  1279. .digestsize = SHA512_DIGEST_SIZE,
  1280. .statesize = sizeof(struct safexcel_ahash_export_state),
  1281. .base = {
  1282. .cra_name = "sha512",
  1283. .cra_driver_name = "safexcel-sha512",
  1284. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1285. .cra_flags = CRYPTO_ALG_ASYNC |
  1286. CRYPTO_ALG_ALLOCATES_MEMORY |
  1287. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1288. .cra_blocksize = SHA512_BLOCK_SIZE,
  1289. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1290. .cra_init = safexcel_ahash_cra_init,
  1291. .cra_exit = safexcel_ahash_cra_exit,
  1292. .cra_module = THIS_MODULE,
  1293. },
  1294. },
  1295. },
  1296. };
  1297. static int safexcel_sha384_init(struct ahash_request *areq)
  1298. {
  1299. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1300. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1301. memset(req, 0, sizeof(*req));
  1302. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
  1303. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1304. req->state_sz = SHA512_DIGEST_SIZE;
  1305. req->digest_sz = SHA512_DIGEST_SIZE;
  1306. req->block_sz = SHA512_BLOCK_SIZE;
  1307. return 0;
  1308. }
  1309. static int safexcel_sha384_digest(struct ahash_request *areq)
  1310. {
  1311. int ret = safexcel_sha384_init(areq);
  1312. if (ret)
  1313. return ret;
  1314. return safexcel_ahash_finup(areq);
  1315. }
  1316. struct safexcel_alg_template safexcel_alg_sha384 = {
  1317. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1318. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1319. .alg.ahash = {
  1320. .init = safexcel_sha384_init,
  1321. .update = safexcel_ahash_update,
  1322. .final = safexcel_ahash_final,
  1323. .finup = safexcel_ahash_finup,
  1324. .digest = safexcel_sha384_digest,
  1325. .export = safexcel_ahash_export,
  1326. .import = safexcel_ahash_import,
  1327. .halg = {
  1328. .digestsize = SHA384_DIGEST_SIZE,
  1329. .statesize = sizeof(struct safexcel_ahash_export_state),
  1330. .base = {
  1331. .cra_name = "sha384",
  1332. .cra_driver_name = "safexcel-sha384",
  1333. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1334. .cra_flags = CRYPTO_ALG_ASYNC |
  1335. CRYPTO_ALG_ALLOCATES_MEMORY |
  1336. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1337. .cra_blocksize = SHA384_BLOCK_SIZE,
  1338. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1339. .cra_init = safexcel_ahash_cra_init,
  1340. .cra_exit = safexcel_ahash_cra_exit,
  1341. .cra_module = THIS_MODULE,
  1342. },
  1343. },
  1344. },
  1345. };
  1346. static int safexcel_hmac_sha512_setkey(struct crypto_ahash *tfm, const u8 *key,
  1347. unsigned int keylen)
  1348. {
  1349. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha512",
  1350. SHA512_DIGEST_SIZE);
  1351. }
  1352. static int safexcel_hmac_sha512_init(struct ahash_request *areq)
  1353. {
  1354. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1355. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1356. memset(req, 0, sizeof(*req));
  1357. /* Start from ipad precompute */
  1358. memcpy(req->state, &ctx->base.ipad, SHA512_DIGEST_SIZE);
  1359. /* Already processed the key^ipad part now! */
  1360. req->len = SHA512_BLOCK_SIZE;
  1361. req->processed = SHA512_BLOCK_SIZE;
  1362. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
  1363. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1364. req->state_sz = SHA512_DIGEST_SIZE;
  1365. req->digest_sz = SHA512_DIGEST_SIZE;
  1366. req->block_sz = SHA512_BLOCK_SIZE;
  1367. req->hmac = true;
  1368. return 0;
  1369. }
  1370. static int safexcel_hmac_sha512_digest(struct ahash_request *areq)
  1371. {
  1372. int ret = safexcel_hmac_sha512_init(areq);
  1373. if (ret)
  1374. return ret;
  1375. return safexcel_ahash_finup(areq);
  1376. }
  1377. struct safexcel_alg_template safexcel_alg_hmac_sha512 = {
  1378. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1379. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1380. .alg.ahash = {
  1381. .init = safexcel_hmac_sha512_init,
  1382. .update = safexcel_ahash_update,
  1383. .final = safexcel_ahash_final,
  1384. .finup = safexcel_ahash_finup,
  1385. .digest = safexcel_hmac_sha512_digest,
  1386. .setkey = safexcel_hmac_sha512_setkey,
  1387. .export = safexcel_ahash_export,
  1388. .import = safexcel_ahash_import,
  1389. .halg = {
  1390. .digestsize = SHA512_DIGEST_SIZE,
  1391. .statesize = sizeof(struct safexcel_ahash_export_state),
  1392. .base = {
  1393. .cra_name = "hmac(sha512)",
  1394. .cra_driver_name = "safexcel-hmac-sha512",
  1395. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1396. .cra_flags = CRYPTO_ALG_ASYNC |
  1397. CRYPTO_ALG_ALLOCATES_MEMORY |
  1398. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1399. .cra_blocksize = SHA512_BLOCK_SIZE,
  1400. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1401. .cra_init = safexcel_ahash_cra_init,
  1402. .cra_exit = safexcel_ahash_cra_exit,
  1403. .cra_module = THIS_MODULE,
  1404. },
  1405. },
  1406. },
  1407. };
  1408. static int safexcel_hmac_sha384_setkey(struct crypto_ahash *tfm, const u8 *key,
  1409. unsigned int keylen)
  1410. {
  1411. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha384",
  1412. SHA512_DIGEST_SIZE);
  1413. }
  1414. static int safexcel_hmac_sha384_init(struct ahash_request *areq)
  1415. {
  1416. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1417. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1418. memset(req, 0, sizeof(*req));
  1419. /* Start from ipad precompute */
  1420. memcpy(req->state, &ctx->base.ipad, SHA512_DIGEST_SIZE);
  1421. /* Already processed the key^ipad part now! */
  1422. req->len = SHA512_BLOCK_SIZE;
  1423. req->processed = SHA512_BLOCK_SIZE;
  1424. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
  1425. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1426. req->state_sz = SHA512_DIGEST_SIZE;
  1427. req->digest_sz = SHA512_DIGEST_SIZE;
  1428. req->block_sz = SHA512_BLOCK_SIZE;
  1429. req->hmac = true;
  1430. return 0;
  1431. }
  1432. static int safexcel_hmac_sha384_digest(struct ahash_request *areq)
  1433. {
  1434. int ret = safexcel_hmac_sha384_init(areq);
  1435. if (ret)
  1436. return ret;
  1437. return safexcel_ahash_finup(areq);
  1438. }
  1439. struct safexcel_alg_template safexcel_alg_hmac_sha384 = {
  1440. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1441. .algo_mask = SAFEXCEL_ALG_SHA2_512,
  1442. .alg.ahash = {
  1443. .init = safexcel_hmac_sha384_init,
  1444. .update = safexcel_ahash_update,
  1445. .final = safexcel_ahash_final,
  1446. .finup = safexcel_ahash_finup,
  1447. .digest = safexcel_hmac_sha384_digest,
  1448. .setkey = safexcel_hmac_sha384_setkey,
  1449. .export = safexcel_ahash_export,
  1450. .import = safexcel_ahash_import,
  1451. .halg = {
  1452. .digestsize = SHA384_DIGEST_SIZE,
  1453. .statesize = sizeof(struct safexcel_ahash_export_state),
  1454. .base = {
  1455. .cra_name = "hmac(sha384)",
  1456. .cra_driver_name = "safexcel-hmac-sha384",
  1457. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1458. .cra_flags = CRYPTO_ALG_ASYNC |
  1459. CRYPTO_ALG_ALLOCATES_MEMORY |
  1460. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1461. .cra_blocksize = SHA384_BLOCK_SIZE,
  1462. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1463. .cra_init = safexcel_ahash_cra_init,
  1464. .cra_exit = safexcel_ahash_cra_exit,
  1465. .cra_module = THIS_MODULE,
  1466. },
  1467. },
  1468. },
  1469. };
  1470. static int safexcel_md5_init(struct ahash_request *areq)
  1471. {
  1472. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1473. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1474. memset(req, 0, sizeof(*req));
  1475. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
  1476. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1477. req->state_sz = MD5_DIGEST_SIZE;
  1478. req->digest_sz = MD5_DIGEST_SIZE;
  1479. req->block_sz = MD5_HMAC_BLOCK_SIZE;
  1480. return 0;
  1481. }
  1482. static int safexcel_md5_digest(struct ahash_request *areq)
  1483. {
  1484. int ret = safexcel_md5_init(areq);
  1485. if (ret)
  1486. return ret;
  1487. return safexcel_ahash_finup(areq);
  1488. }
  1489. struct safexcel_alg_template safexcel_alg_md5 = {
  1490. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1491. .algo_mask = SAFEXCEL_ALG_MD5,
  1492. .alg.ahash = {
  1493. .init = safexcel_md5_init,
  1494. .update = safexcel_ahash_update,
  1495. .final = safexcel_ahash_final,
  1496. .finup = safexcel_ahash_finup,
  1497. .digest = safexcel_md5_digest,
  1498. .export = safexcel_ahash_export,
  1499. .import = safexcel_ahash_import,
  1500. .halg = {
  1501. .digestsize = MD5_DIGEST_SIZE,
  1502. .statesize = sizeof(struct safexcel_ahash_export_state),
  1503. .base = {
  1504. .cra_name = "md5",
  1505. .cra_driver_name = "safexcel-md5",
  1506. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1507. .cra_flags = CRYPTO_ALG_ASYNC |
  1508. CRYPTO_ALG_ALLOCATES_MEMORY |
  1509. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1510. .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
  1511. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1512. .cra_init = safexcel_ahash_cra_init,
  1513. .cra_exit = safexcel_ahash_cra_exit,
  1514. .cra_module = THIS_MODULE,
  1515. },
  1516. },
  1517. },
  1518. };
  1519. static int safexcel_hmac_md5_init(struct ahash_request *areq)
  1520. {
  1521. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1522. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1523. memset(req, 0, sizeof(*req));
  1524. /* Start from ipad precompute */
  1525. memcpy(req->state, &ctx->base.ipad, MD5_DIGEST_SIZE);
  1526. /* Already processed the key^ipad part now! */
  1527. req->len = MD5_HMAC_BLOCK_SIZE;
  1528. req->processed = MD5_HMAC_BLOCK_SIZE;
  1529. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
  1530. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1531. req->state_sz = MD5_DIGEST_SIZE;
  1532. req->digest_sz = MD5_DIGEST_SIZE;
  1533. req->block_sz = MD5_HMAC_BLOCK_SIZE;
  1534. req->len_is_le = true; /* MD5 is little endian! ... */
  1535. req->hmac = true;
  1536. return 0;
  1537. }
  1538. static int safexcel_hmac_md5_setkey(struct crypto_ahash *tfm, const u8 *key,
  1539. unsigned int keylen)
  1540. {
  1541. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-md5",
  1542. MD5_DIGEST_SIZE);
  1543. }
  1544. static int safexcel_hmac_md5_digest(struct ahash_request *areq)
  1545. {
  1546. int ret = safexcel_hmac_md5_init(areq);
  1547. if (ret)
  1548. return ret;
  1549. return safexcel_ahash_finup(areq);
  1550. }
  1551. struct safexcel_alg_template safexcel_alg_hmac_md5 = {
  1552. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1553. .algo_mask = SAFEXCEL_ALG_MD5,
  1554. .alg.ahash = {
  1555. .init = safexcel_hmac_md5_init,
  1556. .update = safexcel_ahash_update,
  1557. .final = safexcel_ahash_final,
  1558. .finup = safexcel_ahash_finup,
  1559. .digest = safexcel_hmac_md5_digest,
  1560. .setkey = safexcel_hmac_md5_setkey,
  1561. .export = safexcel_ahash_export,
  1562. .import = safexcel_ahash_import,
  1563. .halg = {
  1564. .digestsize = MD5_DIGEST_SIZE,
  1565. .statesize = sizeof(struct safexcel_ahash_export_state),
  1566. .base = {
  1567. .cra_name = "hmac(md5)",
  1568. .cra_driver_name = "safexcel-hmac-md5",
  1569. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1570. .cra_flags = CRYPTO_ALG_ASYNC |
  1571. CRYPTO_ALG_ALLOCATES_MEMORY |
  1572. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1573. .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
  1574. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1575. .cra_init = safexcel_ahash_cra_init,
  1576. .cra_exit = safexcel_ahash_cra_exit,
  1577. .cra_module = THIS_MODULE,
  1578. },
  1579. },
  1580. },
  1581. };
  1582. static int safexcel_cbcmac_init(struct ahash_request *areq)
  1583. {
  1584. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1585. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1586. memset(req, 0, sizeof(*req));
  1587. /* Start from loaded keys */
  1588. memcpy(req->state, &ctx->base.ipad, ctx->key_sz);
  1589. /* Set processed to non-zero to enable invalidation detection */
  1590. req->len = AES_BLOCK_SIZE;
  1591. req->processed = AES_BLOCK_SIZE;
  1592. req->digest = CONTEXT_CONTROL_DIGEST_XCM;
  1593. req->state_sz = ctx->key_sz;
  1594. req->digest_sz = AES_BLOCK_SIZE;
  1595. req->block_sz = AES_BLOCK_SIZE;
  1596. req->xcbcmac = true;
  1597. return 0;
  1598. }
  1599. static int safexcel_cbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1600. unsigned int len)
  1601. {
  1602. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1603. struct crypto_aes_ctx aes;
  1604. int ret, i;
  1605. ret = aes_expandkey(&aes, key, len);
  1606. if (ret)
  1607. return ret;
  1608. memset(&ctx->base.ipad, 0, 2 * AES_BLOCK_SIZE);
  1609. for (i = 0; i < len / sizeof(u32); i++)
  1610. ctx->base.ipad.be[i + 8] = cpu_to_be32(aes.key_enc[i]);
  1611. if (len == AES_KEYSIZE_192) {
  1612. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC192;
  1613. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1614. } else if (len == AES_KEYSIZE_256) {
  1615. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC256;
  1616. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1617. } else {
  1618. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1619. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1620. }
  1621. ctx->cbcmac = true;
  1622. memzero_explicit(&aes, sizeof(aes));
  1623. return 0;
  1624. }
  1625. static int safexcel_cbcmac_digest(struct ahash_request *areq)
  1626. {
  1627. return safexcel_cbcmac_init(areq) ?: safexcel_ahash_finup(areq);
  1628. }
  1629. struct safexcel_alg_template safexcel_alg_cbcmac = {
  1630. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1631. .algo_mask = 0,
  1632. .alg.ahash = {
  1633. .init = safexcel_cbcmac_init,
  1634. .update = safexcel_ahash_update,
  1635. .final = safexcel_ahash_final,
  1636. .finup = safexcel_ahash_finup,
  1637. .digest = safexcel_cbcmac_digest,
  1638. .setkey = safexcel_cbcmac_setkey,
  1639. .export = safexcel_ahash_export,
  1640. .import = safexcel_ahash_import,
  1641. .halg = {
  1642. .digestsize = AES_BLOCK_SIZE,
  1643. .statesize = sizeof(struct safexcel_ahash_export_state),
  1644. .base = {
  1645. .cra_name = "cbcmac(aes)",
  1646. .cra_driver_name = "safexcel-cbcmac-aes",
  1647. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1648. .cra_flags = CRYPTO_ALG_ASYNC |
  1649. CRYPTO_ALG_ALLOCATES_MEMORY |
  1650. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1651. .cra_blocksize = AES_BLOCK_SIZE,
  1652. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1653. .cra_init = safexcel_ahash_cra_init,
  1654. .cra_exit = safexcel_ahash_cra_exit,
  1655. .cra_module = THIS_MODULE,
  1656. },
  1657. },
  1658. },
  1659. };
  1660. static int safexcel_xcbcmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1661. unsigned int len)
  1662. {
  1663. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1664. u32 key_tmp[3 * AES_BLOCK_SIZE / sizeof(u32)];
  1665. int ret, i;
  1666. ret = aes_prepareenckey(ctx->aes, key, len);
  1667. if (ret)
  1668. return ret;
  1669. /* precompute the XCBC key material */
  1670. aes_encrypt(ctx->aes, (u8 *)key_tmp + 2 * AES_BLOCK_SIZE,
  1671. "\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1\x1");
  1672. aes_encrypt(ctx->aes, (u8 *)key_tmp,
  1673. "\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2\x2");
  1674. aes_encrypt(ctx->aes, (u8 *)key_tmp + AES_BLOCK_SIZE,
  1675. "\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3\x3");
  1676. for (i = 0; i < 3 * AES_BLOCK_SIZE / sizeof(u32); i++)
  1677. ctx->base.ipad.word[i] = swab32(key_tmp[i]);
  1678. ret = aes_prepareenckey(ctx->aes,
  1679. (u8 *)key_tmp + 2 * AES_BLOCK_SIZE,
  1680. AES_MIN_KEY_SIZE);
  1681. if (ret)
  1682. return ret;
  1683. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1684. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1685. ctx->cbcmac = false;
  1686. return 0;
  1687. }
  1688. static int safexcel_xcbcmac_cra_init(struct crypto_tfm *tfm)
  1689. {
  1690. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1691. safexcel_ahash_cra_init(tfm);
  1692. ctx->aes = kmalloc_obj(*ctx->aes);
  1693. return ctx->aes == NULL ? -ENOMEM : 0;
  1694. }
  1695. static void safexcel_xcbcmac_cra_exit(struct crypto_tfm *tfm)
  1696. {
  1697. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  1698. kfree(ctx->aes);
  1699. safexcel_ahash_cra_exit(tfm);
  1700. }
  1701. struct safexcel_alg_template safexcel_alg_xcbcmac = {
  1702. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1703. .algo_mask = 0,
  1704. .alg.ahash = {
  1705. .init = safexcel_cbcmac_init,
  1706. .update = safexcel_ahash_update,
  1707. .final = safexcel_ahash_final,
  1708. .finup = safexcel_ahash_finup,
  1709. .digest = safexcel_cbcmac_digest,
  1710. .setkey = safexcel_xcbcmac_setkey,
  1711. .export = safexcel_ahash_export,
  1712. .import = safexcel_ahash_import,
  1713. .halg = {
  1714. .digestsize = AES_BLOCK_SIZE,
  1715. .statesize = sizeof(struct safexcel_ahash_export_state),
  1716. .base = {
  1717. .cra_name = "xcbc(aes)",
  1718. .cra_driver_name = "safexcel-xcbc-aes",
  1719. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1720. .cra_flags = CRYPTO_ALG_ASYNC |
  1721. CRYPTO_ALG_ALLOCATES_MEMORY |
  1722. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1723. .cra_blocksize = AES_BLOCK_SIZE,
  1724. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1725. .cra_init = safexcel_xcbcmac_cra_init,
  1726. .cra_exit = safexcel_xcbcmac_cra_exit,
  1727. .cra_module = THIS_MODULE,
  1728. },
  1729. },
  1730. },
  1731. };
  1732. static int safexcel_cmac_setkey(struct crypto_ahash *tfm, const u8 *key,
  1733. unsigned int len)
  1734. {
  1735. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
  1736. __be64 consts[4];
  1737. u64 _const[2];
  1738. u8 msb_mask, gfmask;
  1739. int ret, i;
  1740. /* precompute the CMAC key material */
  1741. ret = aes_prepareenckey(ctx->aes, key, len);
  1742. if (ret)
  1743. return ret;
  1744. for (i = 0; i < len / sizeof(u32); i++)
  1745. ctx->base.ipad.word[i + 8] = get_unaligned_be32(&key[4 * i]);
  1746. /* code below borrowed from crypto/cmac.c */
  1747. /* encrypt the zero block */
  1748. memset(consts, 0, AES_BLOCK_SIZE);
  1749. aes_encrypt(ctx->aes, (u8 *)consts, (u8 *)consts);
  1750. gfmask = 0x87;
  1751. _const[0] = be64_to_cpu(consts[1]);
  1752. _const[1] = be64_to_cpu(consts[0]);
  1753. /* gf(2^128) multiply zero-ciphertext with u and u^2 */
  1754. for (i = 0; i < 4; i += 2) {
  1755. msb_mask = ((s64)_const[1] >> 63) & gfmask;
  1756. _const[1] = (_const[1] << 1) | (_const[0] >> 63);
  1757. _const[0] = (_const[0] << 1) ^ msb_mask;
  1758. consts[i + 0] = cpu_to_be64(_const[1]);
  1759. consts[i + 1] = cpu_to_be64(_const[0]);
  1760. }
  1761. /* end of code borrowed from crypto/cmac.c */
  1762. for (i = 0; i < 2 * AES_BLOCK_SIZE / sizeof(u32); i++)
  1763. ctx->base.ipad.be[i] = cpu_to_be32(((u32 *)consts)[i]);
  1764. if (len == AES_KEYSIZE_192) {
  1765. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC192;
  1766. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1767. } else if (len == AES_KEYSIZE_256) {
  1768. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC256;
  1769. ctx->key_sz = AES_MAX_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1770. } else {
  1771. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_XCBC128;
  1772. ctx->key_sz = AES_MIN_KEY_SIZE + 2 * AES_BLOCK_SIZE;
  1773. }
  1774. ctx->cbcmac = false;
  1775. return 0;
  1776. }
  1777. struct safexcel_alg_template safexcel_alg_cmac = {
  1778. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1779. .algo_mask = 0,
  1780. .alg.ahash = {
  1781. .init = safexcel_cbcmac_init,
  1782. .update = safexcel_ahash_update,
  1783. .final = safexcel_ahash_final,
  1784. .finup = safexcel_ahash_finup,
  1785. .digest = safexcel_cbcmac_digest,
  1786. .setkey = safexcel_cmac_setkey,
  1787. .export = safexcel_ahash_export,
  1788. .import = safexcel_ahash_import,
  1789. .halg = {
  1790. .digestsize = AES_BLOCK_SIZE,
  1791. .statesize = sizeof(struct safexcel_ahash_export_state),
  1792. .base = {
  1793. .cra_name = "cmac(aes)",
  1794. .cra_driver_name = "safexcel-cmac-aes",
  1795. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1796. .cra_flags = CRYPTO_ALG_ASYNC |
  1797. CRYPTO_ALG_ALLOCATES_MEMORY |
  1798. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1799. .cra_blocksize = AES_BLOCK_SIZE,
  1800. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1801. .cra_init = safexcel_xcbcmac_cra_init,
  1802. .cra_exit = safexcel_xcbcmac_cra_exit,
  1803. .cra_module = THIS_MODULE,
  1804. },
  1805. },
  1806. },
  1807. };
  1808. static int safexcel_sm3_init(struct ahash_request *areq)
  1809. {
  1810. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1811. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1812. memset(req, 0, sizeof(*req));
  1813. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SM3;
  1814. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1815. req->state_sz = SM3_DIGEST_SIZE;
  1816. req->digest_sz = SM3_DIGEST_SIZE;
  1817. req->block_sz = SM3_BLOCK_SIZE;
  1818. return 0;
  1819. }
  1820. static int safexcel_sm3_digest(struct ahash_request *areq)
  1821. {
  1822. int ret = safexcel_sm3_init(areq);
  1823. if (ret)
  1824. return ret;
  1825. return safexcel_ahash_finup(areq);
  1826. }
  1827. struct safexcel_alg_template safexcel_alg_sm3 = {
  1828. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1829. .algo_mask = SAFEXCEL_ALG_SM3,
  1830. .alg.ahash = {
  1831. .init = safexcel_sm3_init,
  1832. .update = safexcel_ahash_update,
  1833. .final = safexcel_ahash_final,
  1834. .finup = safexcel_ahash_finup,
  1835. .digest = safexcel_sm3_digest,
  1836. .export = safexcel_ahash_export,
  1837. .import = safexcel_ahash_import,
  1838. .halg = {
  1839. .digestsize = SM3_DIGEST_SIZE,
  1840. .statesize = sizeof(struct safexcel_ahash_export_state),
  1841. .base = {
  1842. .cra_name = "sm3",
  1843. .cra_driver_name = "safexcel-sm3",
  1844. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1845. .cra_flags = CRYPTO_ALG_ASYNC |
  1846. CRYPTO_ALG_ALLOCATES_MEMORY |
  1847. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1848. .cra_blocksize = SM3_BLOCK_SIZE,
  1849. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1850. .cra_init = safexcel_ahash_cra_init,
  1851. .cra_exit = safexcel_ahash_cra_exit,
  1852. .cra_module = THIS_MODULE,
  1853. },
  1854. },
  1855. },
  1856. };
  1857. static int safexcel_hmac_sm3_setkey(struct crypto_ahash *tfm, const u8 *key,
  1858. unsigned int keylen)
  1859. {
  1860. return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sm3",
  1861. SM3_DIGEST_SIZE);
  1862. }
  1863. static int safexcel_hmac_sm3_init(struct ahash_request *areq)
  1864. {
  1865. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
  1866. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1867. memset(req, 0, sizeof(*req));
  1868. /* Start from ipad precompute */
  1869. memcpy(req->state, &ctx->base.ipad, SM3_DIGEST_SIZE);
  1870. /* Already processed the key^ipad part now! */
  1871. req->len = SM3_BLOCK_SIZE;
  1872. req->processed = SM3_BLOCK_SIZE;
  1873. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SM3;
  1874. req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
  1875. req->state_sz = SM3_DIGEST_SIZE;
  1876. req->digest_sz = SM3_DIGEST_SIZE;
  1877. req->block_sz = SM3_BLOCK_SIZE;
  1878. req->hmac = true;
  1879. return 0;
  1880. }
  1881. static int safexcel_hmac_sm3_digest(struct ahash_request *areq)
  1882. {
  1883. int ret = safexcel_hmac_sm3_init(areq);
  1884. if (ret)
  1885. return ret;
  1886. return safexcel_ahash_finup(areq);
  1887. }
  1888. struct safexcel_alg_template safexcel_alg_hmac_sm3 = {
  1889. .type = SAFEXCEL_ALG_TYPE_AHASH,
  1890. .algo_mask = SAFEXCEL_ALG_SM3,
  1891. .alg.ahash = {
  1892. .init = safexcel_hmac_sm3_init,
  1893. .update = safexcel_ahash_update,
  1894. .final = safexcel_ahash_final,
  1895. .finup = safexcel_ahash_finup,
  1896. .digest = safexcel_hmac_sm3_digest,
  1897. .setkey = safexcel_hmac_sm3_setkey,
  1898. .export = safexcel_ahash_export,
  1899. .import = safexcel_ahash_import,
  1900. .halg = {
  1901. .digestsize = SM3_DIGEST_SIZE,
  1902. .statesize = sizeof(struct safexcel_ahash_export_state),
  1903. .base = {
  1904. .cra_name = "hmac(sm3)",
  1905. .cra_driver_name = "safexcel-hmac-sm3",
  1906. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  1907. .cra_flags = CRYPTO_ALG_ASYNC |
  1908. CRYPTO_ALG_ALLOCATES_MEMORY |
  1909. CRYPTO_ALG_KERN_DRIVER_ONLY,
  1910. .cra_blocksize = SM3_BLOCK_SIZE,
  1911. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  1912. .cra_init = safexcel_ahash_cra_init,
  1913. .cra_exit = safexcel_ahash_cra_exit,
  1914. .cra_module = THIS_MODULE,
  1915. },
  1916. },
  1917. },
  1918. };
  1919. static int safexcel_sha3_224_init(struct ahash_request *areq)
  1920. {
  1921. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  1922. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1923. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  1924. memset(req, 0, sizeof(*req));
  1925. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224;
  1926. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  1927. req->state_sz = SHA3_224_DIGEST_SIZE;
  1928. req->digest_sz = SHA3_224_DIGEST_SIZE;
  1929. req->block_sz = SHA3_224_BLOCK_SIZE;
  1930. ctx->do_fallback = false;
  1931. ctx->fb_init_done = false;
  1932. return 0;
  1933. }
  1934. static int safexcel_sha3_fbcheck(struct ahash_request *req)
  1935. {
  1936. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1937. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1938. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  1939. int ret = 0;
  1940. if (ctx->do_fallback) {
  1941. ahash_request_set_tfm(subreq, ctx->fback);
  1942. ahash_request_set_callback(subreq, req->base.flags,
  1943. req->base.complete, req->base.data);
  1944. ahash_request_set_crypt(subreq, req->src, req->result,
  1945. req->nbytes);
  1946. if (!ctx->fb_init_done) {
  1947. if (ctx->fb_do_setkey) {
  1948. /* Set fallback cipher HMAC key */
  1949. u8 key[SHA3_224_BLOCK_SIZE];
  1950. memcpy(key, &ctx->base.ipad,
  1951. crypto_ahash_blocksize(ctx->fback) / 2);
  1952. memcpy(key +
  1953. crypto_ahash_blocksize(ctx->fback) / 2,
  1954. &ctx->base.opad,
  1955. crypto_ahash_blocksize(ctx->fback) / 2);
  1956. ret = crypto_ahash_setkey(ctx->fback, key,
  1957. crypto_ahash_blocksize(ctx->fback));
  1958. memzero_explicit(key,
  1959. crypto_ahash_blocksize(ctx->fback));
  1960. ctx->fb_do_setkey = false;
  1961. }
  1962. ret = ret ?: crypto_ahash_init(subreq);
  1963. ctx->fb_init_done = true;
  1964. }
  1965. }
  1966. return ret;
  1967. }
  1968. static int safexcel_sha3_update(struct ahash_request *req)
  1969. {
  1970. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1971. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1972. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  1973. ctx->do_fallback = true;
  1974. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_update(subreq);
  1975. }
  1976. static int safexcel_sha3_final(struct ahash_request *req)
  1977. {
  1978. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1979. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1980. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  1981. ctx->do_fallback = true;
  1982. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_final(subreq);
  1983. }
  1984. static int safexcel_sha3_finup(struct ahash_request *req)
  1985. {
  1986. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  1987. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  1988. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  1989. ctx->do_fallback |= !req->nbytes;
  1990. if (ctx->do_fallback)
  1991. /* Update or ex/import happened or len 0, cannot use the HW */
  1992. return safexcel_sha3_fbcheck(req) ?:
  1993. crypto_ahash_finup(subreq);
  1994. else
  1995. return safexcel_ahash_finup(req);
  1996. }
  1997. static int safexcel_sha3_digest_fallback(struct ahash_request *req)
  1998. {
  1999. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2000. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2001. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2002. ctx->do_fallback = true;
  2003. ctx->fb_init_done = false;
  2004. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_finup(subreq);
  2005. }
  2006. static int safexcel_sha3_224_digest(struct ahash_request *req)
  2007. {
  2008. if (req->nbytes)
  2009. return safexcel_sha3_224_init(req) ?: safexcel_ahash_finup(req);
  2010. /* HW cannot do zero length hash, use fallback instead */
  2011. return safexcel_sha3_digest_fallback(req);
  2012. }
  2013. static int safexcel_sha3_export(struct ahash_request *req, void *out)
  2014. {
  2015. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2016. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2017. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2018. ctx->do_fallback = true;
  2019. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_export(subreq, out);
  2020. }
  2021. static int safexcel_sha3_import(struct ahash_request *req, const void *in)
  2022. {
  2023. struct crypto_ahash *tfm = crypto_ahash_reqtfm(req);
  2024. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2025. struct ahash_request *subreq = ahash_request_ctx_dma(req);
  2026. ctx->do_fallback = true;
  2027. return safexcel_sha3_fbcheck(req) ?: crypto_ahash_import(subreq, in);
  2028. // return safexcel_ahash_import(req, in);
  2029. }
  2030. static int safexcel_sha3_cra_init(struct crypto_tfm *tfm)
  2031. {
  2032. struct crypto_ahash *ahash = __crypto_ahash_cast(tfm);
  2033. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2034. safexcel_ahash_cra_init(tfm);
  2035. /* Allocate fallback implementation */
  2036. ctx->fback = crypto_alloc_ahash(crypto_tfm_alg_name(tfm), 0,
  2037. CRYPTO_ALG_ASYNC |
  2038. CRYPTO_ALG_NEED_FALLBACK);
  2039. if (IS_ERR(ctx->fback))
  2040. return PTR_ERR(ctx->fback);
  2041. /* Update statesize from fallback algorithm! */
  2042. crypto_hash_alg_common(ahash)->statesize =
  2043. crypto_ahash_statesize(ctx->fback);
  2044. crypto_ahash_set_reqsize_dma(
  2045. ahash, max(sizeof(struct safexcel_ahash_req),
  2046. sizeof(struct ahash_request) +
  2047. crypto_ahash_reqsize(ctx->fback)));
  2048. return 0;
  2049. }
  2050. static void safexcel_sha3_cra_exit(struct crypto_tfm *tfm)
  2051. {
  2052. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2053. crypto_free_ahash(ctx->fback);
  2054. safexcel_ahash_cra_exit(tfm);
  2055. }
  2056. struct safexcel_alg_template safexcel_alg_sha3_224 = {
  2057. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2058. .algo_mask = SAFEXCEL_ALG_SHA3,
  2059. .alg.ahash = {
  2060. .init = safexcel_sha3_224_init,
  2061. .update = safexcel_sha3_update,
  2062. .final = safexcel_sha3_final,
  2063. .finup = safexcel_sha3_finup,
  2064. .digest = safexcel_sha3_224_digest,
  2065. .export = safexcel_sha3_export,
  2066. .import = safexcel_sha3_import,
  2067. .halg = {
  2068. .digestsize = SHA3_224_DIGEST_SIZE,
  2069. .statesize = sizeof(struct safexcel_ahash_export_state),
  2070. .base = {
  2071. .cra_name = "sha3-224",
  2072. .cra_driver_name = "safexcel-sha3-224",
  2073. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2074. .cra_flags = CRYPTO_ALG_ASYNC |
  2075. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2076. CRYPTO_ALG_NEED_FALLBACK,
  2077. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  2078. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2079. .cra_init = safexcel_sha3_cra_init,
  2080. .cra_exit = safexcel_sha3_cra_exit,
  2081. .cra_module = THIS_MODULE,
  2082. },
  2083. },
  2084. },
  2085. };
  2086. static int safexcel_sha3_256_init(struct ahash_request *areq)
  2087. {
  2088. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2089. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2090. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2091. memset(req, 0, sizeof(*req));
  2092. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256;
  2093. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2094. req->state_sz = SHA3_256_DIGEST_SIZE;
  2095. req->digest_sz = SHA3_256_DIGEST_SIZE;
  2096. req->block_sz = SHA3_256_BLOCK_SIZE;
  2097. ctx->do_fallback = false;
  2098. ctx->fb_init_done = false;
  2099. return 0;
  2100. }
  2101. static int safexcel_sha3_256_digest(struct ahash_request *req)
  2102. {
  2103. if (req->nbytes)
  2104. return safexcel_sha3_256_init(req) ?: safexcel_ahash_finup(req);
  2105. /* HW cannot do zero length hash, use fallback instead */
  2106. return safexcel_sha3_digest_fallback(req);
  2107. }
  2108. struct safexcel_alg_template safexcel_alg_sha3_256 = {
  2109. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2110. .algo_mask = SAFEXCEL_ALG_SHA3,
  2111. .alg.ahash = {
  2112. .init = safexcel_sha3_256_init,
  2113. .update = safexcel_sha3_update,
  2114. .final = safexcel_sha3_final,
  2115. .finup = safexcel_sha3_finup,
  2116. .digest = safexcel_sha3_256_digest,
  2117. .export = safexcel_sha3_export,
  2118. .import = safexcel_sha3_import,
  2119. .halg = {
  2120. .digestsize = SHA3_256_DIGEST_SIZE,
  2121. .statesize = sizeof(struct safexcel_ahash_export_state),
  2122. .base = {
  2123. .cra_name = "sha3-256",
  2124. .cra_driver_name = "safexcel-sha3-256",
  2125. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2126. .cra_flags = CRYPTO_ALG_ASYNC |
  2127. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2128. CRYPTO_ALG_NEED_FALLBACK,
  2129. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  2130. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2131. .cra_init = safexcel_sha3_cra_init,
  2132. .cra_exit = safexcel_sha3_cra_exit,
  2133. .cra_module = THIS_MODULE,
  2134. },
  2135. },
  2136. },
  2137. };
  2138. static int safexcel_sha3_384_init(struct ahash_request *areq)
  2139. {
  2140. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2141. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2142. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2143. memset(req, 0, sizeof(*req));
  2144. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384;
  2145. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2146. req->state_sz = SHA3_384_DIGEST_SIZE;
  2147. req->digest_sz = SHA3_384_DIGEST_SIZE;
  2148. req->block_sz = SHA3_384_BLOCK_SIZE;
  2149. ctx->do_fallback = false;
  2150. ctx->fb_init_done = false;
  2151. return 0;
  2152. }
  2153. static int safexcel_sha3_384_digest(struct ahash_request *req)
  2154. {
  2155. if (req->nbytes)
  2156. return safexcel_sha3_384_init(req) ?: safexcel_ahash_finup(req);
  2157. /* HW cannot do zero length hash, use fallback instead */
  2158. return safexcel_sha3_digest_fallback(req);
  2159. }
  2160. struct safexcel_alg_template safexcel_alg_sha3_384 = {
  2161. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2162. .algo_mask = SAFEXCEL_ALG_SHA3,
  2163. .alg.ahash = {
  2164. .init = safexcel_sha3_384_init,
  2165. .update = safexcel_sha3_update,
  2166. .final = safexcel_sha3_final,
  2167. .finup = safexcel_sha3_finup,
  2168. .digest = safexcel_sha3_384_digest,
  2169. .export = safexcel_sha3_export,
  2170. .import = safexcel_sha3_import,
  2171. .halg = {
  2172. .digestsize = SHA3_384_DIGEST_SIZE,
  2173. .statesize = sizeof(struct safexcel_ahash_export_state),
  2174. .base = {
  2175. .cra_name = "sha3-384",
  2176. .cra_driver_name = "safexcel-sha3-384",
  2177. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2178. .cra_flags = CRYPTO_ALG_ASYNC |
  2179. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2180. CRYPTO_ALG_NEED_FALLBACK,
  2181. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  2182. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2183. .cra_init = safexcel_sha3_cra_init,
  2184. .cra_exit = safexcel_sha3_cra_exit,
  2185. .cra_module = THIS_MODULE,
  2186. },
  2187. },
  2188. },
  2189. };
  2190. static int safexcel_sha3_512_init(struct ahash_request *areq)
  2191. {
  2192. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2193. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2194. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2195. memset(req, 0, sizeof(*req));
  2196. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512;
  2197. req->digest = CONTEXT_CONTROL_DIGEST_INITIAL;
  2198. req->state_sz = SHA3_512_DIGEST_SIZE;
  2199. req->digest_sz = SHA3_512_DIGEST_SIZE;
  2200. req->block_sz = SHA3_512_BLOCK_SIZE;
  2201. ctx->do_fallback = false;
  2202. ctx->fb_init_done = false;
  2203. return 0;
  2204. }
  2205. static int safexcel_sha3_512_digest(struct ahash_request *req)
  2206. {
  2207. if (req->nbytes)
  2208. return safexcel_sha3_512_init(req) ?: safexcel_ahash_finup(req);
  2209. /* HW cannot do zero length hash, use fallback instead */
  2210. return safexcel_sha3_digest_fallback(req);
  2211. }
  2212. struct safexcel_alg_template safexcel_alg_sha3_512 = {
  2213. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2214. .algo_mask = SAFEXCEL_ALG_SHA3,
  2215. .alg.ahash = {
  2216. .init = safexcel_sha3_512_init,
  2217. .update = safexcel_sha3_update,
  2218. .final = safexcel_sha3_final,
  2219. .finup = safexcel_sha3_finup,
  2220. .digest = safexcel_sha3_512_digest,
  2221. .export = safexcel_sha3_export,
  2222. .import = safexcel_sha3_import,
  2223. .halg = {
  2224. .digestsize = SHA3_512_DIGEST_SIZE,
  2225. .statesize = sizeof(struct safexcel_ahash_export_state),
  2226. .base = {
  2227. .cra_name = "sha3-512",
  2228. .cra_driver_name = "safexcel-sha3-512",
  2229. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2230. .cra_flags = CRYPTO_ALG_ASYNC |
  2231. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2232. CRYPTO_ALG_NEED_FALLBACK,
  2233. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  2234. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2235. .cra_init = safexcel_sha3_cra_init,
  2236. .cra_exit = safexcel_sha3_cra_exit,
  2237. .cra_module = THIS_MODULE,
  2238. },
  2239. },
  2240. },
  2241. };
  2242. static int safexcel_hmac_sha3_cra_init(struct crypto_tfm *tfm, const char *alg)
  2243. {
  2244. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2245. int ret;
  2246. ret = safexcel_sha3_cra_init(tfm);
  2247. if (ret)
  2248. return ret;
  2249. /* Allocate precalc basic digest implementation */
  2250. ctx->shpre = crypto_alloc_shash(alg, 0, CRYPTO_ALG_NEED_FALLBACK);
  2251. if (IS_ERR(ctx->shpre))
  2252. return PTR_ERR(ctx->shpre);
  2253. ctx->shdesc = kmalloc(sizeof(*ctx->shdesc) +
  2254. crypto_shash_descsize(ctx->shpre), GFP_KERNEL);
  2255. if (!ctx->shdesc) {
  2256. crypto_free_shash(ctx->shpre);
  2257. return -ENOMEM;
  2258. }
  2259. ctx->shdesc->tfm = ctx->shpre;
  2260. return 0;
  2261. }
  2262. static void safexcel_hmac_sha3_cra_exit(struct crypto_tfm *tfm)
  2263. {
  2264. struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
  2265. crypto_free_ahash(ctx->fback);
  2266. crypto_free_shash(ctx->shpre);
  2267. kfree(ctx->shdesc);
  2268. safexcel_ahash_cra_exit(tfm);
  2269. }
  2270. static int safexcel_hmac_sha3_setkey(struct crypto_ahash *tfm, const u8 *key,
  2271. unsigned int keylen)
  2272. {
  2273. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2274. int ret = 0;
  2275. if (keylen > crypto_ahash_blocksize(tfm)) {
  2276. /*
  2277. * If the key is larger than the blocksize, then hash it
  2278. * first using our fallback cipher
  2279. */
  2280. ret = crypto_shash_digest(ctx->shdesc, key, keylen,
  2281. ctx->base.ipad.byte);
  2282. keylen = crypto_shash_digestsize(ctx->shpre);
  2283. /*
  2284. * If the digest is larger than half the blocksize, we need to
  2285. * move the rest to opad due to the way our HMAC infra works.
  2286. */
  2287. if (keylen > crypto_ahash_blocksize(tfm) / 2)
  2288. /* Buffers overlap, need to use memmove iso memcpy! */
  2289. memmove(&ctx->base.opad,
  2290. ctx->base.ipad.byte +
  2291. crypto_ahash_blocksize(tfm) / 2,
  2292. keylen - crypto_ahash_blocksize(tfm) / 2);
  2293. } else {
  2294. /*
  2295. * Copy the key to our ipad & opad buffers
  2296. * Note that ipad and opad each contain one half of the key,
  2297. * to match the existing HMAC driver infrastructure.
  2298. */
  2299. if (keylen <= crypto_ahash_blocksize(tfm) / 2) {
  2300. memcpy(&ctx->base.ipad, key, keylen);
  2301. } else {
  2302. memcpy(&ctx->base.ipad, key,
  2303. crypto_ahash_blocksize(tfm) / 2);
  2304. memcpy(&ctx->base.opad,
  2305. key + crypto_ahash_blocksize(tfm) / 2,
  2306. keylen - crypto_ahash_blocksize(tfm) / 2);
  2307. }
  2308. }
  2309. /* Pad key with zeroes */
  2310. if (keylen <= crypto_ahash_blocksize(tfm) / 2) {
  2311. memset(ctx->base.ipad.byte + keylen, 0,
  2312. crypto_ahash_blocksize(tfm) / 2 - keylen);
  2313. memset(&ctx->base.opad, 0, crypto_ahash_blocksize(tfm) / 2);
  2314. } else {
  2315. memset(ctx->base.opad.byte + keylen -
  2316. crypto_ahash_blocksize(tfm) / 2, 0,
  2317. crypto_ahash_blocksize(tfm) - keylen);
  2318. }
  2319. /* If doing fallback, still need to set the new key! */
  2320. ctx->fb_do_setkey = true;
  2321. return ret;
  2322. }
  2323. static int safexcel_hmac_sha3_224_init(struct ahash_request *areq)
  2324. {
  2325. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2326. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2327. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2328. memset(req, 0, sizeof(*req));
  2329. /* Copy (half of) the key */
  2330. memcpy(req->state, &ctx->base.ipad, SHA3_224_BLOCK_SIZE / 2);
  2331. /* Start of HMAC should have len == processed == blocksize */
  2332. req->len = SHA3_224_BLOCK_SIZE;
  2333. req->processed = SHA3_224_BLOCK_SIZE;
  2334. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_224;
  2335. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2336. req->state_sz = SHA3_224_BLOCK_SIZE / 2;
  2337. req->digest_sz = SHA3_224_DIGEST_SIZE;
  2338. req->block_sz = SHA3_224_BLOCK_SIZE;
  2339. req->hmac = true;
  2340. ctx->do_fallback = false;
  2341. ctx->fb_init_done = false;
  2342. return 0;
  2343. }
  2344. static int safexcel_hmac_sha3_224_digest(struct ahash_request *req)
  2345. {
  2346. if (req->nbytes)
  2347. return safexcel_hmac_sha3_224_init(req) ?:
  2348. safexcel_ahash_finup(req);
  2349. /* HW cannot do zero length HMAC, use fallback instead */
  2350. return safexcel_sha3_digest_fallback(req);
  2351. }
  2352. static int safexcel_hmac_sha3_224_cra_init(struct crypto_tfm *tfm)
  2353. {
  2354. return safexcel_hmac_sha3_cra_init(tfm, "sha3-224");
  2355. }
  2356. struct safexcel_alg_template safexcel_alg_hmac_sha3_224 = {
  2357. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2358. .algo_mask = SAFEXCEL_ALG_SHA3,
  2359. .alg.ahash = {
  2360. .init = safexcel_hmac_sha3_224_init,
  2361. .update = safexcel_sha3_update,
  2362. .final = safexcel_sha3_final,
  2363. .finup = safexcel_sha3_finup,
  2364. .digest = safexcel_hmac_sha3_224_digest,
  2365. .setkey = safexcel_hmac_sha3_setkey,
  2366. .export = safexcel_sha3_export,
  2367. .import = safexcel_sha3_import,
  2368. .halg = {
  2369. .digestsize = SHA3_224_DIGEST_SIZE,
  2370. .statesize = sizeof(struct safexcel_ahash_export_state),
  2371. .base = {
  2372. .cra_name = "hmac(sha3-224)",
  2373. .cra_driver_name = "safexcel-hmac-sha3-224",
  2374. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2375. .cra_flags = CRYPTO_ALG_ASYNC |
  2376. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2377. CRYPTO_ALG_NEED_FALLBACK,
  2378. .cra_blocksize = SHA3_224_BLOCK_SIZE,
  2379. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2380. .cra_init = safexcel_hmac_sha3_224_cra_init,
  2381. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2382. .cra_module = THIS_MODULE,
  2383. },
  2384. },
  2385. },
  2386. };
  2387. static int safexcel_hmac_sha3_256_init(struct ahash_request *areq)
  2388. {
  2389. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2390. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2391. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2392. memset(req, 0, sizeof(*req));
  2393. /* Copy (half of) the key */
  2394. memcpy(req->state, &ctx->base.ipad, SHA3_256_BLOCK_SIZE / 2);
  2395. /* Start of HMAC should have len == processed == blocksize */
  2396. req->len = SHA3_256_BLOCK_SIZE;
  2397. req->processed = SHA3_256_BLOCK_SIZE;
  2398. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_256;
  2399. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2400. req->state_sz = SHA3_256_BLOCK_SIZE / 2;
  2401. req->digest_sz = SHA3_256_DIGEST_SIZE;
  2402. req->block_sz = SHA3_256_BLOCK_SIZE;
  2403. req->hmac = true;
  2404. ctx->do_fallback = false;
  2405. ctx->fb_init_done = false;
  2406. return 0;
  2407. }
  2408. static int safexcel_hmac_sha3_256_digest(struct ahash_request *req)
  2409. {
  2410. if (req->nbytes)
  2411. return safexcel_hmac_sha3_256_init(req) ?:
  2412. safexcel_ahash_finup(req);
  2413. /* HW cannot do zero length HMAC, use fallback instead */
  2414. return safexcel_sha3_digest_fallback(req);
  2415. }
  2416. static int safexcel_hmac_sha3_256_cra_init(struct crypto_tfm *tfm)
  2417. {
  2418. return safexcel_hmac_sha3_cra_init(tfm, "sha3-256");
  2419. }
  2420. struct safexcel_alg_template safexcel_alg_hmac_sha3_256 = {
  2421. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2422. .algo_mask = SAFEXCEL_ALG_SHA3,
  2423. .alg.ahash = {
  2424. .init = safexcel_hmac_sha3_256_init,
  2425. .update = safexcel_sha3_update,
  2426. .final = safexcel_sha3_final,
  2427. .finup = safexcel_sha3_finup,
  2428. .digest = safexcel_hmac_sha3_256_digest,
  2429. .setkey = safexcel_hmac_sha3_setkey,
  2430. .export = safexcel_sha3_export,
  2431. .import = safexcel_sha3_import,
  2432. .halg = {
  2433. .digestsize = SHA3_256_DIGEST_SIZE,
  2434. .statesize = sizeof(struct safexcel_ahash_export_state),
  2435. .base = {
  2436. .cra_name = "hmac(sha3-256)",
  2437. .cra_driver_name = "safexcel-hmac-sha3-256",
  2438. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2439. .cra_flags = CRYPTO_ALG_ASYNC |
  2440. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2441. CRYPTO_ALG_NEED_FALLBACK,
  2442. .cra_blocksize = SHA3_256_BLOCK_SIZE,
  2443. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2444. .cra_init = safexcel_hmac_sha3_256_cra_init,
  2445. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2446. .cra_module = THIS_MODULE,
  2447. },
  2448. },
  2449. },
  2450. };
  2451. static int safexcel_hmac_sha3_384_init(struct ahash_request *areq)
  2452. {
  2453. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2454. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2455. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2456. memset(req, 0, sizeof(*req));
  2457. /* Copy (half of) the key */
  2458. memcpy(req->state, &ctx->base.ipad, SHA3_384_BLOCK_SIZE / 2);
  2459. /* Start of HMAC should have len == processed == blocksize */
  2460. req->len = SHA3_384_BLOCK_SIZE;
  2461. req->processed = SHA3_384_BLOCK_SIZE;
  2462. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_384;
  2463. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2464. req->state_sz = SHA3_384_BLOCK_SIZE / 2;
  2465. req->digest_sz = SHA3_384_DIGEST_SIZE;
  2466. req->block_sz = SHA3_384_BLOCK_SIZE;
  2467. req->hmac = true;
  2468. ctx->do_fallback = false;
  2469. ctx->fb_init_done = false;
  2470. return 0;
  2471. }
  2472. static int safexcel_hmac_sha3_384_digest(struct ahash_request *req)
  2473. {
  2474. if (req->nbytes)
  2475. return safexcel_hmac_sha3_384_init(req) ?:
  2476. safexcel_ahash_finup(req);
  2477. /* HW cannot do zero length HMAC, use fallback instead */
  2478. return safexcel_sha3_digest_fallback(req);
  2479. }
  2480. static int safexcel_hmac_sha3_384_cra_init(struct crypto_tfm *tfm)
  2481. {
  2482. return safexcel_hmac_sha3_cra_init(tfm, "sha3-384");
  2483. }
  2484. struct safexcel_alg_template safexcel_alg_hmac_sha3_384 = {
  2485. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2486. .algo_mask = SAFEXCEL_ALG_SHA3,
  2487. .alg.ahash = {
  2488. .init = safexcel_hmac_sha3_384_init,
  2489. .update = safexcel_sha3_update,
  2490. .final = safexcel_sha3_final,
  2491. .finup = safexcel_sha3_finup,
  2492. .digest = safexcel_hmac_sha3_384_digest,
  2493. .setkey = safexcel_hmac_sha3_setkey,
  2494. .export = safexcel_sha3_export,
  2495. .import = safexcel_sha3_import,
  2496. .halg = {
  2497. .digestsize = SHA3_384_DIGEST_SIZE,
  2498. .statesize = sizeof(struct safexcel_ahash_export_state),
  2499. .base = {
  2500. .cra_name = "hmac(sha3-384)",
  2501. .cra_driver_name = "safexcel-hmac-sha3-384",
  2502. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2503. .cra_flags = CRYPTO_ALG_ASYNC |
  2504. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2505. CRYPTO_ALG_NEED_FALLBACK,
  2506. .cra_blocksize = SHA3_384_BLOCK_SIZE,
  2507. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2508. .cra_init = safexcel_hmac_sha3_384_cra_init,
  2509. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2510. .cra_module = THIS_MODULE,
  2511. },
  2512. },
  2513. },
  2514. };
  2515. static int safexcel_hmac_sha3_512_init(struct ahash_request *areq)
  2516. {
  2517. struct crypto_ahash *tfm = crypto_ahash_reqtfm(areq);
  2518. struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(tfm);
  2519. struct safexcel_ahash_req *req = ahash_request_ctx_dma(areq);
  2520. memset(req, 0, sizeof(*req));
  2521. /* Copy (half of) the key */
  2522. memcpy(req->state, &ctx->base.ipad, SHA3_512_BLOCK_SIZE / 2);
  2523. /* Start of HMAC should have len == processed == blocksize */
  2524. req->len = SHA3_512_BLOCK_SIZE;
  2525. req->processed = SHA3_512_BLOCK_SIZE;
  2526. ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA3_512;
  2527. req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
  2528. req->state_sz = SHA3_512_BLOCK_SIZE / 2;
  2529. req->digest_sz = SHA3_512_DIGEST_SIZE;
  2530. req->block_sz = SHA3_512_BLOCK_SIZE;
  2531. req->hmac = true;
  2532. ctx->do_fallback = false;
  2533. ctx->fb_init_done = false;
  2534. return 0;
  2535. }
  2536. static int safexcel_hmac_sha3_512_digest(struct ahash_request *req)
  2537. {
  2538. if (req->nbytes)
  2539. return safexcel_hmac_sha3_512_init(req) ?:
  2540. safexcel_ahash_finup(req);
  2541. /* HW cannot do zero length HMAC, use fallback instead */
  2542. return safexcel_sha3_digest_fallback(req);
  2543. }
  2544. static int safexcel_hmac_sha3_512_cra_init(struct crypto_tfm *tfm)
  2545. {
  2546. return safexcel_hmac_sha3_cra_init(tfm, "sha3-512");
  2547. }
  2548. struct safexcel_alg_template safexcel_alg_hmac_sha3_512 = {
  2549. .type = SAFEXCEL_ALG_TYPE_AHASH,
  2550. .algo_mask = SAFEXCEL_ALG_SHA3,
  2551. .alg.ahash = {
  2552. .init = safexcel_hmac_sha3_512_init,
  2553. .update = safexcel_sha3_update,
  2554. .final = safexcel_sha3_final,
  2555. .finup = safexcel_sha3_finup,
  2556. .digest = safexcel_hmac_sha3_512_digest,
  2557. .setkey = safexcel_hmac_sha3_setkey,
  2558. .export = safexcel_sha3_export,
  2559. .import = safexcel_sha3_import,
  2560. .halg = {
  2561. .digestsize = SHA3_512_DIGEST_SIZE,
  2562. .statesize = sizeof(struct safexcel_ahash_export_state),
  2563. .base = {
  2564. .cra_name = "hmac(sha3-512)",
  2565. .cra_driver_name = "safexcel-hmac-sha3-512",
  2566. .cra_priority = SAFEXCEL_CRA_PRIORITY,
  2567. .cra_flags = CRYPTO_ALG_ASYNC |
  2568. CRYPTO_ALG_KERN_DRIVER_ONLY |
  2569. CRYPTO_ALG_NEED_FALLBACK,
  2570. .cra_blocksize = SHA3_512_BLOCK_SIZE,
  2571. .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
  2572. .cra_init = safexcel_hmac_sha3_512_cra_init,
  2573. .cra_exit = safexcel_hmac_sha3_cra_exit,
  2574. .cra_module = THIS_MODULE,
  2575. },
  2576. },
  2577. },
  2578. };